Method and apparatus for inductance soldering of inductors on power modules

By acquiring grayscale and infrared thermal images of the PCB and combining them with the geometric information of the inductor components, the heating rate of the welding process is dynamically adjusted, which solves the problems of inductor component misalignment and bridging, and improves welding quality and production efficiency.

CN121305047BActive Publication Date: 2026-02-10BEIJING HUACHUANG QIXING MICROELECTRONICS CO LTD
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Patent Information

Application Number
CN202511851631.9
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2025-12-10
Publication Date
2026-02-10
Estimated Expiration
2045-12-10

AI Technical Summary

Technical Problem

Existing welding methods cannot monitor the offset and bridging of inductive components in real time, resulting in unstable welding quality, increased defect rate, and difficulty in adapting to complex welding environments and variable component characteristics.

Method used

By acquiring grayscale and infrared thermal images of the PCB, and combining the geometric information of inductors, silkscreen frames, and pads, offset evaluation values ​​and bridging evaluation values ​​are calculated, and the heating rate of the reflow oven is dynamically adjusted to control the soldering process.

Benefits of technology

It enables precise control of the welding process, reduces welding defects, and improves welding quality and production efficiency.

✦ Generated by Eureka AI based on patent content.

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Abstract

The application relates to the technical field of electronic manufacturing, in particular to an inductor welding method and device for assembling an inductor on a power module, which comprises the following steps: acquiring a PCB gray image and an infrared thermal image at each moment during a welding process of a power module PCB; acquiring each element bounding box in the PCB gray image; calculating the overlapping degree and difference degree of each element bounding box to obtain an offset evaluation value at each moment; extracting a closed edge contour in the infrared thermal image, calculating a bridge connection evaluation value of each closed edge contour, and acquiring a potential bridge connection area; determining the bridge connection authenticity at each moment; and adjusting the heating rate of a reflow soldering furnace during the welding process to control the welding process of the inductor on the power module PCB. According to the offset of the inductor element and the bridge connection condition of the welding spot, the application can evaluate the welding quality of the welding process in real time, dynamically adjust the heating rate, and thus realize accurate control over the welding process.
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Description

Technical Field

[0001] This application relates to the field of electronic manufacturing technology, specifically to an inductor welding method and apparatus for mounting inductors on a power module. Background Technology

[0002] As electronic devices develop towards miniaturization, high density, and high reliability, power modules, as core components of electronic devices, typically utilize surface mount technology to mount inductors onto the PCB board. In surface mount technology, reflow soldering is a critical process for soldering inductors and other components, and the soldering quality of the inductors directly determines the operating efficiency and stability of the power module.

[0003] Traditional welding monitoring methods mainly rely on temperature deviation of the solder pads to control temperature. However, during the welding process, inductor components may shift due to thermal stress, uneven solder flow, etc., and the solder diffuses in liquid form after melting, with uncertain and irregular diffusion patterns, which can easily lead to bridging between solder joints. This makes it impossible for traditional methods to adjust the temperature in real time based on the welding quality of inductor components during the welding process. They are also difficult to adapt to complex welding environments and variable component characteristics, making it difficult to achieve precise control of the welding process. This can easily lead to welding defects, increase the defect rate, and reduce production efficiency. Summary of the Invention

[0004] To address the aforementioned technical problems, an inductor welding method and apparatus for mounting inductors on a power module are provided to solve the existing issues.

[0005] The solution to the technical problem of this application is to provide an inductor welding method and apparatus for mounting inductors on a power module, including the following steps:

[0006] In a first aspect, embodiments of this application provide an inductor soldering method for mounting an inductor on a power module, the method comprising the following steps:

[0007] During the soldering process of the power module PCB board, grayscale images and infrared thermal images of the PCB are acquired at various times.

[0008] Based on the geometric information of the silkscreen frame and pad corresponding to the inductor in the PCB board, different inductor, silkscreen frame and pad in the PCB grayscale image are located respectively, and the bounding box of each component, the target bounding box and the pad area in the PCB grayscale image are obtained.

[0009] Analyze the overlap between the bounding boxes of each component and their corresponding target bounding boxes, and calculate the overlap degree of each component bounding box;

[0010] Extract the connected components within the pad area and denote them as solder joint areas. Analyze the distribution differences of gray values ​​of pixels in different solder joint areas corresponding to the bounding boxes of each component in the PCB grayscale image at each time point, as well as the inconsistency of shapes in different solder joint areas. Determine the degree of difference of the bounding boxes of each component, and combine the degree of overlap to obtain the offset evaluation value at each time point.

[0011] Closed edge contours are extracted from infrared thermal images. By analyzing the curvature features of the edge pixels on each closed edge contour and the deviation of the contour shape, the bridging evaluation value of each closed edge contour is calculated. The closed edge contours are then screened to obtain potential bridging regions.

[0012] The bridging accuracy at each time point is determined by analyzing the extreme changes in grayscale values ​​of pixels within potential bridging regions in infrared thermal images at each time point, as well as the location distribution of the minimum grayscale value.

[0013] Based on the offset evaluation value and bridging accuracy, the heating rate of the reflow oven is adjusted during the soldering process to control the soldering process of the inductors on the power module PCB.

[0014] Preferably, the step of obtaining the bounding boxes of each component, the target bounding box, and the pad area in the PCB grayscale image includes:

[0015] Obtain the edge image of the PCB grayscale image, determine the minimum bounding rectangle of each inductor component in the edge image, and record the position of the minimum bounding rectangle in the PCB grayscale image as the component bounding box.

[0016] The geometric information of the silkscreen frame and all pads corresponding to each inductor component is extracted from the PCB engineering drawing. The location of the corresponding silkscreen frame in the PCB grayscale image is recorded as the target bounding box, and the location of the corresponding pad in the PCB grayscale image is recorded as the pad area.

[0017] Preferably, the calculation of the overlap of the bounding boxes of each element includes:

[0018] Calculate the overlap area between the bounding boxes of each component and their corresponding target bounding boxes in the grayscale image of the PCB.

[0019] Calculate the total area between the bounding boxes of each component and their corresponding target bounding boxes in the grayscale image of the PCB.

[0020] The degree of overlap is the ratio of the overlapping area to the total area.

[0021] Preferably, determining the difference in the bounding boxes of each element includes:

[0022] Obtain the grayscale histogram of each solder joint region corresponding to the bounding box of each component in the grayscale image of the PCB; form a grayscale sequence by combining the frequencies corresponding to each grayscale level in the grayscale histogram; calculate the distance between the grayscale sequences of any two solder joint regions.

[0023] Calculate the range of distances between any two solder joint regions corresponding to the bounding boxes of each component in the grayscale image of the PCB, and denote it as the first range;

[0024] Calculate the dispersion of the area of ​​all solder joint regions corresponding to the bounding boxes of each component in the grayscale image of the PCB;

[0025] The degree of difference is the product of the first range and the degree of dispersion.

[0026] Preferably, the offset evaluation value is the sum of the ratios of the difference and the overlap of all component bounding boxes in the PCB grayscale image at each time point.

[0027] Preferably, the calculation of the bridging evaluation value of each closed edge profile includes:

[0028] The ratio of the area of ​​the smallest bounding rectangle of each closed edge contour in an infrared thermal image to the area of ​​the closed edge contour is denoted as the area ratio.

[0029] Curve fitting is performed on the positions of all edge pixels on each closed edge contour in the infrared thermal image, and the curvature of the fitted curve at each edge pixel is calculated; the average curvature of all edge pixels on each closed edge contour is calculated.

[0030] The bridging evaluation value is the product of the average value and the area ratio.

[0031] Preferably, the process of obtaining the potential bridging region is as follows: obtain the segmentation threshold of the bridging evaluation value of all closed edge contours in the infrared thermal image, and record the closed edge contours with bridging evaluation values ​​greater than the segmentation threshold as potential bridging regions.

[0032] Preferably, determining the bridging accuracy at each time point includes:

[0033] Extract the skeleton lines of each potential bridging region; calculate the range of gray values ​​of all pixels on the skeleton lines, and denote it as the second range.

[0034] Select the number of pixels between the pixel with the smallest gray value on the skeleton line and the midpoint of the skeleton line, and perform a positive mapping on the number;

[0035] The sum of the ratios of the second range of all potential bridging regions in the infrared thermal image at each time step to the result of the positive mapping is taken as the bridging accuracy at each time step.

[0036] Preferred, The adjusted heating rate corresponds to the time. The calculation formula is: ,in, for The normalized result of the sum of the offset evaluation value at time and the bridging truth value. This is the preset initial heating rate.

[0037] Secondly, embodiments of this application also provide an inductor welding apparatus for mounting inductors on a power module, including a memory, a processor, and a computer program stored in the memory and running on the processor. When the processor executes the computer program, it implements the steps of the inductor welding method for mounting inductors on a power module as described in any one of the above-mentioned methods.

[0038] This application has at least the following beneficial effects:

[0039] This application locates inductors, silkscreen frames, and pads in a PCB grayscale image, obtaining the bounding boxes of each component, target bounding boxes, and pad regions in the image. The advantages are: firstly, accurately determining the positions of inductors, silkscreen frames, and pads in the image, facilitating subsequent evaluation of inductor offset and solder joint morphology within the pads; secondly, calculating the overlap of each component's bounding boxes, which considers the offset of the inductor relative to the silkscreen frame to assess the degree of offset; thirdly, determining the difference in the bounding boxes of each component, which considers the shape of the solder joints corresponding to the inductor and the uniformity of grayscale distribution of pixels within the solder joints, reflecting the solder joint welding quality and indicating the impact of uneven temperature on the solder joints; and finally, obtaining offset evaluation values ​​at various times, which comprehensively evaluates the positional offset of the inductor and the solder joint welding quality, reflecting the solder joint welding shape. The study assesses the difference between the current state and the ideal state, evaluating the likelihood of process influence from welding temperature; calculates the bridging evaluation value of each closed edge contour to obtain potential bridging areas. This is beneficial because it considers the irregularity of the closed edge contour, reflecting the probability that the closed edge contour belongs to a bridging phenomenon; determines the bridging authenticity at each time point. This is beneficial because it assesses the authenticity of bridging phenomena in potential bridging areas by analyzing the grayscale distribution of pixels corresponding to temperatures within these potential bridging areas, effectively distinguishing between genuine bridging and false bridging caused by heat source reflection or wire heat transfer; and adjusts the heating rate of the reflow oven during the welding process to control the welding process of inductors on the power module PCB. This is beneficial because it reflects the welding quality by evaluating the offset of inductor components and the bridging of solder joints in real time, thereby dynamically adjusting the heating rate to achieve precise control of the welding process, reducing welding defects, improving welding quality, lowering the defect rate, and increasing production efficiency. Attached Figure Description

[0040] The following description, in conjunction with the accompanying drawings, provides a more detailed explanation of an inductor soldering method for mounting inductors on a power module according to this application.

[0041] Figure 1 A flowchart illustrating the steps of an inductor welding method for mounting an inductor on a power module, as provided in an embodiment of this application;

[0042] Figure 2 A flowchart illustrating the steps of the method for obtaining the adjusted heating rate provided in this application embodiment. Detailed Implementation

[0043] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description, in conjunction with the accompanying drawings and embodiments, provides a method and apparatus for soldering inductors onto a power module. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0044] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application pertains.

[0045] Please see Figure 1 The diagram illustrates a flowchart of an inductor soldering method for mounting an inductor on a power module according to an embodiment of this application. The method includes the following steps:

[0046] Step 1: During the soldering process of the power module PCB board, acquire grayscale images and infrared thermal images of the PCB at various times.

[0047] With the miniaturization, integration, and intelligence of electronic products, surface mount technology (SMT), as an important component of electronic products, has been widely applied in various fields of national economic and social development. SMT is a technology and process that precisely mounts inductor components onto printed circuit boards using reflow soldering. The reflow soldering process involves using high temperatures generated by circulating gas in a reflow oven to melt the solder paste pre-placed on the pads of the printed circuit board, creating an electrical and mechanical connection between the leads or solder terminals of the inductor components and the pads. During inductor soldering, defects such as bubbles, solder balls, side impacts, and solder cracks can occur. The main reason for these defects is deviations in temperature control within the reflow oven, leading to substandard soldering quality.

[0048] Based on the above analysis, when soldering the three-dimensional surface mount inductor components onto the assembly surface of the power module PCB, an optical industrial camera is deployed directly above the assembly surface, and an infrared thermal imager is deployed directly below the assembly surface to collect PCB images and infrared thermal images at different times during the soldering process in real time. The PCB images are then preprocessed to obtain grayscale images and infrared thermal images of the PCB at different times.

[0049] It should be noted that the assembly surface refers to the side of the power module PCB board where inductor components need to be soldered; in this embodiment, the optical industrial camera has a pixel count of no less than 12 million pixels and is 300-500mm away from the assembly surface, the infrared thermal imager is 250-300mm away from the assembly surface, and the image acquisition time interval is 1 second. As for other implementation methods, the implementer can set them according to the actual situation.

[0050] The preprocessing process is as follows: the PCB image and infrared thermal image are converted to grayscale using a weighted average grayscale method, the grayscale image is denoised using a nonlocal mean filter, and the image is enhanced using a histogram equalization algorithm. The weighted average grayscale method, nonlocal mean filter and histogram equalization algorithm are all well-known techniques and will not be described in detail here.

[0051] At this point, we have obtained the PCB grayscale images and infrared thermal images at each time point.

[0052] Step 2: Based on the geometric information of the silkscreen frame and pads corresponding to the inductor components in the PCB board, the different inductor components, silkscreen frames, and pads in the PCB grayscale image are located respectively to obtain the bounding boxes of each component, the target bounding boxes, and the pad regions in the PCB grayscale image; the overlap between the area of ​​each component bounding box and its corresponding target bounding box is analyzed, and the overlap degree of each component bounding box is calculated; the connected components in the pad region are extracted and denoted as the solder joint region; the distribution differences of the grayscale values ​​of the pixels in different solder joint regions corresponding to the bounding boxes of each component in the PCB grayscale image at each time point are analyzed, as well as the inconsistency of the shapes of different solder joint regions, to determine the difference degree of each component bounding box. Combined with the overlap degree, the offset evaluation value at each time point is obtained.

[0053] During the soldering process of inductors, reflow soldering technology gradually heats the solder pads on the power module PCB, causing the solder to transform from a solid to a liquid state. The liquid solder wets the pads and the leads of the inductor. After cooling and solidifying, it forms a full and strong solder joint. However, if temperature deviations occur during reflow soldering, and the solder on the pads containing the two leads of the same inductor melts and solidifies asynchronously, it will cause deviations in the shape of the inductor, such as misalignment of the soldering position or pins, thus affecting the soldering quality.

[0054] Since the inductor components in the PCB grayscale image have good distinguishability from the background, image segmentation is performed on the PCB grayscale image to convert it into a binary image, avoiding interference from irrelevant information on the PCB board. Secondly, the image after threshold segmentation may have holes, burrs, and isolated pixels in solder joint areas and component pin outlines due to uneven lighting. This can interfere with the extraction of basic features such as area, perimeter, and connected regions. Therefore, morphological processing of the binary image is performed using erosion, dilation, and opening / closing operations, specifically:

[0055] After binarizing the grayscale image of the PCB, morphological operations are performed on the acquired binarized image.

[0056] In this embodiment, the Otsu thresholding method is used for image binarization, and then the opening operation is used for morphological processing. Both the Otsu thresholding method and the opening operation are well-known techniques and will not be described in detail here.

[0057] Since the shape of surface-mount inductors can be approximately rectangular, the inductor can be located by finding the smallest circumscribed rectangle. Specifically:

[0058] Edge detection is performed on the binarized image to obtain the edge image. The Graham algorithm is then used to detect the minimum bounding rectangle of each inductor element in the edge image. The position of the minimum bounding rectangle in the PCB grayscale image is recorded as the element bounding box.

[0059] In this embodiment, the Canny edge detection algorithm is used for edge detection. The Canny edge detection algorithm is a well-known technology and will not be described in detail here. As for other implementation methods, implementers can use other methods from the prior art, such as the Sobel operator, etc. This embodiment does not impose any special restrictions on this. Secondly, the specific process of inductor element positioning based on the Graham algorithm is a well-known technology, and the specific process is as follows:

[0060] Since the geometric features of the inductors that need to be mounted on the PCB are known, such as length, width, height, and solder pad size, a convex hull point set is obtained by performing convex hull processing on the edge image. Then, the Graham algorithm is used to find the minimum convex polygon of the convex hull point set. Based on the minimum convex polygon, the bounding rectangle of the inductor is calculated for each edge. The area of ​​the rectangle is calculated and the rectangle information is saved. Finally, the multiple bounding rectangles are analyzed, and the bounding rectangle with the smallest area is selected. The smallest bounding rectangle represents the area where the inductor is located.

[0061] Secondly, since PCB boards have corresponding PCB engineering drawings during the design process, the positional relationships of inductor components can be obtained using these drawings. Specifically:

[0062] The geometric information of the silkscreen frame and all pads corresponding to each inductor component is extracted from the PCB engineering drawing. The location of the corresponding silkscreen frame in the PCB grayscale image is recorded as the target bounding box, and the location of the corresponding pad in the PCB grayscale image is recorded as the pad area.

[0063] It should be noted that the silkscreen frame indicates the mounting position, orientation, and some important identification information of the inductor component, while the pad is the soldering position of the inductor component's pins. The geometric information of each silkscreen frame and pad can be determined through the PCB engineering drawing. Therefore, the target bounding box indicates the position where the inductor component should be placed, while the component bounding box indicates the actual placement position and orientation of the inductor component.

[0064] Since the silkscreen outline on the PCB is slightly larger than the inductor component, under ideal soldering conditions, the component bounding box corresponding to the inductor component should be within the target bounding box. However, due to deviations in soldering temperature, the inductor component may experience shape deviations or twisting, potentially causing it to not completely fall within the silkscreen outline. When the inductor component shifts, the area between its component bounding box and the target bounding box only partially overlaps. Therefore, by analyzing the overlap between the component bounding box and the target bounding box, the offset is calculated as follows:

[0065] Calculate the overlap area between the bounding boxes of each component and their corresponding target bounding boxes in the grayscale image of the PCB.

[0066] Calculate the total area between the bounding boxes of each component and their corresponding target bounding boxes in the grayscale image of the PCB.

[0067] It should be noted that the area between the component bounding box and the target bounding box is determined by the number of pixels within the bounding box.

[0068] The ratio of the overlapping area to the total area is used as the overlap degree of the bounding boxes of each element;

[0069] It should be noted that the smaller the overlapping area, the more the area of ​​the component boundary frame represented by the inductor is offset outside the silkscreen frame, and the greater the overlap, the less likely the soldering of the inductor will be offset.

[0070] Furthermore, the ideal soldering form is as follows: the solder joints of the pads where the different pins of the inductor are located are full, the shape of the solder joints is relatively consistent when the inductor is soldered, and the overall uniformity of the solder joints is high; however, when the temperature diffusion is uneven and the temperature rise rate is too fast during the reflow soldering process, the melting and cooling of the solder on different pads are not synchronized, and defects such as bubbles, solder balls and solder cracks will occur.

[0071] Based on the above analysis, when the solder joints within different pads are generally full and uniform, the grayscale distribution of pixels within the area of ​​the pad is relatively uniform. Therefore, by analyzing the uniformity of pixel distribution within solder joints and the shape of the solder joints in the PCB grayscale image, the degree of difference can be determined, specifically as follows:

[0072] Extract the connected components within the pad region of the PCB grayscale image and denote them as the solder joint region;

[0073] It should be noted that the extraction of connected components is a well-known technique and will not be elaborated upon here.

[0074] Obtain the grayscale histogram of each solder joint region corresponding to the bounding box of each component in the grayscale image of the PCB, and form a grayscale sequence by combining the frequencies corresponding to each grayscale level in the grayscale histogram;

[0075] It should be noted that the acquisition of grayscale histograms is a well-known technique and will not be elaborated upon here.

[0076] Calculate the distance between the grayscale sequences of any two solder joint regions;

[0077] In this embodiment, the distance is calculated by measuring the DTW distance of the grayscale sequence between any two solder joint regions. The DTW distance is a well-known technique and will not be described in detail here.

[0078] Calculate the range of distances between any two solder joint regions corresponding to the bounding boxes of each component in the grayscale image of the PCB, and denote it as the first range;

[0079] Calculate the dispersion of the area of ​​all solder joint regions corresponding to the bounding boxes of each component in the grayscale image of the PCB;

[0080] In this embodiment, the area of ​​the solder joint region is measured by the number of all pixels within the solder joint region, and the dispersion is measured by calculating the variance of the area of ​​all solder joint regions corresponding to the bounding boxes of each component in the grayscale image of the PCB. As other implementation methods, implementers may use other methods of the prior art, such as standard deviation, etc., and this embodiment does not impose any special restrictions on this.

[0081] Calculate the product of the first range and the degree of dispersion as the difference degree of the bounding boxes of each element;

[0082] It should be noted that the greater the distance, the greater the difference in grayscale distribution of pixels in the two solder joint areas. The greater the first range, the more inconsistent the grayscale distribution of pixels in different solder joint areas corresponding to the component's bounding box, which may indicate uneven soldering temperature or uneven solder flow. The greater the dispersion, the greater the shape difference of different solder joint areas corresponding to the component's bounding box. The greater the difference, the greater the difference between different solder joints in the soldering process, reflecting the influence of temperature and poor overall uniformity of the solder joints.

[0083] Then, based on the difference and the overlap, the offset evaluation value is determined, specifically as follows:

[0084] The sum of the ratios of the difference and overlap of the bounding boxes of all components in the PCB grayscale image at each time point is used as the offset evaluation value at each time point.

[0085] It should be noted that the larger the offset evaluation value, the more significant the difference between the welding state of the inductor and the ideal state, and the greater the influence of the welding temperature process.

[0086] Thus, the offset evaluation values ​​for each time point are obtained.

[0087] Step 3: Extract closed edge contours from the infrared thermal image. Calculate the bridging evaluation value of each closed edge contour based on the curvature features of the edge pixels and the deviation of the contour shape. Filter the closed edge contours to obtain potential bridging regions. Determine the bridging accuracy at each time step by analyzing the extreme changes in grayscale values ​​of pixels within each potential bridging region in the infrared thermal image at each time step, as well as the location distribution of the minimum grayscale value.

[0088] The PCB board of the power module mainly relies on a support structure formed by a reasonable copper wire layout and a substrate. The substrate is made of a mixture of glass fiber and resin. The copper wires and the substrate exhibit differences in temperature diffusion and radiation. The soldering principle of the PCB board primarily utilizes molten solder on the pads to stably fix the pads to the inductor component leads, forming independent and full solder joints. However, during the soldering process, differences in temperature diffusion and solder adhesion may cause bridging between different solder joints. This bridging can even occur at the bottom of the inductor component, obscured by the inductor itself and undetectable by PCB grayscale images.

[0089] Under normal soldering conditions, the temperature of the solder pads is high, and the melted solder forms independent, full solder joints. Each solder pad is independent of the others, with no temperature distribution or bridging between them. However, in actual soldering, excessive solder or an undersized inductor can cause reverse bridging between the solder pads corresponding to the inductor. This bridging can short-circuit the inductor's leads, affecting its normal operation. Furthermore, although the solder pads are independent, the copper wires connecting them are interconnected, and heat is transferred along these wires. Secondly, during reflow soldering or other heat-generating processes, heat may be reflected from other solder pads. This reflected heat can interfere with the infrared thermal image, causing false "hot spots." Therefore, both heat transfer and reflection can create false bridging in the infrared thermal image.

[0090] Based on the above analysis, each solder joint is an independent heat source. Due to the melting and solidification process of the solder, the solder joint area will have a certain temperature distribution. In infrared thermal images, these solder joints usually appear as relatively independent thermal regions. If bridging occurs, multiple solder joints will form a larger thermal region. Therefore, each solder joint or bridging region will form a closed edge, thus allowing the extraction of the closed edge contour from the infrared thermal image, specifically:

[0091] Edge detection is performed on infrared thermal images, and a contour tracking algorithm is used to extract closed edge contours;

[0092] In this embodiment, the Canny edge detection algorithm is used for edge detection. Both the Canny edge detection algorithm and the contour tracking algorithm are well-known technologies and will not be described in detail here. As other implementation methods, implementers may use other methods of existing technology, such as the Sobel operator, etc. This embodiment does not impose any special restrictions on this.

[0093] It should be noted that a single closed edge profile may represent a heat source corresponding to a single solder joint or a heat source formed by bridging multiple solder joints.

[0094] Secondly, for normal solder joints, after the solder melts, it forms a full, smooth, approximately hemispherical or frustum-shaped shape on the pad, with relatively regular edges. In infrared thermal images, this solder joint will appear as a bright spot that is close to a circle or ellipse. The actual hot area of ​​the solder joint basically coincides with the area of ​​its smallest bounding rectangle. That is, in infrared thermal images, the smallest bounding rectangle of the closed edge contour basically coincides with the closed edge contour, and the closed edge contour is relatively regular and smooth. However, when false bridging and true bridging occur, the temperature distribution of two independent pads becomes connected. In infrared thermal images, this will appear as an irregular, elongated bright spot, resulting in a lower degree of overlap between the smallest bounding rectangle of the closed edge contour and the closed edge contour, and the closed edge contour will be irregular.

[0095] Based on the above analysis, the bridging evaluation value is calculated by measuring the shape changes of each closed edge contour in the infrared thermal image, specifically:

[0096] The ratio of the area of ​​the smallest bounding rectangle of each closed edge contour in an infrared thermal image to the area of ​​the closed edge contour is denoted as the area ratio.

[0097] In this embodiment, the area of ​​the minimum bounding rectangle and the area of ​​the closed edge contour are determined by the number of pixels within the minimum bounding rectangle and the number of pixels within the closed edge contour, respectively.

[0098] Curve fitting is performed on the positions of all edge pixels on each closed edge contour in the infrared thermal image, and the curvature of the fitted curve at each edge pixel is calculated.

[0099] In this embodiment, the least squares method is used for curve fitting. The least squares method and the calculation of curvature are well-known techniques and will not be described in detail here.

[0100] Calculate the average curvature of all edge pixels on each closed edge contour in an infrared thermal image;

[0101] The product of the average value and the area ratio is used as the bridging evaluation value of each closed edge contour in the infrared thermal image;

[0102] It should be noted that the larger the area ratio, the less the area of ​​the smallest bounding rectangle overlaps with the area of ​​the closed edge contour. The larger the average value, the more frequent and drastic the changes in the direction of the closed edge contour, and the higher the irregularity of the closed edge contour. The larger the obtained bridging evaluation value, the more likely the closed edge contour is to exhibit bridging phenomena.

[0103] Furthermore, the bridging assessment value cannot reflect whether the closed edge contour is a true or false bridge. Therefore, it is necessary to use the bridging assessment value to screen the closed edge contour and identify potential bridging regions. Specifically:

[0104] Obtain the segmentation threshold of the bridging evaluation value of all closed edge contours in the infrared thermal image, and record the closed edge contours with bridging evaluation values ​​greater than the segmentation threshold as potential bridging regions;

[0105] In this embodiment, the Otsu threshold segmentation method is used to obtain the segmentation threshold. The Otsu threshold segmentation method is a well-known technology and will not be described in detail here. As other implementation methods, implementers may use other methods of the prior art, such as cross-validation. This embodiment does not impose any special restrictions on this.

[0106] Secondly, for genuine bridging, there is a connection between the two solder joints with solder material. The difference in temperature radiation from the solder material is small, and the temperature distribution of the solder material connecting the two solder joints is relatively uniform, with little overall temperature change. However, for false bridging, which is formed by reflection from other heat sources or transfer through copper wires, the temperature of the false "hot spots" caused by reflection from other heat sources is usually lower than the temperature of the actual solder joint. As for false bridging caused by wire transfer, the heat transfer of the wire gradually decreases with distance, and there is a layer of solder resist film on the surface of the wire. This makes the temperature of the false bridging lower than the temperature of the actual solder joint. In other words, the temperature distribution between the two solder joints corresponding to the false bridging is uneven, and there is a significant temperature change.

[0107] Therefore, by analyzing the changes in the grayscale values ​​of pixels corresponding to temperature within the potential bridging region, the bridging fidelity is calculated, specifically as follows:

[0108] Extract the skeleton lines of each potential bridging region;

[0109] In this embodiment, a backbone line extraction algorithm is used to extract the skeleton line. The backbone line extraction algorithm is a well-known technology and will not be described in detail here.

[0110] Calculate the range of gray values ​​of all pixels on the skeleton line, and denote it as the second range;

[0111] It should be noted that the grayscale value of a pixel in an infrared thermal image is directly proportional to the temperature of that point. Therefore, the higher the grayscale value, the higher the temperature of that point.

[0112] Select the number of pixels between the pixel with the smallest gray value on the skeleton line and the midpoint of the skeleton line, and perform a positive mapping on the number;

[0113] In this embodiment, the specific process of positive mapping is as follows: positive mapping is performed through an exponential function, assuming the number is denoted as... ,Will The result is taken as the result of the positive mapping, where, Let be an exponential function with the natural constant as its base. Through the process of positive mapping, the result of the positive mapping is made to be greater than 0.

[0114] The sum of the ratios of the second range of all potential bridging regions in the infrared thermal image at each time point to the result of the positive mapping is taken as the bridging accuracy at each time point.

[0115] It should be noted that the larger the second range, the more uneven the temperature distribution in the potential bridging region. Secondly, for spurious bridging, there can be obvious temperature changes on the backbone line, with the temperature of the solder joints being high and the temperature of the bridging part being slightly lower. At the same time, the position of minimum temperature is generally located at the midpoint between two solder joints. Therefore, the smaller the result of the positive mapping, the closer the position of minimum temperature is to the midpoint, the greater the realism of the bridging, and the more likely the potential bridging region is to have a real bridging phenomenon.

[0116] Thus, the authenticity of the bridge connection at each moment is obtained.

[0117] Step 4: Based on the offset evaluation value and bridging accuracy, adjust the heating rate of the reflow oven during the soldering process to control the soldering process of the inductors on the power module PCB.

[0118] Furthermore, during the soldering process, the solder needs to reach a certain temperature to melt and wet the pads and inductor leads. When the solder melts and becomes liquid, it generates surface tension. This force tries to minimize the surface area of ​​the liquid solder. If the soldering temperature is too high or uneven, it may lead to inconsistent wetting force of the solder. For example, if the solder at both ends of the inductor cannot melt simultaneously, and one end melts first while the other end has not yet melted, the side that melts first will generate a pulling force, thereby pushing the inductor to shift and causing it to deviate. In particular, if the heating rate is too fast, it will exacerbate this asynchronous melting situation, so that after the inductor is pulled off course, it does not have enough time to be pulled back to the correct position by the force of the other side after melting. Secondly, if the overall temperature is too high or the heating rate is too fast, the fluidity of the molten solder will surge, breaking through the isolation of the solder mask layer and easily forming bridging.

[0119] Therefore, based on the offset evaluation value and bridging accuracy, the heating rate of the reflow oven during the welding process is adjusted as follows:

[0120] The normalized result of the sum of the offset evaluation value and the bridging truth value is used as the adjustment coefficient at each time step;

[0121] In this embodiment, the sigmoid function is used for normalization. The sigmoid function is a well-known technique and will not be described in detail here. As other implementation methods, implementers may use other methods of the prior art, such as the tanh function. This embodiment does not impose any special restrictions on this.

[0122] It should be noted that the larger the adjustment coefficient, the more severe the inductor component misalignment and solder bridging, and the greater the impact of excessively rapid heating rate, requiring a reduction in the heating rate.

[0123] The formula for calculating the adjusted heating rate is:

[0124]

[0125] in, This represents the adjusted heating rate at time t+1. Let be the adjustment factor at time t. The preset initial heating rate;

[0126] In this embodiment, in the traditional reflow soldering process, a fixed heating rate is used for control, with a value ranging from 5℃ / s to 8℃ / s. Therefore, the preset initial heating rate... The value is set to 5℃ / s. As another implementation method, the implementer can set it according to the actual situation.

[0127] Based on the adjusted heating rate, the reflow oven's control module controls the heating rate of the soldering process by adjusting the output power of the heater, thereby controlling the soldering process of the inductors on the power module PCB.

[0128] Furthermore, the flowchart of the method for obtaining the adjusted heating rate provided in this application embodiment is as follows: Figure 2 As shown.

[0129] Based on the same inventive concept as the above method, this application embodiment also provides an inductor welding device for mounting inductors on a power module, including a memory, a processor, and a computer program stored in the memory and running on the processor. When the processor executes the computer program, it implements the steps of any one of the above-described inductor welding methods for mounting inductors on a power module.

[0130] It should be understood that, although Figure 1 The steps in the flowchart are shown sequentially as indicated by the arrows, but these steps are not necessarily executed in the order indicated by the arrows. Unless otherwise specified herein, there is no strict order in which these steps are executed, and they can be performed in other orders. Figure 1 At least some of the steps in the process may include multiple sub-steps or multiple stages. These sub-steps or stages are not necessarily completed at the same time, but can be executed at different times. The execution order of these sub-steps or stages is not necessarily sequential, but can be executed in turn or alternately with other steps or at least some of the sub-steps or stages of other steps.

[0131] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0132] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of this application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application. Therefore, any simple modifications, equivalent changes, and alterations made to the above embodiments based on the technical essence of this application, without departing from the content of the technical solution of this application, shall fall within the protection scope of the technical solution of this application.

Claims

1. A method for soldering inductors onto a power module, characterized in that, The method includes the following steps: During the soldering process of the power module PCB board, grayscale images and infrared thermal images of the PCB are acquired at various times. Based on the geometric information of the silkscreen frame and pad corresponding to the inductor in the PCB board, different inductor, silkscreen frame and pad in the PCB grayscale image are located respectively, and the bounding box of each component, the target bounding box and the pad area in the PCB grayscale image are obtained. Analyze the overlap between the bounding boxes of each component and their corresponding target bounding boxes, and calculate the overlap degree of each component bounding box; Extract the connected components within the pad area and denote them as solder joint areas. Analyze the distribution differences of gray values ​​of pixels in different solder joint areas corresponding to the bounding boxes of each component in the PCB grayscale image at each time point, as well as the inconsistency of shapes in different solder joint areas. Determine the degree of difference of the bounding boxes of each component, and combine the degree of overlap to obtain the offset evaluation value at each time point. Closed edge contours are extracted from infrared thermal images. By analyzing the curvature features of the edge pixels on each closed edge contour and the deviation of the contour shape, the bridging evaluation value of each closed edge contour is calculated. The closed edge contours are then screened to obtain potential bridging regions. The bridging accuracy at each time point is determined by analyzing the extreme changes in grayscale values ​​of pixels within potential bridging regions in infrared thermal images at each time point, as well as the location distribution of the minimum grayscale value. Based on the offset evaluation value and bridging accuracy, the heating rate of the reflow oven is adjusted during the soldering process to control the soldering process of the inductors on the power module PCB.

2. The inductor soldering method for mounting inductors on a power module as described in claim 1, characterized in that, The process of acquiring the bounding boxes of each component, the target bounding box, and the pad area in the PCB grayscale image includes: Obtain the edge image of the PCB grayscale image, determine the minimum bounding rectangle of each inductor component in the edge image, and record the position of the minimum bounding rectangle in the PCB grayscale image as the component bounding box. The geometric information of the silkscreen frame and all pads corresponding to each inductor component is extracted from the PCB engineering drawing. The location of the corresponding silkscreen frame in the PCB grayscale image is recorded as the target bounding box, and the location of the corresponding pad in the PCB grayscale image is recorded as the pad area.

3. The inductor soldering method for mounting inductors on a power module as described in claim 1, characterized in that, The calculation of the overlap of the bounding boxes of each element includes: Calculate the overlap area between the bounding boxes of each component and their corresponding target bounding boxes in the grayscale image of the PCB. Calculate the total area between the bounding boxes of each component and their corresponding target bounding boxes in the grayscale image of the PCB. The degree of overlap is the ratio of the overlapping area to the total area.

4. The inductor soldering method for mounting inductors on a power module as described in claim 1, characterized in that, Determining the difference in the bounding boxes of each element includes: Obtain the grayscale histogram of each solder joint region corresponding to the bounding box of each component in the grayscale image of the PCB; form a grayscale sequence by combining the frequencies corresponding to each grayscale level in the grayscale histogram; calculate the distance between the grayscale sequences of any two solder joint regions. Calculate the range of distances between any two solder joint regions corresponding to the bounding boxes of each component in the grayscale image of the PCB, and denote it as the first range; Calculate the dispersion of the area of ​​all solder joint regions corresponding to the bounding boxes of each component in the grayscale image of the PCB; The degree of difference is the product of the first range and the degree of dispersion.

5. The inductor soldering method for mounting inductors on a power module as described in claim 1, characterized in that, The offset evaluation value is the sum of the ratios of the difference and the overlap of the bounding boxes of all components in the PCB grayscale image at each time point.

6. The inductor soldering method for assembling an inductor on a power module as described in claim 1, characterized in that, The calculation of the bridging evaluation value for each closed edge profile includes: The ratio of the area of ​​the smallest bounding rectangle of each closed edge contour in an infrared thermal image to the area of ​​the closed edge contour is denoted as the area ratio. Curve fitting is performed on the positions of all edge pixels on each closed edge contour in the infrared thermal image, and the curvature of the fitted curve at each edge pixel is calculated; the average curvature of all edge pixels on each closed edge contour is calculated. The bridging evaluation value is the product of the average value and the area ratio.

7. The inductor soldering method for mounting inductors on a power module as described in claim 1, characterized in that, The process of obtaining the potential bridging region is as follows: obtain the segmentation threshold of the bridging evaluation value of all closed edge contours in the infrared thermal image, and record the closed edge contours with bridging evaluation values ​​greater than the segmentation threshold as potential bridging regions.

8. The inductor soldering method for mounting inductors on a power module as described in claim 1, characterized in that, Determining the bridge realism at each time point includes: Extract the skeleton lines of each potential bridging region; calculate the range of gray values ​​of all pixels on the skeleton lines, and denote it as the second range. Select the number of pixels between the pixel with the smallest gray value on the skeleton line and the midpoint of the skeleton line, and perform a positive mapping on the number; The bridging accuracy is the sum of the ratios of the second range of all potential bridging regions in the infrared thermal image at each time point to the result of the positive mapping.

9. The inductor soldering method for assembling an inductor on a power module as described in claim 1, characterized in that, The adjusted heating rate corresponds to the time. The calculation formula is: ,in, for The normalized result of the sum of the offset evaluation value at time and the bridging truth value. This is the preset initial heating rate.

10. An inductor welding apparatus for mounting inductors on a power module, comprising a memory, a processor, and a computer program stored in the memory and running on the processor, characterized in that, When the processor executes the computer program, it implements the steps of the inductor soldering method for mounting inductors on a power module as described in any one of claims 1-9.

Citation Information

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