A memristor and a preparation method thereof, and a memristor simulation model

Abstract

The application provides a memristor and a preparation method and a simulation model thereof. The concentration of Zr doping in a hafnium oxide-based thin film layer is controlled to regulate the concentration of oxygen vacancies, and the migration rate of the oxygen vacancies is effectively adjusted. After an external electric field is applied, oxygen ions migrate to the top electrode interface under the action of a strong electric field, leaving positively charged oxygen vacancies, so that a conductive filament composed of oxygen vacancies is formed in the hafnium oxide-based thin film layer, the memristor is in a low resistance state, and a reverse electric field drives the oxygen ions to recombine with the oxygen vacancies, so that the tip of the conductive filament is locally broken, a gap is generated between the conductive filament and the top electrode, and the memristor returns to a high resistance state. The memristor has a highly controllable resistance change behavior. The simulation model is based on the mechanism of the generation of the conductive filament of the memristor, a dynamic evolution equation of the conductive filament is established, the relationship between the voltage difference between the two ends of the memristor and the current flowing through the memristor is described, and reliable theoretical tools and prediction ability are provided for device design and circuit optimization.

Description

Technical Field

[0001] This invention belongs to the field of non-volatile memory technology, and particularly relates to a memristor, its fabrication method, and a memristor simulation model. Background Technology

[0002] Memristors, compared to traditional non-volatile memories such as flash memory, offer advantages such as simple structure, low power consumption during read / write operations, high storage density, and compatibility with complementary metal-semiconductor (CMIS) processes, making them considered the most promising next-generation non-volatile memory. Memristors typically consist of a sandwich-like structure formed by a simple metal layer / resistive switching layer / metal layer. Commonly used resistive switching layer materials include metal oxides, perovskites, and halides. In particular, binary transition metal oxides such as titanium oxide, zirconium oxide, hafnium oxide, and tantalum oxide are considered the most promising resistive switching materials due to their low cost and ease of fabrication.

[0003] Meanwhile, with the continuous evolution of semiconductor technology and the increasing demand for lightweight systems, transistor-memristor integration technology has shown great application potential in next-generation non-volatile memory and neuromorphic computing. Memristors, as two-terminal electronic devices with resistive memory characteristics, store data by switching between high-resistance and low-resistance states; the greater the difference between the high-resistance and low-resistance states, the more data can be stored. However, the integration of transistors and memristors faces numerous challenges, including unclear process design, lack of simulation models, poor predictability, and low accuracy.

[0004] It should be noted that the above introduction to the technical background is only for the purpose of providing a clear and complete explanation of the technical solutions of this application and facilitating understanding by those skilled in the art. It should not be assumed that these technical solutions are known to those skilled in the art simply because they have been described in the background section of this application. Summary of the Invention

[0005] In view of the shortcomings of the prior art described above, the purpose of this invention is to provide a memristor and its fabrication method, as well as a memristor simulation model, to solve the problems of unclear integration process schemes for transistors and memristors, lack of simulation models, poor predictability, and low accuracy in the prior art.

[0006] To achieve the above and other related objectives, the present invention provides a method for fabricating a memristor, comprising the following steps:

[0007] A substrate is provided and the substrate is pretreated to form a bottom electrode on the substrate;

[0008] A first functional layer is formed on the bottom electrode, wherein the first functional layer is a Zr-doped hafnium oxide thin film layer;

[0009] A second functional layer is formed on the first functional layer, wherein the second functional layer is an aluminum oxide thin film layer;

[0010] A top electrode is formed on the second functional layer.

[0011] Optionally, the pretreatment includes ultrasonic cleaning of the substrate in sequence with acetone, isopropanol and deionized water, with a total ultrasonic cleaning time of 15-20 minutes.

[0012] Optionally, the Zr doping concentration in the hafnium oxide-based thin film layer is 0~100%, the thickness of the hafnium oxide-based thin film layer is 1~20nm, and the thickness of the alumina thin film layer is 0.1~4nm.

[0013] Optionally, the materials forming the bottom electrode and the top electrode include at least one of TiN, W, Ag and Pt.

[0014] Optionally, the thickness of the bottom electrode is 20~200 nm, and the thickness of the top electrode is 20~200 nm.

[0015] Optionally, the method for forming the bottom electrode, the first functional layer, the second functional layer and the top electrode includes atomic layer deposition, magnetron sputtering deposition or laser pulse deposition.

[0016] The present invention also provides a memristor, which is prepared by the above-described method and consists of, from bottom to top, a substrate, a bottom electrode, a Zr-doped hafnium oxide thin film layer, an aluminum oxide thin film layer, and a top electrode.

[0017] Optionally, a DC electric field is applied to the memristor, enabling the memristor to switch between a high-resistance state and a low-resistance state, wherein the voltage amplitude of the DC electric field is 0.5~20V and the duration is 1s~100h.

[0018] Optionally, a pulsed electric field is applied to the memristor, enabling the memristor to switch between a high-resistance state and a low-resistance state. The voltage amplitude of the pulsed electric field is 0.5~20V, the frequency is 1Hz~100MHz, and the waveform of the pulsed electric field includes any one of a triangular wave, a sine wave, and a square wave.

[0019] This invention also provides a memristor simulation model. Based on the above-mentioned memristor, a memristor simulation model is established. The memristor simulation model characterizes the resistance state of the memristor by describing the dynamic change of the distance between the tip of the conductive filament and the top electrode.

[0020] The equation for the evolution of the distance between the tip of the conductive filament and the top electrode is as follows:

[0021] ;

[0022] in, The distance between the tip of the conductive filament and the top electrode is represented by q, the amount of negative charge carried by the electron is represented by k, the Boltzmann constant is represented by T, and the ambient temperature of the memristor is represented by E. A This represents the activation energy of a Zr-doped hafnium oxide-based thin film. This represents the interatomic spacing of a Zr-doped hafnium oxide-based thin film. This represents the thickness of the Zr-doped hafnium oxide-based thin film layer.

[0023] ;

[0024] ;

[0025]

[0026]

[0027] in, This is represented as the distance between the tip of the conductive filament and the top electrode. Fitting parameters for volatility, Represented as a fluctuation smoothing parameter, This is expressed as a threshold temperature; when this threshold temperature is exceeded, the distance between the tip of the conductive filament and the top electrode... Significant changes will occur. Represented as a thermal resistor, its value is determined by both the memristor and the testing environment. This represents a Gaussian noise sequence with a root mean square of 1 and a mean of zero, randomly generated for each time step.

[0028] The current-voltage curve characteristics of the memristor simulation model follow the equation:

[0029] ;

[0030] Where I represents the current flowing through the memristor, and V represents the voltage difference across the memristor. , , , , α and β are fitting parameters used to characterize the intermediate state characteristics of the memristor during the resistance state transition.

[0031] As described above, the memristor and its fabrication method, as well as the memristor simulation model of the present invention, employ atomic layer deposition (ALD) to fabricate a bilayer functional layer of Zr-doped hafnium oxide / alumina thin film. By controlling the Zr doping concentration to regulate the oxygen vacancy concentration, the formation barrier and migration rate of oxygen vacancies in the functional layer can be effectively adjusted, enabling the memristor to possess highly controllable resistive switching behavior and significantly improving the reliability of data storage. When an external electric field is applied to the bottom and top electrodes, oxygen ions migrate towards the top electrode interface under the influence of a strong electric field, leaving positively charged oxygen vacancies. This forms conductive filaments composed of oxygen vacancies in the Zr-doped hafnium oxide thin film, thereby enabling the memristor to operate in a state of flux. In the low-resistivity state, the reverse electric field drives oxygen ions to return and recombine with oxygen vacancies, causing local breakage at the tip of the conductive filament composed of oxygen vacancies, thus creating a gap with the top electrode. Ultimately, the memristor returns to the high-resistivity state. The memristor simulation model provided in this application is based on the mechanism of conductive filament generation in memristors. It establishes a dynamic evolution equation for the conductive filament, describing the relationship between the voltage difference across the memristor and the current flowing through the memristor. This allows the spacing between the tip of the conductive filament composed of oxygen vacancies in the memristor functional layer and the top electrode to be controlled by an external electric field, thereby controlling the tunneling current flowing through the memristor. This provides a solid and reliable theoretical tool and predictive capability for device design and circuit optimization. Attached Figure Description

[0032] Figure 1 The diagram shown is a process flow chart of a method for fabricating a memristor provided in an embodiment of this application.

[0033] Figure 2 The diagram shown is a cross-sectional view of a memristor forming a substrate and a bottom electrode, as provided in an embodiment of this application.

[0034] Figure 3 The diagram shown is a cross-sectional view of a functional layer formed in a memristor according to an embodiment of this application.

[0035] Figure 4 The diagram shown is a cross-sectional view of a memristor forming a top electrode, as provided in an embodiment of this application.

[0036] Explanation of icon numbers

[0037] 101. Substrate; 102. Bottom electrode; 103. Zr-doped hafnium oxide thin film layer; 104. Alumina thin film layer; 105. Top electrode; S1~S4. Steps. Detailed Implementation

[0038] The following specific examples illustrate the implementation of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.

[0039] In the detailed description of embodiments of the present invention, for ease of explanation, the cross-sectional views illustrating the device structure may be partially enlarged and not to scale. Furthermore, the schematic diagrams are merely examples and should not limit the scope of protection of the present invention. In actual fabrication, the three-dimensional spatial dimensions of length, width, and depth should be included.

[0040] For ease of description, spatial relation terms such as “below,” “under,” “lower than,” “below,” “above,” and “upper” may be used herein to describe the relationship between one element or feature shown in the accompanying drawings and other elements or features. It will be understood that these spatial relation terms are intended to include orientations of the device in use or operation other than those depicted in the drawings, and may include embodiments in which the first and second features are formed in direct contact, or embodiments in which additional features are formed between the first and second features, such that the first and second features may not be in direct contact. Furthermore, when a layer is referred to as “between” two layers, it may be the only layer between the two layers, or there may be one or more layers in between.

[0041] Please see Figures 1 to 4 It should be noted that the illustrations provided in this embodiment are only schematic representations of the basic concept of the present invention. Therefore, the drawings only show the components related to the present invention and are not drawn according to the actual number, shape and size of the components in the actual implementation. In the actual implementation, the form, quantity and proportion of each component can be arbitrarily changed, and the layout of the components may also be more complex.

[0042] Example 1

[0043] This embodiment provides a method for fabricating a memristor, such as... Figure 1 The diagram shown is a process flow chart of the fabrication method of the memristor, including the following steps:

[0044] S1: Provide a substrate 101 and pre-treat the substrate 101 to form a bottom electrode 102 on the substrate 101;

[0045] S2: A first functional layer is formed on the bottom electrode 102, wherein the first functional layer is a Zr-doped hafnium oxide thin film layer 103;

[0046] S3: A second functional layer is formed on the first functional layer, wherein the second functional layer is an aluminum oxide thin film layer 104;

[0047] S4: A top electrode 105 is formed on the second functional layer.

[0048] The fabrication method of the memristor in this embodiment will be described in detail below with reference to the specific accompanying drawings.

[0049] like Figure 2 As shown, step S1 is performed, a substrate 101 is provided and the substrate 101 is pretreated to form a bottom electrode 102 on the substrate 101.

[0050] Optionally, the substrate 101 can be any suitable semiconductor substrate 101, such as a silicon (Si) substrate 101, a germanium (Ge) substrate 101, a silicon germanide (SiGe) substrate 101, a silicon carbide (SiC) substrate 101, a gallium nitride (GaN) substrate 101, or a silicon-on-insulator (SOI) substrate 101, etc., selected according to requirements. In this embodiment, for example... Figure 2 As shown, the substrate 101 is a silicon substrate 101.

[0051] As an example, the pretreatment includes ultrasonic cleaning of the substrate 101 in sequence with acetone, isopropanol and deionized water, with a total ultrasonic cleaning time of 15-20 minutes.

[0052] Specifically, before forming the bottom electrode 102 on the substrate 101, the surface of the substrate 101 is pretreated. The pretreatment process includes ultrasonic cleaning of the substrate 101 with acetone, isopropanol and deionized water in sequence to remove contaminants on the surface of the substrate 101. The total ultrasonic cleaning time is 15-20 minutes. After that, the substrate is dried. Alternatively, the substrate 101 can be cleaned with a diluted acid solution first, followed by cleaning with deionized water and finally drying with high-purity nitrogen. Or, the aforementioned cleaning methods can be used to perform multiple cleanings to ensure that the contaminants on the surface of the substrate 101 can be completely removed.

[0053] As an example, the materials forming the bottom electrode 102 and the top electrode 105 include at least one of TiN, W, Ag and Pt, the thickness of the bottom electrode 102 is 20~200 nm, and the thickness of the top electrode 105 is 20~200 nm.

[0054] In this embodiment, after pretreatment of the substrate 101, a bottom electrode 102 is prepared on the surface of the substrate 101 using a magnetron sputtering process. Specifically, the silicon substrate 101 is placed in the growth chamber of the magnetron sputtering equipment to grow a bottom electrode 102 on the silicon substrate 101. The bottom electrode 102 has a thickness of 30 nm and is made of a TiN thin film.

[0055] like Figure 3 As shown, step S2 is performed to form a first functional layer on the bottom electrode 102. The first functional layer is a Zr-doped hafnium oxide-based thin film layer 103.

[0056] Optionally, a precursor and an oxidizing gas are introduced into the deposition chamber, and an atomic layer deposition process is used to prepare a first functional layer on the bottom electrode 102. The first functional layer is a Zr-doped hafnium oxide thin film layer 103. The precursor includes HfCl4 and ZrCl4, and the oxidizing gas includes H2O and O2. The Zr doping concentration in the hafnium oxide thin film layer 103 is 0-100%, and the thickness of the hafnium oxide thin film layer 103 is 1-20 nm. Specifically, in this embodiment, the Zr doping concentration in the hafnium oxide thin film layer 103 is 80%, that is, the first functional layer is HfCl4. 0.2 Zr 0.8 O2, the thickness of the first functional layer is 6nm.

[0057] The Zr-doped hafnium oxide thin film 103 contains abundant oxygen ions. Under an applied electric field, the oxygen ions migrate, leaving only positively charged oxygen vacancies. This eventually forms a conductive channel composed of oxygen vacancies in the Zr-doped hafnium oxide thin film 103. When a voltage opposite to the applied electric field is applied, the oxygen ions migrate again and recombine with the oxygen vacancies, causing the conductive channel composed of oxygen vacancies to break.

[0058] like Figure 3 As shown, step S3 is performed to form a second functional layer on the first functional layer. The second functional layer is an alumina thin film layer 104.

[0059] Optionally, an atomic layer deposition process is used to prepare a second functional layer on the first functional layer. The first functional layer is an alumina thin film layer 104 with a thickness of 0.1~4nm. Specifically, in this embodiment, the thickness of the second functional layer is 2nm.

[0060] The alumina thin film layer 104 can effectively adjust the barrier height between the top electrode 105 and the first functional layer, significantly suppressing leakage current. Furthermore, the high oxygen ion migration barrier of the alumina thin film layer 104 effectively regulates the migration kinetics of oxygen vacancies, allowing for the directional migration of a suitable amount of oxygen ions under a strong electric field to promote the formation of conductive filaments, while simultaneously ensuring the controllable recombination of oxygen ions and oxygen vacancies to achieve localized breakage of the conductive filaments. This bidirectional regulation mechanism significantly improves the device's cycle durability. Moreover, as a diffusion barrier layer, the alumina thin film layer 104 prevents mutual diffusion and interfacial reactions between the top electrode 105 and the hafnium oxide-based thin film, significantly improving the long-term stability of the device and extending its service life.

[0061] like Figure 4 As shown, step S4 is performed to form a top electrode 105 on the second functional layer.

[0062] Specifically, a PMMA photoresist solution is dropped onto the second functional layer and spin-coated at 500–8000 rpm for 0.1–3 minutes to obtain a photoresist layer with a thickness of approximately 0.1–10 μm. The photoresist layer is then exposed and developed to pattern it. A top electrode 105 is deposited on the second functional layer using magnetron sputtering. The top electrode 105 has a thickness of 60 nm and is a composite layer formed of TiN and W thin films, wherein the TiN thin film layer has a thickness of 30 nm and the W thin film layer has a thickness of 30 nm. After forming the top electrode 105, a step of stripping the photoresist layer is included, for example, immersing the substrate 101 in acetone at 0–50°C to remove the photoresist layer.

[0063] Example 2

[0064] This embodiment also provides a memristor, which is fabricated using the preparation method described in Embodiment 1 or other suitable similar methods. For details regarding the fabrication method, materials, and structure of the memristor, please refer to Embodiment 1. Specifically, refer to... Figure 4 The diagram shows a cross-sectional view of the memristor, which consists of a substrate 101, a bottom electrode 102, a Zr-doped hafnium oxide thin film layer 103, an aluminum oxide thin film layer 104, and a top electrode 105, from bottom to top.

[0065] After establishing an electrical connection between the memristor and a semiconductor parameter analyzer, the resistance state changes of the memristor can be analyzed. Specifically, a DC electric field is applied to the memristor, enabling it to switch between high and low resistance states. The voltage amplitude of the DC electric field is 0.5~20V, for example, 6V or -4V. The duration of the DC electric field application is 1s~100h. When the DC electric field voltage scans from 0V to 10V, the device exhibits a high resistance state. When the DC electric field voltage increases to 6V, oxygen ions migrate towards the interface of the top electrode 105 under the influence of the strong electric field, thereby leaving positively charged oxygen vacancies in the Zr-doped hafnium oxide thin film layer 103. Eventually, conductive filaments composed of oxygen vacancies will be formed in the bilayer structure of the Zr-doped hafnium oxide thin film layer 103 / alumina thin film layer 104, giving the memristor a low-resistance state. This process is called the set process. Subsequently, the current remains in the low-resistance state as it returns from 6V to 0V. Then, the voltage is scanned from 0V to -6V, and the device exhibits non-volatile characteristics, still showing a high-current low-resistance state. When the DC electric field voltage reaches -4V, the reverse electric field will drive oxygen ions to recombine with oxygen vacancies, eventually causing a local breakage at the tip of the conductive filament. This creates a gap between the tip of the conductive filament and the top electrode 105, allowing the memristor to return to a high-resistance state. This process is called the reset process.

[0066] In another embodiment, a pulsed electric field can be applied to the memristor, wherein the voltage amplitude of the pulsed electric field is 0.5~20V, the frequency is 1Hz~100MHz, and the waveform of the pulsed electric field is a sine wave. This can also enable the memristor to have the characteristic of switching between high-resistance and low-resistance states. The principle is the same as when a DC electric field is applied to the memristor, and will not be described again here.

[0067] Example 3

[0068] This embodiment also provides a memristor simulation model, which is based on the memristor in Embodiment 2. The memristor simulation model characterizes the resistance state of the memristor by describing the dynamic change of the distance between the tip of the conductive filament and the top electrode 105.

[0069] The equation for the evolution of the distance between the tip of the conductive filament and the top electrode 105 is as follows:

[0070] ; (1)

[0071] in, The distance between the tip of the conductive filament and the top electrode 105 is represented by q, q represents the amount of negative charge carried by the electron, k represents the Boltzmann constant, T represents the ambient temperature where the memristor is located, and E represents the distance between the tip of the conductive filament and the top electrode 105. AThis represents the activation energy of the Zr-doped hafnium oxide-based thin film layer 103. This represents the interatomic spacing of the Zr-doped hafnium oxide-based thin film layer 103. The thickness of the Zr-doped hafnium oxide-based thin film layer 103 is represented by the thickness of the film.

[0072] In equation (1) This represents the rate of change of the distance g between the tip of the conductive filament and the top electrode 105. When the voltage difference V across the memristor is positive, A negative value indicates that the conductive filament is growing, the distance g between the tip of the conductive filament and the top electrode 105 is gradually decreasing, and the memristor device is transitioning to a low-resistance state; when the voltage difference V across the memristor is negative, A positive value indicates that the conductive filament is retracting, the distance g between the tip of the conductive filament and the top electrode 105 is gradually increasing, and the memristor device is transitioning to a high-resistivity state.

[0073] In equation (1) g and It can be represented by the following three functional equations:

[0074] ; (2)

[0075] ; (3)

[0076] (4)

[0077] ; (5)

[0078] in, This is indicated by the distance between the tip of the conductive filament and the top electrode 105. Fitting parameters for volatility, Represented as a fluctuation smoothing parameter, This is expressed as a threshold temperature; when this threshold temperature is exceeded, the distance between the tip of the conductive filament and the top electrode 105... Significant changes will occur. Represented as a thermal resistor, its value is determined by both the memristor and the testing environment. This represents a Gaussian noise sequence with a root mean square of 1 and a mean of zero, randomly generated for each time step.

[0079] The current-voltage curve characteristics of the memristor simulation model follow the equation:

[0080] ; (6)

[0081] Where I represents the current flowing through the memristor, and V represents the voltage difference across the memristor. , , , , α and β are fitting parameters used to characterize the intermediate state characteristics of the memristor during the resistance state transition.

[0082] Specifically, , , As parameters for regulating the current-voltage characteristic curve, used to characterize the intermediate state features during resistive-state transition, they can be obtained by fitting experimental data, where, It primarily determines the current magnitude of the current-voltage curve, that is, changing... This will result in a vertical shift in the current-voltage curve. This determines the window size between the high-resistivity state and the low-resistivity state. The larger the value, the smaller the window between the high-resistance state and the low-resistance state, and the closer the resistance values ​​between the high-resistance state and the low-resistance state are. The slope change of the current-voltage characteristic curve in the non-switching region is described. and Determine the distance between the tip of the conductive filament and the top electrode 105. The voltage that begins to change, i.e. It mainly affects the magnitude of the reset threshold voltage. This determines the magnitude of the set threshold voltage, and and The slope and curvature of the current-voltage curve during the reset process are determined respectively.

[0083] Equation (6) describes the relationship between the voltage difference across the memristor and the current flowing through the memristor, so that the distance between the tip of the conductive filament composed of oxygen vacancies in the functional layer of the memristor and the top electrode 105 can be controlled by an external electric field, thereby controlling the tunneling current flowing through the memristor.

[0084] In summary, the memristor, its fabrication method, and its simulation model proposed in this invention employ atomic layer deposition (ALD) to prepare a bilayer functional layer of Zr-doped hafnium oxide / aluminum oxide thin film. By controlling the Zr doping concentration to regulate the oxygen vacancy concentration, the formation barrier and migration rate of oxygen vacancies in the functional layer can be effectively adjusted, enabling the memristor to exhibit highly controllable resistive switching behavior. The aluminum oxide thin film acts as a diffusion barrier layer, preventing interdiffusion and interface reactions between the top electrode and the hafnium oxide thin film, significantly improving the long-term stability of the device, extending its lifespan, and significantly enhancing the reliability of data storage. Furthermore, when an external electric field is applied to the bottom and top electrodes, oxygen ions migrate towards the top electrode interface under the influence of a strong electric field, leaving positively charged oxygen vacancies in the Zr… Conductive filaments composed of oxygen vacancies are formed in the doped hafnium oxide-based thin film layer, putting the memristor in a low-resistance state. Then, a reverse electric field drives oxygen ions to return and recombine with the oxygen vacancies, causing local breakage at the tip of the conductive filaments, creating a gap with the top electrode. This ultimately restores the memristor to a high-resistance state. The memristor simulation model provided in this application, based on the mechanism of conductive filament formation, establishes a dynamic evolution equation for the conductive filaments, describing the relationship between the voltage difference across the memristor and the current flowing through it. This allows control of the distance between the tip of the conductive filaments and the top electrode by an external electric field, thereby controlling the tunneling current flowing through the memristor. This provides a solid and reliable theoretical tool and predictive capability for device design and circuit optimization. Therefore, this invention effectively overcomes the various shortcomings of existing technologies and has high industrial application value.

[0085] The above embodiments are merely illustrative of the principles and effects of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in the present invention should still be covered by the claims of the present invention.

Claims

1. A memristor simulation model, characterized in that, A memristor is fabricated using a method that includes providing a substrate and pretreating the substrate; forming a bottom electrode on the substrate with a thickness of 20-200 nm; forming a first functional layer on the bottom electrode, the first functional layer being a Zr-doped hafnium oxide thin film with a thickness of 1-20 nm; forming a second functional layer on the first functional layer, the second functional layer being an alumina thin film with a thickness of 0.1-4 nm; and forming a top electrode on the second functional layer with a thickness of 20-200 nm. A DC electric field is applied to the fabricated memristor to enable it to switch between high and low resistance states. The voltage amplitude of the DC electric field is 0.5–20V, and the duration is 1 s–100 h. Alternatively, a pulsed electric field is applied to the memristor to enable it to switch between high and low resistance states. The voltage amplitude of the pulsed electric field is 0.5–20V, and the frequency is 1 Hz–100 MHz. The waveform of the pulsed electric field includes any one of a triangular wave, a sine wave, and a square wave. A memristor simulation model is established based on the memristor. The memristor simulation model characterizes the resistance state of the memristor by describing the dynamic change in the distance between the tip of the conductive filament and the top electrode. The equation for the evolution of the distance between the tip of the conductive filament and the top electrode is as follows: ； in, The distance between the tip of the conductive filament and the top electrode is represented by q, the amount of negative charge carried by the electron is represented by k, the Boltzmann constant is represented by T, and the ambient temperature of the memristor is represented by E. A This represents the activation energy of a Zr-doped hafnium oxide-based thin film. This represents the interatomic spacing of a Zr-doped hafnium oxide-based thin film. This represents the thickness of the Zr-doped hafnium oxide-based thin film layer. ； ； ； ； in, This is represented as the distance between the tip of the conductive filament and the top electrode. Fitting parameters for volatility, Represented as a fluctuation smoothing parameter, This is expressed as a threshold temperature; when this threshold temperature is exceeded, the distance between the tip of the conductive filament and the top electrode... Significant changes will occur. Represented as a thermal resistor, its value is determined by both the memristor and the testing environment. This represents a Gaussian noise sequence with a root mean square of 1 and a mean of zero, randomly generated for each time step. The current-voltage curve characteristics of the memristor simulation model follow the equation: ； Where I represents the current flowing through the memristor, and V represents the voltage difference across the memristor. These are all fitting parameters used to characterize the intermediate state characteristics of the memristor during its resistance state transition.

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