Data transmission method and device of network on chip, routing node and storage medium

Abstract

The embodiment of the application discloses a data transmission method and device of a network on chip, a routing node and a storage medium. The method comprises the following steps: in the case that a data packet sent by an upstream routing node is received, a target output direction of the data packet is confirmed; based on an arbitration result of a target arbitrator of the target output direction on the data packet, the data packet is written into a target output register or a target backup register of the target output direction, or a retransmission signal for the data packet is sent to the upstream routing node; the data packet is sent to a downstream routing node of the target output direction through the target output register or the target backup register, and the data packet is temporarily stored in the target backup register or the target output register before it is confirmed that the downstream routing node receives the data packet; in the case that a retransmission signal sent by the downstream routing node for the data packet is received, the data packet is sent to the downstream routing node from the target backup register or the target output register.

Description

TECHNICAL FIELD

[0001] The present application relates to, but is not limited to, the technical field of network-on-chip, and particularly relates to a data transmission method and device of network-on-chip, a routing node and a storage medium. BACKGROUND

[0002] With the rapid development of multi-core processors and network-on-chip (NoC) technologies, efficient data communication has become the key to improving system performance. Network-on-chip realizes the temporary storage and delivery of data packets through routing nodes, and the flow control mode of the routing nodes directly affects the communication efficiency, system latency and hardware area.

[0003] In the prior art, a Valid-Ready flow control scheme is usually used, which controls the data flow through valid and ready signals to ensure that the data does not overflow or flow out in the downstream buffer. However, this scheme requires a large depth of FIFO buffer to deal with possible traffic fluctuations, resulting in a significant increase in hardware area. In addition, the valid-ready flow control is not suitable for network-on-chip routing scenarios because it cannot effectively handle multiple competitions and head congestion problems, limiting the communication efficiency. SUMMARY

[0004] Therefore, the embodiments of the present application provide at least a data transmission method and device of network-on-chip, a routing node and a storage medium.

[0005] The technical scheme of the embodiments of the present application is as follows:

[0006] On the one hand, the embodiments of the present application provide a data transmission method of network-on-chip, which is applied to a routing node in network-on-chip, wherein the routing node is provided with an output register, a backup register and an arbitrator in each output direction, and the method comprises the following steps:

[0007] In the case of receiving a data packet sent by an upstream routing node, the target output direction of the data packet is confirmed;

[0008] Based on the arbitration result of the target arbitrator corresponding to the target output direction on the data packet, the data packet is written into the target output register or the target backup register corresponding to the target output direction, or a retransmission signal for the data packet is sent to the upstream routing node;

[0009] The data packet is sent to the downstream routing node in the target output direction through the target output register or the target backup register, and the data packet is temporarily stored in the target backup register or the target output register before the downstream routing node confirms the reception of the data packet;

[0010] In a case that a retransmission signal sent by the downstream routing node for the data packet is received, the data packet is sent from the target backup register or the target output register to the downstream routing node.

[0011] In another aspect, an embodiment of the present application provides a data transmission device of a network-on-chip, applied to a routing node in a network-on-chip, wherein an output register, a backup register and an arbitrator are arranged in each output direction of the routing node, and the device comprises:

[0012] a processing module, configured to, in a case that a data packet sent by an upstream routing node is received, confirm a target output direction of the data packet;

[0013] a transmission module, configured to, based on an arbitration result of a target arbitrator corresponding to the target output direction for the data packet, write the data packet into a target output register or a target backup register corresponding to the target output direction, or send a retransmission signal for the data packet to the upstream routing node; send the data packet to a downstream routing node in the target output direction through the target output register or the target backup register, and temporarily store the data packet in the target backup register or the target output register before confirming that the data packet is received by the downstream routing node; and in a case that a retransmission signal sent by the downstream routing node for the data packet is received, send the data packet from the target backup register or the target output register to the downstream routing node.

[0014] In still another aspect, an embodiment of the present application provides a routing node, comprising: a processor, and an output register, a backup register and an arbitrator arranged in each output direction of the routing node, wherein the processor implements part or all steps of the data transmission method of the network-on-chip when executing a program.

[0015] In yet another aspect, an embodiment of the present application provides a computer readable storage medium, having stored thereon a computer program, which, when executed by a processor, implements part or all steps of the data transmission method of the network-on-chip.

[0016] In still another aspect, an embodiment of the present application provides a computer program, comprising computer readable code, which, when executed in a routing node, causes a processor in the routing node to implement part or all steps of the data transmission method of the network-on-chip.

[0017] In yet another aspect, an embodiment of the present application provides a computer program product, which includes a non-transitory computer readable storage medium storing a computer program, and the computer program is read and executed by a computer to implement some or all of the steps in the data transmission method of the network-on-chip.

[0018] The embodiment of the present application can coordinate the output of data packets by setting an arbiter in each output direction to arbitrate data packets from different input directions, and can adjust the sending order of data packets through the arbiter when blocking occurs, thereby eliminating the head blocking phenomenon, and can ensure continuous transmission of data packets in the network-on-chip without interruption by buffering data packets in the backup register and the data register before the data packets are successfully received by the downstream route, and can adapt to various network topologies with only a small amount of register resources, minimize the hardware area requirement, and enhance the reliability and scalability of the overall network.

[0019] It should be understood that the above general description and the following detailed description are only exemplary and explanatory, but not limiting the technical solutions of the present application. BRIEF DESCRIPTION OF DRAWINGS

[0020] The accompanying drawings, which are incorporated into and form part of the specification, illustrate embodiments consistent with the present application and, together with the specification, serve to explain the technical solutions of the present application.

[0021] Figure 1 An implementation flowchart of a data transmission method of a network-on-chip provided by an embodiment of the present application;

[0022] Figure 2 A component structure diagram of a routing node provided by an embodiment of the present application;

[0023] Figure 3 A data transmission diagram of a data transmission method of a network-on-chip provided by an embodiment of the present application;

[0024] Figure 4 A system transmission diagram of a data transmission method of a network-on-chip provided by an embodiment of the present application;

[0025] Figure 5 A component structure diagram of a data transmission device of a network-on-chip provided by an embodiment of the present application;

[0026] Figure 6 A hardware entity diagram of a routing node provided by an embodiment of the present application. DETAILED DESCRIPTION

[0027] In order to make the purposes, technical solutions and advantages of the present application clearer, the technical solutions of the present application are further described in detail below in combination with the drawings and embodiments, and the described embodiments should not be regarded as limitations of the present application. All other embodiments obtained by those skilled in the art without creative labor fall within the scope of protection of the present application.

[0028] In the following description, "some embodiments" are related to a subset of all possible embodiments, but it can be understood that "some embodiments" can be the same subset or different subsets of all possible embodiments, and can be combined with each other without conflict.

[0029] The terms "first / second / third" involved are only to distinguish similar objects, and do not represent a specific order of the objects. It can be understood that "first / second / third" can be interchanged with a specific order or sequence as allowed, so that the embodiments of the present application described herein can be implemented in an order other than that illustrated or described herein.

[0030] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which the present application belongs. The terms used herein are only for the purpose of describing the present application and are not intended to limit the present application.

[0031] The embodiments of the present application provide a data transmission method of a network-on-chip, applied to a routing node in the network-on-chip, wherein an output register, a backup register and an arbitrator are arranged in each output direction of the routing node. Figure 1 The implementation flowchart of the data transmission method of the network-on-chip provided by the embodiments of the present application is shown as Figure 1 The method comprises the following steps.

[0032] Step 101, in the case of receiving a data packet sent by an upstream routing node, confirming a target output direction of the data packet.

[0033] In the embodiments of the present application, the network-on-chip (NoC) is a new communication method of a system-on-chip (SoC), as a main component of multi-core technology, concurrent communication is realized through distributed routing nodes and time-division multiplexing links, replacing the traditional bus architecture to solve the problems of scalability and performance bottleneck. The slice component is a hardware device arranged between routing nodes in the system-on-chip (SoC), which at least has the functions of data processing, data transmission and data storage.

[0034] The target input direction refers to the physical channel direction of the data packet entering the current routing node, for example, westward or northward. The upstream routing node refers to the routing node before the current routing node and responsible for forwarding the data packet. The data packet is a transmission unit containing routing information and payload data, used for communication in the network-on-chip.

[0035] With reference to Figure 2 The execution subject of the embodiments of the present application is the routing node two 2 in Figure 2 If the sender of the data packet is the routing node one 1, the routing node one 1 is the upstream routing node, and if the receiver of the data packet is the routing node three 3, the routing node three 3 is the downstream routing node. If the receiver of the data packet is the routing node 4, the routing node 4 is the downstream routing node. That is, the upstream routing node and the downstream routing node are not specific to a certain fixed routing node, but are relative to the direction of data transmission, that is, the upstream routing node means the routing node sending the data packet to the slice component, and the downstream routing node means the routing node receiving the data packet from the slice component.

[0036] When the current routing node receives the data packet sent by the upstream routing node from the target input direction, the current routing node first parses the routing information field in the data packet. The current routing node calculates the target output direction, for example, southward or eastward, of the data packet according to the predefined routing algorithm. This process ensures that the data packet can be correctly transmitted according to the network topology rules, avoiding path errors.

[0037] In step 102, based on the arbitration result of the target arbitrator corresponding to the target output direction for the data packet, the data packet is written into the target output register or the target backup register corresponding to the target output direction, or a retransmission signal for the data packet is sent to the upstream routing node.

[0038] In the embodiments of the present application, the target arbitrator is a logical functional block responsible for determining which data packet obtains the output channel authorization from the transmission requests of multiple data channels according to rules.

[0039] The current routing node sends an output application signal of the data packet to the target arbitrator corresponding to the target output direction. The output application can include the identifier and priority information of the data packet, and the arbitrator processes the competitive requests of multiple input directions according to the preset arbitration strategy (such as polling or priority). The current routing node ensures that the application signal is transmitted in time to coordinate the transmission order of multiple data packets.

[0040] For the data message without arbitration priority, it indicates that the current routing node cannot send the data message at this moment, and the current routing node can send a retransmission signal for the data message to the upstream routing node to instruct the upstream routing node to resend the data message at the next time node, so as to ensure that the data transmission between the current routing nodes will not be interrupted. In this way, the data message that is not sent temporarily does not need to be stored in the current routing node locally, and the buffer resource of the current routing node can be saved.

[0041] For the data message with arbitration priority, it indicates that the target output register or the target backup register in the current routing node can send the data message at this moment, and then the current routing node writes the data message into the target output register or the target backup register for sending. Whether the data message is written into the target output register or the target backup register mainly depends on which one has a sending condition, for example, the register is empty at the current time, or the register is empty at the next time. If both the target output register and the target backup register have the sending condition, the data message is preferentially written into the target output register.

[0042] In step 103, the data message is sent to the downstream routing node in the target output direction through the target output register or the target backup register, and the data message is temporarily stored in the target backup register or the target output register before the downstream routing node receives the data message.

[0043] In the embodiment of the present application, the downstream routing node is a current routing node located after the current routing node and receiving the data message. The temporary storage is to temporarily save the data message in the register for subsequent use.

[0044] The current routing node sends the data message to the downstream routing node in the target output direction through the target output register or the target backup register. The sending process includes serialization and transmission control of the data message. At the same time, the current routing node temporarily stores the data message in the register that is not used for sending (for example, if the data message is sent from the output register, it is backed up to the backup register), forming a redundant backup to prevent data loss and support the retransmission mechanism.

[0045] In step 104, in the case that the retransmission signal for sending the data message is received from the downstream routing node, the data message is sent to the downstream routing node from the target backup register or the target output register.

[0046] In the embodiment of the present application, the retransmission signal is an instruction sent by the downstream routing node, indicating that the data message is not correctly received and needs to be retransmitted.

[0047] The current routing node retrieves the data packet from the target backup register or the target output register upon receiving a retransmission signal sent by a downstream routing node. The current routing node retransmits the data packet to the downstream routing node in the target output direction, ensuring the reliability of transmission. This process can involve multiple retransmissions until the downstream node confirms the reception, thereby maintaining the continuity of the data flow.

[0048] The embodiments of the present application coordinate the output of data packets by arbitrating the data packets from different input directions through the arbitration device set in each output direction. When congestion occurs, the arbitration device adjusts the transmission order of the data packets, thereby eliminating the head congestion phenomenon. The data packets are buffered in the backup register and the data register before being successfully received by the downstream routing node, ensuring the continuous transmission of the data packets in the network-on-chip without interruption. Moreover, the embodiments of the present application can adapt to various network topologies with only a small amount of register resources, minimize the hardware area requirement, and enhance the reliability and scalability of the overall network.

[0049] In some embodiments, the step 102 comprises:

[0050] In step 1021, the target arbitration device assigns arbitration priority to the data packet, and the target output register or the target backup register meets the input condition. In this case, the data packet is written into the target output register or the target backup register corresponding to the target output direction.

[0051] In the embodiments of the present application, after the target arbitration device assigns arbitration priority to the data packet, the current routing node checks whether the target output register or the target backup register meets the input condition (for example, the register is empty or can be received). If any register meets the condition, the current routing node writes the data packet into the register. The writing process includes the complete copy of the data packet and the state update, ensuring the safe storage and preparation for transmission of the data.

[0052] In step 1022, the target arbitration device does not assign arbitration priority to the data packet, or neither the target output register nor the target backup register meets the input condition. In this case, a retransmission signal for the data packet is sent to the upstream routing node.

[0053] In the embodiments of the present application, arbitration priority is the authorized state of the arbitration device assigned to the data packet, allowing it to use the output resources preferentially. The target output register is a logical unit for temporarily storing the data packet in the output direction. The target backup register is an additional storage unit for backing up the data packet in the output register to prevent data loss. The input condition is the judgment standard for whether the data packet can be written into the register, including whether the register is empty or in a receivable state. The retransmission signal is an instruction sent to the upstream routing node, requiring the retransmission of the data packet.

[0054] The current routing node checks whether the data packet obtains arbitration priority from the arbitrator, and evaluates the state of the target output register and the target backup register. If the data packet does not obtain the priority, or both registers do not meet the input condition (for example, the register is full or unavailable), the current routing node generates a resend signal and sends it to the upstream routing node. The resend signal triggers the upstream node to retransmit the data packet, ensuring that the data flow is not interrupted.

[0055] In some embodiments, the step 1022 comprises: in the case that the target arbitrator does not assign arbitration priority to the data packet, or the target output register and the target backup register are both not empty and the resend signal corresponding to the target output register is not empty, sending a resend signal for the data packet to the upstream routing node.

[0056] In the embodiments of the present application, the current routing node first checks whether the data packet does not obtain the arbitration priority assigned by the target arbitrator, or simultaneously checks whether the target output register and the target backup register are both not empty and the resend signal corresponding to the target output register is not empty. If any of the conditions is met, the current routing node generates a resend signal and sends the signal to the upstream routing node through the communication interface. The resend signal contains the identification information of the data packet, and after receiving the signal, the upstream routing node will reattempt to send the data packet according to the preset rule. This process does not involve the change of the arbitration pointer, ensuring the stability of the flow control mechanism. The current routing node performs these checks in real time through hardware logic, ensuring that when the data packet cannot be normally written into the output register, the upstream is notified in time to prevent data loss or network stagnation.

[0057] The embodiments of the present application can realize efficient and reliable on-chip network flow control, ensuring that the data packet will not be lost or stalled due to resource competition or downstream congestion during transmission.

[0058] In some embodiments, the step 1021 comprises:

[0059] Step 10211, in the case that the target arbitrator assigns arbitration priority to the data packet and the target output register is empty, write the data packet into the target output register.

[0060] In the embodiments of the present application, the target arbitrator is a logical functional block in the current routing node of the on-chip network, which is responsible for determining which data packet obtains the authorization of the output channel from the transmission requests of multiple data channels according to the preset rule. The target output register is a logical storage unit for temporarily storing the data packet to be transmitted in the current routing node. The data packet is a unit of information transmitted in the on-chip network, which contains routing information and payload data.

[0061] The current routing node first checks whether the target arbiter has assigned arbitration priority to the data packet, which indicates that the data packet has obtained transmission authorization among multiple input requests. The current routing node also verifies whether the target output register is empty, i.e., the register currently does not store any data packet. If both conditions are met, the current routing node directly writes the data packet into the target output register. The write operation ensures that the data packet is temporarily stored and ready for transmission to the downstream routing node, thereby avoiding data loss or delay.

[0062] At step 10212, the data packet is written into the target backup register when the target arbiter has assigned arbitration priority to the data packet, and the target output register is not empty, and the target backup register is empty.

[0063] In the embodiments of the present application, the target backup register is an additional logical storage unit in the current routing node of the network-on-chip, which is used to backup the data packet and provides temporary storage space to prevent data loss or congestion when the target output register is occupied.

[0064] The current routing node checks whether the target arbiter has assigned arbitration priority to the data packet, which confirms that the data packet has obtained transmission authorization. The current routing node further verifies that the target output register is not empty, i.e., the register currently stores other data packets, and checks whether the target backup register is empty. If these conditions are met, the current routing node writes the data packet into the target backup register. This operation allows the data packet to be safely backed up when the output register is busy, ensuring that the current routing node can continue to process other transmission requests and reducing the risk of head congestion.

[0065] At step 10213, the data packet is written into the target output register at the next time node when the target arbiter has assigned arbitration priority to the data packet, and the target output register and the target backup register are not empty, and the retransmission signal corresponding to the target output register is empty.

[0066] In the embodiments of the present application, the retransmission signal is a control signal in the current routing node of the network-on-chip, which is used to indicate whether the downstream routing node needs to retransmit the data packet. When the signal is empty, it indicates that the downstream has successfully received the data packet and does not need to be retransmitted. The next time node is a specific time in the clock cycle of the current routing node, which is used to synchronize the data transmission operation.

[0067] The current routing node checks whether the target arbiter has assigned arbitration priority to the data packet, confirms that the data packet has obtained transmission authorization. The current routing node also verifies that the target output register and the target backup register are not empty, i.e., both registers currently store data packets. The current routing node also checks whether the retransmission signal corresponding to the target output register is empty, which indicates that the downstream routing node does not request retransmission of the currently stored data packet. If all conditions are met, the current routing node will write the data packet into the target output register at the next time node. This operation ensures that the data packet is written in time when the output register is about to be idle, improving transmission efficiency and preventing data accumulation.

[0068] Embodiments of the present application utilize the target arbiter to assign arbitration priority, combined with the dynamic management of the target output register and the target backup register, to ensure that data packets are correctly processed under various conditions, thereby reducing head congestion and improving parallel communication efficiency. At the same time, by checking the retransmission signal and optimizing the write timing, the current routing node minimizes data transmission delay and resource occupation, is suitable for various network topologies, and significantly reduces the area requirement of the current routing node.

[0069] In some embodiments, the process of the current routing node sending a data packet is as follows:

[0070] Step S1, extract the first routing information carried in the data packet, and confirm the target output direction of the data packet based on the first routing information.

[0071] In embodiments of the present application, a data packet refers to a data unit transmitted in a network-on-chip, including a payload and routing control information. The first routing information is path indication data pre-embedded in the data packet, used to specify the target output direction of the packet at the current routing node. The target output direction is the next transmission path identifier determined by the routing algorithm of the data packet, such as east, south, west, north, etc.

[0072] The current routing node first receives a data packet from an upstream routing node, and then parses the packet header to extract the first routing information. Based on the first routing information, the current routing node performs logical operations to confirm the target output direction, which corresponds to a physical output port of the current routing node. The confirmation process involves querying a routing table or applying a preset algorithm to ensure that the packet is correctly directed to the next node.

[0073] Step S2, based on the first routing information, calculate the second routing information reflecting the output direction of the data packet at the next current routing node.

[0074] In the embodiments of the present application, the second routing information is path data obtained by calculating the first routing information, reflecting the output direction of the data packet at the next current routing node. The next current routing node is the next current routing node entity in the data packet transmission path.

[0075] The current routing node applies a routing algorithm, such as table lookup or logical operation, based on the first routing information to generate the second routing information. The calculation process determines the output direction of the packet at the next current routing node and temporarily stores the result. The current routing node ensures that the second routing information is associated with the packet data for synchronous processing when writing to the register.

[0076] Step S3, in the case that the target arbiter assigns arbitration priority to the data packet, and the target output register or the target backup register meets the input condition, the data packet and the second routing information are written into the target output register or the target backup register corresponding to the target output direction based on the second routing.

[0077] In the embodiments of the present application, the target arbiter is a logical unit in the current routing node responsible for assigning transmission priority from multiple input requests. The arbitration priority is the transmission permission granted to the data packet by the target arbiter according to the preset rules. The target output register is a data temporary storage unit in the current routing node corresponding to the target output direction. The target backup register is an auxiliary storage unit for backing up the data in the target output register, providing a retransmission mechanism when transmission fails. The input condition is that the target output register or the target backup register meets the state requirement of receiving the packet, such as empty or coverable.

[0078] The current routing node evaluates the requests of multiple input packets through the target arbiter, and assigns arbitration priority to the data packet based on polling or priority rules. The current routing node checks the state of the target output register or the target backup register, and if the register is empty or meets other input conditions, the data packet and the second routing information are written into the corresponding register. The writing operation ensures that the packet and the routing information are stored synchronously for subsequent transmission or retransmission processing.

[0079] The embodiments of the present application ensure efficient transmission of data packets in the network-on-chip by extracting and calculating routing information, combining arbitration and register management, avoiding head congestion and flow interruption. This method minimizes the area of the current routing node, requires only a small amount of register resources, improves network communication efficiency and parallel processing capability, is suitable for various topologies, and enhances the reliability and response speed of the current routing node through anti-live lock and low flow optimization mechanism.

[0080] In some embodiments, the step 103 comprises:

[0081] Step 1031, in the case that the data message is stored in the target output register and the target backup register is empty, copying the data message from the target output register to the target backup register.

[0082] In the embodiments of the present application, the target output register is a logical functional block in the current routing node for temporarily storing data messages and preparing for transmission downstream, which determines the output direction of the data message based on the routing algorithm. The target backup register is an additional storage unit in the current routing node for backing up data messages, allowing retransmission of messages when needed, avoiding data loss or flow interruption.

[0083] The current routing node first checks whether there is a data message in the target output register, and confirms whether the target backup register is empty. If the target output register stores data messages and the target backup register is empty, the current routing node copies the data message from the target output register to the target backup register. This operation ensures that the data message has a backup during transmission, preventing data loss due to downstream problems, while maintaining the availability of the output register to process new messages.

[0084] Step 1032, in the case that the data message is stored in the target output register and the target backup register is not empty, temporarily storing the data message in the target output register.

[0085] In the embodiments of the present application, the target output register is a logical functional block in the current routing node for temporarily storing data messages and preparing for transmission downstream, which determines the output direction of the data message based on the routing algorithm. The target backup register is an additional storage unit in the current routing node for backing up data messages, allowing retransmission of messages when needed, avoiding data loss or flow interruption.

[0086] The current routing node checks whether there is a data message in the target output register, and confirms whether the target backup register is not empty. If the target output register stores data messages and the target backup register is not empty, the current routing node retains the data message in the target output register without copying. This operation prevents data conflicts and backup coverage, ensuring the safety of existing backup messages, while allowing the output register to continue processing the current message until the backup register is available.

[0087] Step 1033, in the case that the data message is stored in the target backup register, temporarily storing the data message in the target backup register.

[0088] In the embodiments of the present application, the target backup register is an additional storage unit in the current routing node for backing up data messages, allowing retransmission of messages when needed, avoiding data loss or flow interruption.

[0089] The current routing node checks whether the data packet already exists in the target backup register. If the data packet exists in the target backup register, the current routing node continues to keep the data packet in the target backup register without moving or modifying it. This operation maintains the integrity of the backup packet, ensures reliable use when retransmission is needed, and avoids unnecessary operations that interfere with the current routing node process.

[0090] The embodiments of the present application coordinate the operations of the target output register and the target backup register to achieve efficient management and backup of data packets, ensure no flow interruption and header congestion during transmission of the current routing node, improve the parallel communication efficiency and reliability of the network-on-chip, and minimize the occupation of hardware resources.

[0091] In some embodiments, the present application discards the data packet as follows: in the case that the next time node does not receive the retransmission signal sent by the downstream routing node, it is confirmed that the downstream routing node receives the data packet, and the data packet in the target backup register or the target output register is discarded.

[0092] In the embodiments of the present application, after receiving the retransmission signal sent by the downstream routing node, the current routing node performs the retransmission operation of the data packet at the next time node. Specifically, the current routing node first checks whether the data packet corresponding to the retransmission signal is stored in the target output register or the target backup register. If the data packet exists in the target output register, the current routing node directly reads the data packet from the register and sends it to the downstream routing node; if the data packet exists in the target backup register, the current routing node reads the data packet from the register and sends it. This process ensures that the data packet can be retransmitted in time when transmission fails, avoiding data loss or delay. The current routing node triggers the sending operation at the next time node through the clock synchronization mechanism to ensure timing consistency, and combines arbitration logic to preferentially process the retransmission request to maintain the continuity and reliability of the data flow.

[0093] The current routing node performs a discarding operation of the data packet at the next time node in the absence of receiving the retransmission signal sent by the downstream routing node. Specifically, the current routing node first confirms that the retransmission signal does not exist, and then checks whether the data packet is stored in the target backup register or the target output register. If the data packet exists in the target backup register, the current routing node clears the content in the register; if the data packet exists in the target output register, the current routing node also clears the content in the register. This process ensures that the redundant copy of the data packet is no longer retained after successful reception by the downstream, and the register resource is released for subsequent data packets. The current routing node triggers the discarding operation at the next time node through the clock synchronization mechanism, avoids resource waste, optimizes the data transmission efficiency in combination with the flow control logic, and prevents unnecessary retransmission.

[0094] The embodiments of the present application ensure reliable transmission of data packets in the network-on-chip by dynamically responding to the feedback signal of the downstream routing node. The current routing node can timely process the retransmission request, avoid data loss and transmission interruption, and optimize the utilization of register resources by discarding the data packets that have been successfully transmitted. This mechanism significantly reduces the head congestion phenomenon, improves the data parallel transmission efficiency, and is applicable to various network topologies, and finally realizes low-latency and high-throughput network-on-chip communication.

[0095] In some embodiments, the method further comprises:

[0096] Step 201, counting the number of retransmissions of the target backup register by the counting register.

[0097] In the embodiments of the present application, the counting register is a hardware register used to store and update numerical values, which is specially used to record the number of retransmissions of the data packet in the target backup register in this step. The target backup register is a storage unit in the current routing node for temporarily storing a copy of the data packet, which functions to retain the data packet for retransmission when the downstream routing node fails to successfully receive the data packet. The number of retransmissions refers to the cumulative number of times that the data packet stored in the target backup register is retransmitted to the downstream routing node.

[0098] The current routing node counts the number of retransmissions of the data packet in the target backup register by the counting register. The counting register automatically increments the numerical value stored therein each time the data packet in the target backup register is retransmitted. The current routing node continuously monitors the retransmission process to ensure that the counting register accurately records the number of retransmissions, thereby providing a data basis for subsequent judgment of whether to trigger the anti-live-lock mechanism.

[0099] Step 202, in the case where the number of retransmissions of the target backup register exceeds the number threshold, a marker signal is sent to the downstream routing node, the marker signal is used to instruct the downstream routing node to reject receiving other data packets before successfully receiving the data packet in the backup register.

[0100] In the embodiments of the present application, the number threshold is a preset numerical limit for determining whether the number of retransmissions is too high to trigger the anti-live-lock mechanism. The marker signal is a control signal generated by the current routing node to inform the downstream routing node to temporarily suspend receiving other data packets under certain conditions. The downstream routing node is the next processor in the data packet transmission path, responsible for receiving and forwarding data packets. The data packet is the basic unit of information transmission, containing routing information and payload.

[0101] If the downstream routing node has no space to receive the data packet in the backup register for a long time, the downstream routing node will send a retransmission signal to the backup register multiple times, and the backup register will also retransmit the data packet to the downstream routing node multiple times. At this time, the number of retransmissions counted by the counter register may exceed the preset number threshold. If the number of retransmissions exceeds the predicted number, the current routing node will automatically generate a marker signal and send it to the downstream routing node. After receiving the marker signal, the output register of the downstream routing node considers itself to be marked. After the output register of the downstream routing node outputs the data packet written before, if it receives a sending application of other data packets except the data packet of the backup register, it will not be written. The downstream routing node will send a retransmission signal to the current routing node until the data packet of the backup register of the current routing node is written into the output register of the downstream routing node, and the output register of the downstream routing node will be unlocked. That is, after receiving the marker signal, the downstream routing node adjusts its receiving logic to prioritize processing the retransmission packet of the target backup register, ensuring that the packet is not preempted by other packets. The current routing node prevents the live-lock phenomenon through this mechanism to ensure smooth transmission of data packets.

[0102] The embodiments of the present application automatically detect and handle the retransmission overrun problem of the target backup register, ensure that the downstream routing node receives the key packet first, and avoid transmission stagnation due to resource competition. This improves the data transmission reliability and efficiency of the network-on-chip, while reducing the occupation of hardware resources and optimizing the overall performance of the current routing node.

[0103] In some embodiments, the method further comprises:

[0104] Step 301, adding a number to the sent data packet.

[0105] In the embodiments of the present application, the number is a unique sequence identifier assigned by the routing node to each data packet, used to distinguish different packets and support sequential tracking.

[0106] The routing node automatically generates and attaches an increasing or unique number to the packet header when the data packet enters the sending queue, for example, two data packets can be numbered 0 and 1 respectively. The number is implemented based on a hardware counter or a sequence generator, ensuring that each packet has an independent identifier. The routing node stores the number in association with the packet metadata (such as routing direction, priority), and keeps the number unchanged during transmission to support identification and processing by downstream nodes.

[0107] Step 301, in the case where the data packets to be sent have been sent, the cached data packets are sent to the downstream routing node in the order of the number, wherein the number is used for the downstream routing node to perform deduplication processing on the data packets to be sent.

[0108] In the embodiments of the present application, polling refers to the routing node cyclically checking and sending data packets in the cache queue in a fixed order. The downstream routing node is the adjacent routing node or processor that receives the packet. Deduplication processing is the identification and discarding of duplicate received packets by the downstream node to maintain data consistency.

[0109] The current routing node continuously monitors the sending queue state, and when it detects that all new data packets have been sent, it automatically switches to the cached packet sending mode. The routing node reads the packets from the cache area (such as output registers or backup registers) in order of increasing number, and transmits them to the downstream routing node through an arbitrator. After receiving the packet, the downstream routing node parses its number and compares it with the local record: if the number already exists, the packet is discarded; if it is a new number, it is stored and processed. This process is implemented through a hardware comparator and a state register, ensuring uninterrupted transmission and data integrity. It is worth noting that the numbering process of the data packet is continuous, while the polling resend mechanism is only triggered when there are no data packets to be sent by the current routing node, that is, during low traffic. If there are continuous new data packets to be sent, the resent data packets will not be resent.

[0110] For example, if the current routing node has successfully sent two data packets with numbers 0 and 1, when polling, the numbers of the data packets received by the downstream routing node will be 0, 1, 0, 1,... If there is only one data packet with number 1, the numbers of the data packets received by the downstream routing node will be 1, 1, 1, 1,...

[0111] The embodiments of the present application ensure the message order and traceability through the numbering mechanism, eliminate the head blocking and repeated transmission problems through the polling transmission combined with the deduplication processing, thereby improving the parallel communication efficiency of the network-on-chip, reducing the delay, and adapting to various topological structures under extremely small hardware resources.

[0112] In some embodiments, with reference to Figure 2 , an exemplary output transmission structure of the west (W) and north (N) buffer zones in the current routing node is given. The left dashed box represents the input data message from the west in the current routing node, and the right dashed box represents the input data message from the north in the current routing node. Here, only the input in these two directions is exemplified, in addition to which there are east (E) / south (S) / device (P) and the like; since the present application is based on the backup flow control architecture of the output buffer zone, the input data message will not be cached.

[0113] When the data message enters the current routing node, the routing calculation has been completed in the upstream routing node in advance, that is, the data message has been explicitly determined to go to which output register when it enters the current routing node. At the same time, the routing information (Compute_result) in the message is extracted to calculate the next hop routing steering. If it can be written into the output register, the calculation result (Next_route_compute) will be stored in the same output register as the data message.

[0114] The data message from the west to the south (W-S) will be arbitrated with the data message from the north to the south (N-S) in the arbitrator_S-11 (including the message in the E-S steering register), and the message with arbitration priority will be written into the output register_S-12 of the south (S) direction. Other messages without arbitration priority will send a retransmission signal to the original current routing node, and at the same time, the pointer in the arbitrator will jump. The message in the output register will be output at the same time, and the data message will be written into the backup register_S-13 for backup. If the downstream node cannot receive the data message, a retransmission signal (Retrans) will be returned in the next beat. If the retransmission signal from the downstream is received, the current routing will send the message in the reserved backup register to the downstream again. The specific timing and transmission mechanism will be described below.

[0115] In this way, the data message that needs to be transmitted can be continuously sent to the downstream, and will never be interrupted. Once the output register of the corresponding direction in the downstream is empty, the message can be written in the first time. At the same time, since the messages of multiple current routing nodes can compete for the output register of the downstream routing node, the routing can realize completely headless blocking parallel data flow transmission.

[0116] In some embodiments, with reference to Figure 3, the data packet that has obtained the arbitration priority right to write into the southward output register is output to the downstream register, and there are the following three cases:

[0117] At cycle 0, there is no packet in the backup register, at this time, packet A is output from the southward output register and transmitted to the downstream, and at the same time, packet A is put into the backup register; at cycle 1, packet A exists in the backup register, at this time, packet B has obtained the arbitration priority right and is written into the southward output register, at this time, packet B is sent to the downstream router, and packet B in the output register will not be output; at the same time, if a retransmission signal (the retransmission signal of packet A) is sent back by the downstream router, at cycle 2, packet A in the backup register is retransmitted to the downstream, at this time, it is also possible to receive the retransmission signal of packet B; if no retransmission signal of packet B is received at cycle 2, it indicates that packet B has been received by the downstream, and packet B in the output register is discarded at the next beat; if the retransmission signal of packet B is received at cycle 2, packet B is continuously transmitted at the next beat, and packet B will not be output from the output register.

[0118] The second case is similar to packet B at cycle 1 in the first case;

[0119] The third case is similar to packet A at cycle 2 in the first case.

[0120] From the receiving end of the downstream, the following cases can receive the packet:

[0121] The packet has obtained the arbitration priority right of the downstream router, and the output register of the downstream router is empty, and the packet can be written into the output register of the downstream router;

[0122] The packet has obtained the arbitration priority right of the downstream router, and the output register of the downstream router in the output direction is not empty, and the backup register of the downstream router in the output direction is empty, and the packet can be written into the backup register;

[0123] The packet corresponding to the arbitration priority right of the downstream router is not empty, and the corresponding output register and backup register of the downstream router are not empty, but the retransmission signal corresponding to the packet in the output register of the downstream router is empty, that is, the packet can be discarded from the output register at the next beat, and at this time, the packet can be written into the output register.

[0124] In addition to the above three cases, all other cases will send a retransmission signal to the upstream, and the arbitration pointer will not change.

[0125] In some embodiments, reference is made to Figure 4In the whole-chip network, the output transmission method of the network-on-chip provided in the application is used, and the message can pass through a route every cycle without head blocking; at cycle 2, at the route (3, 1), the message from the (2, 1) router and the message from the (3, 0) router both go to the E-direction output register, and at this time, the E-direction output register of the (3, 1) route is occupied, therefore, the (3, 1) router sends a resend signal of the message to the (2, 1) router and the (3, 0) router at cycle 3; at the same time, at cycle 3, the route (2, 1) repeatedly sends the message to the downstream router, the route (3, 0) sends another message and obtains arbitration priority, at this time, the output register in the (3, 1) is empty and can receive the message of the (3, 0), and the (2, 1) router still receives the resend signal at the next beat. Since the (2, 1) router receives the resend signal of the message at cycle 3, at cycle 4, the route (2, 1) sends the message again, at this time, the E-direction output register of the (3, 1) is occupied by the message from the (3, 0) router, but the resend signal is not returned by the more downstream router, therefore, the message of the (2, 1) can be written into the E-direction output register of the (3, 1).

[0126] Based on the foregoing embodiment, the embodiment of the application provides a data transmission device of a network-on-chip, which comprises units and modules included in the units, and can be realized by a processor in a current routing node; of course, the device can also be realized by a specific logic circuit; in the implementation process, the processor can be a central processing unit (CPU), a micro processing unit (MPU), a digital signal processor (DSP) or a field programmable gate array (FPGA).

[0127] Figure 5 A component structure diagram of the data transmission device of the network-on-chip provided in the embodiment of the application is provided, which is applied to a routing node in a network-on-chip, and an output register, a backup register and an arbitrator are arranged in each output direction in the routing node, as shown in Figure 5 The data transmission device 40 of the network-on-chip comprises:

[0128] The processing module 401 is configured to, in the case that a data message sent by an upstream routing node is received, confirm a target output direction of the data message.

[0129] The transmission module 402 is configured to write the data packet into a target output register or a target backup register corresponding to the target output direction based on an arbitration result of the target arbitrator corresponding to the target output direction for the data packet, or send a retransmission signal for the data packet to the upstream routing node; send the data packet to a downstream routing node of the target output direction through the target output register or the target backup register, and temporarily store the data packet in the target backup register or the target output register before confirming that the downstream routing node receives the data packet; and send the data packet from the target backup register or the target output register to the downstream routing node in a case where a retransmission signal sent by the downstream routing node for the data packet is received.

[0130] In some embodiments, the transmission module 402 is further configured to write the data packet into the target output register or the target backup register corresponding to the target output direction in a case where the target arbitrator allocates an arbitration priority for the data packet, and the target output register or the target backup register meets an input condition; and send the retransmission signal for the data packet to the upstream routing node in a case where the target arbitrator does not allocate the arbitration priority for the data packet, or neither the target output register nor the target backup register meets the input condition.

[0131] In some embodiments, the transmission module 402 is further configured to write the data packet into the target output register in a case where the target arbitrator allocates the arbitration priority for the data packet, and the target output register is empty; write the data packet into the target backup register in a case where the target arbitrator allocates the arbitration priority for the data packet, and the target output register is not empty and the target backup register is empty; and write the data packet into the target output register at a next time node in a case where the target arbitrator allocates the arbitration priority for the data packet, and neither the target output register nor the target backup register is empty, and a retransmission signal corresponding to the target output register is empty.

[0132] In some embodiments, the transmission module 402 is further configured to send the retransmission signal for the data packet to the upstream routing node in a case where the target arbitrator does not allocate the arbitration priority for the data packet, or, neither the target output register nor the target backup register is empty and a retransmission signal corresponding to the target output register is not empty.

[0133] In some embodiments, the transmission module 402 is further configured to: in a case where the data packet is stored in the target output register and the target backup register is empty, transfer the data packet from the target output register to the target backup register; in a case where the data packet is stored in the target output register and the target backup register is not empty, temporarily store the data packet in the target output register; and in a case where the data packet is stored in the target backup register, temporarily store the data packet in the target backup register.

[0134] In some embodiments, the transmission module 402 is further configured to: in a case where a retransmission signal sent by the downstream routing node is not received at a next time node, confirm that the data packet is received by the downstream routing node, and discard the data packet in the target backup register or the target output register.

[0135] In some embodiments, the processing module 401 is further configured to: count the number of retransmissions of the target backup register by using a counting register; and in a case where the number of retransmissions of the target backup register exceeds a threshold number, send a flag signal to the downstream routing node, the flag signal being used to instruct the downstream routing node to reject receiving other data packets until the data packet in the backup register is successfully received.

[0136] In some embodiments, the processing module 401 is further configured to: add a number to a data packet to be sent; and in a case where the data packet to be sent has been sent, poll the cached data packets in the order of the number to send to the downstream routing node, wherein the number is used for the downstream routing node to perform a de-duplication process on the data packet to be sent.

[0137] The embodiments of the present application can coordinate the output of data packets by setting an arbitrator in each output direction to arbitrate data packets from different input directions, can adjust the sending order of data packets by the arbitrator in a case where blocking occurs, thereby eliminating the head blocking phenomenon, and can cache the data packets in the backup register and the data register before the data packets are successfully received by the downstream routing, thereby ensuring continuous transmission of the data packets in the network-on-chip without interruption, and can adapt to various network topologies with only a small amount of register resources, minimize the hardware area requirement, and enhance the reliability and scalability of the overall network.

[0138] The description of the above device embodiments is similar to the description of the above method embodiments, and has similar beneficial effects as the method embodiments. In some embodiments, the device provided by the embodiments of the present application has functions or includes modules that can be used to perform the methods described in the above method embodiments. For technical details not disclosed in the device embodiments of the present application, please refer to the description of the method embodiments of the present application for understanding.

[0139] It should be noted that, in the embodiments of the present application, if the on-chip network data transmission method described above is implemented in the form of a software function module and sold or used as an independent product, it can also be stored in a computer-readable storage medium. Based on this understanding, the technical solutions of the embodiments of the present application can be embodied in the form of a software product, which is stored in a storage medium and includes a number of instructions for causing a routing node (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the methods described in the various embodiments of the present application. The aforementioned storage medium includes: a U disk, a mobile hard disk, a read-only memory (ROM), a magnetic disk or an optical disk, and various program code storage media. Thus, the embodiments of the present application are not limited to any particular hardware, software or firmware, or any combination of hardware, software and firmware.

[0140] The embodiments of the present application provide a routing node, which includes a memory and a processor, the memory stores a computer program capable of running on the processor, and the processor implements part or all of the steps in the above method when executing the program.

[0141] The embodiments of the present application provide a computer-readable storage medium, which stores a computer program, and the computer program is executed by a processor to implement part or all of the steps in the above method. The computer-readable storage medium can be transitory or non-transitory.

[0142] The embodiments of the present application provide a computer program, which includes computer-readable code, and in the case that the computer-readable code runs in a routing node, a processor in the routing node executes part or all of the steps in the above method.

[0143] This application provides a computer program product, which includes a non-transitory computer-readable storage medium storing a computer program. When the computer program is read and executed by a computer, it implements some or all of the steps in the above-described method. This computer program product can be implemented specifically through hardware, software, or a combination thereof. In some embodiments, the computer program product is specifically embodied as a computer storage medium; in other embodiments, the computer program product is specifically embodied as a software product, such as a software development kit (SDK), etc.

[0144] It should be noted that the descriptions of the various embodiments above tend to emphasize the differences between them, while their similarities or commonalities can be referred to interchangeably. The descriptions of the above embodiments of the device, storage medium, computer program, and computer program product are similar to the descriptions of the above method embodiments and have similar beneficial effects. For technical details not disclosed in the embodiments of the device, storage medium, computer program, and computer program product of this application, please refer to the descriptions of the method embodiments of this application for understanding.

[0145] It should be noted that, Figure 6 This is a schematic diagram of a hardware entity of a routing node in an embodiment of this application, such as... Figure 6 As shown, the hardware entity of the routing node 700 includes: one or more processors 701, a communication interface 702, and a memory 703, wherein:

[0146] Processor 701 typically controls the overall operation of routing node 700.

[0147] Communication interface 702 enables routing nodes to communicate with other terminals or servers over a network.

[0148] The memory 703 is configured to store instructions and applications executable by the processor 701, and can also cache data to be processed or already processed (e.g., image data, audio data, voice communication data, and video communication data) in the processor 701 and the various modules in the routing node 700. It can be implemented using flash memory or random access memory (RAM). Data transfer between the processor 701, the communication interface 702, and the memory 703 can be performed via bus 704. Only one processor is shown in the figure; each processor 700 includes one or more cores.

[0149] It should be noted that the routing node can include a plurality of processors 701, and each processor 701 can interact with each other through an aggregated communication mode such as all-to-all, allgather or allreduce. The processor 701 can be a central processing unit (CPU), a graphics processing unit (GPU), a neural-network processing unit (NPU), a tensor processing unit (TPU), a data processing unit (DPU), an accelerated processing unit (APU), a floating processing unit (FPU) or an application-specific integrated circuit (ASIC), etc. The processor can also be a single-core processor or a multi-core processor. The processor can be a combination of a CPU and a hardware chip. The hardware chip can be an ASIC, a PLD or a combination thereof. The PLD can be a complex programmable logic device (CPLD), an FPGA, a generic array logic (GAL) or any combination thereof. The processor can also be implemented by a logic device with built-in processing logic, such as an FPGA or a digital signal processor (DSP), etc.

[0150] The communication interface 702 can be a wired interface or a wireless interface, which is used for communication with other modules or devices. The wired interface can be an Ethernet interface, a local interconnect network (LIN) or the like, and the wireless interface can be a cellular network interface or a wireless local area network interface, etc.

[0151] The memory 703 can be a nonvolatile memory, such as a read-only memory (ROM), a programmable ROM (PROM), an erasable PROM (EPROM), an electrically EPROM (EEPROM), or a flash memory. The memory 703 can also be a volatile memory, which can be a random access memory (RAM) used as an external cache. By way of example, and not limitation, many forms of RAM can be used, such as a static RAM (SRAM), a dynamic RAM (DRAM), a synchronous DRAM (SDRAM), a double data rate SDRAM (DDR SDRAM), an enhanced SDRAM (ESDRAM), a synchlink DRAM (SLDRAM), and a direct rambus RAM (DRRAM), a direct rambus DRAM (DRDRAM), and a rambus DRAM.

[0152] The bus 704 can be a peripheral component interconnect (PCI) bus or an extended industry standard architecture (EISA) bus, or the like. The bus can be divided into an address bus, a data bus, a control bus, etc.

[0153] It should be understood that every feature and combination of features that is described above in relation to one embodiment is applicable to at least one other embodiment, unless specifically stated otherwise. It should also be understood that every embodiment described above can be combined with any other embodiment unless specifically stated otherwise.

[0154] It should be noted that, as used in this application, the terms "comprises" or "comprising", or "includes" or "including" or "has" or "having" or "contains" or "containing" or variants thereof, mean "including but not limited to", so as to encompass the non-exclusive inclusion of a process, method, article, or apparatus that comprises an element or a plurality of elements, without excluding or dismissing other elements or a plurality of other elements.

[0155] In several embodiments provided in the present application, it should be understood that the disclosed devices and methods can be implemented in other ways. The above-described device embodiments are merely illustrative, for example, the division of the units is only a logical function division, and actual implementation can have another division manner, for example, a plurality of units or components can be combined, or can be integrated into another system, or some features can be ignored or not executed. In addition, the coupling or direct coupling or communication connection between the displayed or discussed components can be through some interfaces, indirect coupling or communication connection between devices or units, which can be electrical, mechanical or other forms.

[0156] The units described above as separate components may or may not be physically separate, and the components shown as units may or may not be physical units; they can be located in one place or distributed on multiple network units; some or all of the units can be selected according to actual needs to achieve the purpose of the embodiment.

[0157] In addition, each functional unit in each embodiment of the present application can be integrated into one processing unit, or each unit can be a separate unit, or two or more units can be integrated into one unit; the integrated unit can be realized in the form of hardware or in the form of hardware plus software functional unit.

[0158] Those skilled in the art can understand that all or part of the steps of the above-mentioned method embodiments can be completed by program instruction related hardware, and the foregoing program can be stored in a computer readable storage medium, and the program performs the method embodiments when executed; and the foregoing storage medium includes a mobile storage device, a read only memory (ROM), a magnetic disc or an optical disc, and various media that can store program codes.

[0159] Alternatively, the integrated units of the present application can be stored in a computer readable storage medium if they are realized in the form of software function modules and sold or used as independent products. Based on this understanding, the technical solutions of the present application or the parts that make contributions to the related art can be embodied in the form of software products, and the computer software products are stored in a storage medium, including a plurality of instructions for causing a routing node (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the methods described in the embodiments of the present application. The foregoing storage medium includes a mobile storage device, a ROM, a magnetic disc or an optical disc, and various media that can store program codes.

[0160] The above is only an embodiment of the present application, but the protection scope of the present application is not limited thereto, and any person skilled in the art can easily think of changes or replacements within the technical range disclosed in the present application, which should be covered in the protection scope of the present application.

Claims

1. A data transmission method for an on-chip network, characterized in that, A routing node applied in an on-chip network, wherein the routing node is equipped with an output register, a backup register, and an arbitrator in each output direction, the method comprising: Upon receiving a data packet sent by an upstream routing node, the target output direction of the data packet is confirmed; Based on the arbitration result of the target arbitrator corresponding to the target output direction for the data packet, the data packet is written into the target output register or target backup register corresponding to the target output direction, or a retransmission signal for the data packet is sent to the upstream routing node; Sending the data packet to the downstream routing node in the target output direction through the target output register or the target backup register, and temporarily storing the data packet in the target backup register or the target output register before confirming that the downstream routing node has received the data packet, including: If the data packet is stored in the target output register and the target backup register is empty, the data packet is transferred from the target output register to the target backup register. If the data packet is stored in the target output register and the target backup register is not empty, the data packet is temporarily stored in the target output register. If the data packet is stored in the target backup register, the data packet will be temporarily stored in the target backup register. Upon receiving a retransmission signal from the downstream routing node for the data packet, the data packet is sent from the target backup register or the target output register to the downstream routing node.

2. The method according to claim 1, characterized in that, The step of writing the data packet into the target output register or target backup register corresponding to the target output direction, or sending a retransmission signal for the data packet to the upstream routing node, based on the arbitration result of the target arbitrator corresponding to the target output direction, includes: When the target arbitrator assigns arbitration priority to the data packet and the target output register or the target backup register meets the input conditions, the data packet is written into the target output register or target backup register corresponding to the target output direction. If the target arbitrator fails to assign arbitration priority to the data packet, or if neither the target output register nor the target backup register meets the input conditions, a retransmission signal for the data packet is sent to the upstream routing node.

3. The method according to claim 2, characterized in that, The step of writing the data packet into the target output register or target backup register corresponding to the target output direction when the target arbitrator assigns arbitration priority to the data packet and the target output register or the target backup register meets the input conditions includes: If the target arbitrator assigns arbitration priority to the data packet and the target output register is empty, the data packet is written into the target output register. If the target arbitrator assigns arbitration priority to the data packet, and the target output register is not empty, and the target backup register is empty, then the data packet is written into the target backup register. If the target arbitrator assigns arbitration priority to the data packet, and both the target output register and the target backup register are not empty, and the retransmission signal corresponding to the target output register is empty, the data packet is written into the target output register at the next time node.

4. The method according to claim 2, characterized in that, The step of sending a retransmission signal for the data packet to the upstream routing node when the target arbitrator fails to allocate arbitration priority for the data packet, or when neither the target output register nor the target backup register meets the input conditions, includes: If the target arbitrator does not assign arbitration priority to the data packet, or if both the target output register and the target backup register are not empty and the retransmission signal corresponding to the target output register is not empty, a retransmission signal for the data packet is sent to the upstream routing node.

5. The method according to any one of claims 1-4, characterized in that, The confirmation that the downstream routing node has received the data packet includes: If no retransmission signal is received from the downstream routing node at the next time node, the downstream routing node is confirmed to have received the data packet, and the data packet in the target backup register or target output register is discarded.

6. The method according to any one of claims 1-4, characterized in that, The method further includes: The number of retransmissions to the target backup register is counted using a counter register; If the number of retransmissions to the target backup register exceeds a threshold, a flag signal is sent to the downstream routing node. The flag signal is used to instruct the downstream routing node to refuse to receive other data packets until it successfully receives the data packet in the backup register.

7. The method according to any one of claims 1-4, characterized in that, The method further includes: Add a number to the sent data packets; If all the data packets to be sent have been sent, the cached data packets are sent to the downstream routing nodes in a round-robin fashion according to the numbered order, wherein the number is used by the downstream routing nodes to perform deduplication on the data packets to be sent.

8. A data transmission device for an on-chip network, characterized in that, A routing node used in an on-chip network, wherein the routing node is provided with an output register, a backup register, and an arbitrator in each output direction, the device comprising: The processing module is used to determine the target output direction of a data packet when it receives a data packet sent by an upstream routing node. The transmission module is configured to, based on the arbitration result of the target arbitrator corresponding to the target output direction, write the data packet into the target output register or target backup register corresponding to the target output direction, or send a retransmission signal for the data packet to the upstream routing node; send the data packet to the downstream routing node in the target output direction through the target output register or the target backup register, and temporarily store the data packet in the target backup register or the target output register before confirming that the downstream routing node has received the data packet, including: before the data packet is stored in the target output register... If the target output register is empty and the target backup register is not empty, the data packet is transferred from the target output register to the target backup register; if the data packet is stored in the target output register and the target backup register is not empty, the data packet is temporarily stored in the target output register; if the data packet is stored in the target backup register, the data packet is temporarily stored in the target backup register; upon receiving a retransmission signal from the downstream routing node for the data packet, the data packet is sent from the target backup register or the target output register to the downstream routing node.

9. A routing node, characterized in that, The routing node includes: a processor, an output register, a backup register, and an arbitrator configured in each output direction, wherein the processor, when executing, implements the steps of the data transmission method of the on-chip network according to any one of claims 1 to 7.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that, When executed by a processor, the computer program implements the steps of the data transmission method of the on-chip network according to any one of claims 1 to 7.

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