Wafer defect detection method, storage medium and electronic equipment

Abstract

The invention relates to the technical field of wafer defect detection, and discloses a wafer defect detection method, a storage medium and electronic equipment.The wafer defect detection method comprises the steps that an electron microscope is controlled to conduct positioning scanning on a target lattice in a wafer according to optical coordinates of the target lattice, and an electron microscope image of the target lattice is obtained; and performing defect detection on the electron microscope image of the target lattice by using a pre-trained ViT model to generate a defect type of the target lattice. According to the wafer defect detection method, the electron microscope image of the target lattice in the wafer can be obtained by controlling the electron microscope to scan according to the optical coordinate of the target lattice, convenient control and acquisition of the high-resolution electron microscope image of the target lattice are realized, defect detection is performed on the electron microscope image of the target lattice by using the pre-trained ViT model, and the defect detection accuracy is improved. And fine defect classification of a target lattice can be realized.

Description

Technical Field

[0001] This invention relates to the field of wafer defect detection technology, and more particularly to a wafer defect detection method, storage medium, and electronic device. Background Technology

[0002] As integrated circuit process dimensions continue to shrink, the types and morphologies of wafer defects are becoming increasingly complex. Related technologies typically use defect inspection instruments to identify wafer defects through optical images and generate klarf files, which are then imported into an electron microscope for manual defect identification. This technology relies on single-modal data, lacks deep fusion of multi-modal data, is costly, and struggles to meet the required accuracy and efficiency in defect identification and location. Summary of the Invention

[0003] This invention aims to at least partially solve one of the technical problems in related technologies. Therefore, one objective of this invention is to propose a wafer defect detection method that enables convenient controlled acquisition of high-resolution electron microscopy images of the target lattice, as well as fine defect classification of the target lattice.

[0004] A second objective of this invention is to provide a computer-readable storage medium.

[0005] The third objective of this invention is to provide an electronic device.

[0006] To achieve the above objectives, a first aspect of the present invention provides a wafer defect detection method, the method comprising controlling an electron microscope to perform positioning scanning on the target lattice in the wafer according to the optical coordinates of the target lattice to obtain an electron microscope image of the target lattice; and using a pre-trained ViT model to perform defect detection on the electron microscope image of the target lattice to generate the defect type of the target lattice.

[0007] According to the wafer defect detection method of the present invention, the electron microscope is controlled to scan and acquire the electron microscope image of the target lattice in the wafer based on the optical coordinates of the target lattice, so as to realize the convenient control and acquisition of high-resolution electron microscope images of the target lattice. By using a pre-trained ViT model to perform defect detection on the electron microscope image of the target lattice, fine defect classification of the target lattice can be achieved.

[0008] In addition, the wafer defect detection method proposed in the above embodiments of the present invention may also have the following additional technical features: According to one embodiment of the present invention, the step of controlling an electron microscope to perform positioning and scanning of a target lattice in a wafer based on the optical coordinates of the target lattice includes: determining the electron microscope coordinates of the target lattice based on the optical coordinates of the target lattice and a preset optical-electron microscope coordinate mapping relationship; generating motion control commands based on the electron microscope coordinates of the target lattice; and controlling the electron microscope to scan the target lattice in the wafer based on the motion control commands.

[0009] According to an embodiment of the present invention, the pre-trained ViT model includes multiple classification sub-models. The defect detection of the electron microscope image of the target lattice includes: segmenting the electron microscope image into sub-blocks of a preset size and extracting the feature vector of each sub-block; using a K-means clustering algorithm to cluster the sub-blocks based on their feature vectors, obtaining clustering results and the defect probability of each sub-block in each clustering result; comparing the defect probabilities of each sub-block in each clustering result, and designating the sub-blocks with the highest defect probabilities (X) in each clustering result as target sub-blocks, where X is an integer and X≥1; determining a target classification sub-model based on the defect probabilities of each target sub-block; using the target classification sub-model to perform defect detection on the corresponding target sub-blocks; and determining the defect type of the target lattice based on the defect classification results of each target sub-block.

[0010] According to one embodiment of the present invention, the defect classification result includes defect type, and the step of determining the defect type of the target lattice based on the defect classification result of each target sub-block includes: voting on the defect type of each target sub-block; and determining the defect type of the target lattice based on the voting result of each defect type.

[0011] According to one embodiment of the present invention, the defect classification result includes the confidence level corresponding to the defect type, and the step of determining the defect type of the target lattice based on the voting results of each defect type includes: determining the weight of each defect type based on the confidence level of each defect type; performing a weighted calculation on the voting results and weights of each defect type, and taking the defect type with the highest score as the defect type of the target lattice.

[0012] According to one embodiment of the present invention, the weight of the defect type is positively correlated with the confidence level of the defect type.

[0013] According to one embodiment of the present invention, the depths of the various classification sub-models are different, and the defect probability of the target sub-block is negatively correlated with the depth of the classification sub-model.

[0014] According to an embodiment of the present invention, the clustering index of the K-means clustering algorithm includes at least one of feature dissimilarity, local mild distribution, and defect spatial concentration.

[0015] According to an embodiment of the present invention, the process of constructing the preset optical-electron microscope coordinate mapping relationship includes: acquiring the optical coordinates of at least two calibration lattices in the optical image of the wafer; controlling the electron microscope to perform electron microscope scanning on the wafer to determine the wafer center and the electron microscope coordinates of each calibration lattice; determining the optical-electron microscope coordinate mapping relationship based on the wafer center and the optical and electron microscope coordinates of each calibration lattice, and recording the obtained optical-electron microscope coordinate mapping relationship as the preset optical-electron microscope coordinate mapping relationship, wherein the origin of the optical coordinate system of the wafer optical image and the electron microscope coordinate system of the wafer electron image are both the wafer center.

[0016] According to one embodiment of the present invention, controlling the electron microscope to scan the wafer and determine the electron microscope coordinates of the wafer center and each of the calibration lattices includes: determining the electron microscope coordinates of the wafer center based on the electron microscope image of the wafer edge region obtained by scanning the wafer; controlling the electron microscope to move to the wafer center based on the electron microscope coordinates of the wafer center; and controlling the electron microscope to move from the wafer center to the calibration lattice based on the optical coordinates of each of the calibration lattices to obtain the electron microscope coordinates of each of the calibration lattices.

[0017] According to one embodiment of the present invention, determining the optical-electron microscope coordinate mapping relationship based on the optical coordinates and electron microscope coordinates of the wafer center and each of the calibration lattices includes: calculating the x-direction vector and y-direction vector of the lattice unit spacing in the electron microscope coordinate system based on the electron microscope coordinates of the wafer center and each of the calibration lattices; and obtaining the optical-electron microscope coordinate mapping relationship based on the electron microscope coordinates of the wafer center and the x-direction vector and y-direction vector of the lattice unit spacing in the electron microscope coordinate system.

[0018] To achieve the above objectives, a second aspect of the present invention provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the wafer defect detection method as described above.

[0019] To achieve the above objectives, a third aspect of the present invention provides an electronic device, including a memory and a processor, wherein the memory stores a computer program, and when the computer program is executed by the processor, it implements the wafer defect detection method as described above.

[0020] Additional aspects and advantages of the invention will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. Attached Figure Description

[0021] Figure 1This is a flowchart of a wafer defect analysis method according to an embodiment of the present invention; Figure 2 This is a flowchart illustrating the extraction of optical images of individual lattices from an optical image of a wafer, according to one embodiment of the present invention. Figure 3 This is a flowchart of a high-resolution requirement analysis of optical images of each lattice according to an embodiment of the present invention; Figure 4 This is a flowchart illustrating whether a crystal lattice requires high-resolution detection according to one embodiment of the present invention; Figure 5 This is a flowchart of a wafer defect analysis method according to another embodiment of the present invention; Figure 6 This is a flowchart of one embodiment of the present invention for determining the type of lattice defect to be detected at high resolution. Figure 1 ; Figure 7 This is a flowchart of one embodiment of the present invention for determining the type of lattice defect to be detected at high resolution. Figure 2 ; Figure 8 This is a flowchart of one embodiment of the present invention for determining the type of lattice defect to be detected at high resolution. Figure 3 ; Figure 9 This is a flowchart illustrating the determination of the type of lattice defect to be detected at high resolution, according to a specific embodiment of the present invention. Figure 10 This is a flowchart of an electron microscope localization and imaging method according to an embodiment of the present invention; Figure 11 This is a flowchart illustrating the process of constructing a preset optical-electron microscope coordinate mapping relationship according to an embodiment of the present invention; Figure 12 This is a flowchart illustrating the determination of the wafer center and the electron microscope coordinates of each calibrated lattice according to an embodiment of the present invention; Figure 13 This is a flowchart illustrating the determination of electron microscope coordinates of the wafer center according to an embodiment of the present invention; Figure 14 This is a flowchart illustrating the process of constructing a preset optical-electron microscope coordinate mapping relationship according to a specific embodiment of the present invention; Figure 15 This is a flowchart of a control electron microscope for positioning and scanning a target lattice in a wafer, according to an embodiment of the present invention. Figure 16 This is a flowchart illustrating the determination of the optical coordinates of a target lattice according to an embodiment of the present invention; Figure 17 This is a flowchart of a wafer defect detection method according to an embodiment of the present invention; Figure 18 This is a flowchart of a wafer defect analysis method according to a specific embodiment of the present invention; Figure 19 This is a structural block diagram of an electronic device according to an embodiment of the present invention. Detailed Implementation

[0022] Embodiments of the present invention are described in detail below, examples of which are illustrated in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and intended to explain the present invention, and should not be construed as limiting the present invention.

[0023] It should be noted that while traditional optical inspection equipment is fast, its resolution limitations prevent it from capturing minute defects. Scanning electron microscopes (SEMs), while high-resolution, have limited acquisition areas and low acquisition efficiency. Furthermore, while artificial intelligence algorithms for defect detection in optical images mostly utilize the YOLOv8 algorithm, a single YOLOv8 model is more suitable for lightweight, single-task recognition; a single model cannot simultaneously analyze both optical and electron microscope images.

[0024] To address the aforementioned problems, embodiments of the present invention provide a wafer defect analysis method, an electron microscope localization imaging method, a wafer defect detection method, and corresponding storage media and electronic devices. The wafer defect analysis method, electron microscope localization imaging method, wafer defect detection method, and corresponding storage media and electronic devices of the present invention will be described in detail below with reference to the accompanying drawings and specific embodiments.

[0025] Figure 1 This is a flowchart of a wafer defect analysis method according to an embodiment of the present invention. Figure 1 As shown, wafer defect analysis methods may include: S101, extracts the optical images of each lattice from the optical image of the wafer.

[0026] Specifically, a high-resolution optical image of the wafer to be analyzed is acquired by an industrial camera, and the lattice (die) in the acquired high-resolution optical image of the wafer is separated in order to extract the optical image of each lattice in the wafer from the high-resolution optical image of the wafer.

[0027] In practice, the wafer to be analyzed can be placed on the mechanical platform of an industrial camera. After ensuring that the wafer is fixed in position and the image is clear, the wafer defect analysis system can trigger the industrial camera to take a picture, acquiring a high-resolution optical image of the entire wafer. The wafer defect analysis system calls the camera driver interface to acquire the high-resolution optical image of the wafer to be analyzed, and simultaneously caches and stores the optical image of the wafer to be analyzed.

[0028] When extracting the optical images of each lattice in a wafer from a high-resolution optical image of the wafer, the high-resolution optical image of the wafer can be segmented and extracted manually, or a segmentation algorithm can be used to segment and extract the high-resolution optical image of the wafer.

[0029] In practice, when segmenting and extracting high-resolution optical images of a wafer using segmentation algorithms, such as Figure 2 As shown, preliminary preprocessing, such as noise reduction, brightness normalization, and sharpening, is performed on the high-resolution optical image of the wafer. Wafer localization is then performed on the preprocessed wafer optical image to facilitate lattice extraction using a lattice detection network. Specifically, the lattice detection network extracts scale-invariant feature transform (SIFT) feature points from the high-resolution optical image of the wafer and clusters these feature points using density-based spatial clustering of applications with noise (DBSCAN). A lattice grid is constructed based on the clustering results, and the lattice boundaries are calculated according to the known lattice dimensions on the wafer to be analyzed. A low-resolution optical image of the lattice is then extracted based on the lattice boundaries.

[0030] It should be noted that a single wafer contains hundreds or thousands of lattices. Therefore, even when extracting optical images of individual lattices from a high-resolution optical image of the wafer, the resulting optical image resolution of the lattices is relatively low.

[0031] S102, using a pre-trained decision model to perform high-resolution demand analysis on the optical images of each lattice, and determine the lattice to be detected at high resolution.

[0032] Specifically, the optical images of each lattice are input into a pre-trained decision model, which performs high-resolution demand analysis on the optical images of each lattice.

[0033] More specifically, it is determined whether the presence and specific type of defects in the lattice can be directly determined from the optical image (low resolution). Lattices whose presence and specific type of defects cannot be directly determined from the optical image (low resolution) are denoted as lattices requiring high-resolution detection. For these lattices, a scanning electron microscope (SEM) can be used for high-resolution scanning to obtain a high-resolution electron microscope image of the lattice, which can then be used for further defect analysis and detection. By screening the lattices requiring high-resolution detection and those not requiring it in the wafer being analyzed, the efficiency and accuracy of wafer defect detection can be improved.

[0034] In this embodiment of the invention, before inputting the optical images of each lattice into a pre-trained decision model, the optical images of each lattice can be standardized to a uniform size (e.g., 256x256). The standardized optical images of the lattices are then input into the pre-trained decision model for efficient inference.

[0035] The wafer defect analysis method of this invention utilizes a pre-trained decision model to perform defect analysis on optical images of each lattice extracted from the optical image of the wafer. Lattices whose presence and specific defect types can be directly determined from their optical images are designated as lattices requiring no resolution detection. Lattices whose presence and specific defect types cannot be directly determined from their optical images are designated as lattices requiring high-resolution detection. This method improves the efficiency and accuracy of wafer defect detection by filtering between lattices requiring high-resolution detection and those requiring no high-resolution detection.

[0036] In one embodiment of the present invention, the wafer defect analysis method may include: Identify the types of defects in the lattice that do not require high-resolution detection.

[0037] Specifically, a pre-trained decision model is used to identify lattices that can be directly determined from the optical image (low resolution) of the lattice, including whether there are defects and the specific type of defects. These are referred to as lattices that do not require high-resolution detection. The model then outputs the defect detection results for lattices that do not require high-resolution detection, such as whether there are defects or not. If there are defects, the model outputs the defect type, its confidence level, and location information (coordinates of the center point of the defect detection box bbox).

[0038] The wafer defect analysis system of this invention directly records the defect detection results (which can be recorded as coarse classification results) for lattices that do not require high-resolution defect detection, such as defect type (e.g., scratches, contamination) and its confidence level, location information, and other parameters. For lattices that require high-resolution defect detection, the coordinates (optical coordinates, i.e., pixel coordinates) of the center point of each defect detection box (bbox) on the lattice to be detected at high resolution are recorded and marked as to be detected at high resolution (or to be detected by electron microscopy). The wafer defect analysis system of this invention stores the above decision results (coarse classification results or marks to be detected by electron microscopy) in a structured data structure or database for further defect detection and output of specific defect detection results.

[0039] In one embodiment of the present invention, the pre-trained decision model may be a pre-trained VisionThink model.

[0040] The pre-trained Vision Think model in this embodiment of the invention is a multi-modal fusion intelligent analysis model for wafer defects, which can achieve deep fusion of optical images and electron microscope images. Using the Vision Think model with a multi-task structure, defect detection of both optical and electron microscope images can be achieved simultaneously, integrating the entire defect detection process into an integrated electron microscope, thereby reducing the cost of defect detection for wafer dies.

[0041] In one embodiment of the present invention, such as Figure 3 As shown, the pre-trained Vision Think model is loaded with a pre-trained YOLO model. The pre-trained decision model is used to perform high-resolution demand analysis on the optical images of each lattice, including: S201, input the optical image of the lattice into the pre-trained YOLO model to obtain the defect detection results of the lattice; S202, based on the defect detection results of the lattice, determine whether the lattice needs high-resolution detection.

[0042] In this embodiment of the invention, the Vision Think model with a multi-task structure is loaded with a pre-trained YOLO model. The pre-trained YOLO model is used to perform defect detection on the optical image of the lattice, and outputs the defect detection results of the lattice. The dynamic decision module of the pre-trained Vision Think model dynamically decides whether the lattice needs high-resolution detection based on the lattice defect detection results output by the pre-trained YOLO model.

[0043] In one specific embodiment, the pre-trained YOLO model is a pre-trained yolov8n-SAIC (Split-and-Inspect CNN) model.

[0044] Specifically, when determining whether high-resolution detection is required, a pre-trained yolov8n-SAIC model (used for defect detection) is loaded into the dynamic decision module of a pre-trained Vision Think model. The optical image of the lattice die is input into the pre-trained Vision Think model, which uses the pre-trained yolov8n-SAIC model to perform defect classification and detection on the lattice's optical image. The pre-trained yolov8n-SAIC model outputs the defect detection results for the lattice. Based on the defect detection results, the dynamic decision module of the pre-trained Vision Think model dynamically decides whether high-resolution detection is required for the lattice.

[0045] It should be noted that the pre-trained YOLO model can also be other YOLO models. This embodiment of the invention does not limit the specific YOLO model.

[0046] In one embodiment of the present invention, the defect detection result may include the defect type and its confidence level. Based on the defect detection result of the lattice, determining whether the lattice requires high-resolution detection may include: Determine whether the lattice has a preset defect type and whether there is a defect type with a confidence level less than or equal to a preset confidence threshold. If the lattice has a preset defect type, or a defect type with a confidence level less than or equal to a preset confidence threshold, then the lattice is determined to require high-resolution detection, and the lattice is recorded as the lattice to be detected at high resolution. If there is no preset defect type for the lattice and there is no defect type with a confidence level greater than the preset confidence threshold, then it is determined that the lattice does not require high-resolution detection. The defect type corresponding to the lattice that does not require high-resolution detection is output by the pre-trained YOLO model and recorded as the defect type of the lattice that does not require high-resolution detection.

[0047] In this embodiment of the invention, the defect detection results output by the pre-trained YOLO model include defect types (such as "contamination", "scratches", "foreign objects" etc.) and their confidence levels.

[0048] Specifically, such as Figure 4 As shown, the dynamic decision-making module of the Vision Think model, when determining whether a lattice requires high-resolution detection, can determine whether the confidence level corresponding to the defect type on the lattice is less than or equal to a preset confidence threshold, and if the confidence level is greater than the preset confidence threshold, determine whether the defect type is a preset defect type (such as the defect type corresponding to a microscopic defect). It should be noted that this invention does not limit the order in which the defect type and confidence level are determined.

[0049] When a preset defect type exists on the crystal lattice, the lattice is marked as a lattice requiring high-resolution detection, regardless of whether the confidence level corresponding to the defect type is high or low. When a defect type with a confidence level less than or equal to a preset confidence threshold exists on the crystal lattice, the lattice is marked as a lattice requiring high-resolution detection, regardless of whether the defect type is a preset defect type. Only when no preset defect type exists on the crystal lattice, and no defect type with a confidence level greater than the preset confidence threshold exists, is the lattice marked as a lattice that does not require high-resolution detection. The defect judgment criteria for whether a defect on the crystal lattice requires high-resolution detection are the same as above: if the defect is a preset defect type, it is marked as a defect requiring high-resolution detection; if the confidence level of the defect is less than or equal to the preset confidence threshold, it is marked as a defect requiring high-resolution detection; if a defect requiring high-resolution detection exists on the crystal lattice, it is marked as a lattice requiring high-resolution detection.

[0050] In this embodiment of the invention, for defects on the crystal lattice with a confidence level less than or equal to a preset confidence threshold, the texture complexity of the defect can be evaluated. Based on the evaluation result, dynamic decision-making is triggered to determine whether the defect requires high-resolution detection. If it is determined that the defect does not require high-resolution detection, it is marked as a "normal defect" or "no electron microscopy detection required." If it is determined that the defect requires high-resolution detection, it is marked as "requires electron microscopy detection," and the location information of the defect is output. Defects on the crystal lattice that do not require "requires electron microscopy detection" are recorded as lattices that do not require electron microscopy detection, and the detection result (no defect, or defect type, etc.) is directly output.

[0051] In one embodiment of the present invention, the defect detection result may include location information. Based on the defect detection result of the lattice, determining whether the lattice requires high-resolution detection may include: Based on the location information corresponding to the type of lattice defect, determine whether the lattice is located within the preset edge range of the wafer; If so, then the lattice is determined to require high-resolution detection, and the lattice is recorded as the lattice to be detected at high resolution; and / or Based on the location information corresponding to the lattice defect type, count the number of lattices to be detected at high resolution among multiple lattices within a preset range of the lattice. If the quantity exceeds the preset quantity threshold, the lattice is determined to require high-resolution detection, and the lattice is recorded as the lattice to be detected at high resolution.

[0052] The defect detection results output by the pre-trained YOLO model in this embodiment of the invention include the defect type, its confidence level, and location information (coordinates of the center point of the defect detection box bbox).

[0053] Specifically, when the dynamic decision-making module of the Vision Think model determines whether a lattice needs high-resolution detection based on the defect type and its confidence level, it can further obtain the location context of the lattice based on the location information of the lattice defect type, such as whether the lattice defect type is located at the edge or whether it is clustered with other defects, in order to further determine whether the lattice needs high-resolution detection.

[0054] In practice, when further determining whether the lattice requires high-resolution inspection, the position information (optical coordinates) of the lattice is determined based on the position information corresponding to one or more defect types on the lattice. The position information (optical coordinates) of the lattice is then used to determine whether the lattice is located within a preset edge range of the wafer. Alternatively, the position information corresponding to one or more defect types on the direct lattice can be used to determine whether the lattice is located within a preset edge range of the wafer. Since the probability of defects in lattices at the wafer edge is relatively high, to avoid missed detections, when it is determined that the lattice is located within a preset edge range of the wafer, it can be recorded as the lattice to be inspected at high resolution.

[0055] In practice, when further determining whether the lattice requires high-resolution detection, based on the location information corresponding to one or more defect types on the lattice, the number of lattices within a preset range of the lattice that require high-resolution detection is counted to determine whether the lattice clusters with the lattice requiring high-resolution detection. If the number of lattices around the lattice requiring high-resolution detection is greater than a preset threshold, it indicates that the lattice may cluster with the lattice requiring high-resolution detection, and the lattice can be recorded as the lattice requiring high-resolution detection.

[0056] In one embodiment of the present invention, the wafer defect analysis method may further include: Obtain historical statistical data, which should include at least the probability that each defect type requires high-resolution detection; The preset defect types are updated based on the probability of high-resolution detection for each defect type in historical statistical data.

[0057] To prevent further missed detections, this embodiment of the invention updates the preset defect types based on historical statistical data of the current batch or previous batches of wafers (such as the probability of each defect type requiring high-resolution detection). That is, the preset defect types can be not only the defect types corresponding to microscopic defects, but also the defect types with a high probability of requiring high-resolution detection.

[0058] Specifically, the probability of high-resolution detection required for each defect type in this batch or previous batches of wafers is obtained. Defect types with a probability of high-resolution detection greater than a preset detection probability threshold are added to the preset defect types.

[0059] The wafer defect analysis method of this invention directly outputs the defect type of a wafer with high-confidence macroscopic defects and stores the defect type in a database. Wafers with low-confidence or microscopic defects are designated as lattices to be detected at high resolution, and the Vision Think model is triggered to perform reinforcement learning decision-making.

[0060] The wafer defect analysis method of this invention will be described using a specific embodiment: Before performing defect analysis, the wafer defect analysis system pre-loads two deep learning modules upon startup: a pre-trained yolov8n-SAIC model and a pre-trained Vision Think dynamic decision module. The yolov8n-SAIC model is used to detect defects in the input lattice optical image. The Vision Think dynamic decision module, based on the lattice defect detection results output by the yolov8n-SAIC model (such as the defect type and its confidence level, location information, location context, and historical statistical data), assesses whether the lattice requires high-resolution SEM (Scanning Electron Microscope) inspection.

[0061] Specifically, the wafer defect analysis system extracts the optical images of each lattice from the optical image of the wafer and normalizes the optical images of each lattice to a uniform size (e.g., 256x256). The wafer defect analysis system inputs the normalized lattice optical images into a pre-trained yolov8n-SAIC model. The yolov8n-SAIC model outputs the defect detection results for each lattice, such as the defect type (e.g., "contamination", "scratches", "foreign objects"), its confidence level, and location information (coordinates of the center point of the defect detection bounding box).

[0062] The wafer defect analysis system calls Vision Think's dynamic decision-making module to make dynamic decisions based on the defect detection results of each lattice, determining whether the corresponding lattice requires high-resolution inspection. For each lattice's defect detection results, the following process is executed: Input the following information into VisionThink’s dynamic decision module: defect image patch (cropped from the optical image of the lattice by bbox or extended region in the yolov8n-SAIC model), defect type (or defect semantic features extracted from the defect image patch), lattice location information of the defect and location context (whether it is located at the edge, whether it is clustered with other defects, etc.), historical statistics (such as the probability of high-resolution detection for each defect type, etc.).

[0063] Vision Think's dynamic decision-making module uses the above decision-making strategy to output decision results. If Vision Think's dynamic decision-making module determines that a defect on the lattice does not require electron microscopy inspection, it marks the defect on the lattice as "not requiring electron microscopy inspection," outputs the defect detection result for the defect on the lattice, and saves the classification result. If Vision Think's dynamic decision-making module determines that the defect requires further detailed inspection, it outputs a flag bit.<request_SEM> The defects on the lattice are marked as "requiring electron microscopy inspection," and their locations (the coordinates of the center point of the defect detection box) are recorded. It should be noted that as long as there are defects marked as "requiring electron microscopy inspection" on the lattice, the lattice is recorded as a lattice to be inspected at high resolution.

[0064] In this embodiment of the invention, the Vision Think model determines whether a defect requires high-resolution electron microscopy inspection based on the defect features extracted from a low-resolution optical image of the lattice or the YOLOv8-SAIC model, and outputs "<request_SEM> "Label or directly provide coarse classification results (no need for high-resolution lattice defect detection results)."

[0065] The wafer defect analysis method of this invention, in accordance with embodiments, is for wafers marked as...<request_SEM> To identify defects, a high-resolution electron microscope (SEM) image of the defect location on the lattice to be detected is acquired using a scanning electron microscope. The ViT model (Vision Transformer block classification model) in the VisionThink inference engine is then used to perform fine defect identification and classification, achieving the goal of nanoscale defect analysis.

[0066] It should be noted that when the wafer defect analysis system starts up or schedules a task, it can load the pre-trained yolov8n-SAIC model and the pre-trained Vision Think model, as well as the pre-trained ViT model, that is, integrate the model into the Vision Think inference engine.

[0067] The ViT model in this embodiment of the invention uses the ViT-B or ViT-L architecture, which is adapted to the region self-attention capability of high-resolution defect images; it supports image block input, and is particularly suitable for processing local small-sized, highly complex structures; it supports multi-label output and abnormal pattern recognition.

[0068] In one embodiment of the present invention, such as Figure 5 As shown, the pre-trained Vision Think model is loaded with the pre-trained ViT model, and the wafer defect analysis methods may include: S301, Perform electron microscopy scanning imaging on the lattice to be detected at high resolution to obtain an electron microscopy image of the lattice to be detected at high resolution; S302 uses a pre-trained ViT model to perform defect detection on the electron microscope image of the lattice to be detected at high resolution, and generates the defect type of the lattice to be detected at high resolution.

[0069] In this embodiment of the invention, the pre-trained Vision Think model is loaded with a pre-trained ViT model to detect electron microscopy images of the lattice to be detected at high resolution and generate the defect type of the lattice to be detected at high resolution.

[0070] Specifically, the wafer defect analysis system calls the preset optical-electron microscope coordinate mapping relationship, and controls the scanning electron microscope to perform positioning scanning on the lattice to be detected in the wafer (target lattice) based on the optical coordinates of the defect to be detected by electron microscope on the lattice to be detected in high resolution output by the Vision Think dynamic decision module, so as to obtain the electron microscope image of the target lattice (8192x8192 electron microscope image).

[0071] In practice, when the wafer defect analysis system controls the scanning electron microscope (SEM) to acquire electron microscopy images of the target lattice, it can automatically focus the SEM on the defect center region of the target lattice and set parameters such as magnification (e.g., 5,000×~20,000×) and field of view size. The SEM obtains high-resolution grayscale or pseudo-color electron microscopy images. The electron microscopy images can be saved in standard formats (e.g., TIFF / PNG / JPG) and bound with defect location information.

[0072] The wafer defect analysis system reads electron microscope images acquired by scanning electron microscopes, that is, it calls the electron microscope control system or acquisition process middleware to read the acquired high-resolution defect images (such as 1024x1024 or 2048x2048, 8-bit or 16-bit grayscale images), and inputs the read electron microscope images of the target lattice into the pre-trained ViT model. The pre-trained ViT model performs nanoscale defect classification (such as dislocations, micropores, etc.) on the electron microscope images of the lattice to be detected at high resolution, and outputs the defect type of the defect to be detected by electron microscope on the lattice to be detected at high resolution.

[0073] It should be noted that before processing the electron microscope images using the pre-trained ViT model, the lattice electron microscope images can be standardized. Standardization includes at least one of the following: contrast enhancement, noise suppression, image scaling, or cropping to a specified region.

[0074] In one embodiment of the present invention, such as Figure 6 As shown, the pre-trained ViT model includes multiple classification sub-models for defect detection in electron microscopy images of lattices to be inspected at high resolution. These sub-models may include: S401, the electron microscope image is divided into sub-blocks of a preset size, and the feature vector of each sub-block is extracted.

[0075] Specifically, the pre-trained ViT model performs image patching on the electron microscope image of the lattice, dividing the image into several fixed-size sub-patches (e.g., 16×16 pixels), generating a total of N = (H / 16) × (W / 16) sub-patches. Feature vectors are extracted from each sub-patch, converting each sub-patch into a feature embedding vector. In this embodiment, the feature embedding vector of each sub-patch can serve as an independent observation window for the pre-trained ViT model.

[0076] S402 uses the K-means clustering algorithm to cluster based on the feature vectors of each sub-block, obtaining the clustering results and the defect probability of each sub-block in each clustering result.

[0077] It should be noted that the K-Means clustering algorithm is an unsupervised machine learning algorithm. Its core is to automatically divide the dataset into K non-overlapping "clusters", so that the data points within each cluster have high similarity, while the data points between different clusters have low similarity.

[0078] In this embodiment, the K-Means clustering algorithm is used to determine the core defect region of the lattice to be detected at high resolution. K-Means clustering (K is adjustable, commonly 3~5) is performed on the feature vectors of all sub-blocks to identify regions with high focus and prominent structural complexity in the lattice electron microscope image. The K-Means clustering algorithm outputs the clustering results and the defect probability of each sub-block in each clustering result.

[0079] In a specific embodiment of the present invention, the clustering index of the K-means clustering algorithm includes at least one of feature dissimilarity, local mild distribution, and defect spatial concentration.

[0080] Specifically, the K-Means clustering algorithm used to select cluster centers employs one or more of the following metrics: feature variance; local intensity distribution; and defect spatial concentration.

[0081] It should be noted that the embodiments of the present invention do not limit the clustering index of the K-means clustering algorithm, which can be set according to actual needs.

[0082] S403, compare the defect probability of each sub-block in each clustering result, and denote the sub-block with the highest defect probability X in each clustering result as the target sub-block, where X is an integer and X≥1.

[0083] To improve processing efficiency and accuracy, embodiments of the present invention perform subsequent fine classification reasoning on sub-regions located in the core cluster.

[0084] Specifically, the defect probability of each sub-block in each clustering result is compared, and the sub-blocks with the highest defect probabilities (X) in each clustering result are recorded as the target sub-blocks.

[0085] S404, determine the target classification sub-model based on the defect probability of each target sub-block.

[0086] Since the pre-trained ViT model in this embodiment includes multiple classification sub-models, and the depth of each classification sub-model is different, the defect probability of the target sub-block is negatively correlated with the depth of the classification sub-model. To improve the accuracy and efficiency of defect detection, this embodiment determines the target classification sub-model based on the defect probability of each target sub-block.

[0087] It should be noted that a higher defect probability in a target sub-block indicates a higher accuracy rate in detecting defect types, while a lower defect probability indicates a lower accuracy rate. Therefore, for target sub-blocks with a high defect probability, a shallower classification sub-model can be selected, while for target sub-blocks with a low defect probability, a deeper classification sub-model can be selected.

[0088] S405 uses a target classification sub-model to perform defect detection on the corresponding target sub-blocks.

[0089] As a specific example, the pre-trained ViT model includes three classification sub-models: a first classification sub-model, a second classification sub-model, and a third classification sub-model. The model depth of the first, second, and third classification sub-models increases sequentially. A first probability threshold and a second probability threshold can be set accordingly, with the first probability threshold being greater than the second probability threshold.

[0090] If the defect probability of each target sub-block is greater than or equal to the first probability threshold, then the first classification sub-model is selected to detect defects in that target sub-block.

[0091] If the defect probability of each target sub-block is less than the first probability threshold and greater than or equal to the second probability threshold, then the second classification sub-model is selected to detect defects in the target sub-block.

[0092] If the defect probability of each target sub-block is less than the second probability threshold, then the third classification sub-model is selected to detect defects in that target sub-block.

[0093] S406, determine the defect type of the lattice to be detected at high resolution based on the defect classification results of each target sub-block.

[0094] Specifically, the defect classification results of each target sub-block output by each target classification sub-model are recorded as the defect type of the lattice to be detected at high resolution.

[0095] In this embodiment of the invention, the defect types output by the ViT model may include "dislocation", "micro-void", "residue", "edge collapse", etc.

[0096] It should be noted that, in the embodiments of the present invention, the pre-trained ViT model can output the confidence score corresponding to the defect type at the same time as outputting the defect type.

[0097] In this embodiment of the invention, the defect type of the lattice to be detected at high resolution generated by the pre-trained ViT model is at least one. That is, the output result of the pre-trained ViT model can be represented by multiple labels, such as a defect region can simultaneously belong to "micropore" and "metal deposition".

[0098] It should be noted that embodiments of the present invention may also set abnormal mode prompts, such as "unknown mode (noveldefect)" or "never seen in historical samples".

[0099] In this embodiment of the invention, the wafer defect analysis system is equipped with a multi-task structure Vision Think model that calls the ViT model to perform fine classification tasks on the target sub-block, which can achieve fine defect classification (nanometer level). After the defect detection task of the ViT model is completed, the output results of the ViT model can be stored and the database can be updated.

[0100] In one embodiment of the present invention, such as Figure 7 As shown, the defect classification results include defect types. Based on the defect classification results of each target sub-block, the defect type of the lattice to be detected at high resolution is determined, which may include: S501, vote on the defect type of each target sub-block; S502, based on the voting results of each defect type, determines the defect type of the lattice to be detected at high resolution.

[0101] Since the target lattice contains multiple target sub-blocks, and the defect manifestations in different regions of the electron microscope image may be different, the defect features of a single sub-block may be incomplete or affected by noise (such as local image blurring or artifacts). By voting among multiple sub-blocks, the consistent features of most target sub-blocks are combined to reduce the influence of individual target sub-blocks on the results and reduce misjudgments (for example, if a defect in a sub-block is misjudged as a "scratch" due to the imaging angle, but most sub-blocks show it as a "dislocation", the final voting result will tend to favor the more reliable "dislocation").

[0102] Therefore, in order to further improve the defect types of the lattice to be detected at high resolution output by the ViT model, the defect types of each target sub-block output by each target classification sub-model can be voted on, and the defect types of the lattice to be detected at high resolution can be determined based on the voting results of each defect type.

[0103] In one embodiment of the present invention, such as Figure 8 As shown, the defect classification results include the confidence level corresponding to the defect type. Based on the voting results of each defect type, the defect type of the lattice to be detected at high resolution is determined, which may include: S601, determine the weight of each defect type based on the confidence level of each defect type.

[0104] In one specific embodiment, the weight of the defect type is positively correlated with the confidence level of the defect type.

[0105] Specifically, the defect classification results of the target sub-blocks output by the target classification sub-model can include the confidence level corresponding to the defect type. The weight of each defect type is determined based on its confidence level. The higher the confidence level of a defect type, the higher its weight in the voting process.

[0106] S602 calculates the weighted average of the voting results and weights for each defect type, and selects the defect type with the highest score as the defect type of the lattice to be detected at high resolution.

[0107] Specifically, a weighted calculation is performed based on the voting results and weights of each defect type, and the defect types with the highest scores or the top two scores are selected as the defect types of the lattice to be detected at high resolution (target lattice).

[0108] like Figure 9As shown, in this embodiment of the invention, the wafer defect analysis system, when performing high-resolution electron microscope (EM) defect image classification and recognition, loads a trained ViT model, reads the EM image (8192x8192 EM image) of the defect location on the lattice to be detected at high resolution, and feeds it into the ViT model for inference. When classifying nanoscale defects (such as dislocations, micropores, etc.), the ViT model divides the EM image at the defect location into blocks, extracts the feature vectors of all sub-blocks, and uses K-means clustering to locate the core defect region. Each clustering result returns the top 3 sub-blocks (target sub-blocks) with the highest defect probability and their respective defect probabilities. The depth of the classification sub-model (MobileNet V2 model) is dynamically adjusted based on the defect probability of each target sub-block, or a classification sub-model of the corresponding depth is selected and loaded. The classification results output by each classification sub-model are updated to the defect information database, forming a complete defect identification record. To further improve performance, voting and weighting can be applied to the classification results output by each classification sub-model. The defect information database is updated based on the weighted results and confidence levels, forming a complete defect identification record. An alarm is triggered when the MES alarm rule is activated in the recorded defect information database.

[0109] It should be noted that the embodiments of the present invention do not limit the yolov8n-SAIC model and ViT model loaded by Vision Think, and other models can also be used instead.

[0110] In this embodiment of the invention, a wafer defect analysis system loaded with pre-trained yolov8n-SAIC, Vision Think, and ViT models integrates the above classification results with the original defect information and updates them to a structured database or defect management platform, thus providing the defect information of each lattice on the wafer.

[0111] This invention provides an embodiment of the defect detection process using a specific piece of program code: json { "wafer_id": "W20250725-001", "die_index": [10, 5], "defect_id": "D105-23", "optical_center": [x, y], "sem_image_path": " / sem_images / W20250725-001 / D105-23.tif", "sem_result": { "classification": "dislocation", "confidence": 0.91, "patch_cluster": "Cluster-2", "viT_scoremap": " / scoremaps / D105-23-clsmap.png" }, "verified": false, "timestamp": "2025-07-25T15:20:00"} The above code records the detection of a defect numbered D105-23 in the lattice at coordinates (10,5) on wafer number W20250725-001. Using the wafer defect analysis method described above, the defect was identified as a "dislocation" (91% confidence level), and the relevant images and analysis data have been stored in the specified path.

[0112] The wafer defect analysis method of this invention employs a multi-task decision model, reducing inference computation through a shared backbone network. Compared to cascading individual models, this saves computing power and enables seamless integration of coarse optical defect classification, high-resolution electron microscopy acquisition, and defect classification. It reduces manual intervention, achieves automated closed-loop detection processes, and improves efficiency and stability.

[0113] This invention provides an electron microscope positioning and imaging method.

[0114] Figure 10 This is a flowchart of an electron microscope localization and imaging method according to an embodiment of the present invention. Figure 10 The electron microscope localization imaging method may include: S701, Obtain the optical coordinates of the target lattice, wherein the optical coordinates of the target lattice are determined based on the optical image of the corresponding wafer; S702, based on the optical coordinates of the target lattice and the preset optical-electron microscope coordinate mapping relationship, controls the electron microscope to perform positioning and scanning of the target lattice in the wafer, and obtains the electron microscope image of the target lattice.

[0115] In this embodiment of the invention, when the electron microscope scan is controlled according to the optical coordinates of the target lattice to obtain the electron microscope image of the target lattice, a preset optical-electron microscope coordinate mapping relationship can be used.

[0116] Specifically, a pre-established optical-electron microscope coordinate mapping relationship is obtained. Based on the optical coordinates of the target lattice and the pre-established optical-electron microscope coordinate mapping relationship, the electron microscope coordinates of the target lattice can be obtained. Based on the electron microscope coordinates of the target lattice, the electron microscope can be controlled to perform positioning and scanning of the target lattice in the wafer to obtain the electron microscope image of the target lattice.

[0117] Similarly, when acquiring electron microscope images of the target defect (the defect to be detected by electron microscope) on the target lattice, the electron microscope can be controlled to locate and scan the target defect on the target lattice according to the position information (optical coordinates) of the target defect on the target lattice and the preset optical-electron microscope coordinate mapping relationship, so as to obtain the electron microscope image of the target defect on the target lattice.

[0118] In one specific embodiment of the present invention, the target lattice may be the aforementioned lattice to be detected at high resolution. The optical coordinates of the target lattice may be the optical coordinates of the lattice to be detected at high resolution output by the pre-trained ViT model.

[0119] It should be noted that the target lattice in the embodiments of the present invention can also be a lattice determined for other purposes. The embodiments of the present invention do not limit the method of determining the target lattice.

[0120] The electron microscope positioning and imaging method of this invention utilizes a preset optical-electron microscope coordinate mapping relationship to directly determine the electron microscope coordinates of the target lattice based on its optical coordinates, thereby controlling the electron microscope to perform positioning and scanning of the target lattice in the wafer and obtaining an electron microscope image of the target lattice.

[0121] In one embodiment of the present invention, such as Figure 11 As shown, the process of constructing the preset optical-electron microscope coordinate mapping relationship may include: S801, acquire the optical coordinates of at least two calibration lattices in the optical image of the wafer.

[0122] Specifically, several (at least two) lattices with known locations are selected as calibration points. The optical coordinates of each calibration lattice in the optical image can be determined manually or automatically. It should be noted that in this embodiment of the invention, the wafer center is used as the origin of the optical coordinate system of the wafer's optical image.

[0123] S802 controls the electron microscope to scan the wafer and determine the electron microscope coordinates of the wafer center and each calibrated lattice.

[0124] Specifically, when obtaining the electron microscope coordinates of the wafer center and each calibrated lattice, the electron microscope is controlled with a preset step size, such as 100, based on the known wafer layout. The electron microscope (EMB) moves (in micrometers) and scans the wafer edge contour. Based on the scanned EMB image of the wafer edge region, the EMB coordinates of the wafer center are determined. Then, based on the known wafer layout, the approximate direction in which the calibration die (lattice) should be located at the wafer edge is calculated. The EMB is then moved from the wafer center with a preset step size, scanning the EMB image of each calibration lattice. The EMB coordinates (in micrometers) of each calibration lattice are determined based on the displacement of the EMB. It should be noted that in this embodiment of the invention, the EMB coordinates of the calibration lattice are the physical coordinates of the calibration lattice on the EMB stage.

[0125] S803. Based on the wafer center and the optical and electron microscope coordinates of each calibrated lattice, determine the optical-electron microscope coordinate mapping relationship. Record the obtained optical-electron microscope coordinate mapping relationship as the preset optical-electron microscope coordinate mapping relationship. The origin of the optical coordinate system of the wafer's optical image and the electron microscope coordinate system of the wafer's electron image are both the wafer center.

[0126] In establishing the mapping relationship between the optical image coordinate system of the wafer and the physical coordinate system of the electron microscope stage (optical-electron microscope coordinate mapping relationship) in the embodiments of the present invention, affine transformation is used to determine the optical coordinates and electron microscope coordinates of the wafer center and each calibration lattice.

[0127] In practice, by using affine transformation (least square fitting), the transformation matrix between the two coordinate systems can be calculated based on the optical coordinates and electron microscope coordinates of the wafer center and each calibrated lattice, thus obtaining the optical-electron microscope coordinate mapping relationship.

[0128] In this embodiment of the invention, the calculated optical-electron microscope coordinate mapping relationship can be stored as a configuration file or memory structure for use by the defect localization and conversion subsystem in the wafer defect analysis system. The defect localization and conversion subsystem is used to control a scanning electron microscope to scan and acquire electron microscope images of the defect locations on the lattice to be inspected under high resolution, based on the location information of the defects to be inspected under electron microscope.

[0129] In one embodiment of the present invention, such as Figure 12 As shown, controlling an electron microscope to scan a wafer and determine the electron microscope coordinates of the wafer center and each calibrated lattice can include: S901, determine the electron microscope coordinates of the wafer center based on the electron microscope image of the wafer edge region obtained by scanning.

[0130] Specifically, when determining the electron microscope (EM) coordinates of the wafer center, the electron microscope is controlled to scan the wafer edge region. It should be noted that scanning only a portion of the wafer edge region is acceptable, or the entire wafer edge region can be scanned. At least three non-collinear edge points are selected from the arc-shaped contour of the wafer edge in the EEM image of the wafer edge region. The EEM coordinates of the wafer center are then determined based on the EEM coordinates of these at least three non-collinear edge points.

[0131] In order to quickly control the scanning electron microscope to scan the edge of the wafer, the electron microscope stage can be controlled to scan the wafer area at a low magnification within a set range (such as the search range covering the entire outer ring of the wafer), and the electron microscope image of the wafer can be acquired at fixed steps (such as 100um), and it can be determined whether the edge of the wafer appears in the field of view.

[0132] S902 controls the electron microscope to move to the center of the wafer based on the electron microscope coordinates at the wafer center.

[0133] S903, based on the optical coordinates of each calibration lattice, controls the electron microscope to move from the center of the wafer to the calibration lattice, and obtains the electron microscope coordinates of each calibration lattice.

[0134] Specifically, when determining the electron microscope (EM) coordinates of each calibration lattice, the electron microscope is moved to the wafer center based on the already determined EEM coordinates of the wafer center. Then, based on the optical coordinates of each calibration lattice and the known wafer layout, the approximate direction in which the calibration die should be located at the wafer edge is calculated. The electron microscope lens or stage is then moved in this approximate direction by a preset step size to move the scanning electron microscope image from the wafer center to the corresponding calibration lattice. The EEM coordinates of the corresponding calibration lattice are determined based on the displacement of the electron microscope. The determination of the EEM coordinates of other calibration lattices is performed in the same way.

[0135] It should be noted that when using a scanning electron microscope to search for the arcuate contour of the wafer edge and to calibrate the lattice at the wafer center, the lens of the scanning electron microscope can be moved, and the sample stage can also be moved. The specific operation can be performed according to actual needs, and this embodiment of the invention does not limit this.

[0136] In one specific embodiment of the present invention, such as Figure 13 As shown, determining the electron microscope coordinates of the wafer center based on the electron microscope image of the wafer edge region obtained by scanning the wafer can include: S1001, uses an edge detection algorithm to detect the arc-shaped contour of the wafer edge from the electron microscope image of the wafer edge region; S1002, Select at least three non-collinear edge points from the arc-shaped profile of the wafer edge; S1003, the electron microscope coordinates of the wafer center are obtained by fitting the electron microscope coordinates of at least three edge points.

[0137] As a specific example, edge detection algorithms, such as the Canny algorithm and the Hough algorithm, are used to detect the arc-shaped contour of the wafer edge from the electron microscope image of the wafer edge region. Three non-collinear edge points, such as P1, P2, and P3, are selected from the arc-shaped contour of the wafer edge, and the electron microscope coordinates of P1, P2, and P3 are recorded. The geometric three-point circle fitting formula is used to calculate the center coordinates of the circle and the wafer boundary radius R (in Stage coordinate system μm). The calculated center coordinates are used as the electron microscope coordinates of the wafer center.

[0138] In one embodiment of the present invention, determining the optical-electron microscope coordinate mapping relationship based on the optical coordinates and electron microscope coordinates of the wafer center and each calibrated lattice may include: Calculate the x-direction vector and y-direction vector of the unit spacing of the lattice in the electron microscope coordinate system based on the electron microscope coordinates of the wafer center and each calibrated lattice; Based on the electron microscope coordinates of the wafer center, and the x-direction and y-direction vectors of the lattice unit spacing in the electron microscope coordinate system, the optical-electron microscope coordinate mapping relationship is obtained.

[0139] It should be noted that the coordinates of the electron microscope at the wafer center are C_stage=(X_c,Y_c), which is the reference origin of die(0,0) in the optical coordinate system at the wafer center.

[0140] As a specific example, such as Figure 14 As shown, based on the preset wafer map, a standard die (i.e., a calibration die), such as the first calibration die (10,0) and the second calibration die (10,10), is selected as the mapping reference. Using the known wafer layout, the approximate direction of the calibration die at the wafer edge is calculated. The electron microscope stage is controlled to move a certain distance from the wafer center C_stage in the X direction to search for the first calibration die (10,0). At each preset step, an image (electron microscope image) is acquired to identify the boundary of the first calibration die until the complete outline of the first calibration die (10,0) is identified. The center point position of the first calibration die (10,0) is recorded and set as D1_stage=(X1,Y1). Similarly, the second calibration die (10,10) is searched from the wafer center point C_stage along the diagonal direction to obtain D2_stage=(X2,Y2).

[0141] Pair the electron microscope (EM) coordinates and optical coordinates of each point, i.e., the optical coordinates corresponding to the wafer center C_stage=(X_c,Y_c) are die(0,0). The optical coordinates of the calibration die D1=(10,0) are S1=(X1,Y1) and the optical coordinates of the calibration die D2=(10,10) are S2=(X2,Y2). Determine whether the paired calibration die meets the minimum number of points (2). If not, supplement the corresponding calibration die with the EEM coordinates and / or optical coordinates. If yes, based on the difference between the stage coordinates of the two dies, establish the projection of the logical coordinate unit vector in the stage coordinates: Δdx = D1.x - D0.x = 0 Δdy = D1.y - D0.y = 10 ΔX = X2 - X1 ΔY = Y2 - Y1 unit_y=(ΔX / 10,ΔY / 10) represents the Y-direction vector of the die unit spacing in the Stage coordinate system.

[0142] Similarly, the X-direction vector unit_x of the die unit spacing in Stage coordinates is obtained from D0 to D0-die(0,10).

[0143] By using affine transformation, the wafer optical coordinates are mapped to Stage coordinates, resulting in the optical-electron microscope coordinate mapping relationship: S(die_i,die_j)=C_stage+i*unit_x+j*unit_y.

[0144] In one embodiment of the present invention, the expression for the preset optical-electron microscope coordinate mapping relationship is: S(die_i,die_j)=C_stage+i*unit_x+j*unit_y Where S(die_i,die_j) represents the electron microscope coordinates of the lattice, die_i represents the electron microscope abscissa of the lattice, die_i represents the electron microscope ordinate of the lattice, C_stage represents the electron microscope coordinates of the wafer center, i represents the optical abscissa of the lattice, j represents the optical ordinate of the lattice, unit_x represents the x-direction vector of the unit spacing of the lattice in the electron microscope coordinate system, and unit_y represents the y-direction vector of the unit spacing of the lattice in the electron microscope coordinate system.

[0145] The optical-electron microscope coordinate mapping relationship described above is verified to determine whether the error between the calculated electron microscope coordinates and the actual electron microscope coordinates is less than a preset threshold. If the error is less than the preset threshold, the optical-electron microscope coordinate mapping relationship is stored. If the error is greater than or equal to the preset threshold, recalibration is performed using the above method.

[0146] In one embodiment of the present invention, such as Figure 15 As shown, based on the optical coordinates of the target lattice and a preset optical-electron microscope coordinate mapping relationship, the electron microscope is controlled to perform positioning and scanning of the target lattice in the wafer, which may include: S1101, Determine the electron microscope coordinates of the target lattice based on the optical coordinates of the target lattice and the preset optical-electron microscope coordinate mapping relationship; S1102, generate motion control commands based on the electron microscope coordinates of the target lattice; S1103 controls the electron microscope to scan the target lattice in the wafer according to motion control commands.

[0147] It should be noted that, since it is necessary to further detect the defect type of the lattice to be detected at high resolution (target lattice), the defect position of the lattice to be detected at high resolution output by the ViT model is in optical coordinates.

[0148] To achieve electron microscopy imaging of the defect locations in the target lattice, when acquiring electron microscopy images of each defect location on the target lattice, the optical coordinates of each defect are read. A mapping function (with a preset optical-electron microscopy coordinate mapping relationship) is then called to convert the optical coordinates of the defect locations in the target lattice into electron microscopy coordinates. Based on the electron microscopy coordinates, electron microscopy stage motion control commands are generated, including the target X / Y position and movement parameters.

[0149] Upon receiving the stage motion control command, the electron microscope automatically positions its stage, and the microscope lens acquires a high-resolution image of the defect location in the target lattice. Specifically, the wafer defect analysis system sends the stage motion command to the electron microscope control system, and the stage begins to move. The program monitors the stage status and waits for a confirmation signal indicating completion of the movement. After the stage completes positioning, the wafer defect analysis system triggers the command for the electron microscope to acquire a high-resolution image. After the electron microscope acquires the image, the program automatically saves the image file and associates the file path with the corresponding defect ID.

[0150] In one embodiment of the present invention, such as Figure 16 As shown, determining the optical coordinates of a target lattice based on an optical image of a wafer can include: S1201 extracts the optical images of each lattice from the optical image of the wafer.

[0151] In practice, a high-resolution optical image of the wafer to be analyzed is acquired by an industrial camera, and the lattice (die) in the acquired high-resolution optical image of the wafer is separated to extract the optical image of each lattice (die) in the wafer from the high-resolution optical image of the wafer.

[0152] S1202, using a pre-trained decision model to perform high-resolution demand analysis on the optical images of each lattice, determine the lattice to be detected at high resolution and its optical coordinates, and set the optical coordinates of the lattice to be detected at high resolution as the optical coordinates of the target lattice.

[0153] Specifically, the optical images of each lattice are input into a pre-trained decision model, which performs a high-resolution requirement analysis on the optical images of each lattice. It determines whether the presence and type of defects in the lattice can be directly determined from the optical images (low resolution). Lattices whose presence and type of defects cannot be directly determined from their optical images (low resolution) are designated as lattices requiring high-resolution detection.

[0154] The electron microscope positioning and imaging method of this invention utilizes a preset optical-electron microscope coordinate mapping relationship to directly determine the electron microscope coordinates of the target lattice based on its optical coordinates, thereby controlling the electron microscope to perform positioning and scanning of the target lattice in the wafer and obtaining an electron microscope image of the target lattice.

[0155] This invention provides a method for detecting wafer defects.

[0156] Figure 17 This is a flowchart of a wafer defect detection method according to an embodiment of the present invention. Figure 17 As shown, wafer defect detection methods may include S1301, based on the optical coordinates of the target lattice, controls the electron microscope to perform positioning and scanning of the target lattice in the wafer, and obtains the electron microscope image of the target lattice.

[0157] It should be noted that the optical coordinates of the target lattice can be the optical coordinates of the center point of the target lattice, or the optical coordinates of the target defect in the target lattice. The target defect can be the defect to be detected by electron microscopy. Specifically, based on the location information (optical coordinates) of the target defect on the target lattice and the preset optical-electron microscope coordinate mapping relationship, the electron microscope is controlled to locate and scan the target defect on the target lattice, thereby obtaining an electron microscope image of the target defect on the target lattice.

[0158] S1302 uses a pre-trained ViT model to perform defect detection on the electron microscope image of the target lattice and generates the defect type of the target lattice.

[0159] Specifically, the electron microscope image of the target lattice is input into the pre-trained ViT model. The pre-trained ViT model performs nanoscale defect classification (such as dislocations, micropores, etc.) on the electron microscope image of the target lattice and outputs the defect type of the target lattice, or the defect type of the defect to be detected by electron microscope on the target lattice.

[0160] The wafer defect detection method of this invention can control an electron microscope to scan and acquire electron microscope images of the target lattice in the wafer according to the optical coordinates of the target lattice, thereby achieving convenient control and acquisition of high-resolution electron microscope images of the target lattice. By using a pre-trained ViT model to perform defect detection on the electron microscope images of the target lattice, fine defect classification of the target lattice can be achieved.

[0161] In one embodiment of the present invention, controlling an electron microscope to perform a positioning scan of the target lattice in a wafer based on the optical coordinates of the target lattice may include: The electron microscope coordinates of the target lattice are determined based on the optical coordinates of the target lattice and the preset optical-electron microscope coordinate mapping relationship. Based on the electron microscope coordinates of the target lattice, motion control commands are generated; The electron microscope is controlled to scan the target lattice in the wafer according to motion control commands.

[0162] It should be noted that, since it is necessary to further detect the defect type of the lattice to be detected at high resolution (target lattice), the defect position of the lattice to be detected at high resolution output by the ViT model is in optical coordinates.

[0163] To achieve electron microscopy imaging of the defect locations in the target lattice, when acquiring electron microscopy images of each defect location on the target lattice, the optical coordinates (pixel coordinates) of each defect are read. A mapping function (with a preset optical-electron microscopy coordinate mapping relationship) is then called to convert the optical coordinates of the defect locations in the target lattice into electron microscopy coordinates. Based on the electron microscopy coordinates, electron microscopy stage motion control commands are generated, including the target X / Y position and movement parameters.

[0164] Upon receiving the stage motion control command, the electron microscope automatically positions itself, and the microscope lens acquires a high-resolution image of the defect location in the target lattice. Specifically, the wafer defect analysis system sends the stage motion command to the electron microscope control system, and the stage begins to move. The program monitors the stage status and awaits a confirmation signal indicating completion of the motion. After the stage completes positioning, the wafer defect analysis system triggers the command to acquire a high-resolution image. After the electron microscope acquires the image, the program automatically saves the image file and associates the file path with the corresponding defect ID.

[0165] In one embodiment of the present invention, the pre-trained ViT model includes multiple classification sub-models for defect detection of electron microscopy images of the target lattice, which may include: The electron microscope image is segmented into sub-blocks of a preset size, and the feature vector of each sub-block is extracted.

[0166] Specifically, the pre-trained ViT model performs image patching on the electron microscope image of the lattice, dividing the image into several fixed-size sub-patches (e.g., 16×16 pixels), generating a total of N = (H / 16) × (W / 16) sub-patches. Feature vectors are extracted from each sub-patch, converting each sub-patch into a feature embedding vector. In this embodiment, the feature embedding vector of each sub-patch can serve as an independent observation window for the pre-trained ViT model.

[0167] The K-means clustering algorithm is used to cluster the sub-blocks based on their feature vectors, resulting in clustering results and the defect probability of each sub-block in each clustering result.

[0168] It should be noted that the K-Means clustering algorithm is an unsupervised machine learning algorithm. Its core is to automatically divide the dataset into K non-overlapping "clusters", so that the data points within each cluster have high similarity, while the data points between different clusters have low similarity.

[0169] In this embodiment, the K-Means clustering algorithm is used to determine the core defect region of the lattice to be detected at high resolution. K-Means clustering (K is adjustable, commonly 3~5) is performed on the feature vectors of all sub-blocks to identify regions with high focus and prominent structural complexity in the lattice electron microscope image. The K-Means clustering algorithm outputs the clustering results and the defect probability of each sub-block in each clustering result.

[0170] In a specific embodiment of the present invention, the clustering index of the K-means clustering algorithm includes at least one of feature dissimilarity, local mild distribution, and defect spatial concentration.

[0171] Specifically, the K-Means clustering algorithm used to select cluster centers employs one or more of the following metrics: feature variance; local intensity distribution; and defect spatial concentration.

[0172] It should be noted that the embodiments of the present invention do not limit the clustering index of the K-means clustering algorithm, which can be set according to actual needs.

[0173] The defect probability of each sub-block in each clustering result is compared, and the sub-blocks with the highest defect probability X in each clustering result are denoted as the target sub-blocks, where X is an integer and X≥1.

[0174] To improve processing efficiency and accuracy, embodiments of the present invention perform subsequent fine classification reasoning on sub-regions located in the core cluster.

[0175] Specifically, the defect probability of each sub-block in each clustering result is compared, and the sub-blocks with the highest defect probabilities (X) in each clustering result are recorded as the target sub-blocks.

[0176] The target classification sub-model is determined based on the defect probability of each target sub-block.

[0177] Since the pre-trained ViT model in this embodiment includes multiple classification sub-models, and the depth of each classification sub-model is different, the defect probability of the target sub-block is negatively correlated with the depth of the classification sub-model. To improve the accuracy and efficiency of defect detection, this embodiment determines the target classification sub-model based on the defect probability of each target sub-block.

[0178] It should be noted that a higher defect probability in a target sub-block indicates a higher accuracy rate in detecting defect types, while a lower defect probability indicates a lower accuracy rate. Therefore, for target sub-blocks with a high defect probability, a shallower classification sub-model can be selected, while for target sub-blocks with a low defect probability, a deeper classification sub-model can be selected.

[0179] Defect detection is performed on the corresponding target sub-blocks using a target classification sub-model.

[0180] As a specific example, the pre-trained ViT model includes three classification sub-models: a first classification sub-model, a second classification sub-model, and a third classification sub-model. The model depth of the first, second, and third classification sub-models increases sequentially. A first probability threshold and a second probability threshold can be set accordingly, with the first probability threshold being greater than the second probability threshold.

[0181] If the defect probability of each target sub-block is greater than or equal to the first probability threshold, then the first classification sub-model is selected to detect defects in that target sub-block.

[0182] If the defect probability of each target sub-block is less than the first probability threshold and greater than or equal to the second probability threshold, then the second classification sub-model is selected to detect defects in the target sub-block.

[0183] If the defect probability of each target sub-block is less than the second probability threshold, then the third classification sub-model is selected to detect defects in that target sub-block.

[0184] The defect type of the target lattice is determined based on the defect classification results of each target sub-block.

[0185] Specifically, the defect classification results of each target sub-block output by each target classification sub-model are recorded as the defect type of the lattice to be detected at high resolution.

[0186] In one embodiment of the present invention, the defect classification result includes defect type, and the defect type of the target lattice is determined based on the defect classification result of each target sub-block, including: Voting is conducted on the defect types of each target sub-block; The defect type of the target lattice is determined based on the voting results of each defect type.

[0187] Since the target lattice contains multiple target sub-blocks, and the defect manifestations in different regions of the electron microscope image may be different, the defect features of a single sub-block may be incomplete or affected by noise (such as local image blurring or artifacts). By voting among multiple sub-blocks, the consistent features of most target sub-blocks are combined to reduce the influence of individual target sub-blocks on the results and reduce misjudgments (for example, if a defect in a sub-block is misjudged as a "scratch" due to the imaging angle, but most sub-blocks show it as a "dislocation", the final voting result will tend to favor the more reliable "dislocation").

[0188] Therefore, in order to further improve the defect types of the lattice to be detected at high resolution output by the ViT model, the defect types of each target sub-block output by each target classification sub-model can be voted on, and the defect types of the lattice to be detected at high resolution can be determined based on the voting results of each defect type.

[0189] In one embodiment of the present invention, the defect classification result includes the confidence level corresponding to the defect type. Determining the defect type of the target lattice based on the voting results of each defect type may include: The weight of each defect type is determined based on the confidence level of each defect type.

[0190] In one specific embodiment, the weight of the defect type is positively correlated with the confidence level of the defect type.

[0191] Specifically, the defect classification results of the target sub-blocks output by the target classification sub-model can include the confidence level corresponding to the defect type. The weight of each defect type is determined based on its confidence level. The higher the confidence level of a defect type, the higher its weight in the voting process.

[0192] The voting results and weights of each defect type are weighted and calculated, and the defect type with the highest score is taken as the defect type of the target lattice.

[0193] Specifically, a weighted calculation is performed based on the voting results and weights of each defect type, and the defect types with the highest scores or the top two scores are selected as the defect types of the lattice to be detected at high resolution (target lattice).

[0194] In one embodiment of the present invention, such as Figure 11 As shown, the process of constructing the preset optical-electron microscope coordinate mapping relationship includes: S801, acquire the optical coordinates of at least two calibration lattices in the optical image of the wafer.

[0195] Specifically, several (at least two) lattices with known locations are selected as calibration points. The optical coordinates of each calibration lattice in the optical image can be determined manually or automatically. It should be noted that in this embodiment of the invention, the wafer center is used as the origin of the optical coordinate system of the wafer's optical image.

[0196] S802 controls an electron microscope to scan the wafer and determine the electron microscope coordinates of the wafer center and each calibrated lattice. Specifically, when obtaining the electron microscope coordinates of the wafer center and each calibrated lattice, the electron microscope is controlled with a preset step size, such as 100, based on the known wafer layout. The electron microscope (EMB) moves (in micrometers) and scans the wafer edge contour. Based on the scanned EMB image of the wafer edge region, the EMB coordinates of the wafer center are determined. Then, based on the known wafer layout, the approximate direction in which the calibration die (lattice) should be located at the wafer edge is calculated. The EMB is then moved from the wafer center with a preset step size, scanning the EMB image of each calibration lattice. The EMB coordinates (in micrometers) of each calibration lattice are determined based on the displacement of the EMB. It should be noted that in this embodiment of the invention, the EMB coordinates of the calibration lattice are the physical coordinates of the calibration lattice on the EMB stage.

[0197] S803. Based on the wafer center and the optical and electron microscope coordinates of each calibrated lattice, determine the optical-electron microscope coordinate mapping relationship. Record the obtained optical-electron microscope coordinate mapping relationship as the preset optical-electron microscope coordinate mapping relationship. The origin of the optical coordinate system of the wafer's optical image and the electron microscope coordinate system of the wafer's electron image are both the wafer center.

[0198] In establishing the mapping relationship between the optical image coordinate system of the wafer and the physical coordinate system of the electron microscope stage in this embodiment of the invention, affine transformation is used to determine the optical coordinates and electron microscope coordinates of the wafer center and each calibration lattice.

[0199] In practice, by using affine transformation (least square fitting), the transformation matrix between the two coordinate systems can be calculated based on the optical coordinates and electron microscope coordinates of the wafer center and each calibrated lattice, thus obtaining the optical-electron microscope coordinate mapping relationship.

[0200] In this embodiment of the invention, the calculated optical-electron microscope coordinate mapping relationship can be stored as a configuration file or memory structure for use by the defect localization and conversion subsystem in the wafer defect analysis system. The defect localization and conversion subsystem is used to control a scanning electron microscope to scan and acquire electron microscope images of the defect locations on the lattice to be inspected under high resolution, based on the location information of the defects to be inspected under electron microscope.

[0201] In one embodiment of the present invention, such as Figure 12 As shown, controlling an electron microscope to scan a wafer and determine the electron microscope coordinates of the wafer center and each calibrated lattice can include: S901, determine the electron microscope coordinates of the wafer center based on the electron microscope image of the wafer edge region obtained by scanning.

[0202] Specifically, when determining the electron microscope (EM) coordinates of the wafer center, the electron microscope is controlled to scan the wafer edge region. It should be noted that scanning only a portion of the wafer edge region is acceptable, or the entire wafer edge region can be scanned. At least three non-collinear edge points are selected from the arc-shaped contour of the wafer edge in the EEM image of the wafer edge region. The EEM coordinates of the wafer center are then determined based on the EEM coordinates of these at least three non-collinear edge points.

[0203] In order to quickly control the scanning electron microscope to scan the edge of the wafer, the electron microscope stage can be controlled to scan the wafer area at a low magnification within a set range (such as the search range covering the entire outer ring of the wafer), and the electron microscope image of the wafer can be acquired at fixed steps (such as 100um), and it can be determined whether the edge of the wafer appears in the field of view.

[0204] S902 controls the electron microscope to move to the center of the wafer based on the electron microscope coordinates at the wafer center.

[0205] S903, based on the optical coordinates of each calibration lattice, controls the electron microscope to move from the center of the wafer to the calibration lattice, and obtains the electron microscope coordinates of each calibration lattice.

[0206] Specifically, when determining the electron microscope (EM) coordinates of each calibration lattice, the electron microscope is moved to the wafer center based on the already determined EEM coordinates of the wafer center. Then, based on the optical coordinates of each calibration lattice and the known wafer layout, the approximate direction in which the calibration die should be located at the wafer edge is calculated. The electron microscope lens or stage is then moved in this approximate direction by a preset step size to move the scanning electron microscope image from the wafer center to the corresponding calibration lattice. The EEM coordinates of the corresponding calibration lattice are determined based on the displacement of the electron microscope lens or stage. The determination of the EEM coordinates of other calibration lattices is performed in the same way.

[0207] It should be noted that when using a scanning electron microscope to search for the arcuate contour of the wafer edge and to calibrate the lattice at the wafer center, the lens of the scanning electron microscope can be moved, and the sample stage can also be moved. The specific operation can be performed according to actual needs, and this embodiment of the invention does not limit this.

[0208] In one embodiment of the present invention, the optical-electron microscope coordinate mapping relationship is determined based on the optical coordinates and electron microscope coordinates of the wafer center and each calibrated lattice, including: Calculate the x-direction vector and y-direction vector of the unit spacing of the lattice in the electron microscope coordinate system based on the electron microscope coordinates of the wafer center and each calibrated lattice; Based on the electron microscope coordinates of the wafer center, and the x-direction and y-direction vectors of the lattice unit spacing in the electron microscope coordinate system, the optical-electron microscope coordinate mapping relationship is obtained.

[0209] It should be noted that the wafer-center electron microscope coordinates C_stage=(X_c,Y_c) are the reference origin of die(0,0) in the wafer-center optical coordinate system.

[0210] As a specific example, such as Figure 14 As shown, based on the preset wafer map, a standard die (i.e., a calibration die), such as the first calibration die (10,0) and the second calibration die (10,10), is selected as the mapping reference. Using the known wafer layout, the approximate direction of the calibration die at the wafer edge is calculated. The electron microscope stage is controlled to move a certain distance from the wafer center C_stage in the X direction to search for the first calibration die (10,0). At each preset step, an image (electron microscope image) is acquired to identify the boundary of the first calibration die until the complete outline of the first calibration die (10,0) is identified. The center point position of the first calibration die (10,0) is recorded and set as D1_stage=(X1,Y1). Similarly, the second calibration die (10,10) is searched from the wafer center point C_stage along the diagonal direction to obtain D2_stage=(X2,Y2).

[0211] Pair the electron microscope (EM) coordinates and optical coordinates of each point, i.e., the optical coordinates corresponding to the wafer center C_stage=(X_c,Y_c) are die(0,0). The optical coordinates of the calibration die D1=(10,0) are S1=(X1,Y1) and the optical coordinates of the calibration die D2=(10,10) are S2=(X2,Y2). Determine whether the paired calibration die meets the minimum number of points (2). If not, supplement the corresponding calibration die with the EEM coordinates and / or optical coordinates. If yes, based on the difference between the stage coordinates of the two dies, establish the projection of the logical coordinate unit vector in the stage coordinates: Δdx = D1.x - D0.x = 0 Δdy = D1.y - D0.y = 10 ΔX = X2 - X1 ΔY = Y2 - Y1 unit_y=(ΔX / 10,ΔY / 10) represents the Y-direction vector of the die unit spacing in the Stage coordinate system.

[0212] Similarly, the X-direction vector unit_x of the die unit spacing in Stage coordinates is obtained from D0 to D0-die(0,10).

[0213] By using affine transformation, the wafer optical coordinates are mapped to Stage coordinates, resulting in the optical-electron microscope coordinate mapping relationship: S(die_i,die_j)=C_stage+i*unit_x+j*unit_y.

[0214] When analyzing a wafer using the wafer defect analysis method of this invention, the specific process can be found in [reference needed]. Figure 18 .

[0215] The wafer defect detection method of this invention can control an electron microscope to scan and acquire electron microscope images of the target lattice in the wafer according to the optical coordinates of the target lattice, thereby achieving convenient control and acquisition of high-resolution electron microscope images of the target lattice. By using a pre-trained ViT model to perform defect detection on the electron microscope images of the target lattice, fine defect classification of the target lattice can be achieved.

[0216] This invention provides a computer-readable storage medium.

[0217] In this embodiment, a computer program is stored on a computer-readable storage medium, and when the computer program is executed by a processor, it implements the wafer defect analysis method described above.

[0218] This invention provides an electronic device.

[0219] In this embodiment, the electronic device may include a memory and a processor. The memory stores a computer program, and when the computer program is executed by the processor, it implements the wafer defect analysis method described above.

[0220] This invention provides a computer-readable storage medium.

[0221] In this embodiment, a computer program is stored on a computer-readable storage medium, and when the computer program is executed by a processor, it implements the electron microscope localization imaging method as described above.

[0222] This invention provides an electronic device.

[0223] In this embodiment, the electronic device may include a memory and a processor. The memory stores a computer program, and when the computer program is executed by the processor, it implements the electron microscope positioning and imaging method described above.

[0224] The present invention relates to a computer-readable storage medium.

[0225] In this embodiment, a computer program is stored on a computer-readable storage medium, which, when executed by a processor, implements the wafer defect detection method described above.

[0226] This invention relates to an electronic device.

[0227] In this embodiment, the electronic device may include a memory and a processor. The memory stores a computer program, which, when executed by the processor, implements the wafer defect detection method described above.

[0228] Figure 19 This is a structural block diagram of an electronic device according to an embodiment of the present invention.

[0229] like Figure 5 As shown, the electronic device 500 includes a processor 501 and a memory 503. The processor 501 and the memory 503 are connected, for example, via a bus 502. Optionally, the electronic device 500 may also include a transceiver 504. It should be noted that in practical applications, the transceiver 504 is not limited to one type, and the structure of this electronic device 500 does not constitute a limitation on the embodiments of the present invention.

[0230] Processor 501 may be a CPU (Central Processing Unit), a general-purpose processor, a DSP (Digital Signal Processor), an ASIC (Application Specific Integrated Circuit), an FPGA (Field Programmable Gate Array), or other programmable logic devices, transistor logic devices, hardware components, or any combination thereof. It can implement or execute the various exemplary logic blocks, modules, and circuits described in conjunction with the disclosure of this invention. Processor 501 may also be a combination that implements computational functions, such as including one or more microprocessor combinations, a combination of a DSP and a microprocessor, etc.

[0231] Bus 502 may include a pathway for transmitting information between the aforementioned components. Bus 502 may be a PCI (Peripheral Component Interconnect) bus or an EISA (Extended Industry Standard Architecture) bus, etc. Bus 502 can be divided into address bus, data bus, control bus, etc. For ease of representation, Figure 5 The bus is represented by a single thick line, but this does not mean that there is only one bus or one type of bus.

[0232] The memory 503 stores computer programs corresponding to the wafer defect analysis method, electron microscopy localization imaging method, or wafer defect detection method described in the above embodiments of the present invention. These computer programs are executed under the control of the processor 501. The processor 501 executes the computer programs stored in the memory 503 to implement the content shown in the aforementioned method embodiments.

[0233] Among them, electronic devices 500 include, but are not limited to: mobile terminals such as mobile phones, laptops, digital radio receivers, PDAs (personal digital assistants), PADs (tablet computers), PMPs (portable multimedia players), and in-vehicle terminals (such as in-vehicle navigation terminals), as well as fixed terminals such as digital TVs and desktop computers. Figure 5 The electronic device 500 shown is merely an example and should not be construed as limiting the functionality and scope of use of the embodiments of the present invention.

[0234] It should be noted that the logic and / or steps represented in the flowchart or otherwise described herein, for example, can be considered as a sequenced list of executable instructions for implementing logical functions, and can be specifically implemented in any computer-readable medium for use by, or in conjunction with, an instruction execution system, apparatus, or device (such as a computer-based system, a processor-included system, or other system that can fetch and execute instructions from, an instruction execution system, apparatus, or device). For the purposes of this specification, "computer-readable medium" can be any means that can contain, store, communicate, propagate, or transmit programs for use by, or in conjunction with, an instruction execution system, apparatus, or device. More specific examples (a non-exhaustive list) of computer-readable media include: an electrical connection having one or more wires (electronic device), a portable computer disk drive (magnetic device), random access memory (RAM), read-only memory (ROM), erasable and editable read-only memory (EPROM or flash memory), fiber optic devices, and portable optical disc read-only memory (CDROM). Alternatively, the computer-readable medium may be paper or other suitable media on which the program can be printed, since the program can be obtained electronically, for example, by optically scanning the paper or other medium, followed by editing, interpreting, or otherwise processing as necessary, and then stored in a computer memory.

[0235] It should be understood that various parts of the present invention can be implemented in hardware, software, firmware, or a combination thereof. In the above embodiments, multiple steps or methods can be implemented in software or firmware stored in memory and executed by a suitable instruction execution system. For example, if implemented in hardware, as in another embodiment, it can be implemented using any one or a combination of the following techniques known in the art: discrete logic circuits having logic gates for implementing logical functions on data signals, application-specific integrated circuits (ASICs) having suitable combinational logic gates, programmable gate arrays (PGAs), field-programmable gate arrays (FPGAs), etc.

[0236] In the description of this specification, references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0237] In the description of this invention, it should be understood that the terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," "counterclockwise," "axial," "radial," and "circumferential" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing this invention and simplifying the description, and are not intended to indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this invention.

[0238] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this invention, "a plurality of" means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0239] In this invention, unless otherwise explicitly specified and limited, the terms "installation," "connection," "linking," and "fixing," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components, unless otherwise explicitly limited. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.

[0240] In this invention, unless otherwise explicitly specified and limited, "above" or "below" the second feature can mean that the first feature is in direct contact with the second feature, or that the first feature is in indirect contact with the second feature through an intermediate medium. Furthermore, "above," "over," and "on top" of the second feature can mean that the first feature is directly above or diagonally above the second feature, or simply that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature can mean that the first feature is directly below or diagonally below the second feature, or simply that the first feature is at a lower horizontal level than the second feature.

[0241] Although embodiments of the present invention have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting the present invention. Those skilled in the art can make changes, modifications, substitutions and variations to the above embodiments within the scope of the present invention.

Claims

1. A method for detecting wafer defects, characterized in that, The method includes Based on the optical coordinates of the target lattice, an electron microscope is controlled to perform positioning and scanning of the target lattice in the wafer, thereby obtaining an electron microscope image of the target lattice. Using a pre-trained ViT model, defect detection is performed on the electron microscopy image of the target lattice to generate the defect type of the target lattice.

2. The wafer defect detection method according to claim 1, characterized in that, The step of controlling an electron microscope to locate and scan the target lattice in the wafer based on the optical coordinates of the target lattice includes: The electron microscope coordinates of the target lattice are determined based on the optical coordinates of the target lattice and the preset optical-electron microscope coordinate mapping relationship; Based on the electron microscope coordinates of the target lattice, motion control commands are generated; The motion control command controls the electron microscope to scan the target lattice in the wafer.

3. The wafer defect detection method according to claim 1, characterized in that, The pre-trained ViT model includes multiple classification sub-models, and the defect detection of the electron microscopy image of the target lattice includes: The electron microscope image is segmented into sub-blocks of a preset size, and the feature vector of each sub-block is extracted; The K-means clustering algorithm is used to cluster the sub-blocks based on their feature vectors, resulting in clustering results and the probability of defects in each sub-block within each clustering result. The defect probability of each block in each clustering result is compared, and the sub-blocks with the highest defect probabilities X in each clustering result are recorded as target sub-blocks, where X is an integer and X≥1; The target classification sub-model is determined based on the defect probability of each target sub-block; Defect detection is performed on the corresponding target sub-blocks using the target classification sub-model; The defect type of the target lattice is determined based on the defect classification results of each target sub-block.

4. The wafer defect detection method according to claim 3, characterized in that, The defect classification result includes defect type, and determining the defect type of the target lattice based on the defect classification result of each target sub-block includes: Voting is conducted on the defect types of each target sub-block; The defect type of the target lattice is determined based on the voting results of each defect type.

5. The wafer defect detection method according to claim 4, characterized in that, The defect classification result includes the confidence level corresponding to the defect type. Determining the defect type of the target lattice based on the voting results for each defect type includes: The weight of each defect type is determined based on the confidence level of each defect type. The voting results and weights of each defect type are weighted and calculated, and the defect type with the highest score is taken as the defect type of the target lattice.

6. The wafer defect detection method according to claim 5, characterized in that, The weight of the defect type is positively correlated with the confidence level of the defect type.

7. The wafer defect detection method according to claim 3, characterized in that, The depths of the various classification sub-models are different, and the defect probability of the target sub-block is negatively correlated with the depth of the classification sub-model.

8. The wafer defect detection method according to claim 3, characterized in that, The clustering index of the K-means clustering algorithm includes at least one of the following: feature dissimilarity, local mild distribution, and defect spatial concentration.

9. The wafer defect detection method according to claim 2, characterized in that, The process of constructing the preset optical-electron microscope coordinate mapping relationship includes: Obtain the optical coordinates of at least two calibrated lattices in the optical image of the wafer; The electron microscope is controlled to scan the wafer to determine the center of the wafer and the electron microscope coordinates of each of the calibrated lattices; Based on the wafer center and the optical and electron microscope coordinates of each calibration lattice, an optical-electron microscope coordinate mapping relationship is determined, and the obtained optical-electron microscope coordinate mapping relationship is denoted as the preset optical-electron microscope coordinate mapping relationship, wherein the origin of the optical image optical coordinate system of the wafer and the electron microscope coordinate system of the wafer electron image are both the wafer center.

10. The wafer defect detection method according to claim 9, characterized in that, The step of controlling the electron microscope to scan the wafer and determine the electron microscope coordinates of the wafer center and each of the calibrated lattices includes: The electron microscope coordinates of the wafer center are determined based on the electron microscope image of the wafer edge region obtained by scanning. Based on the electron microscope coordinates of the wafer center, control the electron microscope to move to the wafer center; Based on the optical coordinates of each calibration lattice, the electron microscope is controlled to move from the center of the wafer to the calibration lattice to obtain the electron microscope coordinates of each calibration lattice.

11. The wafer defect detection method according to claim 10, characterized in that, The step of determining the optical-electron microscope coordinate mapping relationship based on the optical coordinates and electron microscope coordinates of the wafer center and each of the calibrated lattices includes: Calculate the x-direction vector and y-direction vector of the lattice unit spacing in the electron microscope coordinate system based on the electron microscope coordinates of the wafer center and each of the calibrated lattices; The optical-electron microscope coordinate mapping relationship is obtained based on the electron microscope coordinates of the wafer center and the x-direction and y-direction vectors of the lattice unit spacing in the electron microscope coordinate system.

12. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it implements the wafer defect detection method as described in any one of claims 1-11.

13. An electronic device comprising a memory and a processor, wherein the memory stores a computer program, characterized in that, When the computer program is executed by the processor, it implements the wafer defect detection method as described in any one of claims 1-11.

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