Composition for semiconductor process, method for preparing composition for semiconductor process, and method for manufacturing semiconductor device

Abstract

There is provided a composition for a semiconductor process, the composition comprising silica particles, and the composition having a value of 6.30% to 9.60% according to Formula 1. Further, a composition for a semiconductor process is provided, the composition comprising silica particles, and having a value of greater than 5.80% and less than 8.80% according to Formula 2. Further, provided is a method for preparing a composition for a semiconductor process, the method comprising: a step (a) of stirring an aqueous dispersion solution of silica having a hydrogen ion concentration (pH) in the range of 4.0 to 5.5; a step (b) of introducing a silica surface modifier containing an aminosilane component when the temperature of the aqueous silica dispersion solution is 25 DEG C or more and less than 40 DEG C; (c) introducing a hydrogen ion concentration (pH) regulator into the aqueous silica dispersion solution into which the silica surface modifier has been introduced; and (d) stirring the aqueous silica dispersion solution into which the hydrogen ion concentration (pH) regulator has been introduced so that the final reaction temperature is within the range of 50 DEG C to 65 DEG C. Further, a method of manufacturing a semiconductor device using the composition for a semiconductor process is provided.

Description

Technical Field

[0001] This invention relates to a composition suitable for semiconductor manufacturing and processing, and more particularly to a composition suitable for polishing processes performed during semiconductor manufacturing and processing, and a method for preparing the composition. Background Technology

[0002] Chemical mechanical polishing (CMP) is a technique that polishes the surface of a sample to a target level by injecting a polishing slurry into the interface between a polishing pad and the target material while simultaneously subjecting the surface of the polishing pad to friction. With the application of modern CMP in the fabrication of large-scale semiconductor integrated circuits, it has become a key technology for planarizing the surfaces of interlayer isolation films in devices such as transistors and multilayer wiring, planarizing various films such as oxide and nitride films, or forming tungsten or copper wiring. As the integration density of semiconductor devices increases and chip size decreases year by year, the surface structure of semiconductor devices becomes increasingly complex, and the step differences between interlayer films become increasingly pronounced. Therefore, CMP processes used in semiconductor device manufacturing require high-resolution lithography and atomic-level planarization techniques. CMP is a process that planarizes films by simultaneously utilizing physical friction and chemical reactions, and can produce entirely different polishing results, even due to subtle differences in the process components and / or process fluids used in the process. Therefore, the precision required for the fabrication and design of such process components and / or process fluids is constantly increasing. Summary of the Invention

[0003] [Technical Issues] Therefore, the present invention addresses the aforementioned problems, and one object of the present invention is to provide a composition for semiconductor processes comprising silicon dioxide particles obtained through an optimized surface modification process, wherein the particle aggregation is optimized for polishing a polishing target including a silicon oxide thin film, while simultaneously improving the stability of the composition. The composition for semiconductor processes can maximize these technical advantages by ensuring that the number of particles with a size equal to or greater than a predetermined size falls within a predetermined range of a specific formula.

[0004] Another object of the present invention is to provide a method for preparing a composition for semiconductor processes, and to provide a method specifically for preparing a composition for semiconductor processes having the above-mentioned technical advantages and effects.

[0005] Another object of the present invention is to provide a method for manufacturing a semiconductor device, wherein when a semiconductor wafer having a structure requiring simultaneous polishing of a tungsten (W) film and a silicon oxide film is used as a polishing target by applying a composition for semiconductor processing to a polishing process, the polishing selectivity ratio of the silicon oxide film relative to the tungsten film can be achieved within an optimal range, and a semiconductor device of improved quality can be manufactured without defects such as scratches caused by aggregates or impurities in the composition for semiconductor processing during the polishing process.

[0006] [Technical Solution] According to one aspect of the invention, the above and other objectives can be achieved by providing a composition for semiconductor processing, the composition comprising silicon dioxide particles, and the composition having a value of 6.30% to 9.60% according to the following formula 1: [Formula 1]

[0007] Wherein, L1 is the liquid particle count (LPC) value of particles with a particle diameter greater than 1 micrometer in the composition used in semiconductor processing, L3 is the LPC value of particles with a particle diameter greater than 3 micrometers in the composition used in semiconductor processing, and L5 is the LPC value of particles with a particle diameter greater than 5 micrometers in the composition used in semiconductor processing.

[0008] According to another aspect of the invention, a composition for semiconductor processing is provided, the composition comprising silicon dioxide particles, and the composition having a value greater than 5.80% and less than 8.80% according to the following formula 2: [Formula 2]

[0009] Wherein, L1 is the liquid particle count (LPC) value of particles with a particle diameter greater than 1 micrometer in the composition used in semiconductor processing, L3 is the LPC value of particles with a particle diameter greater than 3 micrometers in the composition used in semiconductor processing, and L5 is the LPC value of particles with a particle diameter greater than 5 micrometers in the composition used in semiconductor processing.

[0010] The composition can have a value of 4.50 to 10.00 according to the following formula 3: [Formula 3]

[0011] Wherein, L1 is the LPC value of particles with a diameter greater than 1 micrometer in the composition used for semiconductor processing, L3 is the LPC value of particles with a diameter greater than 3 micrometers in the composition used for semiconductor processing, L5 is the LPC value of particles with a diameter greater than 5 micrometers in the composition used for semiconductor processing, and Rox is the polishing rate (Å / min) value of a silicon oxide film polished under the following conditions: polishing with a composition used for semiconductor processing at a polishing pressure of 2 psi; a rotational speed of a carrier with a polishing target mounted at 120 rpm; a rotational speed of a stage with a polishing pad mounted at 120 rpm; and an injection rate of the composition used for semiconductor processing at 300 ml / min.

[0012] Compositions for use in semiconductor processes may also include at least one type of additive, wherein the additive includes one selected from: azole compounds; fluorine compounds; alcohols; organic acids; inorganic acids; and combinations thereof.

[0013] In compositions used in semiconductor processes, silicon dioxide particles can have a zeta potential of +10mV to +40mV.

[0014] According to another aspect of the present invention, a method for preparing a composition for semiconductor processing is provided, the method comprising: step (a) stirring an aqueous silica dispersion having a hydrogen ion concentration (pH) in the range of 4.0 to 5.5; step (b) introducing a silica surface modifier containing an aminosilane component while the temperature of the aqueous silica dispersion is in the range of 25°C or higher and lower than 40°C; step (c) introducing a hydrogen ion concentration (pH) adjuster into the aqueous silica dispersion to which the silica surface modifier has been introduced; and step (d) stirring the aqueous silica dispersion to which the hydrogen ion concentration (pH) adjuster has been introduced such that the final reaction temperature reaches a temperature in the range of 50°C to 65°C.

[0015] In step (a), the aqueous silica dispersion solution can be stirred at a speed of 500 rpm to 3000 rpm.

[0016] Hydrogen ion concentration (pH) adjusters may include an acidic component and a solvent, wherein the weight ratio of the acidic component to the solvent is 1:1 to 1:15.

[0017] According to another aspect of the present invention, a method for manufacturing a semiconductor device is provided, the method comprising: arranging a surface to be polished of a polishing target in contact with a polishing surface of a polishing pad; injecting a composition for semiconductor processing into the contact interface between the polishing surface and the surface to be polished; and polishing the surface to be polished while rotating the polishing pad and the polishing target relative to each other, wherein the composition for semiconductor processing has a value of 6.30% to 9.60% according to the following formula 1.

[0018] [Formula 1]

[0019] Wherein, L1 is the liquid particle count (LPC) value of particles with a particle diameter greater than 1 micrometer in the composition used in semiconductor processing, L3 is the LPC value of particles with a particle diameter greater than 3 micrometers in the composition used in semiconductor processing, and L5 is the LPC value of particles with a particle diameter greater than 5 micrometers in the composition used in semiconductor processing.

[0020] According to another aspect of the present invention, a method for manufacturing a semiconductor device is provided, the method comprising: arranging a surface to be polished of a polishing target in contact with a polishing surface of a polishing pad; injecting a composition for semiconductor processing onto the polishing surface; and polishing the surface to be polished while rotating the polishing pad and the polishing target relative to each other, wherein the composition has a value greater than 5.80% and less than 8.80% according to the following formula 2.

[0021] [Formula 2]

[0022] Wherein, L1 is the liquid particle count (LPC) value of particles having a particle diameter greater than 1 micrometer in the composition used in semiconductor processing, L3 is the LPC value of particles having a particle diameter greater than 3 micrometers in the composition used in semiconductor processing, and L5 is the LPC value of particles having a particle diameter greater than 5 micrometers in the composition used in semiconductor processing.

[0023] Compositions for semiconductor processes can be injected onto a polished surface at a flow rate of 10 mL / min to 1,000 mL / min.

[0024] The rotational speed of the polishing pad and the rotational speed of the polishing target can be independently set from 10 rpm to 500 rpm.

[0025] [Technical Effects] Because the composition for semiconductor processing according to the invention comprises silicon dioxide particles obtained through an optimized surface modification process, particle aggregation behavior can be optimized for polishing targets including silicon oxide films, while simultaneously improving the stability of the composition. These technical advantages can be maximized by ensuring that the number of particles with a size equal to or greater than a predetermined size falls within a predetermined range of a specific formula.

[0026] The method for preparing compositions for semiconductor processes according to the present invention is specifically designed for preparing compositions for semiconductor processes that have the aforementioned technical advantages and effects.

[0027] When a semiconductor wafer with a structure requiring simultaneous polishing of both a tungsten (W) film and a silicon oxide film is used as the polishing target by applying a composition for semiconductor processing to a polishing process, the method of manufacturing a semiconductor device can achieve a polishing selectivity ratio of silicon oxide film to tungsten film within an optimal range, and can produce a semiconductor device of improved quality without defects such as scratches caused by aggregates or impurities in the composition for semiconductor processing during the polishing process. Attached Figure Description

[0028] Figure 1 An apparatus configuration related to a method of manufacturing a semiconductor device according to an embodiment is illustrated schematically. Detailed Implementation

[0029] The advantages and features of the present invention, as well as the methods for achieving these advantages and features, will become apparent with reference to the embodiments or examples described below. However, the present invention is not limited to the embodiments or examples disclosed below, but can be implemented in various different forms. The embodiments or examples described in detail below are provided only to complete the disclosure of the present invention and to convey the scope of the invention to those skilled in the art, and the scope of the invention is defined by the scope of the claims.

[0030] In the accompanying drawings, the thickness of some components is enlarged where necessary to clearly show layers or regions. Furthermore, for ease of explanation, the thickness of some layers and regions in the drawings is also exaggerated. Throughout the specification, the same reference numerals refer to the same elements.

[0031] In this description, when a portion such as a layer, film, region, or plate is referred to as "located on," "above," or "over" another portion, this is interpreted to include not only the case of "directly located on" another portion, but also the case where there is another portion between the portion and the other portion. When a portion is referred to as "directly located on" another portion, this is interpreted to mean that there is no other portion between the portion and the other portion. Furthermore, when a portion such as a layer, film, region, or plate is referred to as "located below," "under," or "below" another portion, this is interpreted to include not only the case of "directly located below" another portion, but also the case where there is another portion between the portion and the other portion. When a portion is referred to as "directly located below" another portion, this is interpreted to mean that there is no other portion between the portion and the other portion.

[0032] The embodiments of the present invention will be described in detail below.

[0033] In one embodiment, a composition for semiconductor processing is provided, the composition comprising silicon dioxide particles, and the composition having a value of 6.30% to 9.60% according to the following formula 1: [Formula 1]

[0034] In Formula 1, L1 is the liquid particle count (LPC) value of particles with a particle diameter greater than 1 micrometer in the composition used in semiconductor processing, L3 is the LPC value of particles with a particle diameter greater than 3 micrometers in the composition used in semiconductor processing, and L5 is the LPC value of particles with a particle diameter greater than 5 micrometers in the composition used in semiconductor processing.

[0035] In another embodiment, a composition for semiconductor processing is provided, the composition comprising silicon dioxide particles, and the composition having a value greater than 5.80% and less than 8.80% according to the following formula 2: [Formula 2]

[0036] In Formula 2, L1 is the liquid particle count (LPC) value of particles with a particle diameter greater than 1 micrometer in the composition used in semiconductor processing, L3 is the LPC value of particles with a particle diameter greater than 3 micrometers in the composition used in semiconductor processing, and L5 is the LPC value of particles with a particle diameter greater than 5 micrometers in the composition used in semiconductor processing.

[0037] In the embodiments, the composition used in semiconductor processes can simultaneously satisfy the corresponding ranges described above for Formula 1 and Formula 2.

[0038] Compositions for semiconductor processes can be used to polish various films; more specifically, compositions for chemical mechanical polishing (CMP) can be used to polish various films. CMP compositions for metal wiring typically require low polishing rates under weakly acidic conditions; specifically, compositions for polishing tungsten (W) films typically require low polishing rates under weakly acidic conditions. Furthermore, the composition requires a stable degree of tungsten surface corrosion and the polishing rate ratio, i.e., the selectivity ratio, of various film qualities exposed on the surface must be controlled according to the patterned wafer fabrication process. Typically, when silicon dioxide (SiO2) particles are used as abrasive particles in acidic regions, due to the electrostatic properties of the inherent surface functional groups (Si-OH, Si-O-Si, Si-O-), the silicon dioxide particles have a negative (-) zeta potential or a zeta potential close to the isoelectric point (IEP), resulting in a reduced polishing rate of the silicon oxide (SiO2) film, thus leading to a very low polishing selectivity ratio between the tungsten (W) film and the silicon oxide (SiO2) film. To improve the polishing selectivity of tungsten (W) films versus silicon oxide (SiO2) films, it is necessary to modify the surface functional groups of silica particles in the composition for semiconductor processes to convert the zeta potential value to a positive (+) value. The effect is not only altered in terms of polishing rate or polishing selectivity, but also in terms of stability, such as anti-agglomeration. This depends on various factors in the surface modification process, such as the type of modifier, the order of input of the modifier, the stirring speed and time, the type and order of input of other additives besides the modifier, and the concentration of the additives. The composition for semiconductor processes according to embodiments of the present invention comprises silica particles obtained through an optimized surface modification process, such that particle agglomeration is virtually nonexistent, and the zeta potential value is designed within a suitable range, thereby exhibiting significant technical advantages in both the polishing selectivity and stability of the composition.

[0039] When the value of Formula 1 meets a predetermined range, these technical advantages of the composition for semiconductor processes can be achieved. The components of Formula 1 include: a liquid particle count (LPC) value (L1) for particles with a diameter greater than 1 micrometer in the composition for semiconductor processes; an LPC value (L3) for particles with a diameter greater than 3 micrometers in the composition for semiconductor processes; and an LPC value (L5) for particles with a diameter greater than 5 micrometers in the composition for semiconductor processes. L1 is a value that includes all particles counted for L3 and L5 as a counting target, and since the percentage value of the sum of L3 and L5 to the total L1 corresponds to approximately 6.30% to approximately 9.60%, for example, approximately 6.50% to approximately 9.50%, for example, approximately 6.50% to approximately 9.00%, for example, approximately 6.50% to approximately 8.50%, for example, approximately 6.50% to approximately 8.00%, long-term stability of the composition for semiconductor processes, preventing aggregation, can be ensured. Meanwhile, since Formula 1, which relates to L1, L3, and L5, includes silicon dioxide particles that achieve particle characteristics that satisfy this range, it may be more advantageous to use compositions for semiconductor processes to achieve the desired polishing selectivity ratio between silicon oxide films and tungsten films in the polishing process.

[0040] Meanwhile, the aforementioned technical advantages of the composition used in semiconductor processes can be achieved by ensuring that the value of Formula 2 meets a predetermined range. The components of Formula 2 include: the liquid particle count (LPC) value (L1) of particles having a particle diameter greater than 1 micrometer in the composition used in semiconductor processes, the LPC value (L3) of particles having a particle diameter greater than 3 micrometers in the composition used in semiconductor processes, and the LPC value (L5) of particles having a particle diameter greater than 5 micrometers in the composition used in semiconductor processes. L1 is a value that includes all particles counted for L3 and L5 as a counting target. Since the percentage values ​​of the sum of L3 and L5 relative to the sum of L1, L3, and L5 correspond to greater than about 5.80%, less than about 8.80%, for example, about 6.00% to about 8.50%, for example, about 6.00% to about 8.00%, for example, about 6.00% to about 7.50%, for example, about 6.00% to about 7.40%, for example, about 6.00% to about 7.30%, for example, about 6.00% to about 7.20%, long-term stability of the composition for semiconductor processes can be ensured, preventing aggregation. Furthermore, since Formula 2, which relates L1, L3, and L5, includes silicon dioxide particles that achieve particle characteristics satisfying this range, using the composition for semiconductor processes to achieve the desired polishing selectivity ratio between silicon oxide films and tungsten films in the polishing process is more advantageous.

[0041] In an implementation, when the value of Formula 1 satisfies the above range and the value of Formula 2 simultaneously satisfies the above range, the composition used in semiconductor processes is more conducive to ensuring both anti-aggregation effect and achieving an appropriate polishing selectivity ratio.

[0042] In an embodiment, according to the following formula 3, the composition used in a semiconductor process can have a value of about 4.50 to about 10.00: [Formula 3]

[0043] In Formula 3, L1 is the liquid particle count (LPC) value of particles with a diameter greater than 1 micrometer in the composition for semiconductor processing, L3 is the LPC value of particles with a diameter greater than 3 micrometers in the composition for semiconductor processing, L5 is the LPC value of particles with a diameter greater than 5 micrometers in the composition for semiconductor processing, and Rox is the polishing rate (Å / min) value of a silicon oxide film polished under the following conditions: polishing with a composition for semiconductor processing at a polishing pressure of 2 psi; a rotational speed of the carrier on which the polishing target is mounted is 120 rpm; a rotational speed of the stage on which the polishing pad is mounted is 120 rpm; and an injection rate of the composition for semiconductor processing is 300 ml / min.

[0044] The value of Formula 3 can be, for example, about 4.50 to about 10.00, about 4.50 to about 9.50, about 5.00 to about 10.00, or about 5.00 to about 9.50. Formula 3 is expressed as a dimensionless value, which represents the ratio, in Å / min, of the polishing efficiency value for the silicon oxide film to the sum of the following three: the liquid particle count (LPC) value (L1) of particles with a diameter greater than 1 micrometer in the composition used for semiconductor processing; the liquid particle count (LPC) value (L3) of particles with a diameter greater than 3 micrometers in the composition used for semiconductor processing; and the liquid particle count (LPC) value (L5) of particles with a diameter greater than 5 micrometers in the composition used for semiconductor processing. When the LPC value of the dispersed particles in the composition used for semiconductor processing is adjusted to focus on preventing aggregation, the polishing efficiency of the silicon oxide film may deviate from the target range, for example, becoming too low. Therefore, by designing the composition for semiconductor processes such that the ratio of the polishing efficiency of the silicon oxide film to the sum of L1, L3, and L5 meets the above-mentioned range, it is more advantageous to ensure the anti-agglomeration effect and the required polishing selectivity ratio.

[0045] Rox is a value in Å / min units and can be, for example, about 1,390 to about 2,000, for example, about 1,400 to about 2,000, for example, about 1,500 to about 2,000, for example, about 1,550 to about 2,000, for example, about 1,600 to about 2,000, for example, about 1,700 to about 2,000, for example, about 1,800 to about 2,000, for example, about 1,850 to about 2,000.

[0046] L1 is the LPC value of particles having a particle diameter greater than 1 micrometer in a composition used in semiconductor processes, and can be about 400 or smaller. L1 can be, for example, about 200 to about 400, or, for example, about 200 to about 350.

[0047] L3 is the LPC value of particles having a particle diameter greater than 3 micrometers in a composition used in semiconductor processes, and can be about 20 or less. L3 can be, for example, about 10 to about 20, about 10 to about 19, or about 10 to about 17.

[0048] In the implementation, the composition for semiconductor processes can be more conducive to maximizing the above-mentioned technical advantages because at least two or more of the formulas 1, 2 and 3 simultaneously satisfy their respective ranges.

[0049] Compositions used in semiconductor processes may include silicon dioxide particles. Silicon dioxide particles refer to a particle shape configuration in which silicon dioxide (SiO2) is the main component, and should be understood to include trace amounts of heterogeneous components. Here, "trace" can mean a content at a level of about 0.005% to about 0.03% by weight in 100% of all silicon dioxide particles.

[0050] The average particle diameter (D50) of the silica particles can be from about 5 nm to about 150 nm, for example from about 5 nm to about 100 nm, for example from about 5 nm to about 80 nm, for example from about 10 nm to about 80 nm, for example from about 30 nm to about 50 nm, for example from about 35 nm to about 50 nm, for example from about 40 nm to about 50 nm, for example from about 42 nm to about 48 nm. By including silica particles of this size, not only can the chemical etching capability of the composition for semiconductor processes be adequately ensured, but also the physical etching capability of the composition for semiconductor processes can be ensured, which is more conducive to making the values ​​of Formulas 1, 2 and / or 3 meet the optimal range.

[0051] In the particle distribution of silica particles, the 10% cumulative mass particle size distribution diameter (D10) can be, for example, about 5 nm to about 50 nm, for example, about 5 nm to about 35 nm, for example, about 10 nm to about 35 nm, for example, about 20 nm to about 35 nm, for example, about 23 nm to about 33 nm.

[0052] In the particle distribution of silica particles, the 80% cumulative mass particle size distribution diameter (D80) can be, for example, about 5 nm to about 60 nm, for example, about 10 nm to about 60 nm, for example, about 20 nm to about 60 nm, for example, about 25 nm to about 60 nm, for example, about 35 nm to about 60 nm, for example, about 40 nm to about 55 nm, for example, about 40 nm to about 50 nm.

[0053] In the particle distribution of silica particles, the 90% cumulative mass particle size distribution diameter (D90) can be, for example, about 10 nm to about 90 nm, for example, about 20 nm to about 80 nm, for example, about 30 nm to about 70 nm, for example, about 40 nm to about 60 nm, for example, about 45 nm to about 60 nm.

[0054] In the particle distribution of silica particles, the ratio (D90 / D10) of the diameter of the 90% cumulative mass particle size distribution (D90) to the diameter of the 10% cumulative mass particle size distribution (D10) can be from about 1.90 to about 2.50, for example from about 1.95 to about 2.50, for example from about 2.00 to about 2.50, for example from about 1.90 to about 2.40, for example from about 1.90 to about 2.30, for example from about 1.95 to about 2.30.

[0055] In the particle distribution of silica particles, the ratio of the diameter of the 90% cumulative mass particle size distribution (D90) to the diameter of the 80% cumulative mass particle size distribution (D80) (D90 / D80) can be greater than about 1.00, less than about 1.80, for example about 1.05 to about 1.70, for example about 1.05 to about 1.60, for example about 1.05 to about 1.50, for example about 1.10 to about 1.40.

[0056] The silica particles in the composition for semiconductor processing can have a zeta potential of +20mV to +25mV, for example, about +22mV to +24mV. There is no particular limitation on the zeta potential of the silica particles in the composition for semiconductor processing; however, for example, the zeta potential of the silica particles in the composition for semiconductor processing can be measured using a zeta potential measuring device (Malvern Zeta-sizer Nano ZS) after about 1 mL of the composition for semiconductor processing is introduced into the measuring cell. For example, the zeta potential value can be the average of about 100 measurements. When the composition for semiconductor processing satisfies Formula 1 and / or Formula 2 within the above-mentioned range, and the zeta potential of the silica particles in the composition for semiconductor processing also satisfies the above-mentioned range, the composition for semiconductor processing is more advantageous in ensuring anti-aggregation effects and achieving the desired polishing selectivity.

[0057] In embodiments, the hydrogen ion concentration (pH) of the composition used in semiconductor processes can be from about 2 to about 5, for example, about 3 or higher, about 5 or lower, for example, about 3 or higher, or lower than about 5. When the hydrogen ion concentration (pH) of the composition used in semiconductor processes meets this range, and simultaneously the zeta potential value of the silica particles in the composition used in semiconductor processes meets the above range, the polishing characteristics of the semiconductor wafer, which is the target for polishing, can be optimally designed. Specifically, the silica particles should be adsorbed onto the surface of the semiconductor wafer to be polished at a predetermined or higher level, and should also be easily separated at a predetermined or higher level. When silica particles are adsorbed onto the surface of the semiconductor wafer to be polished with excessive adsorption force and are not easily separated, defects such as scratches may occur on the surface to be polished; conversely, when silica particles are not adsorbed onto the surface to be polished due to a predetermined or higher level of attraction and have excessive fluidity, there is a problem of reduced physical friction and the polishing rate not reaching the target level. In this regard, when the hydrogen ion concentration (pH value) of the composition used in semiconductor processes meets the above range and the zeta potential value of the silica particles in the composition also meets the above range, the silica particles ensure adsorption to the surface of the semiconductor wafer to be polished with an appropriate level of adsorption force and can be easily separated from the surface to be polished. This can help maximize defect prevention while ensuring the target level of polishing rate. These technical advantages can be further maximized when the surface on which the composition used in semiconductor processes is applied contains a silicon oxide film.

[0058] In embodiments, based on the total weight of the composition used in semiconductor processes, the amount of silicon dioxide particles may include from about 0.5% to about 5.0% by weight, for example, from about 0.5% to about 4.5% by weight, for example, from about 0.5% to about 4.0% by weight, for example, from about 0.5% to about 3.5% by weight, for example, from about 1.0% to about 5.0% by weight, for example, from about 1.5% to about 5.0% by weight, for example, from about 2.0% to about 5.0% by weight, for example, from about 2.5% to about 5.0% by weight, for example, from about 1.0% to about 4.5% by weight, for example, from about 1.5% to about 4.0% by weight, for example, from about 2.0% to about 4.0% by weight, for example, from about 2.5% to about 3.5% by weight. When the silica particles include this content, the composition for semiconductor processing can ensure suitable flowability during the polishing process, and the composition for semiconductor processing can more readily achieve the values ​​of Formula 1, Formula 2 and / or Formula 3 within the optimal range.

[0059] The composition for use in semiconductor processes may further include at least one additive, and the additive may be selected from the following: azole compounds; fluorine compounds; alcohol compounds; organic acids; inorganic acids; and combinations thereof. The additive may function to adjust the surface condition of the target part for polishing to achieve optimal polishing results by performing physical and / or chemical etching actions together with silicon dioxide particles.

[0060] Azolium compounds can primarily function to control the surface properties of tungsten (W) films. Azolium compounds may include, for example, one selected from the following: imidazole; benzotriazole (BTA); 5-methyl-1H-benzotriazole (5-MBTA); 3-amino-1,2,4-triazole; 5-phenyl-1H-tetrazole; 3-amino-5-methyl-4H-1,2,4-triazole; 5-aminotetrazole (ATZ); 1,2,4-triazole; toluenetriazole; and combinations thereof.

[0061] In embodiments, the composition for semiconductor processing may include an azole compound, wherein the amount of the azole compound, based on 100 parts by weight of abrasive particles, is from about 0.01 parts to about 5.00 parts by weight, for example, from about 0.01 parts to about 4.50 parts by weight, for example, from about 0.01 parts to about 4.00 parts by weight, for example, from about 0.01 parts to about 3.50 parts by weight, for example, from about 0.01 parts to about 3.00 parts by weight, for example, from about 0.01 parts to about 2.50 parts by weight, for example, from about 0.01 parts to about 2.00 parts by weight, for example, from about 0.01 parts to about 5 ... Approximately 1.50 parts by weight, for example, from approximately 0.05 parts by weight to approximately 5.00 parts by weight, for example, from approximately 0.10 parts by weight to approximately 5.00 parts by weight, for example, from approximately 0.20 parts by weight to approximately 5.00 parts by weight, for example, from approximately 0.10 parts by weight to approximately 4.00 parts by weight, for example, from approximately 0.20 parts by weight to approximately 3.00 parts by weight, for example, from approximately 0.20 parts by weight to approximately 2.50 parts by weight, for example, from approximately 0.20 parts by weight to approximately 2.00 parts by weight, for example, from approximately 0.20 parts by weight to approximately 1.50 parts by weight, for example, greater than approximately 0.20 parts by weight, or approximately 1.50 parts by weight or less.

[0062] Fluorine-based compounds are used as surfactants and can impart suitable flowability to silica particles. In a 0.001% aqueous solution by weight, the static surface tension of the fluorine-based compound can be about 50 dynes / cm or less, for example, about 45 dynes / cm or less, for example, about 10 dynes / cm to about 50 dynes / cm, for example, about 10 dynes / cm to about 45 dynes / cm. In a 0.01% aqueous solution by weight, the static surface tension of the fluorine-based compound can be about 30 dynes / cm or less, for example, about 25 dynes / cm or less, for example, about 5 dynes / cm to about 30 dynes / cm, for example, about 5 dynes / cm to about 25 dynes / cm. By applying a fluorine-based compound with this surface tension, the flowability of the composition for semiconductor processes can be appropriately ensured, and it is more advantageous to achieve Formula 1, Formula 2, and / or Formula 3 within the optimal range, while preventing defects such as scratches on the surface to be polished. Furthermore, the use of fluorine-based compounds can help maintain the surface condition of silicon oxide films in a state suitable for polishing; and due to the fluorine component, it can also help improve long-term storage stability by preventing the growth of bacteria and fungi in the compositions used in semiconductor processes.

[0063] In embodiments, the composition for semiconductor processes may include a fluorine-based compound, wherein the amount of the fluorine-based compound based on 100 parts by weight of silicon dioxide particles is, for example, about 0.01 to about 1.00 parts by weight, for example, about 0.01 to about 0.80 parts by weight, for example, about 0.01 to about 0.70 parts by weight, for example, about 0.01 to about 0.60 parts by weight, for example, about 0.01 to about 0.50 parts by weight, for example, about 0.01 to about 0.40 parts by weight, for example, about 0.01 to about 0.30 parts by weight, for example, about... 0.01 to about 0.20 parts by weight, for example, about 0.02 to about 1.00 parts by weight, for example, about 0.03 to about 1.00 parts by weight, for example, about 0.04 to about 1.00 parts by weight, for example, about 0.05 to about 1.00 parts by weight, for example, about 0.02 to about 0.50 parts by weight, for example, about 0.03 to about 0.40 parts by weight, for example, about 0.04 to about 0.30 parts by weight, for example, about 0.05 to about 0.30 parts by weight, for example, about 0.05 to about 0.20 parts by weight.

[0064] Alcohols can assist in a smooth polishing process by primarily adhering to the polishing surface of a polishing pad. Alcohols may include, for example, one selected from the following: ethylene glycol, glycerol, erythritol, threitol, arabinitol, xylitol, ribitol, mannitol, sorbitol, galactitol, fucitol, idoterol, inositol, voriconol, isomaltitol, maltitol, lactitol, maltotriol, maltotetratitol, polyglycerol, and combinations thereof.

[0065] In an embodiment, based on 100 parts by weight of silica particles, the amount of alcohol compound may include about 50 parts to about 80 parts by weight, for example about 55 parts to about 80 parts by weight, for example about 60 parts to about 80 parts by weight, for example about 60 parts to about 70 parts by weight.

[0066] Organic acids can primarily function to adjust the hydrogen ion concentration (pH value) of compositions used in semiconductor processes. Organic acids can include, for example, one selected from the following: acetic acid (CH3COOH), formic acid, benzoic acid, nicotinic acid, pyridinecarboxylic acid, and combinations thereof.

[0067] In an embodiment, based on 100 parts by weight of silica particles, the amount of organic acid may include, for example, about 0.50 parts to about 10.00 parts by weight, such as about 0.50 parts to about 9.00 parts by weight, such as about 0.50 parts to about 8.00 parts by weight, such as about 0.50 parts to about 7.00 parts by weight, such as about 0.50 parts to about 6.00 parts by weight, such as about 0.50 parts to about 5.00 parts by weight, such as about 0.50 parts to about 4.00 parts by weight, such as about 0.50 parts to about 3.50 parts by weight. 0 parts, for example, about 1.00 parts by weight to about 10.00 parts by weight, for example, about 1.00 parts by weight to about 10.00 parts by weight, for example, about 1.50 parts by weight to about 10.00 parts by weight, for example, about 1.00 parts by weight to about 8.00 parts by weight, for example, about 1.00 parts by weight to about 6.00 parts by weight, for example, about 1.50 parts by weight to about 5.00 parts by weight, for example, about 1.00 parts by weight to about 3.50 parts by weight, for example, about 1.50 parts by weight to about 3.50 parts by weight, for example, about 1.60 parts by weight to about 3.00 parts by weight.

[0068] Inorganic acids primarily function to adjust the hydrogen ion concentration (pH value) of compositions used in semiconductor processes. Inorganic acids can include, for example, one selected from the following: hydrochloric acid (HCl), phosphoric acid (H3PO4), sulfuric acid (H2SO4), nitric acid (HNO3), boric acid (H3BO3), carbonic acid (H2CO3), hydrofluoric acid (HF), hydrobromic acid (HBr), perchloric acid (HClO4), hydroiodic acid (HI), and combinations thereof. More specifically, inorganic acids can include one selected from the following: phosphoric acid (H3PO4), nitric acid (HNO3), and combinations thereof. When this type of inorganic acid is used, the pH value can be easily adjusted, and the effect of preventing aggregation is excellent, thus making it more advantageous for compositions used in semiconductor processes to achieve Equations 1, 2, and / or 3 within the optimal range.

[0069] In an embodiment, based on 100 parts by weight of silica particles, the amount of inorganic acid may include about 0.01 to about 1.00 parts by weight, for example about 0.01 to about 0.80 parts by weight, for example about 0.01 to about 0.50 parts by weight, for example about 0.01 to about 0.40 parts by weight, for example about 0.01 to about 0.30 parts by weight, for example about 0.01 to about 0.20 parts by weight.

[0070] In addition to silica particles and additives, compositions for semiconductor processes may also include a residual amount of solvent. This solvent may be, for example, water (H₂O), and more specifically, ultrapure water.

[0071] The solids content of the composition used in semiconductor processes can be from about 3.5% to about 20% by weight, for example from about 3.5% to about 15% by weight, for example from about 3.5% to about 10% by weight, for example from about 3.5% to about 8.0% by weight. When the solids content is too low, there is a problem that the polishing rate for the quality of each film layer of the polished target part cannot be adequately guaranteed; while when the solids content is too high, there is a problem that defects such as scratches may occur during the polishing process due to unnecessary agglomerates. Since the composition used in semiconductor processes contains silicon dioxide particles, additives, and solvents and thus meets the above-mentioned solids content range, it is more advantageous to inject it at a uniform flow rate when applied to the polishing process, and it is also more advantageous to ensure uniform dispersion and storage stability during the distribution and storage process of the composition used in semiconductor processes.

[0072] In another embodiment, a method for preparing a composition for semiconductor processes is provided, comprising: step (a) stirring an aqueous silica dispersion having a hydrogen ion concentration (pH) in the range of 4.0 to 5.5; step (b) introducing a silica surface modifier containing an aminosilane component while the temperature of the aqueous silica dispersion is in the range of 25°C or higher and lower than 40°C; step (c) introducing a hydrogen ion concentration (pH) adjuster into the aqueous silica dispersion to which the silica surface modifier has been introduced; and step (d) stirring the aqueous silica dispersion to which the hydrogen ion concentration (pH) adjuster has been introduced such that the final reaction temperature reaches a temperature in the range of 50°C to 65°C.

[0073] In methods for preparing compositions for semiconductor processes, descriptions of steps such as “(a)”, “(b)” are merely for the convenience of explaining the steps, and the chronological order is not restricted by the alphabetical order of such descriptions unless the chronological order is determined by a specific configuration.

[0074] The method for preparing compositions for semiconductor processes is a method specifically designed for preparing compositions for semiconductor processes that possess the aforementioned technical advantages and effects, and compositions for semiconductor processes prepared by this method can exhibit all the characteristics described above related to Formulas 1, 2, and 3. Furthermore, all matters above concerning compositions for semiconductor processes can be interpreted equivalently and applied to compositions for semiconductor processes prepared by this method, regardless of whether they are repeated below.

[0075] The composition for semiconductor processing prepared by the method of preparing a composition for semiconductor processing may contain silicon dioxide particles and may have values ​​of about 6.30% to about 9.60%, for example about 6.50% to about 9.50%, for example about 6.50% to about 9.00%, for example about 6.50% to about 8.50%, for example about 6.50% to about 8.00%, according to the following formula 1: [Formula 1]

[0076] In Formula 1, L1 is the liquid particle count (LPC) value of particles with a particle diameter greater than 1 micrometer in the composition used in semiconductor processing, L3 is the LPC value of particles with a particle diameter greater than 3 micrometers in the composition used in semiconductor processing, and L5 is the LPC value of particles with a particle diameter greater than 5 micrometers in the composition used in semiconductor processing.

[0077] The composition for semiconductor processing prepared by the method of preparing a composition for semiconductor processing can have values ​​greater than about 5.80%, less than about 8.80%, for example about 6.00% to about 8.50%, for example about 6.00% to about 8.00%, for example about 6.00% to about 7.50%, for example about 6.00% to about 7.40%, for example about 6.00% to about 7.30%, for example about 6.00% to about 7.20% according to the following formula 2: [Formula 2]

[0078] In Formula 2, L1 is the liquid particle count (LPC) value of particles with a particle diameter greater than 1 micrometer in the composition used in semiconductor processing, L3 is the LPC value of particles with a particle diameter greater than 3 micrometers in the composition used in semiconductor processing, and L5 is the LPC value of particles with a particle diameter greater than 5 micrometers in the composition used in semiconductor processing.

[0079] The composition for semiconductor processing prepared by the method of preparing a composition for semiconductor processing can have values ​​of about 4.50 to about 10.00, for example about 4.50 to about 9.50, for example about 5.00 to about 10.00, or for example about 5.00 to about 9.50, according to the following formula 3: [Formula 3]

[0080] In Formula 3, L1 is the LPC value of particles with a diameter greater than 1 micrometer in the composition for semiconductor processing, L3 is the LPC value of particles with a diameter greater than 3 micrometers in the composition for semiconductor processing, L5 is the LPC value of particles with a diameter greater than 5 micrometers in the composition for semiconductor processing, and Rox is the polishing rate (Å / min) value of a silicon oxide film polished under the following conditions: polishing with a composition for semiconductor processing at a polishing pressure of 2 psi; a rotational speed of the carrier on which the polishing target is mounted is 120 rpm; a rotational speed of the stage on which the polishing pad is mounted is 120 rpm; and an injection rate of the composition for semiconductor processing is 300 ml / min.

[0081] A method for preparing a composition for semiconductor processing includes step (a): stirring an aqueous silica dispersion with a hydrogen ion concentration (pH) in the range of 4.0 to 5.5. In step (a), the pH of the aqueous silica dispersion can be from about 4.0 to about 5.5, for example, from about 4.5 to about 5.5. When the pH of the aqueous silica dispersion meets this range, the native silica particles in the aqueous silica dispersion have a negative (-) zeta potential value. At this time, the zeta potential of the native silica particles in the aqueous silica dispersion can be, for example, from about -15 mV to about -30 mV, or, for example, from about -20 mV to about -30 mV. When native silica particles with such a negative zeta potential are directly applied to a composition for semiconductor processing, the native silica particles cannot be adsorbed onto the silicon oxide film by a predetermined level or higher of attraction and have excessive fluidity, thus potentially affecting the polishing rate and preventing the achievement of the target level. Furthermore, the possibility of excessive particle aggregation increases. The method for preparing compositions for semiconductor processes can be applied to compositions used in semiconductor processes. Furthermore, by treating an aqueous silica dispersion solution with a pH value within a certain range using the various steps described below, the aforementioned technical problems can be effectively avoided. In other words, by using an aqueous silica dispersion solution with a pH value within a certain range as a raw material, the technical advantages of compositions for semiconductor processes prepared by the method for preparing compositions for semiconductor processes can be maximized.

[0082] In step (a), the aqueous silica dispersion solution is stirred at a speed of about 500 rpm to about 3000 rpm, for example about 800 rpm to about 3000 rpm, for example about 1000 rpm to about 3000 rpm, for example about 1200 rpm to about 3000 rpm, for example about 1400 rpm to about 3000 rpm, for example about 1500 rpm to about 3000 rpm, for example about 500 rpm to about 2800 rpm, for example about 500 rpm to about 2600 rpm, for example about 500 rpm to about 2400 rpm, for example about 500 rpm to about 2000 rpm, for example about 500 rpm to about 1800 rpm, for example about 800 rpm to about 2800 rpm, for example about 1000 rpm to about 2600 rpm, for example about 1200 rpm to about 2400 rpm, for example about 1400 rpm to about 2000 rpm, for example about 1500 rpm to about 1800 rpm. When stirring an aqueous silica dispersion, heat is generated due to the friction of the native silica particles. By stirring the aqueous silica dispersion at a stirring speed within a certain range, it is more advantageous to ensure that the heat generated by the friction of the native silica particles corresponds to a reaction temperature suitable for modifying the surface of the native silica particles to the target level. The surface modification of the native silica particles needs to reach the target level in order to prepare a composition for semiconductor processing in which Formulas 1, 2, and / or 3 satisfy the optimal range, and thus achieve a polishing selectivity ratio of silicon oxide film relative to tungsten (W) within the target range, while maximizing the anti-agglomeration effect of silica particles in the composition for semiconductor processing.

[0083] The aqueous silica dispersion is an aqueous solution in which virgin silica particles are dispersed in a colloidal state. The content of virgin silica particles in the aqueous silica dispersion can be from about 20% to about 40% by weight, for example, from about 25% to about 40% by weight, for example, from about 20% to about 35% by weight, for example, from about 20% to about 30% by weight, or for example, from about 25% to about 30% by weight. As described above, frictional heat is generated between the virgin silica particles during the stirring of the aqueous silica dispersion. When the aqueous silica dispersion contains this content of virgin silica particles, the following technical advantage can be obtained: the amount of frictional heat generated by stirring corresponds to the reaction temperature that is conducive to modifying the surface of the virgin silica particles to the target level.

[0084] A method for preparing a composition for semiconductor processes includes step (b): introducing a silica surface modifier containing an aminosilane component when the temperature of the aqueous silica dispersion is in the range of 25°C or higher and below 40°C. When the aqueous silica dispersion is stirred in step (a), the reaction temperature increases due to the frictional heat of the native silica particles in the aqueous silica dispersion. When the temperature of the aqueous silica dispersion corresponds to, for example, about 25°C or higher and below about 40°C, or for example, about 30°C or higher and below about 40°C, the surface of the native silica particles can be modified to a target level by introducing the silica surface modifier. Therefore, it may be more advantageous for the composition for semiconductor processes to implement Formulas 1, 2, and / or 3 within optimal ranges. When the temperature of the aqueous silica dispersion solution is too low or too high when introducing silica surface modifiers, the surface modification degree of the native silica particles is not appropriate, resulting in excessive aggregation. In this case, Formula 1, Formula 2 and / or Formula 3 may not be implemented within the optimal range, leading to defects and failure to achieve the polishing selectivity ratio within the target range.

[0085] Silica surface modifiers include aminosilanes. Aminosilanes can have the structure shown in Chemical Formula 1 below: [Chemical Formula 1]

[0086] In chemical formula 1, R 1 R 2 and R 3 Each can be independently selected from one of hydrogen, methyl, ethyl, and propyl; R 4 It can be selected from hydrogen, alkyl groups having 1 to 10 carbon atoms, and aminoalkyl groups having 1 to 10 carbon atoms; L can be selected from alkylene groups having 1 to 5 carbon atoms. For example, R 4 It can be selected from, for example, hydrogen, methyl, ethyl, propyl, butyl, pentyl, hexyl, aminoethyl, and aminopropyl. L can be selected from, for example, methylene, vinyl, propenyl, and butenyl. In the embodiments, R 4 It can be selected from hydrogen and aminoethyl, and L can be propenyl.

[0087] Because the silica surface modifier contains aminosilanes with this chemical structure, the silica particles modified by it can achieve suitable dispersibility within the composition used in semiconductor processes, and can more favorablely achieve the target range of zeta potential in the composition used in semiconductor processes. Therefore, Formula 1, Formula 2 and / or Formula 3 can achieve the optimal range, thereby making the composition used in semiconductor processes more favorable for simultaneously ensuring anti-agglomeration effects and achieving the desired polishing selectivity.

[0088] Based on 100 parts by weight of virgin silica particles, the silica surface modifier may be added in the following amounts: about 0.05 parts to about 0.50 parts by weight, for example, about 0.05 parts to about 0.45 parts by weight, for example, about 0.05 parts to about 0.40 parts by weight, for example, about 0.05 parts to about 0.35 parts by weight, for example, about 0.05 parts to about 0.30 parts by weight, for example, about 0.10 parts to about 0.50 parts by weight, for example, about 0.15 parts to about 0.50 parts by weight, for example, about 0.10 parts to about 0.40 parts by weight, for example, about 0.15 parts to about 0.30 parts by weight.

[0089] A method for preparing a composition for semiconductor processes includes step (c): introducing a hydrogen ion concentration (pH) adjuster into an aqueous silica dispersion solution in which a silica surface modifier has been introduced. By sequentially performing steps (b) and (c), the method for preparing the composition for semiconductor processes can maximize the anti-agglomeration effect. Specifically, compared to the cases where the silica surface modifier and pH adjuster are introduced simultaneously, or where the pH adjuster is introduced first and then the silica surface modifier, introducing the silica surface modifier first and then the pH adjuster during the preparation of the composition for semiconductor processes is more conducive to achieving the target level of anti-agglomeration effect for particles in the composition used in semiconductor processes. More specifically, when the silica surface modifier and pH adjuster are introduced simultaneously, or when the pH adjuster is introduced first and then the silica surface modifier, Formulas 1, 2, and / or 3 do not meet the appropriate range, which may mean that the proportion of particles increased due to aggregation to the total particles may increase, resulting in the anti-agglomeration effect not reaching the target level.

[0090] Hydrogen ion concentration (pH) adjusters may include, for example, those selected from organic acids, inorganic acids, and combinations thereof. Specifically, organic acids may include, for example, those selected from acetic acid (CH3COOH), formic acid, benzoic acid, nicotinic acid, pyridinecarboxylic acid, and combinations thereof. Inorganic acids may include, for example, those selected from hydrochloric acid (HCl), phosphoric acid (H3PO4), sulfuric acid (H2SO4), nitric acid (HNO3), boric acid (H3BO3), carbonic acid (H2CO3), hydrofluoric acid (HF), hydrobromic acid (HBr), perchloric acid (HClO4), hydroiodic acid (HI), and combinations thereof.

[0091] In embodiments, the hydrogen ion concentration (pH) adjuster may include an acidic component and a solvent. The acidic component includes one selected from organic acids, inorganic acids, and combinations thereof. The solvent may include, for example, water (H₂O). Specifically, the weight ratio of the acidic component to the solvent may be from about 1:1 to about 1:15, for example from about 1:2 to about 1:15, for example from about 1:3 to about 1:15, for example from about 1:5 to about 1:15, for example from about 1:7 to about 1:13, or for example from about 1:8 to about 1:12. Because the acidic component is diluted to this level by the solvent, it is more advantageous to maximize the anti-agglomeration effect of particles in the composition used in semiconductor processes while fully ensuring the inherent function of the pH adjuster.

[0092] In embodiments, the weight ratio of the silica surface modifier to the hydrogen ion concentration (pH) adjuster can be from about 1:1 to about 5:1, for example from about 1:1 to about 4:1, or for example from about 1:1 to about 3:1. By adjusting the weight ratio of the silica surface modifier to the pH adjuster to this range, the surface modification of the native silica particles can be achieved to the target level, and the surface zeta potential can be achieved to the target range, which may be more beneficial to improving the anti-aggregation effect of the composition used in semiconductor processes.

[0093] In step (c), the hydrogen ion concentration (pH) adjuster may be introduced at a rate of, for example, about 1 L / min to about 10 L / min, for example, about 1 L / min to about 9 L / min, for example, about 1 L / min to about 8 L / min, for example, about 1 L / min to about 7 L / min, for example, about 1 L / min to about 6 L / min, for example, about 2 L / min to about 10 L / min, for example, about 3 L / min to about 10 L / min, for example, about 4 L / min to about 10 L / min, for example, about 2 L / min to about 9 L / min, for example, about 3 L / min to about 8 L / min, for example, about 4 L / min to about 7 L / min.

[0094] A method for preparing a composition for semiconductor processes includes step (d): agitating an aqueous silica dispersion in which a hydrogen ion concentration (pH) adjuster has been introduced.

[0095] In step (d), the final reaction temperature of the aqueous silica dispersion can be approximately 50°C to approximately 65°C, for example, approximately 52°C to approximately 65°C, for example, approximately 54°C to approximately 65°C, for example, approximately 56°C to approximately 65°C, for example, approximately 58°C to approximately 65°C, for example, approximately 50°C to approximately 64°C, for example, approximately 50°C to approximately 63°C, for example, approximately 50°C to approximately 62°C, for example, approximately 52°C to approximately 63°C, for example, approximately 56°C to approximately 63°C, for example, approximately 58°C to approximately 62°C. The “final reaction temperature” of the aqueous silica dispersion refers to the temperature at the point in time when stirring of the aqueous silica dispersion is completed in step (d). When the final reaction temperature of the aqueous silica dispersion reaches this range, particle aggregation can be effectively prevented. More specifically, when the temperature of the aqueous silica dispersion solution when the silica surface modifier is introduced in step (b) meets the above range, and the final reaction temperature of the aqueous silica dispersion solution in step (d) also meets the range, it may be more advantageous to achieve the optimal range for Formula 1, Formula 2 and / or Formula 3, and may be more advantageous to simultaneously ensure the anti-agglomeration effect of the particles and achieve the desired polishing selectivity ratio.

[0096] Step (d) can be performed for, for example, about 2 hours to about 10 hours, or for example, about 4 hours to about 8 hours. In step (d), the aqueous silica dispersion can be stirred at speeds of, for example, about 1000 rpm to about 2500 rpm, about 1100 rpm to about 2400 rpm, about 1200 rpm to about 2300 rpm, about 1300 rpm to about 2200 rpm, about 1400 rpm to about 2100 rpm, about 1500 rpm to about 2000 rpm, about 1600 rpm to about 1900 rpm, or about 1700 rpm to about 1800 rpm. When the stirring speed and time of the aqueous silica dispersion meet the above ranges, it is easier to achieve the final reaction temperature of step (d) within the above ranges, which may be beneficial in simultaneously ensuring the anti-agglomeration effect of the particles and achieving the desired polishing selectivity.

[0097] At the time point when step (d) is completed, the LPC value of particles with a diameter greater than 1 micrometer in the aqueous silica dispersion solution can be less than about 10,000, for example about 500 or higher and less than about 10,000, for example about 500 to about 8,000, for example about 500 to about 5,000, for example about 500 to about 3,000.

[0098] At the time point when step (d) is completed, the LPC value of particles with a diameter greater than 3 micrometers in the aqueous silica dispersion solution can be less than about 1,500, for example about 100 or higher and less than about 1,500, for example about 100 to about 1,000, for example about 100 to about 400, for example about 100 to about 350, for example about 100 to about 300.

[0099] At the time point when step (d) is completed, the LPC value of particles with a diameter greater than 5 micrometers in the aqueous silica dispersion solution can be less than about 500, for example about 10 or higher and less than about 500, for example about 10 to about 400, for example about 10 to about 300, for example about 10 to about 200, for example about 10 to about 150, for example about 10 to about 100.

[0100] Since each LPC value of particles with diameters greater than 1 micrometer, greater than 3 micrometers, and greater than 5 micrometers in the aqueous silica dispersion at the time point when step (d) is completed meets the above range, it is more advantageous to make the values ​​of Formulas 1, 2, and / or 3 of the compositions for semiconductor processes prepared by this process reach the optimal range.

[0101] When the zeta potential of the native silica particles in the aqueous silica dispersion solution prior to step (b) is defined as ZP1, the zeta potential of the native silica particles in the aqueous silica dispersion solution prior to step (c) is defined as ZP2, and the zeta potential of the silica particles in the final composition for semiconductor processing is defined as ZP3, the value of Formula 4 below can be greater than about 9.60 and less than about 17.00, or for example, between about 10.00 and about 16.00. In steps (b), (c), and (d), by appropriately setting the temperature conditions and setting the concentration conditions of the pH adjuster, the value of Formula 4 below can be designed within an optimal range. Therefore, the polishing selectivity of the composition for semiconductor processing can be achieved within an optimal range, and it is more advantageous to ensure anti-agglomeration effects during the preparation of the composition for semiconductor processing.

[0102] [Formula 4]

[0103] Prior to step (b), the zeta potential (mV) value (ZP1) of the native silica particles in the aqueous silica dispersion solution can be about -30 to -50, or for example, about -30 to -40.

[0104] In an embodiment, the zeta potential (mV) value (ZP3) of the silicon dioxide particles in the final composition for semiconductor processing can be about 10 to about 40, for example about 15 to about 40, for example about 20 to about 35, or for example about 25 to about 30.

[0105] In another embodiment, a method for manufacturing a semiconductor device is provided, the method comprising: contacting a surface to be polished of a polishing target with a polishing surface of a polishing pad; injecting a composition for semiconductor processing onto the polishing surface; and polishing the surface to be polished while rotating the polishing pad and the polishing target relative to each other, wherein the composition for semiconductor processing has a value of 6.30% to 9.60% according to the following formula 1.

[0106] [Formula 1]

[0107] In Formula 1, L1 is the liquid particle count (LPC) value for particles with a diameter greater than 1 micrometer in the composition used in semiconductor processes, L3 is the LPC value for particles with a diameter greater than 3 micrometers in the composition used in semiconductor processes, and L5 is the LPC value for particles with a diameter greater than 5 micrometers in the composition used in semiconductor processes.

[0108] In another embodiment, a method for manufacturing a semiconductor device is provided, the method comprising: contacting a surface to be polished of a polishing target with a polishing surface of a polishing pad; injecting a composition for semiconductor processing onto the polishing surface; and polishing the surface to be polished while rotating the polishing pad and the polishing target relative to each other, wherein the composition for semiconductor processing has a value greater than 5.80% or less than 8.80% according to the following formula 2.

[0109] [Formula 2]

[0110] In Formula 2, L1 is the liquid particle count (LPC) value for particles with a diameter greater than 1 micrometer in the composition used in semiconductor processes, L3 is the LPC value for particles with a diameter greater than 3 micrometers in the composition used in semiconductor processes, and L5 is the LPC value for particles with a diameter greater than 5 micrometers in the composition used in semiconductor processes.

[0111] In a method for manufacturing a semiconductor device, when a semiconductor wafer having a structure requiring simultaneous polishing of a tungsten (W) film and a silicon oxide film is used as the polishing target, by applying a composition for semiconductor processing in which the values ​​of Formula 1 or Formula 2 satisfy a predetermined range, the polishing selectivity ratio of the silicon oxide film relative to the tungsten film can be achieved within an optimal range, and a semiconductor device of improved quality can be manufactured without defects such as scratches caused by aggregates or impurities in the composition for semiconductor processing during polishing.

[0112] In the method of manufacturing a semiconductor device, since Formula 1 and Formula 2 of the composition used in the semiconductor process simultaneously satisfy the above-mentioned ranges, it may be advantageous to maximize the technological advantages.

[0113] In an embodiment, the composition for semiconductor processing may have values ​​of, for example, about 4.50 to about 10.00, about 4.50 to about 9.50, about 5.00 to about 10.00, or about 5.00 to about 9.50, according to Formula 3 below: [Formula 3]

[0114] In Formula 3, L1 is the liquid particle count (LPC) value for particles with a diameter greater than 1 micrometer in the composition used for semiconductor processing, L3 is the LPC value for particles with a diameter greater than 3 micrometers in the composition used for semiconductor processing, L5 is the LPC value for particles with a diameter greater than 5 micrometers in the composition used for semiconductor processing, and Rox is the polishing rate (Å / min) value for polishing a silicon oxide film under the following conditions: polishing with a composition used for semiconductor processing at a polishing pressure of 2 psi, a rotational speed of a carrier with a polishing target at 120 rpm, a rotational speed of a stage with a polishing pad at 120 rpm, and an injection rate of 300 ml / min for the composition used for semiconductor processing.

[0115] Matters relating to compositions for semiconductor processes applicable to semiconductor device manufacturing methods, whether or not repeated below, are to be interpreted as consistent with and equally applicable to the descriptions of compositions for semiconductor processes in any of the foregoing embodiments.

[0116] Figure 1 The apparatus configuration is schematically illustrated in relation to a method of manufacturing a semiconductor device according to an embodiment. (Refer to...) Figure 1 A method for manufacturing a semiconductor device includes the following steps: bringing the surface to be polished of a polishing target 130 into contact with the polishing surface 111 of a polishing pad 110; and injecting a composition 150 for semiconductor processing onto the polishing surface 111.

[0117] The polishing target 130 may include a semiconductor wafer having a tungsten (W) film and a silicon oxide film. Specifically, the surface to be polished may include surfaces with both tungsten and silicon oxide films that need to be polished simultaneously. Because the polishing target 130 and its surface to be polished have these characteristics, it is advantageous to maximize the obtained technical advantages by using the values ​​of Formula 1, Formula 2 and / or Formula 3 of the composition used in the semiconductor process within a predetermined range.

[0118] The surface hardness of the polishing pad 110 measured on the polished surface 111 is Shore D hardness, which can be about 50 to about 70, for example about 50 to about 65, or for example about 55 to about 65. Methods commonly used in the art can be widely used to measure the Shore D surface hardness on polished surfaces. For example, a sample can be prepared by cutting the polishing pad into 2cm × 2cm (thickness: 2mm) dimensions and allowing it to stand for 16 hours at 25°C and 50 ± 5% humidity, followed by measurement using a hardness tester (Type D hardness tester). When the hardness on the polished surface 111 meets this range, the polished surface 111 will exhibit an appropriate physical elastic correlation with the polishing pad 110 when the composition 150 used in semiconductor processes flows at the contact interface between the polished surface 111 and the surface to be polished of the target part 130. Therefore, semiconductor devices manufactured by methods for manufacturing semiconductor devices may be more likely to exhibit high polishing smoothness without defects such as scratches.

[0119] Grooves may be formed on the polishing surface 111 of the polishing pad 110. These grooves are configured to control the flowability of the composition for semiconductor process 150 injected onto the polishing surface 111. The shape of the grooves is not particularly limited, but the groove depth may be, for example, about 300 micrometers to about 900 micrometers, for example, about 300 micrometers to about 850 micrometers, for example, about 400 micrometers to about 850 micrometers, for example, about 450 micrometers to about 850 micrometers, for example, about 500 micrometers to about 800 micrometers, for example, about 550 micrometers to about 800 micrometers, or for example, about 600 micrometers to about 800 micrometers. Furthermore, the width of the grooves may be about 100 micrometers to about 600 micrometers, for example, about 200 micrometers to about 600 micrometers, for example, about 200 micrometers to about 550 micrometers, for example, about 300 micrometers to about 550 micrometers, or for example, about 350 micrometers to about 550 micrometers. When the depth and width of the groove meet the above range, it is more advantageous to impart optimized flowability to compositions for semiconductor material processes in which Formula 1, Formula 2 and / or Formula 3 respectively meet the above range.

[0120] The contact between the surface to be polished of the polishing target 130 and the polishing surface 111 of the polishing pad 110 can be interpreted as including not only direct physical contact between them, but also indirect contact between them via a composition used in semiconductor processes.

[0121] The step of injecting the semiconductor process composition 150 onto the polishing surface 111 can be specifically implemented by injecting the semiconductor process composition 150 onto the polishing surface 111 through a supply nozzle 140. In embodiments, the flow rate of the semiconductor process composition 150 injected through the supply nozzle 140 can be from about 10 mL / min to about 1,000 mL / min, for example from about 10 mL / min to about 800 mL / min, for example from about 50 mL / min to about 500 mL / min, for example from about 80 mL / min to about 400 mL / min, for example from about 100 mL / min to about 300 mL / min, for example from about 150 mL / min to about 300 mL / min. When the semiconductor process composition 150 satisfying Formula 1, Formula 2 and / or Formula 3 within the above range is injected onto the polishing surface 111 at a flow rate within that range, the frictional behavior between the polishing surface 111 and the surface to be polished through the composition can more effectively improve the polishing performance of the surface to be polished. More specifically, this will be more conducive to achieving the desired polishing selectivity ratio, while simultaneously achieving defect prevention effects, such as preventing scratches caused by solids in the composition used in semiconductor processes.

[0122] Compositions for semiconductor processes may include silica particles and at least one type of additive. Matters concerning silica particles and additives are to be interpreted as consistent with and equally applicable to all the foregoing matters concerning compositions for semiconductor processes. That is, all the specific examples of silica particles and additives and their technical advantages described above regarding compositions for semiconductor processes are to be interpreted as consistent with and equally applicable to compositions for semiconductor processes suitable for methods of manufacturing semiconductor devices, and can have advantageous interactions with other configurations of methods of manufacturing semiconductor devices—e.g., the structure and drive of polishing pads—in achieving technical objectives.

[0123] A method for manufacturing a semiconductor device includes the following steps: polishing a surface to be polished while rotating a polishing pad 110 and a polishing target 130 relative to each other. (Refer to...) Figure 1The polishing pad 110 can be mounted on the table 120, such that the polishing surface 111 is located on the uppermost surface, and the polishing target 130 can be accommodated in the carrier 160, such that the surface to be polished becomes the lowermost surface. The polishing pad 110 and the polishing target 130 can rotate at the same speed and trajectory as the table 120 and the carrier 160. Rotating the polishing pad 110 and the polishing target 130 relative to each other means rotating the polishing pad 110 and the polishing target 130 with the polishing surface and the surface to be polished arranged in contact. The rotation direction of the polishing pad 110 and the rotation direction of the polishing target 130 can be opposite to each other or the same.

[0124] In this embodiment, the rotational speed of the polishing pad 110 and the rotational speed of the polishing target 130 can each be independently from about 10 rpm to about 500 rpm, or for example from about 30 rpm to about 200 rpm. When the polishing pad 110 and the polishing target 130 rotate at rotational speeds within the above ranges, due to the centrifugal force, the frictional behavior between the polishing surface 111 and the surface to be polished interacts with the semiconductor process composition 150 injected onto the polishing surface 111, so that the surface to be polished can be polished to have a high degree of flatness and it is more conducive to polishing a defect-free surface.

[0125] In this embodiment, the rotational speed of the polishing target 130 can be greater than the rotational speed of the polishing pad 110. By rotating the polishing target 130 at a higher speed than the polishing pad 110, it is more beneficial to ensure polishing stability and simultaneously polish the surface of the polishing target 130 without defects.

[0126] In an embodiment, the method of manufacturing a semiconductor device allows the polishing pad 110 and the polishing target 130 to rotate relative to each other while the surface to be polished is pressed against the polishing surface 111. Since the surface to be polished is pressed against the polishing surface 111 and simultaneously subjected to rotational friction, it is more advantageous to maximize the technical advantages gained by the physical and / or chemical polishing action of the composition 150 injected onto the polishing surface 111, provided that the values ​​of Formulas 1, 2, and / or 3 meet predetermined ranges. The load on the surface to be polished pressed against the polishing surface 111 can be, for example, from about 0.01 psi to about 20 psi, or, for example, from about 0.1 psi to about 15 psi.

[0127] A method of manufacturing a semiconductor device may further include the step of treating the polished surface 111 using a conditioner 170. When a composition for semiconductor processing is continuously supplied, the polished surface 111 of the polishing pad 110 is chemically affected; simultaneously, the polished surface 111 is also physically affected due to physical contact with the surface to be polished of the polishing target 130. When the state of the polished surface 111 is deformed due to these chemical / physical effects, it may be difficult to uniformly maintain the polishing performance of the surface to be polished. The conditioner 170 serves as a device for treating the polished surface 111 during the polishing process and can help keep the polished surface 111 in a suitable polishing state throughout the polishing process.

[0128] For example, the regulator 170 can be used to roughen the polished surface 111 when rotating at a predetermined speed. The rotational speed of the regulator 170 can be, for example, about 10 rpm to about 500 rpm, for example, about 50 rpm to about 500 rpm, for example, about 100 rpm to about 500 rpm, for example, about 200 rpm to about 500 rpm, for example, greater than about 200 rpm, or less than about 400 rpm.

[0129] The regulator 170 can rotate when it is pressed against the polishing surface 111 of the polishing pad 110 at a predetermined pressure. For example, the pressing pressure of the regulator 170 against the polishing surface 111 can be from about 1 psi to about 20 psi, for example from about 1 psi to about 15 psi, for example from about 5 psi to about 15 psi, or for example from about 5 psi to about 10 psi.

[0130] By using the conditioner 170 to perform surface treatment under the above process conditions, the polished surface 111 can maintain its optimal surface condition throughout the polishing process, and with the application of the composition 150 for semiconductor processes, the polishing life can be extended.

[0131] Specific examples of the present invention are given below. However, the following embodiments are provided only for illustrative purposes or to explain the present invention, and the scope of the present invention should not be construed as limited thereto, but should be determined by the scope of the claims.

[0132] <Examples and Comparison Examples> Example 1 An aqueous silica dispersion with a hydrogen ion concentration (pH) of 4.9 (±0.4) was prepared. The mixture was stirred at 1675 (±75) rpm. When the temperature of the aqueous silica dispersion reached 35°C, 0.1 parts by weight of a silica surface modifier was introduced into the aqueous silica dispersion based on 100 parts by weight of native silica particles. 3-Aminopropyltriethoxysilane was used as the silica surface modifier. Simultaneously, a hydrogen ion concentration (pH) adjuster with a nitric acid (HNO3) to water (H2O) weight ratio of 1:10 was prepared and introduced into the aqueous silica dispersion containing the silica surface modifier. Here, the mass ratio of the silica surface modifier to the hydrogen ion concentration (pH) adjuster was adjusted to 1:1. The aqueous silica dispersion, to which a hydrogen ion concentration (pH) adjuster had been introduced, was stirred for approximately 6 hours, and stirring was stopped when the final reaction temperature reached 60 (±2) °C. Sorbitol, imidazole, acetic acid, and a fluorine-based compound (HS-31ET, Unichem) were mixed with the silica particles in the aqueous silica dispersion to achieve the parts by weight shown in Tables 1 and 2 below, based on 100 parts of silica particles. Ultrapure solvent was mixed to achieve a solid content of 5.01% (by weight) to prepare a composition for semiconductor processes.

[0133] Example 2 The composition for semiconductor processing is prepared in the same manner as in Example 1, except that the weight ratio of the silica surface modifier to the hydrogen ion concentration (pH) adjuster is adjusted to 2:1.

[0134] Example 3 The composition for semiconductor processing was prepared in the same manner as in Example 1, except that the aqueous silica dispersion was stirred at 1900 (±100) rpm.

[0135] Example 4 The composition for semiconductor processing is prepared in the same manner as in Example 1, except that the weight ratio of the silica surface modifier to the hydrogen ion concentration (pH) adjuster is adjusted to 3:1.

[0136] Comparison Example 1 The composition for semiconductor processing is prepared in the same manner as in Example 1, except that a hydrogen ion concentration (pH) adjuster is first added to an aqueous silica dispersion solution, and then a silica surface modifier is added thereto.

[0137] Comparison Example 2 The composition for semiconductor processing is prepared in the same manner as in Example 1, except that a silica surface modifier and a hydrogen ion concentration (pH) adjuster are simultaneously added to an aqueous silica dispersion.

[0138] Comparison Example 3 The composition for semiconductor processing was prepared in the same manner as in Example 1, except that a hydrogen ion concentration (pH) adjuster with a weight ratio of nitric acid (HNO3) to water (H2O) of 1:1 was prepared.

[0139] Comparison Example 4 The composition for semiconductor processing is prepared in the same manner as in Example 1, except that a silica surface modifier is introduced when the temperature of the aqueous silica dispersion solution is 22°C.

[0140] Comparison Example 5 The composition for semiconductor processing is prepared in the same manner as in Example 1, except that a silica surface modifier is introduced when the temperature of the aqueous silica dispersion is 40°C.

[0141] Comparison Example 6 The composition for semiconductor processing is prepared in the same manner as in Example 1, except that stirring is performed such that the final reaction temperature of the aqueous silica dispersion incorporating a hydrogen ion concentration (pH) adjuster reaches 32 (±4) °C.

[0142] Compare Example 7 The composition for semiconductor processing is prepared in the same manner as in Example 1, except that stirring is performed such that the final reaction temperature of the aqueous silica dispersion incorporating a hydrogen ion concentration (pH) adjuster reaches 70 (±5) °C.

[0143] <Assessment> Measurement Example 1: Measurement of Hydrogen Ion Concentration (pH) The pH value was measured using a hydrogen ion concentration (pH) meter (Laqua, Horiba Co.) while stirring the aqueous silica dispersion at 200 rpm at room temperature (20°C to 24°C).

[0144] Measurement Example 2: Measurement of Polishing Rate For each example and comparative example, a silicon oxide film wafer with a thickness of approximately 20,000 Å was fabricated. For example... Figure 1As shown, a wafer, serving as the polishing target 130, is housed in a carrier 160 with the surface to be polished facing downwards. The carrier 160 is positioned such that the surface to be polished and the polished surface 111 are in contact with a stage 120 on which a polishing pad 110 (HD-319B, SKC) is mounted, with the polishing surface 111 of the polishing pad 110 facing upwards. Polishing is performed for 60 seconds by operating each component under conditions of a pressing force of 2.0 psi against the polishing surface, a rotational speed of 120 rpm for both the carrier 160 and the stage 120, while the semiconductor process compositions of each example and comparative example are applied to the polishing surface at a flow rate of 300 ml / min. Simultaneously, a type 170 regulator (SKC-CI45, Saesol Diamond) is driven at a rotational speed of 250 rpm and a pressing force of 8 psi to process the polishing surface. The thickness of the polished wafer was measured, and the polishing rate (Rox) in Å was calculated using the polishing time and the wafer thickness before and after polishing. The results are shown in Tables 1 and 2 below.

[0145] Measurement Example 3: Measurement of zeta potential For each example and comparative example, the zeta potential (ZP1) (mV) of native silica particles in an aqueous silica dispersion before the introduction of the silica surface modifier was measured using a zeta potentiometer (Malvin Corporation); the zeta potential (ZP2) (mV) of native silica particles in an aqueous silica dispersion after the introduction of the silica surface modifier and before the introduction of the hydrogen ion concentration (pH) adjuster was measured using the same equipment; the zeta (ZP3) potential (mV) of silica particles in the final composition for semiconductor processing was measured using the same equipment. The results are shown in Tables 1 and 2 below.

[0146] Measurement Example 4: Measurement of LPC Value For each example and comparative example, a 100 mL sample was prepared. This sample was an aqueous silica dispersion in which the reaction was terminated by adding a silica surface modifier and a hydrogen ion concentration (pH) adjuster and then aged under static conditions for 24 hours. The instrument tubing was rinsed with ultrapure water before measuring the samples. Using an LPC analyzer (Accusizer FxNano, PSSA), the diluted samples were measured five times under the following conditions: diluent flow rate of 15 mL / min, 32 channels, light extinction collection time of 60 seconds, and initial concentration of 4000 particles / m³. The average value was then taken. The LPC values ​​(RL1, RL3, RL5) for particles larger than 1 μm, 3 μm, and 5 μm in the aqueous silica dispersion are shown in Tables 1 and 2 below.

[0147] For each example and comparative example, 100 mL samples were prepared for the final composition used in the semiconductor process and aged under static conditions for 24 hours. Instrument tubing was rinsed with ultrapure water before sample measurement. Using an LPC measurement device (Accusizer FxNano, PSSA), the diluted samples were measured five times under the following conditions: diluent flow rate of 15 mL / min, 32 channels, light extinction collection time of 60 seconds, and initial concentration of 4000 particles / m³. The average value was then taken. The LPC values ​​(L1, L3, L5) for particles larger than 1 μm, larger than 3 μm, and larger than 5 μm in the compositions used in the semiconductor process are shown in Tables 1 and 2 below.

[0148] Table 1

[0149] Table 2

[0150] Referring to Tables 1 and 2, it can be determined that for the compositions for semiconductor processes in Examples 1 to 4, when the values ​​of Formula 1, Formula 2 and / or Formula 3 satisfy the above-mentioned ranges, the polishing rate of the silicon oxide film is achieved at the target level, while the defects of the polished silicon oxide film are achieved at a level lower than about 1200, for example lower than about 1100 or for example lower than about 1000.

[0151] In the composition for semiconductor processing in Comparative Example 1, a pH adjuster (HN) was introduced first in the preparation process, instead of a silica surface modifier (AS). It was determined that the number of aggregates in the aqueous silica dispersion solution of Comparative Example 1 was significantly increased compared to Examples 1 through 4. Therefore, it was determined that the values ​​of Formulas 1 and 2 for the resulting composition for semiconductor processing deviated from the upper limit range, and the polishing performance of the silicon oxide film did not reach the target level in terms of defects.

[0152] In the composition for semiconductor processing in Comparative Example 2, the silica surface modifier and pH adjuster were introduced simultaneously during the preparation process. It was determined that the number of aggregates in the aqueous silica dispersion solution of Comparative Example 2 was significantly increased compared to Examples 1 through 4. Therefore, the values ​​of Formulas 1 and 2 for the resulting semiconductor processing composition deviated significantly from the upper limit range, and the polishing performance of the silicon oxide film did not reach the target level in terms of defects.

[0153] In Comparative Examples 3 and 4, the temperature of the aqueous silica dispersion solution in which the silica surface modifier was introduced was below 25°C or above 40°C during the preparation process of the composition for semiconductor processing. When the reaction initiation temperature was below or above the aforementioned target range, it was determined that the number of aggregates in the aqueous silica dispersion solution of Comparative Examples 3 and 4 was significantly increased compared to Examples 1 to 4. Therefore, it was determined that the values ​​of Formula 1 and Formula 2 of the composition for semiconductor processing thus ultimately prepared significantly deviated from the upper limit range, and the polishing performance of the silicon oxide film did not reach the target level in terms of defects.

[0154] In Comparative Examples 5 and 6, the final reaction temperature of the preparation process of the composition for semiconductor processing was below 50°C or above 65°C. When the final reaction temperature was below or above the aforementioned target range, it was determined that the number of aggregates in the aqueous silica dispersion solution of Comparative Examples 5 and 6 increased significantly compared to Examples 1 to 4. Therefore, it was determined that the values ​​of Formula 1 and Formula 2 of the composition for semiconductor processing thus ultimately prepared deviated from the upper or lower limit range, and the polishing performance of the silicon oxide film did not reach the target level in terms of defects.

Claims

1. A composition for use in semiconductor processes, said composition comprising silicon dioxide particles, and said composition having a value of 6.30% to 9.60% according to Formula 1 below: [Formula 1] in, L1 is the liquid particle count (LPC) value for particles with a diameter greater than 1 micrometer in the composition used in semiconductor processes. L3 is the LPC value of particles having a particle diameter greater than 3 micrometers in the composition used in semiconductor processes, and L5 is the LPC value for particles having a diameter greater than 5 micrometers in the composition used in semiconductor processes.

2. A composition for use in semiconductor processes, the composition comprising silicon dioxide particles, and the composition having a value greater than 5.80% and less than 8.80% according to the following formula 2: [Formula 2] in, L1 is the liquid particle count (LPC) value for particles with a diameter greater than 1 micrometer in the composition used in semiconductor processes. L3 is the LPC value of particles having a particle diameter greater than 3 micrometers in the composition used in semiconductor processes, and L5 is the LPC value for particles having a diameter greater than 5 micrometers in the composition used in semiconductor processes.

3. The composition according to claim 1 or 2, wherein, The composition has a value of 4.50 to 10.00 according to the following formula 3: [Formula 3] Wherein, L1 is the LPC value of particles having a particle diameter greater than 1 micrometer in the composition used in semiconductor processes. L3 is the LPC value for particles with a diameter greater than 3 micrometers in the composition used in semiconductor processes. L5 is the LPC value of particles having a particle diameter greater than 5 micrometers in the composition used in semiconductor processes, and Rox is the polishing rate (Å / min) value of a silicon oxide film polished under the following conditions: polishing with the composition for semiconductor processes at a polishing pressure of 2 psi; a carrier with the polishing target mounted at a rotational speed of 120 rpm; a stage with the polishing pad mounted at a rotational speed of 120 rpm; and an injection rate of the composition for semiconductor processes of 300 ml / min.

4. The composition according to claim 1 or 2, wherein the composition further comprises at least one type of additive, in, The additives include those selected from the following: azole compounds; fluorinated compounds; alcohols; organic acids; inorganic acids; and combinations thereof.

5. The composition according to claim 1 or 2, wherein, In the composition used in semiconductor processes, the silicon dioxide particles have a zeta potential of +10mV to +40mV.

6. A method for preparing a composition for semiconductor processes, the method comprising: Step (a): Stir the aqueous silica dispersion having a hydrogen ion concentration (pH) in the range of 4.0 to 5.5; Step (b): When the temperature of the aqueous silica dispersion solution is in the range of 25°C or higher and lower than 40°C, a silica surface modifier containing an aminosilane component is introduced. Step (c): Introduce a hydrogen ion concentration (pH) adjuster into the aqueous silica dispersion solution that has been introduced with the silica surface modifier; as well as Step (d): The aqueous silica dispersion solution with the hydrogen ion concentration (pH) adjuster introduced is stirred so that the final reaction temperature reaches a temperature in the range of 50°C to 65°C.

7. The method for preparing a composition for semiconductor processing according to claim 6, wherein, In step (a), the aqueous silica dispersion solution is stirred at a speed of 500 rpm to 3000 rpm.

8. The method for preparing a composition for semiconductor processing according to claim 6, wherein, The hydrogen ion concentration (pH) adjuster comprises an acidic component and a solvent, wherein the weight ratio of the acidic component to the solvent is 1:1 to 1:

15.

9. A method for manufacturing a semiconductor device, the method comprising: Arrange the surface of the target part to be polished in contact with the polishing surface of the polishing pad; A composition for semiconductor processing is injected into the contact interface between the polished surface and the surface to be polished; Polishing is performed on the surface to be polished by rotating the polishing pad and the polishing target relative to each other. The composition used in semiconductor processes has a value of 6.30% to 9.60% according to the following formula 1: [Formula 1] Wherein, L1 is the liquid particle count (LPC) value of particles having a particle diameter greater than 1 micrometer in the composition used in semiconductor processes. L3 is the LPC value of particles having a particle diameter greater than 3 micrometers in the composition used in semiconductor processes, and L5 is the LPC value for particles having a diameter greater than 5 micrometers in the composition used in semiconductor processes.

10. A method of manufacturing a semiconductor device, the method comprising: Arrange the surface of the target part to be polished in contact with the polishing surface of the polishing pad; A composition for semiconductor processing is injected onto the polished surface; as well as Polishing is performed on the surface to be polished by rotating the polishing pad and the polishing target relative to each other. The composition used in semiconductor processes has a value greater than 5.80% and less than 8.80% according to the following formula 2: [Formula 2] Wherein, L1 is the liquid particle count (LPC) value of particles having a particle diameter greater than 1 micrometer in the composition used in semiconductor processes. L3 is the LPC value of particles having a particle diameter greater than 3 micrometers in the composition used in semiconductor processes, and L5 is the LPC value for particles having a diameter greater than 5 micrometers in the composition used in semiconductor processes.

11. The method according to claim 9 or 10, wherein, The composition for semiconductor processing is injected onto the polished surface at a flow rate of 10 mL / min to 1,000 mL / min.

12. The method according to claim 9 or 10, wherein, The rotational speed of the polishing pad and the rotational speed of the polishing target are each independently between 10 rpm and 500 rpm.

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