10kV pole-mounted interconnection switch with intelligent locking function

Abstract

The invention provides a 10kV pole-mounted interconnection switch with an intelligent locking function, which comprises a switch body, a voltage transformer for 10kV interconnection and a secondary and main control system, and is characterized in that the two sides of the switch body are connected with a power supply side voltage transformer and a load side voltage transformer; signals of the power supply side voltage transformer and the load side voltage transformer are input to the secondary and main control system, the secondary and main control system processes the signals of the power supply side voltage transformer and the load side voltage transformer and calculates the phase angle difference of the two sides, when the phase angle difference is larger than a set value, a control signal is sent to the switch body, the switch body is intelligently locked, and the switch body is opened. And closing is not allowed. According to the invention, timing based on GPS or other communication is not needed, and phases and phase sequences at two sides of the switch can be accurately identified.

Description

Technical Field

[0001] This invention relates to the field of switches, and more specifically to a 10kV pole-mounted tie switch with intelligent interlocking function. Background Technology

[0002] With increasingly stringent requirements for power supply reliability, 10kV lines are often hot-loaded in the field to ensure uninterrupted power supply. However, before hot-loading, it is necessary to verify that the phase sequence on both sides is consistent. If the phase angle difference is too large, the conditions for closed-loop hot-loading are not met.

[0003] Currently, phase verification before the thermal conductivity load on 10kV lines requires manual on-site operation using a phase comparator to ensure that the phase sequence on both sides is consistent. This phase verification not only requires the assistance of the instrument but also, in most cases, necessitates climbing the pole to attach the wiring, which is cumbersome and poses safety hazards.

[0004] During the thermal conduction phase verification process, some operators, in order to save trouble, do not verify the phase, i.e., fail to conduct the thermal conduction. Conventional switches lack technical measures to block the closing of switches with inconsistent phases on both sides. They rely solely on management technical requirements to verify the phase and conduct the thermal conduction, leaving a great safety hazard for the thermal conduction work.

[0005] The current phase comparison work before the thermal conductivity load of 10kV lines has the following drawbacks:

[0006] First, the phase comparison instrument not only relies on manual operation, but also needs to be carried at all times, making on-site operation cumbersome. Moreover, its principle is based on GPS time synchronization technology, which requires a base station as a reference, and there is a problem of disconnection.

[0007] Secondly, some operators, in order to save trouble, do not check the phase, i.e., thermal conductivity. Conventional switches lack technical measures to block the closing of switches with inconsistent phases on both sides. They rely solely on management technical requirements to check the phase and thermal conductivity, leaving a great safety hazard for thermal conductivity work. Summary of the Invention

[0008] The purpose of this invention is to provide a 10kV pole-mounted tie switch with intelligent interlocking function, which solves the problem of phase sequence verification before hot loop closing without relying on GPS or other communication time synchronization, accurately identifies the phase and phase sequence on both sides of the switch, and can intelligently interlock two lines that do not meet the conditions for loop closing for the phase angle difference.

[0009] The technical solution to achieve the purpose of this invention is as follows:

[0010] A 10kV pole-mounted tie switch with intelligent interlocking function includes a switch body, a voltage transformer for 10kV tie, and a secondary and main control system. The switch body is connected to a power supply side voltage transformer and a load side voltage transformer on both sides. The signals from the power supply side voltage transformer and the load side voltage transformer are input to the secondary and main control system. The secondary and main control system processes the signals from the power supply side voltage transformer and the load side voltage transformer, calculates the phase angle difference between the two sides, and when the phase angle difference is greater than a set value, a control signal is sent to the switch body, and the switch body intelligently interlocks, preventing closing.

[0011] Furthermore, the secondary and main control system includes an analog signal acquisition module, a filtering module, a digital-to-analog conversion module, a CPU and decision control module, a communication module, and a human-machine interaction module; wherein,

[0012] The analog signal acquisition module is used to acquire signals from the power supply side voltage transformer and the load side voltage transformer.

[0013] The filtering module is used to filter out high-frequency harmonics in the acquired signal;

[0014] The analog-to-digital conversion module is used to convert the filtered analog signal into a digital signal, which is then input to the CPU and decision control module.

[0015] The CPU and decision control module calculate the phase angle difference between the two sides. When the phase angle difference is greater than the set value, a control signal is sent to the switch body.

[0016] The communication module is used for communication between the human-computer interaction module and the CPU and decision control module;

[0017] The human-computer interaction module is used for background monitoring and remote operation.

[0018] Further, the calculation of the phase angle difference between the two sides is as follows: Based on the instantaneous values ​​of 24 points of the voltage transformer on the power supply side and the voltage transformer on the load side collected in each cycle, the detection correction values ​​of the voltage transformer on the power supply side and the voltage transformer on the load side are determined by the detection algorithm. The difference between the detection correction values ​​on both sides is obtained. The detection correction values ​​of the voltage transformer on the power supply side and the voltage transformer on the load side determined by the detection algorithm specifically include:

[0019] The acquired signals from both sides are expressed using cosine functions as follows:

[0020] ;

[0021] In the formula: This is the effective value of the signal; The initial phase angle; Angular frequency; The frequency is 50Hz power frequency; This is the frequency offset.

[0022] The sampling frequency is set to 24 points per cycle. When this happens, a discrete signal is obtained:

[0023] ;

[0024] The signal error is obtained by applying Euler's formula and performing a Fourier transform:

[0025] ;

[0026] In the formula: This is the initial error, which depends only on the input. This is a dynamic error, related to the input offset and the initial phase angle;

[0027] Frequency tracking is achieved through frequency measurement, which compensates for the initial error in the algorithm and then detects the phase angles on both sides.

[0028] Furthermore, frequency tracking is achieved through frequency measurement to compensate for initial errors in the algorithm, thereby detecting the phase angles on both sides. Specifically, this includes:

[0029] Propose moving The method to build phase difference The two phasors are used to weaken the signal amplitude by utilizing the balance relationship. ,get:

[0030] ;

[0031] ;

[0032] ;

[0033] In the formula: These are the initial error coefficients; To determine the dynamic error coefficients, the sampling range is shifted four points to the left and right, and a Fourier transform is performed to obtain:

[0034] ;

[0035] ;

[0036] Will , Phasor synthesis yields:

[0037] ;

[0038] when When, measurement errors are completely eliminated, when At that time, , The correction is as follows:

[0039] ;

[0040] ;

[0041] The revised , Phasor synthesis, followed by Taylor series expansion and simplification, yields the corrected signal:

[0042] .

[0043] Furthermore, the CPU and decision control module employ a clock signal sampling synchronization adjustment algorithm to determine the signal difference of the synchronization clock between the power supply side voltage transformer and the load side voltage transformer.

[0044] Furthermore, the clock signal sampling synchronization adjustment algorithm adopted by the CPU and decision control module specifically includes:

[0045] SA and SB are set as the clock synchronization signals for the power supply side and the load side, respectively. The time difference between the transmitted signals SA and SB is defined as follows: at a certain moment, the power supply side sends a synchronization signal SA to the load side. When the load side receives the SA signal sent by the power supply side, it adds a time difference frame to this synchronization signal data frame and sends it to the power supply side. The time interval is... ;

[0046] Similarly, at a certain moment, the load side sends a synchronization signal SB to the power supply side. When the power supply side receives the synchronization signal SB from the load side, it also adds a time difference frame to its reply synchronization signal data frame. ;

[0047] Combined with the time interval of transmission from the load side to the other party , Calculate the difference between the clock signals on both sides, i.e. ,when A positive time indicates that the clock information at the transmitting end is ahead of the clock synchronization information at the receiving end; when A negative value indicates that the clock information at the transmitting end lags behind the clock synchronization information at the receiving end.

[0048] Furthermore, the secondary and main control systems use the same clock pulse to control the A / D chip of the digital-to-analog converter module to acquire the control clock pulses of the voltage transformers on the power supply side and the load side, and generate a unique serial number. The serial number is combined with the value calculated by the clock signal sampling synchronization adjustment algorithm to generate fixed time stamp information, which is added to the front of the sampled value.

[0049] Furthermore, isolation measures are taken between the secondary and main control systems and the switch body.

[0050] Furthermore, the isolation measures between the secondary and main control systems and the switch body specifically include: when collecting voltages on both the power supply side and the load side, strong and weak currents are isolated using a TLP181 optocoupler; and when controlling the operation of the switch body, isolation is achieved using a TLP127.

[0051] Furthermore, when the phase angle difference is greater than 10 degrees, a warning is issued that the phase angles on both sides are too large, and caution should be exercised when closing the circuit. When the phase angle difference is greater than 20 degrees, the switch body will intelligently lock and will not allow closing the circuit.

[0052] Compared with existing technologies, the beneficial effects of this invention are as follows: The interconnecting switch of this invention, without requiring GPS or other communication time synchronization, can inherently possess a phase sequence detection function on both sides. If the phase sequence difference between the two sides is too large, it can forcibly lock the thermal conduction loop on both sides, improving the safety and efficiency of loop closure. When acquiring voltages on both sides, this invention uses a TLP181 optocoupler to isolate strong and weak currents. When controlling the switch body's operation, a TLP127 is used for isolation. This ensures the stability of the primary and secondary switch signal acquisition and control system. This invention acquires control clock pulses on both sides, making the voltage signal clock information acquired by the power supply side and the load side more consistent. It also proposes a clock signal sampling synchronization adjustment algorithm based on local delay to accurately calculate the phase angle difference between the two sides. Attached Figure Description

[0053] Figure 1 This is a system architecture diagram.

[0054] Figure 2 A schematic diagram of the algorithm for synchronizing and adjusting the sampling of clock signals with local delay.

[0055] Figure 3 This is an isolation circuit diagram. Detailed Implementation

[0056] Combination Figure 1 This embodiment provides a 10kV pole-mounted tie switch with intelligent interlocking function, mainly including the switch body, voltage transformers (PTs) on both sides of the 10kV tie, and secondary and main control systems. The secondary and main control systems mainly include an analog signal acquisition module, a filtering module, a digital-to-analog conversion module, a CPU and decision control module, a communication module, and a human-machine interaction module.

[0057] The analog signal acquisition module is used to acquire signals from the power supply side voltage transformer and the load side voltage transformer.

[0058] The filtering module is used to filter out high-frequency harmonics and retain the 50Hz power frequency signal.

[0059] The analog-to-digital conversion module is used to convert the filtered analog signal into a digital signal, which is then input to the CPU and decision control module.

[0060] The CPU and decision control module are used to calculate the phase angle difference between the two sides. When the phase angle difference is greater than the set value, a control signal is sent to the switch body.

[0061] The communication module is used to communicate with the human-computer interaction backend, mainly through wireless communication.

[0062] The human-computer interaction module is used for functions such as background monitoring and remote operation.

[0063] This switch can automatically check the phase sequence on both sides of the line. When the phase angle difference is greater than 10 degrees, it will remind you that the phase angle on both sides is too large and to be cautious when closing the circuit. When the phase angle difference is greater than 20 degrees, the switch body will intelligently lock and not allow closing the circuit, so as to ensure the safe operation of the power grid when the two sides of the line are hot-swapped.

[0064] The interconnecting switch can detect whether the phase sequence on both sides is consistent through the power supply side PT and the load side PT. Based on the instantaneous values ​​of 24 points collected in each cycle, the phase angle difference between the two sides is determined in real time. The specific detection algorithm is as follows.

[0065] The acquired signal can be expressed by a cosine function as equation (1).

[0066] (1)

[0067] In the formula: The value is valid. The initial phase angle; Angular frequency; The frequency is 50Hz power frequency; This represents the frequency offset.

[0068] The sampling frequency is set to 24 points per cycle. Then, equation (1) can be expressed as:

[0069] (2)

[0070] The result can be obtained by applying Euler's formula and performing a Fourier transform.

[0071] (3)

[0072] In the formula: This is the initial error, which depends only on the input. This is the dynamic error, which is related to the input offset and the initial phase angle. From equation (3), we know that the initial error is... Frequency tracking can be achieved through frequency measurement, thus compensating for initial errors in the algorithm. Due to dynamic errors... Difficult to compensate and correct, a mobile method is proposed. The method, after building a phase difference The two phasors are used to weaken the signal amplitude by utilizing the balance relationship. This improves the accuracy of phase angle detection.

[0073] (4)

[0074] (5)

[0075] (6)

[0076] In the formula: These are the initial error coefficients; This represents the dynamic error coefficient. It can be obtained by shifting the sampling range four points to the left and right and then performing a Fourier transform.

[0077] (7)

[0078] (8)

[0079] By combining the phasors in equations (7) and (8), dynamic errors can be eliminated.

[0080] (9)

[0081] From equation (9), it can be seen that when When this is done, dynamic errors and initial errors can be eliminated, completely eliminating measurement errors. When necessary, equations (7) and (8) need to be modified.

[0082] (10)

[0083] (11)

[0084] By combining the phasors in equations (10) and (11) and simplifying them by Taylor series expansion, we can obtain the following:

[0085] (12)

[0086] As can be seen from equation (12), a set of coefficients is added to the dynamic error. This is called the weakening coefficient. As can be seen from the above formula, this algorithm can effectively improve the phase angle detection accuracy.

[0087] Combination Figure 2 To accurately calculate the phase angle difference between the two sides, a clock signal sampling synchronization adjustment algorithm based on local delay is proposed. The specific real-time steps are as follows:

[0088] Step 1: Set SA and SB as the clock synchronization signals for the power supply side and load side, respectively. The time difference between the transmitted signals SA and SB is defined as follows: at a certain moment, the power supply side sends a synchronization signal SA to the load side. When the load side receives this SA signal from the power supply side, it adds a time difference frame to the synchronization signal data frame and sends it to the power supply side. Figure 2 The time interval

[0089] Step 2: At a certain moment, the load side sends a synchronization signal SB to the power supply side. When the power supply side receives the synchronization signal SB from the load side, it also adds a time difference frame to its reply synchronization signal data frame. Figure 2 The time interval .

[0090] Step 3: As shown in the diagram, the time interval between the load side and the other party's transmission can be considered. , The difference in clock signals between the two sides can be calculated, i.e. .

[0091] Step 4: After one round, the power supply side can calculate the time difference between the synchronization clocks of its side and the load side:

[0092]

[0093] Step 5: The load side can also obtain the time difference between the synchronization clock on its side and the power supply side:

[0094]

[0095] Step 6: Positive and negative values ​​are possible, when A positive time indicates that the clock information at the transmitting end is ahead of the clock synchronization information at the receiving end; when A negative value indicates that the clock information at the transmitting end lags behind the clock synchronization information at the receiving end.

[0096] To ensure greater consistency between the voltage signal clock information collected from the power supply side and the load side, control clock pulses are collected from both sides. In the control system, the same clock pulse controls the analog-to-digital converter chip to collect the signal and generate a unique serial number. The serial number is combined with the value calculated by the local clock synchronization algorithm to generate fixed time stamp information, which is then placed at the beginning of the sampled value to obtain the operating information under precise time synchronization, ensuring the accuracy of the phase sequence calculation on both sides.

[0097] To prevent electromagnetic interference, this device is designed with isolation measures for the signal acquisition and switch control circuits, such as... Figure 3As shown, when acquiring voltages from both sides, strong and weak currents are isolated using a TLP181 optocoupler. When controlling the switch body's operation, a TLP127 is used for isolation. This ensures the stability of the primary and secondary switch signal acquisition and control system.

[0098] This invention primarily addresses the issue of phase sequence verification before hot loop closing. For two lines with excessively large phase angle differences that do not meet the conditions for loop closing, this switch can intelligently lock out and remind operators that the conditions for loop closing are not met. The key feature is the ability to accurately identify the phase and phase sequence on both sides of the switch without relying on GPS or other communication time synchronization.

[0099] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A 10kV pole-mounted tie switch with intelligent interlocking function, characterized in that: The system includes a switch body, voltage transformers for 10kV interconnection, and a secondary and main control system. The switch body is connected to the power supply side voltage transformer and the load side voltage transformer on both sides. The signals from the power supply side voltage transformer and the load side voltage transformer are input to the secondary and main control system. The secondary and main control system processes the signals from the power supply side voltage transformer and the load side voltage transformer, calculates the phase angle difference between the two sides, and sends a control signal to the switch body when the phase angle difference is greater than a set value. The switch body then intelligently locks out the circuit and does not allow closing.

2. A 10kV pole-mounted tie switch with intelligent interlocking function according to claim 1, characterized in that: The secondary and main control system includes an analog signal acquisition module, a filtering module, a digital-to-analog conversion module, a CPU and decision control module, a communication module, and a human-machine interaction module; among which... The analog signal acquisition module is used to acquire signals from the power supply side voltage transformer and the load side voltage transformer. The filtering module is used to filter out high-frequency harmonics in the acquired signal; The digital-to-analog conversion module is used to convert the filtered analog signal into a digital signal, which is then input to the CPU and decision control module. The CPU and decision control module calculate the phase angle difference between the two sides. When the phase angle difference is greater than the set value, the control signal is sent to the switch body. The communication module is used for communication between the human-computer interaction module and the CPU and decision control module; The human-computer interaction module is used for background monitoring and remote operation.

3. A 10kV pole-mounted tie switch with intelligent interlocking function according to claim 2, characterized in that: The calculation of the phase angle difference between the two sides is as follows: Based on the instantaneous values ​​of 24 points of the voltage transformer on the power supply side and the voltage transformer on the load side collected in each cycle, the detection correction values ​​of the voltage transformer on the power supply side and the voltage transformer on the load side are determined by the detection algorithm. The difference between the detection correction values ​​on both sides is obtained. The detection correction values ​​of the voltage transformer on the power supply side and the voltage transformer on the load side are determined by the detection algorithm, specifically including: The acquired signals from both sides are expressed using cosine functions as follows: ； In the formula: This is the effective value of the signal; The initial phase angle; Angular frequency; The frequency is 50Hz power frequency; This is the frequency offset. The sampling frequency is set to 24 points per cycle. When this happens, a discrete signal is obtained: ； The signal error is obtained by applying Euler's formula and performing a Fourier transform: ； In the formula: This is the initial error, which depends only on the input. This is a dynamic error, related to the input offset and the initial phase angle; Frequency tracking is achieved through frequency measurement, which compensates for the initial error in the algorithm and then detects the phase angles on both sides.

4. A 10kV pole-mounted tie switch with intelligent interlocking function according to claim 3, characterized in that: Frequency tracking is achieved through frequency measurement, which compensates for the initial error in the algorithm and then detects the phase angles on both sides. Specifically, this includes: Propose moving The method to build phase difference The two phasors are used to weaken the signal amplitude by utilizing the balance relationship. ,get: ； ； ； In the formula: These are the initial error coefficients; To determine the dynamic error coefficients, the sampling range is shifted four points to the left and right, and a Fourier transform is performed to obtain: ； ； Will , Phasor synthesis yields: ； when When, measurement errors are completely eliminated, when At that time, , The correction is as follows: ； ； The revised , Phasor synthesis, followed by Taylor series expansion and simplification, yields the corrected signal: 。 5. A 10kV pole-mounted tie switch with intelligent interlocking function according to claim 2, characterized in that: The CPU and decision control module employ a clock signal sampling synchronization adjustment algorithm to determine the signal difference of the synchronization clock between the power supply side voltage transformer and the load side voltage transformer.

6. A 10kV pole-mounted tie switch with intelligent interlocking function according to claim 5, characterized in that: The CPU and decision control module employ a clock signal sampling synchronization adjustment algorithm, specifically including: SA and SB are set as the clock synchronization signals for the power supply side and the load side, respectively. The time difference between the transmitted signals SA and SB is defined as follows: at a certain moment, the power supply side sends a synchronization signal SA to the load side. When the load side receives the SA signal sent by the power supply side, it adds a time difference frame to this synchronization signal data frame and sends it to the power supply side. The time interval is... ; Similarly, at a certain moment, the load side sends a synchronization signal SB to the power supply side. When the power supply side receives the synchronization signal SB from the load side, it also adds a time difference frame to its reply synchronization signal data frame. ; Combined with the time interval of transmission from the load side to the other party , Calculate the difference between the clock signals on both sides, i.e. ,when A positive time indicates that the clock information at the transmitting end is ahead of the clock synchronization information at the receiving end; when A negative value indicates that the clock information at the transmitting end lags behind the clock synchronization information at the receiving end.

7. A 10kV pole-mounted tie switch with intelligent interlocking function according to claim 5, characterized in that: The secondary and main control systems use the same clock pulse to control the A / D chip of the digital-to-analog converter module to acquire the control clock pulses of the voltage transformers on the power supply side and the load side, and generate a unique serial number. The serial number is combined with the value calculated by the clock signal sampling synchronization adjustment algorithm to generate fixed time stamp information, which is added to the front of the sampled value.

8. A 10kV pole-mounted tie switch with intelligent interlocking function according to claim 1, characterized in that: Isolation measures are taken between the secondary and main control systems and the switch body.

9. A 10kV pole-mounted tie switch with intelligent interlocking function according to claim 8, characterized in that: The isolation measures between the secondary and main control systems and the switch body specifically include: when collecting voltages on both the power supply side and the load side, strong and weak currents are isolated using a TLP181 optocoupler; and when controlling the operation of the switch body, isolation is achieved using a TLP127.

10. A 10kV pole-mounted tie switch with intelligent interlocking function according to claim 1, characterized in that: When the phase angle difference is greater than 10 degrees, a warning will be issued that the phase angles on both sides are too large, and caution should be exercised when closing the circuit. When the phase angle difference is greater than 20 degrees, the switch body will be intelligently locked, and closing the circuit will not be allowed.

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