Semiconductor laser element

Abstract

A semiconductor laser element is provided with: an n-type cladding layer (402); at least one n-side guide layer disposed above the n-type cladding layer (402); an active layer (405) disposed over the at least one n-side guide layer; a p-side semiconductor layer (400p) disposed above the active layer (405); and a p-side electrode (113) disposed above the p-side semiconductor layer (400p) and in ohmic contact with the p-side semiconductor layer (400p), the active layer (405) having at least one well layer, the p-side electrode (113) being in ohmic contact with the p-side semiconductor layer (400p) with respect to a first gap between a well layer (405b) closest to the n-type cladding layer (402) among the at least one well layer and the n-type cladding layer (402), and the p-side electrode (113) being in ohmic contact with the p-side semiconductor layer (400p). The second interval between the p-side electrode (113) and a well layer (405b) closest to the p-side electrode (113) among the at least one well layer is smaller than the second interval between the p-side electrode (113), and the p-side electrode (113) contains at least one of Ag, Al, and Rh.

Description

Technical Field

[0001] This disclosure relates to semiconductor laser devices. Background Technology

[0002] Traditionally, semiconductor light-emitting elements, such as semiconductor laser elements, have been used as light sources in processing equipment and the like. For these light sources, there is a demand for further improvements in output power and efficiency. To improve the efficiency of semiconductor laser devices, techniques for reducing operating voltage are known, for example (see, for example, Patent Document 1, etc.).

[0003] (Existing technical documents) (Patent Documents) Patent Document 1: Japanese Patent Application Publication No. 2014-131019 Summary of the Invention

[0004] Invention Summary The problem that the invention aims to solve In semiconductor laser devices, reducing the thickness of the p-type cladding layer disposed between the p-side electrode and the active layer is effective in lowering the operating voltage. However, as the thickness of the p-type cladding layer decreases, the distance between the p-side electrode and the active layer shortens, causing light generated and amplified in the active layer to easily penetrate into the p-side electrode. Therefore, the light loss caused by light absorption by the p-side electrode increases.

[0005] In order to solve the above-mentioned problems, the present disclosure aims to provide a semiconductor laser element that can reduce operating voltage and reduce optical loss.

[0006] To address the aforementioned issues, a first embodiment of the semiconductor laser element disclosed herein comprises: an n-type cladding layer; at least one n-side guiding layer disposed above the n-type cladding layer; an active layer disposed above the at least one n-side guiding layer; a p-side semiconductor layer disposed above the active layer; and a p-side electrode disposed above the p-side semiconductor layer and in ohmic contact with the p-side semiconductor layer, wherein the active layer has at least one well layer, and a second spacing between the at least one well layer closest to the p-side electrode and the n-type cladding layer is smaller than a first spacing between the at least one well layer and the n-side electrode, wherein the p-side electrode comprises at least one of Ag, Al, and Rh.

[0007] To address the aforementioned issues, a second embodiment of the semiconductor laser element disclosed herein comprises: an n-type cladding layer; at least one n-side guiding layer disposed above the n-type cladding layer; an active layer disposed above the at least one n-side guiding layer; at least one p-side guiding layer disposed above the active layer; a p-side semiconductor outer layer disposed above and in contact with the at least one p-side guiding layer; and a p-side electrode disposed above and in ohmic contact with the p-side semiconductor outer layer, wherein the thickness of the p-side semiconductor outer layer is less than the thickness of the p-side guiding layer from the p-side guiding layer closest to the active layer to the p-side guiding layer farthest from the active layer, and the p-side electrode comprises at least one of Ag, Al, and Rh.

[0008] To address the aforementioned issues, a third embodiment of the semiconductor laser element disclosed herein comprises: an n-type cladding layer; at least one n-side guiding layer disposed above the n-type cladding layer; an active layer disposed above the at least one n-side guiding layer; at least one p-side guiding layer disposed above the active layer; a p-side semiconductor outer layer disposed above the at least one p-side guiding layer and in contact with the at least one p-side guiding layer; and a p-side electrode disposed above the p-side semiconductor outer layer and in ohmic contact with the p-side semiconductor outer layer, wherein the active layer has at least one well layer, the thickness of the p-side semiconductor outer layer is less than a first interval between the well layer closest to the n-type cladding layer and the n-type cladding layer in the at least one well layer, and the p-side electrode comprises at least one of Ag, Al, and Rh.

[0009] Invention Effects This disclosure enables the provision of a semiconductor laser element that can reduce operating voltage and decrease optical loss. Attached Figure Description

[0010] Figure 1 This is a schematic plan view showing the overall configuration of the semiconductor laser element according to Embodiment 1.

[0011] Figure 2A This is a schematic cross-sectional view showing the overall structure of the semiconductor laser element according to Embodiment 1.

[0012] Figure 2B This is a schematic cross-sectional view showing the structure of the active layer of the semiconductor laser element according to Embodiment 1.

[0013] Figure 3 This is a diagram showing the structure of each layer of the semiconductor stack according to Embodiment 1, excluding the substrate.

[0014] Figure 4 This is a schematic cross-sectional view showing the overall structure of the semiconductor laser element according to Embodiment 2.

[0015] Figure 5 This is a schematic diagram showing the bandgap energy distribution of the active layer and its neighboring layers of the semiconductor laser element according to Embodiment 2.

[0016] Figure 6 This is a diagram showing the structure of each layer of the semiconductor stack according to Embodiment 2, excluding the substrate.

[0017] Figure 7 This is a schematic cross-sectional view showing the overall structure of the semiconductor laser element according to Embodiment 3.

[0018] Figure 8 This is a schematic cross-sectional view showing the overall structure of the semiconductor laser element according to Embodiment 4.

[0019] Figure 9 This is a schematic diagram illustrating the bandgap energy distribution of the active layer and its neighboring layers of the semiconductor laser element involved in Embodiment 4.

[0020] Figure 10 This is a diagram showing the structure of each layer of the semiconductor stack according to Embodiment 4, excluding the substrate.

[0021] Figure 11 This is a schematic cross-sectional view showing the overall structure of the semiconductor laser element according to Embodiment 5.

[0022] Figure 12 This is a schematic cross-sectional view showing the overall structure of the semiconductor laser element according to Embodiment 6.

[0023] Figure 13 This is a schematic diagram illustrating the bandgap energy distribution of the active layer and its neighboring layers of the semiconductor laser element according to Embodiment 6.

[0024] Figure 14 This is a schematic cross-sectional view showing the overall configuration of the semiconductor laser element according to Embodiment 7.

[0025] Figure 15 This is a schematic cross-sectional view showing the overall structure of the semiconductor laser element according to Embodiment 8.

[0026] Figure 16 This is a schematic cross-sectional view showing the structure of the hole blocking layer of the semiconductor laser element according to Embodiment 8.

[0027] Figure 17This is a schematic cross-sectional view showing the structure of the active layer of the semiconductor laser element according to Embodiment 8.

[0028] Figure 18 This is a first diagram showing the structure of each layer of the semiconductor stack according to the embodiment, excluding the substrate.

[0029] Figure 19 This is a second diagram showing the structure of each layer of the semiconductor stack according to the embodiment, excluding the substrate.

[0030] Figure 20 This is a schematic cross-sectional view showing the overall structure of the semiconductor laser element according to Embodiment 9. Detailed Implementation

[0031] Hereinafter, embodiments of the present disclosure will be described with reference to the accompanying drawings. Furthermore, the embodiments described below are merely specific examples illustrating the present disclosure. Therefore, the numerical values, shapes, materials, constituent elements, and the arrangement and connection methods of the constituent elements shown in the following embodiments are all examples and are not intended to limit the present disclosure.

[0032] Furthermore, the figures are schematic diagrams and not necessarily drawn to scale. Therefore, the scale and other parameters may not be consistent across different figures. Also, substantially identical components will be assigned the same symbols across all figures, and repetitive descriptions will be omitted or simplified.

[0033] Furthermore, in this specification, the terms "above" and "below" do not refer to vertically above and below in absolute spatial perception, but are used as terms defined by relative positional relationships based on the stacking order in a layered composition. Additionally, the terms "above" and "below" apply not only to situations where two constituent elements are spaced apart from each other and other constituent elements exist between them, but also to situations where two constituent elements are arranged in contact with each other.

[0034] Furthermore, in this specification, terms used to indicate relationships between elements (e.g., terms indicating equality) and numerical ranges do not only indicate ranges in a strict sense, but also include substantially equivalent ranges, such as those including differences of a few percent or so.

[0035] (Implementation Method 1) The semiconductor laser element involved in Embodiment 1 will be described below.

[0036] [1-1. Overall Composition] First, refer to Figure 1 , Figure 2A , Figure 2B as well as Figure 3 The overall structure of the semiconductor laser element 100 involved in this embodiment will be explained. Figure 1 as well as Figure 2A These are a plan view and a cross-sectional view schematically illustrating the overall structure of the semiconductor laser element 100 according to this embodiment. Figure 2B This is a schematic cross-sectional view illustrating the structure of the active layer 105 of the semiconductor laser element 100 according to this embodiment. Figure 2A as well as Figure 2B In, it is shown Figure 1 The cross-section at line II-II is shown. Additionally, the X, Y, and Z axes, which are orthogonal to each other, are shown in the various figures. These axes form a right-handed orthogonal coordinate system. The stacking direction of the semiconductor laser element 100 is parallel to the Z-axis, and the main emission direction of the light (laser) is parallel to the Y-axis. Figure 3 This diagram illustrates the structure of each layer of the semiconductor stack 100S according to this embodiment, excluding the substrate 101.

[0037] like Figure 2A As shown, the semiconductor laser element 100 includes a semiconductor stack 100S formed by stacking multiple semiconductor layers, and an end face 100F (see [reference]) in a direction perpendicular to the stacking direction (i.e., the Z-axis direction) of the semiconductor stack 100S. Figure 1 The emitted light. In this embodiment, the semiconductor laser element 100 is a nitride-based semiconductor laser element having two end faces 100F and 100R forming a resonant cavity. End face 100F is the front end face for emitting laser light, and end face 100R is the rear end face with a higher reflectivity than end face 100F. In this embodiment, the reflectivities of end faces 100F and 100R are 16% and 95%, respectively. The resonator length of the semiconductor laser element 100 involved in this embodiment (i.e., the distance between end faces 100F and 100R) is approximately 1200 μm.

[0038] like Figure 2A As shown, the semiconductor laser element 100 includes a semiconductor stack 100S, a current blocking layer 112, a p-side electrode 113, and an n-side electrode 114. The semiconductor stack 100S includes a substrate 101, an n-type cladding layer 102, at least one n-side guiding layer, an active layer 105, and a p-side semiconductor layer 100p.

[0039] At least one n-side guiding layer is a semiconductor layer disposed above the n-type cladding layer 102. The average refractive index of each of the at least one n-side guiding layer is less than the average refractive index of the active layer 105 and greater than the average refractive index of the n-type cladding layer 102. The average bandgap energy of each of the at least one n-side guiding layer is greater than the average bandgap energy of the active layer 105 and less than the average bandgap energy of the n-type cladding layer 102. In this embodiment, as at least one n-side guiding layer, the semiconductor laser element 100 has a first n-side guiding layer 103 and a second n-side guiding layer 104.

[0040] Furthermore, in this disclosure, the average refractive index of each layer refers to the value of the refractive index of a certain position of the layer in the stacking direction, which is obtained by integrating along the stacking direction from the interface of the layer on the side closer to the substrate 101 to the interface on the side farther from the substrate 101, and dividing by the film thickness of the layer (the distance between the interface on the side closer to the substrate 101 and the interface on the side farther from the substrate 101).

[0041] Furthermore, in this disclosure, the average bandgap energy of each layer refers to the value of the bandgap energy at a certain position of the layer in the stacking direction, which is obtained by integrating along the stacking direction from the interface of the layer on the side closer to the substrate 101 to the interface on the side farther from the substrate 101, and dividing the result by the thickness of the layer (the distance between the interface on the side closer to the substrate 101 and the interface on the side farther from the substrate 101).

[0042] The p-side semiconductor layer 100p has at least one p-side guiding layer and a p-side semiconductor outer layer 100u.

[0043] At least one p-side guiding layer is a semiconductor layer disposed above the active layer 105. In the semiconductor laser element 100 having a p-type cladding layer 110, at least one p-side guiding layer is disposed below the p-type cladding layer 110. The average refractive index of each of the at least one p-side guiding layer is less than the average refractive index of the active layer 105 and greater than the average refractive index of the n-type cladding layer 102. The average bandgap energy of each of the at least one p-side guiding layer is greater than the average bandgap energy of the active layer 105 and less than the average bandgap energy of the n-type cladding layer 102. In this embodiment, as at least one p-side guiding layer, the semiconductor laser element 100 has a first p-side guiding layer 106, a second p-side guiding layer 107, and a third p-side guiding layer 108.

[0044] The p-side semiconductor outer layer 100u is a semiconductor layer disposed above and in contact with at least one p-side guiding layer. In the present embodiment, the p-side semiconductor outer layer 100u has an electron blocking layer 109, a p-type cladding layer 110, and a p-type contact layer 111.

[0045] The substrate 101 is a plate-like member that serves as a base of the semiconductor laser element 100. In the present embodiment, the substrate 101 is an n-type GaN substrate.

[0046] The n-type cladding layer 102 is an n-type semiconductor layer disposed above the substrate 101. The n-type cladding layer 102 is a layer having a smaller average refractive index and a larger average bandgap energy than the active layer 105. In the present embodiment, as Figure 3 shown, the n-type cladding layer 102 is an n-type Al

[0050] , 0.03 , 0.97 , Ga 0.965 N layer with a film thickness of 1200 nm. In the n-type cladding layer 102, Si is doped as an impurity at an average concentration of 1×10 18 cm -3 .

[0047] In the present disclosure, the average concentration of impurities in each layer (i.e., the average impurity concentration) means the value of the impurity concentration obtained by integrating the magnitude of the impurity concentration at a certain position in the stacking direction of the layer from the position of the interface on the side closer to the substrate 101 in the stacking direction of the layer to the position of the interface on the side farther from the substrate 101 in the stacking direction of the layer, and dividing by the film thickness of the layer (the distance between the interface closer to the substrate 101 and the interface farther from the substrate 101). Impurities in the n-type semiconductor layer refer to impurities doped to obtain an n-type conductivity type, and impurities in the p-type semiconductor layer refer to impurities doped to obtain a p-type conductivity type.

[0048] The first n-side guiding layer 103 is an example of at least one n-side guiding layer disposed above the n-type cladding layer 102. In the present embodiment, the first n-side guiding layer 103 is an n-type GaN layer with a film thickness of 100 nm. In the first n-side guiding layer 103, Si is doped as an impurity at an average concentration of 1×10 18 cm -3 .

[0049] The second n-side guiding layer 104 is an example of at least one n-side guiding layer disposed above the n-type cladding layer 102. The second n-side guiding layer 104 is disposed above the first n-side guiding layer 103. In the present embodiment, the second n-side guiding layer 104 is an undoped In 0.03 Ga 0.97 N layer with a film thickness of 150 nm.

[0050] The active layer 105 is a light-emitting layer disposed above at least one n-sided guiding layer. In this embodiment, the active layer 105 is disposed above the second n-sided guiding layer 104. The active layer 105 has at least one well layer and multiple barrier layers. Figure 2B As shown, the active layer 105 has well layers 105b and 105d and barrier layers 105a, 105c and 105e. Furthermore, the active layer 105 can have a single quantum well structure or a multi-quantum well structure with three or more well layers. In this embodiment, the active layer 105 emits blue light with a wavelength of approximately 450 nm.

[0051] The barrier layer 105a is disposed above the second n-side guiding layer 104 and functions as a barrier for the quantum well structure. In this embodiment, the barrier layer 105a is an undoped In film with a thickness of 6 nm. 0.04 Ga 0.96 N layers.

[0052] Well layer 105b is disposed above barrier layer 105a and functions as the well in the quantum well structure. Well layer 105b is positioned between barrier layer 105a and barrier layer 105c. In this embodiment, well layer 105b is an undoped In film with a thickness of 3 nm. 0.18 Ga 0.82 N layers.

[0053] The barrier layer 105c is disposed above the well layer 105b and functions as a barrier for the quantum well structure. In this embodiment, the barrier layer 105c is an undoped In film with a thickness of 7 nm. 0.04 Ga 0.96 N layers.

[0054] Well layer 105d is disposed above barrier layer 105c and functions as the well in the quantum well structure. Well layer 105d is disposed between barrier layer 105c and barrier layer 105e. In this embodiment, well layer 105d is an undoped In film with a thickness of 3 nm. 0.18 Ga 0.82 N layers.

[0055] The barrier layer 105e is disposed above the well layer 105d and functions as a barrier for the quantum well structure. In this embodiment, the barrier layer 105e is an undoped In film with a thickness of 6 nm. 0.04 Ga 0.96 N layers.

[0056] The first p-side guiding layer 106 is an example of at least one p-side guiding layer disposed above the active layer 105. Alternatively, the first p-side guiding layer 106 is an example of an inner guiding layer disposed closest to the active layer 105 among at least one p-side guiding layer. In this embodiment, the first p-side guiding layer 106 is an undoped In film with a thickness of 100 nm. 0.03 Ga 0.97 N layers.

[0057] The second p-side guiding layer 107 is an example of at least one p-side guiding layer disposed above the active layer 105. The second p-side guiding layer 107 is disposed above the first p-side guiding layer 106. In this embodiment, the second p-side guiding layer 107 is an undoped In film with a thickness of 190 nm. 0.01 Ga 0.99 N layers.

[0058] The third p-side guiding layer 108 is an example of at least one p-side guiding layer disposed above the active layer 105. Alternatively, the third p-side guiding layer 108 is an example of the outermost guiding layer among at least one p-side guiding layer disposed closest to the p-side electrode 113. The third p-side guiding layer 108 is disposed above the second p-side guiding layer 107. The average refractive index of the third p-side guiding layer 108 is less than the average refractive index of the active layer 105 and greater than the average refractive index of the p-type cladding layer 110. The average bandgap energy of the third p-side guiding layer 108 is greater than the average bandgap energy of the active layer 105 and less than the average bandgap energy of the p-type cladding layer 110. In this embodiment, the third p-side guiding layer 108 is disposed between the second p-side guiding layer 107 and the electron blocking layer 109, and also has the function of reducing stress caused by the difference in lattice constants between the second p-side guiding layer 107 and the electron blocking layer 109. Accordingly, the generation of crystal defects in the semiconductor laser element 100 can be suppressed. In this embodiment, the third p-side guiding layer 108 is an undoped GaN layer with a thickness of 20 nm.

[0059] The electron blocking layer 109 is disposed above the active layer 105 and serves as a semiconductor layer acting as a barrier against electrons. In this embodiment, the electron blocking layer 109 is a semiconductor layer containing at least Al. The electron blocking layer 109 is disposed between the third p-side guiding layer 108 and the p-type cladding layer 110. The electron blocking layer 109 is a p-type AlGaN layer with a thickness of 5 nm. Furthermore, the electron blocking layer 109 has an Al composition ratio gradient region where the Al composition ratio monotonically increases as it approaches the p-type cladding layer 110. Here, the configuration of monotonically increasing Al composition ratio also includes a configuration containing a region where the Al composition ratio is constant in the stacking direction. For example, the configuration of monotonically increasing Al composition ratio also includes a configuration where the Al composition ratio increases in a stepwise manner. In the electron blocking layer 109 according to this embodiment, the electron blocking layer 109 is an Al composition ratio increasing region as a whole, and the Al composition ratio increases at a certain rate of change in the stacking direction. Specifically, the electron blocking layer 109 has an area near the interface with the third p-side guiding layer 108 that can be represented as Al. 0.02 Ga 0.98 The N component increases monotonically with increasing proximity to the p-type coating layer 110, exhibiting an Al component near the interface with the p-type coating layer 110 that can be represented as Al 0.36 Ga 0.64 The N composition. It is doped as an impurity in electron blocking layer 109 with an average concentration of 1 × 10⁻⁶. 19 cm -3 Mg.

[0060] Electron leakage from the active layer 105 to the p-type cladding layer 110 can be suppressed by the electron blocking layer 109. Furthermore, since the electron blocking layer 109 has an Al composition variation region with a monotonically increasing Al composition ratio, the valence band potential barrier of the electron blocking layer 109 can be lowered compared to the case of a uniform Al composition ratio. Therefore, holes can more easily flow from the p-type cladding layer 110 to the active layer 105. Thus, even if the combined thickness of the undoped layers, i.e., the first p-side guiding layer 106 and the second p-side guiding layer 107, is large as in this embodiment, the increase in resistance of the semiconductor laser element 100 can be suppressed. Accordingly, the operating voltage of the semiconductor laser element 100 can be reduced. In addition, since the self-heating of the semiconductor laser element 100 during operation can be reduced, the temperature characteristics of the semiconductor laser element 100 can be improved. Therefore, high-power operation of the semiconductor laser element 100 can be achieved.

[0061] The p-type cladding layer 110 is a p-type cladding layer disposed above the active layer 105. In this embodiment, the p-type cladding layer 110 is disposed between the electron blocking layer 109 and the p-type contact layer 111. The p-type cladding layer 110 has a smaller average refractive index and a larger average bandgap energy relative to the active layer 105. The average refractive index of the p-type cladding layer 110 is less than the average refractive index of each of the at least one p-side guiding layer. The average bandgap energy of the p-type cladding layer 110 is greater than the average bandgap energy of each of the at least one p-side guiding layer. Accordingly, the resistance of the semiconductor laser element 100 can be suppressed. Therefore, the operating voltage of the semiconductor laser element 100 can be reduced. In addition, since the self-heating of the semiconductor laser element 100 during operation can be reduced, the temperature characteristics of the semiconductor laser element 100 can be improved. Thus, high-power operation of the semiconductor laser element 100 can be achieved. In this embodiment, the p-type cladding layer 110 has a film thickness of 100 nm and is doped with an average concentration of 2 × 10⁻⁶. 18 cm -3 p-type Al of Mg 0.035 Ga 0.965 N-layer. In addition, the impurity concentration of the p-type coating layer 110 at the end near the active layer 105 can be lower than the impurity concentration at the end away from the active layer 105.

[0062] The p-type contact layer 111 is disposed above the p-type cladding layer 110 and forms an ohmic contact with the p-side electrode 113. In this embodiment, the p-type contact layer 111 is a p-type GaN layer with a thickness of 100 nm. The p-type contact layer 111 is doped with an average concentration of 1 × 10⁻⁶ impurities. 20 cm -3 Mg.

[0063] A ridge 110R is formed in the p-type cladding layer 110 and the p-type contact layer 111 of the semiconductor laminate 100S. The ridge 110R is a portion that protrudes upward from the bottom surface 110Tb and extends along the Y-axis direction. The ridge 110R has an upper surface 110Rt and a side surface 110Rs. The side surface 110Rs is a surface in the surface of the ridge 110R that connects the upper surface 110Rt and the bottom surface 110Tb. The side surface 110Rs is in contact with the bottom surface 110Tb at the lower end 110Rb of the ridge.

[0064] In this embodiment, two protrusions 110P are formed in the p-type cladding layer 110 and the p-type contact layer 111 of the semiconductor laminate 100S. Each of the two protrusions 110P protrudes upward from the bottom surface 110Tb and extends along the Y-axis direction. A ridge 110R is disposed between the two protrusions 110P. Each of the two protrusions 110P has an upper surface 110Pt and a side surface 110Ps. A trench 110T is formed between each of the two protrusions 110P and the ridge 110R. The trench 110T is disposed along the ridge 110R and extends along the Y-axis direction. The side surface 110Ps is the surface in the surface of the protrusion 110P that connects the upper surface 110Pt and the bottom surface 110Tb. In this embodiment, the stacking direction position of the upper surface 110Pt of the protrusion 110P is equal to the stacking direction position of the upper surface 110Rt of the ridge 110R.

[0065] In this embodiment, the ridge width W is approximately 30 μm. Furthermore, the bottom surface 110Tb and the lower end of the ridge 110Rb are located between the uppermost and lowermost surfaces of the p-type coating layer 110 in the stacking direction. In this embodiment, the bottom surface 110Tb and the lower end of the ridge 110Rb are located 50 nm below the uppermost surface of the p-type coating layer 110.

[0066] The current blocking layer 112 is an insulating layer disposed above the p-side semiconductor layer 100p. In this embodiment, the current blocking layer 112 is transmissive to light from the active layer 105. Figure 2A As shown, the current blocking layer 112 is disposed on the upper surface of the semiconductor stack 100S, excluding the upper surface 110Rt of the ridge 110R. More specifically, it is continuously formed on the side surface 110Rs of the ridge 110R, the bottom surface 110Tb, the side surface 110Ps of the protrusion 110P on the ridge 110R side, and the upper surface 110Pt of the protrusion 110P. In this embodiment, the current blocking layer 112 is a SiO2 layer.

[0067] The p-side electrode 113 is a conductive layer disposed above the p-side semiconductor layer 100p and making ohmic contact with the p-side semiconductor layer 100p. In this embodiment, the p-side electrode 113 makes ohmic contact with the p-side semiconductor outer layer 100u. Figure 2AAs shown, the p-side electrode 113 is disposed on the upper surface 110Rt of the ridge 110R of the p-type contact layer 111, and is disposed on the side surface 110Rs, bottom surface 110Tb, side surface 110Ps of the ridge 110R of the protrusion 110P, and upper surface 110Pt of the protrusion 110P via the current blocking layer 112. The p-side electrode 113 contains at least one of Ag, Al, and Rh. That is, the p-side electrode 113 can be a single-layer film containing at least one of Ag, Al, and Rh, or it can be a multilayer film containing at least one of Ag, Al, and Rh. The multilayer film containing at least one of Ag, Al, and Rh can also be a multilayer film containing at least one of Ag, Al, and Rh and a conductive layer without any of Ag, Al, and Rh. The layer containing at least one of Ag, Al, and Rh can be a layer composed of one of Ag, Al, and Rh, or a layer composed of an alloy containing at least one of Ag, Al, and Rh. The reflectivity of the p-side electrode 113 relative to light emitted from the active layer 105 can be 80% or more. In this embodiment, the p-side electrode 113 has a layer composed of Ag or an Ag-containing alloy with a film thickness of 150 nm, and a Pt layer with a film thickness of 100 nm disposed on the layer. It should be noted that the composition of the p-side electrode 113 is not limited to this, as long as it contains at least one of Ag, Al, and Rh. For example, the p-side electrode 113 can be an Ag layer with a thickness of 100 nm, or a laminate of an Ag layer with a thickness of 50 nm and an Rh layer with a thickness of 50 nm, or a laminate of an Ag layer with a thickness of 50 nm and an Al layer with a thickness of 50 nm, or an Rh layer with a thickness of 100 nm, or an Al layer with a thickness of 100 nm. Furthermore, the p-side electrode 113 can also have an ohmic-friendly metal layer disposed between a layer containing at least one of Ag, Al, and Rh and the p-type contact layer 111, and which is thinner than the layer containing at least one of Ag, Al, and Rh. Examples of such an ohmic-friendly metal layer include Pd, Ni, and Pt layers.

[0068] The n-side electrode 114 is a conductive layer disposed below the substrate 101 (i.e., on the opposite side of the main surface of the semiconductor stack 100S). The n-side electrode 114 is, for example, a single-layer film or a multilayer film formed of at least one of Cr, Ti, Ni, Pd, Pt and Au.

[0069] [1-2. Effects] The effects of the semiconductor laser element 100 according to this embodiment will now be explained. In the semiconductor laser element 100 according to this embodiment, the thickness of the p-side semiconductor outer layer 100u is smaller than the first interval between the well layer 105b closest to the n-type cladding layer 102 in at least one well layer of the active layer 105 and the n-type cladding layer 102, and the p-side electrode 113 contains at least one of Ag, Al, and Rh. In this embodiment, the first interval is equal to the total thickness of the first n-side guiding layer 103, the second n-side guiding layer 104, and the barrier layer 105a. When a ridge 110R is formed in the p-type cladding layer 110, the thickness of the p-side semiconductor outer layer 100u refers to the total thickness of the electron blocking layer 109, the p-type cladding layer 110, and the p-type contact layer 111 in the region including the ridge 110R (i.e., in the X-axis direction position of the region where the ridge 110R is formed).

[0070] Accordingly, in the semiconductor laser element 100 according to this embodiment, since the film thickness of the p-side semiconductor outer layer 100u is less than the first gap, the film thickness of the resistive semiconductor layer can be reduced, thereby reducing the resistance in the p-side semiconductor outer layer 100u. Therefore, the operating voltage of the semiconductor laser element 100 can be reduced.

[0071] Furthermore, when the thickness of the outer layer 100u of the p-side semiconductor is small, although light generated and amplified in the active layer is more likely to permeate to the p-side electrode 113, in the semiconductor laser element 100 according to this embodiment, since the p-side electrode 113 contains at least one of Ag, Al, and Rh, its refractive index can be reduced and its reflectivity can be increased. Accordingly, light permeation to the p-side electrode 113 can be suppressed, thereby reducing light loss at the p-side electrode 113. In addition, since the reflectivity of the p-side electrode 113 is large, a portion of the spontaneous emission light generated in the active layer 105 that is incident on the p-side electrode 113 is reflected back to the active layer 105 at the p-side electrode 113. Accordingly, the active layer 105 can be optically excited, thereby improving the ratio of light output to input power of the semiconductor laser element 100. That is, the power utilization efficiency of the semiconductor laser element 100 can be improved.

[0072] In the semiconductor laser element 100 according to this embodiment, the total thickness of one or more p-side guiding layers can be greater than the total thickness of one or more n-side guiding layers. That is, the total thickness of the first p-side guiding layer 106, the second p-side guiding layer 107, and the third p-side guiding layer 108 can be greater than the total thickness of the first n-side guiding layer 103 and the second n-side guiding layer 104.

[0073] Accordingly, compared to the case where the total film thickness of the first p-side guiding layer 106, the second p-side guiding layer 107, and the third p-side guiding layer 108 does not exceed the film thickness of the second n-side guiding layer 104, the light intensity distribution can be shifted from the active layer 105 towards the direction closer to the first p-side guiding layer 106. Therefore, the shift of the peak value of the light intensity distribution in the stacking direction from the active layer 105 towards the direction closer to the first n-side guiding layer 103 due to the reduction of the second spacing can be suppressed.

[0074] In the semiconductor laser element 100 of this embodiment, the p-side semiconductor layer 100p may have at least one p-side guiding layer and a p-side semiconductor outer layer 100u disposed above and in contact with the at least one p-side guiding layer.

[0075] Accordingly, by making the average refractive index of the p-side semiconductor outer layer 100u less than the average refractive index of one or more p-side guiding layers, light can be confined within one or more p-side guiding layers.

[0076] The semiconductor laser element 100 according to this embodiment includes: an n-type cladding layer 102; at least one n-side guiding layer disposed above the n-type cladding layer 102; an active layer 105 disposed above the at least one n-side guiding layer; at least one p-side guiding layer disposed above the active layer 105; a p-side semiconductor outer layer 100u disposed above the at least one p-side guiding layer and in contact with the at least one p-side guiding layer; and a p-side electrode 113 disposed above the p-side semiconductor outer layer 100u and in ohmic contact with the p-side semiconductor outer layer 100u. The film thickness of the p-side semiconductor outer layer 100u is less than the film thickness of the at least one p-side guiding layer from the first p-side guiding layer 106 closest to the active layer to the third p-side guiding layer 108 furthest from the active layer 105. The p-side electrode 113 includes at least one of Ag, Al, and Rh.

[0077] Here, the film thickness of the at least one p-side guiding layer, from the first p-side guiding layer 106 closest to the active layer 105 to the third p-side guiding layer 108 furthest from the active layer 105, refers to the total film thickness from the first p-side guiding layer 106 to the third p-side guiding layer 108. It should be noted that when other layers (not p-side guiding layers) are disposed between the first p-side guiding layer 106 and the third p-side guiding layer 108, the aforementioned total film thickness refers to the total film thickness including the film thickness of these other non-p-side guiding layers.

[0078] Accordingly, by reducing the film thickness of the p-side semiconductor outer layer 100u, the resistance in the p-side semiconductor layer 100p can be reduced. Therefore, the operating voltage of the semiconductor laser element 100 can be reduced.

[0079] Furthermore, as described above, in the semiconductor laser element 100 according to this embodiment, since the p-side electrode 113 contains at least one of Ag, Al and Rh, the light loss at the p-side electrode 113 can be reduced, thereby improving the power utilization efficiency of the semiconductor laser element 100.

[0080] In the semiconductor laser element 100 of this embodiment, at least one p-side guiding layer may have a first p-side guiding layer 106 as an inner guiding layer disposed at the position closest to the active layer 105.

[0081] Accordingly, light can be guided to the inner guiding layer, which has an average refractive index greater than that of the n-type cladding layer 102. In other words, since light can be guided to the inner guiding layer located close to the active layer 105, the peak of the light intensity distribution can be made closer to the active layer 105.

[0082] In the semiconductor laser element 100 of this embodiment, one of the at least p-side guiding layers can be an undoped semiconductor layer.

[0083] Accordingly, the loss of free carriers caused by impurities in the p-side guiding layer can be reduced. Therefore, the optical loss in the semiconductor laser element 100 can be reduced.

[0084] In the semiconductor laser element 100 of this embodiment, the p-side semiconductor outer layer 100u may have a p-type contact layer 111 that is in contact with the p-side electrode 113.

[0085] Accordingly, the contact resistance between the p-side electrode 113 and the p-side semiconductor outer layer 100u can be reduced. Therefore, the operating voltage of the semiconductor laser element 100 can be reduced.

[0086] In the semiconductor laser element 100 of this embodiment, the p-side semiconductor outer layer 100u may have an electron blocking layer 109.

[0087] Accordingly, leakage of electrons to the outside of the electron blocking layer 109 can be suppressed. Therefore, by increasing the recombination probability of electrons and holes in the active layer 105, the light output of the semiconductor laser element 100 can be improved.

[0088] In the semiconductor laser element 100 of this embodiment, the p-side semiconductor outer layer 100u may have a p-type cladding layer 110.

[0089] Accordingly, light can be confined below the p-type cladding layer 110. Therefore, light loss in the p-type contact layer 111, p-side electrode 113, etc., can be reduced.

[0090] In this embodiment, even though the lower end 110Rb of the ridge is located below the uppermost surface of the p-type cladding layer 110, the presence of a p-side electrode 113 made of Ag on the bottom surface 110Tb still increases the effective refractive index difference ΔN. Therefore, as long as the effective refractive index difference ΔN is within 2 × 10⁻⁶, it is effective. －3 As a result of the relatively wide ridge width W (30 μm), more than three waveguide modes can be stably present, making the semiconductor laser element 100 a multi-mode laser element. Consequently, kinks can be suppressed in the current-optical output characteristics.

[0091] Furthermore, since Ag is formed on the bottom surface 110Tb, the amount of spontaneous emission light emitted from the active layer 105 that is reflected back to the active layer 105 after being reflected by the p-side electrode 113 and then reabsorbed is increased. As a result, quantum efficiency is improved, the oscillation threshold is reduced, and slope efficiency is improved.

[0092] (Implementation Method 2) The semiconductor laser element according to Embodiment 2 will be described below. The semiconductor laser element according to this embodiment differs from the semiconductor laser element 100 according to Embodiment 1 mainly in its configuration of one or more n-side guiding layers and one or more p-side guiding layers. Hereinafter, the semiconductor laser element according to this embodiment will be described in relation to the differences from the semiconductor laser element 100 according to Embodiment 1.

[0093] [2-1. Overall Composition] Reference Figures 4 to 6 This will explain the overall structure of the semiconductor laser element involved in this embodiment. Figure 4 This is a schematic cross-sectional view showing the overall structure of the semiconductor laser element 200 according to this embodiment. Figure 4 In, with Figure 2A Similarly, a cross-section of the semiconductor laser element 200 perpendicular to the Y-axis direction is shown. Figure 5 This is a schematic diagram illustrating the bandgap energy distribution of the active layer 205 and its neighboring layers of the semiconductor laser element 200 according to this embodiment. Figure 6 This diagram illustrates the composition of each layer of the semiconductor stack 200S according to this embodiment, excluding the substrate 101.

[0094] like Figure 4 As shown, the semiconductor laser element 200 according to this embodiment includes a semiconductor stack 200S, a current blocking layer 112, a p-side electrode 113, and an n-side electrode 114. The semiconductor stack 200S includes a substrate 101, an n-type cladding layer 102, at least one n-side guiding layer, an active layer 205, and a p-side semiconductor layer 200p.

[0095] The semiconductor laser element 200 has a first n-side guiding layer 103 and a second n-side guiding layer 204 as at least one n-side guiding layer.

[0096] The p-side semiconductor layer 200p has at least one p-side guiding layer and a p-side semiconductor outer layer 200u.

[0097] The semiconductor laser element 200 has a first p-side guiding layer 206 and a third p-side guiding layer 108 as at least one p-side guiding layer.

[0098] The p-side semiconductor outer layer 200u is a semiconductor layer disposed above and in contact with at least one p-side guiding layer. In this embodiment, the p-side semiconductor outer layer 200u has an electron blocking layer 109, a p-type cladding layer 210, and a p-type contact layer 211.

[0099] The second n-side guiding layer 204 is an example of at least one n-side guiding layer disposed above the n-type cladding layer 102. The second n-side guiding layer 204 is disposed above the first n-side guiding layer 103. In this embodiment, the second n-side guiding layer 204 is an undoped In film with a thickness of 160 nm. Xn Ga 1-Xn N layers.

[0100] The band gap energy of the second n-side guiding layer 204 increases monotonically with distance from the active layer 205, and the refractive index of the second n-side guiding layer 204 increases monotonically with proximity to the active layer 205. Here, the monotonically increasing band gap energy or refractive index configuration also includes configurations where there are regions with constant band gap energy or refractive index in the stacking direction. More specifically, the second n-side guiding layer 204 has a region near the interface on the side closer to the active layer 205 that can be represented as In. Xn1 Ga 1-Xn1 The N component, near the interface on the side away from the active layer 205, has a property that can be represented as In. Xn2 Ga 1-Xn2 The composition of N. In this embodiment, the In composition ratio Xn1 of the second n-side guiding layer 204 near the interface close to the active layer 205 is 0.04, and the In composition ratio Xn2 near the interface away from the active layer 205 is 0. The In composition ratio Xn of the second n-side guiding layer 204 decreases at a certain rate as it moves away from the active layer 205.

[0101] The active layer 205 is a light-emitting layer disposed above at least one n-sided guiding layer. In this embodiment, the active layer 205 is disposed above the second n-sided guiding layer 204. Figure 5As shown, the active layer 205 has well layers 205b and 205d and barrier layers 205a, 205c and 205e.

[0102] The barrier layer 205a is disposed above the second n-side guiding layer 204 and functions as a barrier for the quantum well structure. In this embodiment, the barrier layer 205a is an undoped In film with a thickness of 7 nm. 0.05 Ga 0.95 N layers.

[0103] Well layer 205b is disposed above barrier layer 205a and functions as the well of the quantum well structure. Well layer 205b is disposed between barrier layer 205a and barrier layer 205c. In this embodiment, well layer 205b is undoped In with a film thickness of 3 nm. 0.18 Ga 0.82 N layers.

[0104] The barrier layer 205c is disposed above the well layer 205b and functions as a barrier for the quantum well structure. In this embodiment, the barrier layer 205c is an undoped In film with a thickness of 7 nm. 0.05 Ga 0.95 N layers.

[0105] Well layer 205d is disposed above barrier layer 205c and functions as the well of the quantum well structure. Well layer 205d is disposed between barrier layer 205c and barrier layer 205e. In this embodiment, well layer 205d is undoped In with a film thickness of 3 nm. 0.18 Ga 0.82 N layers.

[0106] The barrier layer 205e is disposed above the well layer 205d and functions as a barrier for the quantum well structure. In this embodiment, the barrier layer 205e is an undoped In film with a thickness of 7 nm. 0.05 Ga 0.95 N layers.

[0107] The first p-side guiding layer 206 is an example of at least one p-side guiding layer disposed above the active layer 205. Alternatively, the first p-side guiding layer 206 is an example of an inner guiding layer disposed closest to the active layer 205 among at least one p-side guiding layer. In this embodiment, the first p-side guiding layer 206 is an undoped In film with a thickness of 280 nm. Xp Ga 1-Xp N layers.

[0108] The band gap energy of the first p-side guiding layer 206 increases monotonically with distance from the active layer 205, and the refractive index of the first p-side guiding layer 206 increases monotonically with proximity to the active layer 205. More specifically, the first p-side guiding layer 206 has an interface near the active layer 205 that can be represented as In. Xp1 Ga 1-Xp1 The N component, near the interface on the side away from the active layer 205, has a property that can be represented as In. Xp2 Ga 1-Xp2 The composition of N. In this embodiment, the In component ratio Xp1 of the first p-side guiding layer 206 near the interface close to the active layer 205 is 0.02, and the In component ratio Xp2 near the interface away from the active layer 205 is 0. The In component ratio Xp of the first p-side guiding layer 206 decreases at a certain rate as it moves away from the active layer 205.

[0109] The p-type coating layer 210 is a p-type coating layer disposed above the active layer 205. In this embodiment, the p-type coating layer 210 has a film thickness of 50 nm and is doped with an average concentration of 2 × 10⁻⁶. 18 cm -3 p-type Al of Mg 0.035 Ga 0.965 N layers.

[0110] The p-type contact layer 211 is disposed above the p-type cladding layer 210 and in ohmic contact with the p-side electrode 113. In this embodiment, the p-type contact layer 211 is a p-type GaN layer with a thickness of 60 nm. The p-type contact layer 211 is doped with an average concentration of 1 × 10⁻⁶ as an impurity. 20 cm -3 Mg.

[0111] A ridge 210R is formed in the p-type cladding layer 210 and the p-type contact layer 211 of the semiconductor laminate 200S. The ridge 210R is a portion that protrudes upward from the bottom surface 210Tb and extends along the Y-axis direction. The ridge 210R has an upper surface 210Rt and a side surface 210Rs. The side surface 210Rs is a surface in the surface of the ridge 210R that connects the upper surface 210Rt and the bottom surface 210Tb. The side surface 210Rs is in contact with the bottom surface 210Tb at the lower end 210Rb of the ridge.

[0112] In this embodiment, the ridge width W is approximately 30 μm. Furthermore, the bottom surface 210Tb and the lower end of the ridge 210Rb are located between the uppermost and lowermost surfaces of the p-type coating layer 210. In this embodiment, the bottom surface 210Tb and the lower end of the ridge 210Rb are located 25 nm below the uppermost surface of the p-type coating layer 210.

[0113] Two protrusions 210P are formed in the semiconductor laminate 200S. Each of the two protrusions 210P protrudes upward from the bottom surface 210Tb and extends along the Y-axis. A ridge 210R is disposed between the two protrusions 210P. Each of the two protrusions 210P has an upper surface 210Pt and a side surface 210Ps. A trench 210T is formed between each of the two protrusions 210P and the ridge 210R. The trench 210T is disposed along the ridge 210R and extends along the Y-axis. The side surface 210Ps is a surface in the surface of the protrusion 210P that connects the upper surface 210Pt and the bottom surface 210Tb. In this embodiment, the stacking direction position of the upper surface 210Pt of the protrusion 210P is equal to the stacking direction position of the upper surface 210Rt of the ridge 210R.

[0114] [2-2. Effects] The effects of the semiconductor laser element 200 according to this embodiment will be explained below. In the semiconductor laser element 200 according to this embodiment, the same effects as those of the semiconductor laser element 100 according to Embodiment 1 can be obtained.

[0115] Furthermore, in the semiconductor laser element 200 of this embodiment, the refractive index of the first p-side guiding layer 206 increases as it approaches the active layer 205.

[0116] Accordingly, the peak value of the light intensity distribution in the stacking direction can be made closer to the active layer 205. Therefore, in the semiconductor laser element 200 according to this embodiment, the light confinement factor can be increased.

[0117] Furthermore, in the semiconductor laser element 200 of this embodiment, the bandgap energy of the first p-side guiding layer 206 can continuously and monotonically increase as it moves away from the active layer 205.

[0118] Accordingly, the valence band potential decreases continuously with distance from the active layer 205. Therefore, in the first p-side guiding layer 206, the difference between the hole Fermi level and the valence band potential can be kept almost constant. Thus, the concentration of holes and electrons in the first p-side guiding layer 206 in the stacking direction can be reduced and kept almost constant. Here, if the increase in band gap energy (ΔEgp) of the first p-side guiding layer 206 in the stacking direction is small, this effect will be weakened; therefore, ΔEgp is preferably 100 meV or more. Conversely, if ΔEgp is too large, the band gap energy of the first p-side guiding layer 206 at the end near the active layer 205 may become smaller. In this case, due to the excessive tilt of the valence band potential of the first p-side guiding layer 206, a leakage current will be generated, causing holes injected into the active layer 205 to leak towards the second n-side guiding layer 204. Therefore, ΔEgp can also be 400 meV or less.

[0119] Thus, since the free carrier concentration of the first p-side guiding layer 206 in the stacking direction can be reduced, the semiconductor laser element 200 according to this embodiment can achieve a reduction in free carrier loss and a reduction in nonradiative recombination probability.

[0120] Furthermore, in the semiconductor laser element 200 of this embodiment, the In composition ratio in the second n-side guiding layer 204 can decrease continuously and monotonically as it moves away from the active layer 205.

[0121] In this configuration, the refractive index of the second n-side guiding layer 204 increases monotonically and continuously as it approaches the active layer 205. Therefore, compared to a case where the refractive index of the second n-side guiding layer 204 is uniform, the high refractive index region of the second n-side guiding layer 204 can be brought closer to the active layer 205, thereby increasing the optical confinement factor and reducing the operating voltage. Furthermore, when the average In composition ratio is less than 2%, waveguide loss can be further reduced and the optical confinement factor increased.

[0122] Furthermore, in the semiconductor laser element 200 according to this embodiment, the polarization charge density of the second n-side guiding layer 204 decreases monotonically as it moves from the interface near the active layer 205 to the interface away from the active layer 205. Therefore, the difference in piezoelectric polarization charge density at each interface between the second n-side guiding layer 204 and the first n-side guiding layer 103 and the active layer 205 can be suppressed. Accordingly, the piezoelectric polarization charge is dispersed in the stacking direction of the second n-side guiding layer 204. Therefore, the increase in conduction band potential near each interface between the second n-side guiding layer 204 and the first n-side guiding layer 103 and the active layer 205 due to hole attraction can be suppressed. Thus, in the semiconductor laser element 200 according to this embodiment, since the conductivity of electrons flowing from the first n-side guiding layer 103 to the active layer 205 can be improved, the operating voltage can be reduced.

[0123] [Variation Example] The configuration of the semiconductor laser element according to this embodiment is not limited to the configuration described above. For example, the active layer 205 according to this embodiment may have a single quantum well structure including a single well layer. The following describes a semiconductor laser element according to a modified example having an active layer 205 having a single quantum well structure.

[0124] The active layer 205 involved in this modification includes a barrier layer 205a, a well layer 205b, and a barrier layer 205e.

[0125] In this variation, the barrier layer 205a is disposed above the second n-side guiding layer 204 and functions as a barrier for the quantum well structure. The thickness of the barrier layer 205a, located on the n-side (i.e., below) relative to the well layer 205b, can be greater than the thickness of the barrier layer 205e, located on the p-side (i.e., above) relative to the well layer 205b. In this variation, the barrier layer 205a is an undoped GaN layer with a thickness of 2.9 nm.

[0126] Well layer 205b is disposed above barrier layer 205a and functions as the well in a single quantum well structure. Well layer 205b is disposed between barrier layer 205a and barrier layer 205e. In this variant example, well layer 205b is undoped In with a film thickness of 3.4 nm. 0.18 Ga 0.82 N layers.

[0127] The barrier layer 205e is disposed above the well layer 205b and functions as a barrier for the quantum well structure. The thickness of the barrier layer 205e, located on the p-side (i.e., above) relative to the well layer 205b, can be less than the thickness of the barrier layer 205a, located on the n-side (i.e., below) relative to the well layer 205b. In this modified example, the barrier layer 205e is an undoped GaN layer with a thickness of 2.0 nm.

[0128] The semiconductor laser element of this modified example, which has the active layer 205 configured as described above, can also achieve the same effect as the semiconductor laser element 200 of this embodiment.

[0129] Furthermore, the active layer 205 may further have an intermediate barrier layer disposed between the barrier layer 205a and the well layer 205b on the n-side. The band gap energy of the intermediate barrier layer is greater than the band gap energy of the well layer 205b and less than the band gap energy of the barrier layer 205a. The intermediate barrier layer is, for example, made of InGaN. In this case, the In composition ratio of the intermediate barrier layer is greater than the In composition ratio of the barrier layer 205a (0 in this modified example) and less than the In composition ratio of the well layer 205b (0.18 in this modified example). The film thickness of the intermediate barrier layer may, for example, be less than the film thickness of the barrier layer 205a.

[0130] Such an intermediate barrier layer increases the optical confinement coefficient of the well layer and further reduces the oscillation threshold. The bandgap energy of the intermediate barrier layer decreases as it approaches the well layer 205b. Consequently, the piezoelectric polarization charges formed at the interfaces between the intermediate barrier layer and each of the well layer 205b and barrier layer 205a are dispersed into the intermediate barrier layer, where the bandgap energy decreases as it approaches the well layer 205b. Thus, the spike-like potential barrier of the conduction band between barrier layer 205a and well layer 205b, which would have occurred without the intermediate barrier layer, can be reduced. Therefore, by increasing the conductivity of electrons flowing from the n-type layer to the well layer 205b, the operating voltage of the semiconductor laser device can be reduced. To further reduce the bandgap energy of the intermediate barrier layer as it approaches the well layer 205b, in the case where the intermediate barrier layer is InGaN, the In composition ratio can also be increased as it approaches the well layer 205b. Whether in a structure where the bandgap energy of the intermediate barrier layer is constant, or in a structure where it decreases as it approaches the well layer 205b, it is acceptable as long as the average bandgap energy of the intermediate barrier layer is greater than the average bandgap energy of the well layer 205b and less than the average bandgap energy of the barrier layer 205a. Alternatively, the average In composition ratio of the intermediate barrier layer can be less than the average In composition ratio of the well layer 205b and greater than the average In composition ratio of the barrier layer 205a.

[0131] (Implementation Method 3) The semiconductor laser element according to Embodiment 3 will be described below. The semiconductor laser element according to this embodiment differs from the semiconductor laser element 200 according to Embodiment 2 primarily in that it lacks an electron blocking layer and a p-type cladding layer. The semiconductor laser element according to this embodiment will be described below focusing on the differences from the semiconductor laser element 200 according to Embodiment 2.

[0132] [3-1. Overall Composition] Reference Figure 7 This will explain the overall structure of the semiconductor laser element involved in this embodiment. Figure 7 This is a schematic cross-sectional view showing the overall structure of the semiconductor laser element 300 according to this embodiment. Figure 7 In, with Figure 2A Similarly, a cross-section of the semiconductor laser element 300 perpendicular to the Y-axis direction is shown.

[0133] like Figure 7 As shown, the semiconductor laser element 300 according to this embodiment includes a semiconductor stack 300S, a current blocking layer 112, a p-side electrode 113, and an n-side electrode 114. The semiconductor stack 300S includes a substrate 101, an n-type cladding layer 102, at least one n-side guiding layer, an active layer 205, and a p-side semiconductor layer 300p.

[0134] The semiconductor laser element 300 has a first n-side guiding layer 103 and a second n-side guiding layer 204 as at least one n-side guiding layer.

[0135] The p-side semiconductor layer 300p has at least one p-side guiding layer.

[0136] The semiconductor laser element 300 has a first p-side guiding layer 306, a third p-side guiding layer 308, and a p-type contact layer 311, serving as at least one p-side guiding layer. In this embodiment, since the p-side semiconductor layer 300p does not have a p-type cladding layer, the p-type contact layer 311 also functions as a p-side guiding layer. The p-type contact layer 311 is an example of the outer guiding layer among at least one p-side guiding layers, located closest to the p-side electrode 113.

[0137] The first p-side guiding layer 306 is an example of at least one p-side guiding layer disposed above the active layer 205. Alternatively, the first p-side guiding layer 306 is an example of an inner guiding layer disposed closest to the active layer 205 among at least one p-side guiding layer. In this embodiment, the first p-side guiding layer 306 is an undoped In film with a thickness of 200 nm. Xp Ga 1-Xp N layers.

[0138] The third p-side guiding layer 308 is an example of at least one p-side guiding layer disposed above the active layer 205. In this embodiment, the third p-side guiding layer 308 is an undoped GaN layer with a film thickness of 20 nm.

[0139] The p-type contact layer 311 is an example of at least one p-side guiding layer disposed above the active layer 205. The p-type contact layer 311 is a layer in ohmic contact with the p-side electrode 113. In this embodiment, the p-type contact layer 311 is a p-type GaN layer with a film thickness of 30 nm. The p-type contact layer 311 is doped with an average concentration of 1 × 10⁻⁶ as an impurity. 20 cm -3 Mg.

[0140] A ridge 308R is formed in the first p-side guiding layer 306, the third p-side guiding layer 308, and the p-type contact layer 311 of the semiconductor laminate 300S. The ridge 308R is a portion that protrudes upward from the bottom surface 308Tb and extends along the Y-axis direction. The ridge 308R has an upper surface 308Rt and a side surface 308Rs. The side surface 308Rs is a surface in the surface of the ridge 308R that connects the upper surface 308Rt and the bottom surface 308Tb. The side surface 308Rs is in contact with the bottom surface 308Tb at the lower end 308Rb of the ridge.

[0141] In this embodiment, two protrusions 308P are formed in the semiconductor stack 300S. Each of the two protrusions 308P protrudes upward from the bottom surface 308Tb and extends along the Y-axis. A ridge 308R is disposed between the two protrusions 308P. Each of the two protrusions 308P has an upper surface 308Pt and a side surface 308Ps. A trench 308T is formed between each of the two protrusions 308P and the ridge 308R. The trench 308T is disposed along the ridge 308R and extends along the Y-axis. The side surface 308Ps is a surface in the surface of the protrusion 308P that connects the upper surface 308Pt and the bottom surface 308Tb. In this embodiment, the stacking direction position of the upper surface 308Pt of the protrusion 308P is the same as the stacking direction position of the upper surface 308Rt of the ridge 308R.

[0142] In this embodiment, the ridge width W is approximately 30 μm. Furthermore, the bottom surface 308Tb and the lower end of the ridge 308Rb are located in the stacking direction between the uppermost surface of the uppermost layer and the lowermost surface of the lowermost layer of at least one p-side guiding layer in the semiconductor laser element 300. In other words, the bottom surface 308Tb and the lower end of the ridge 308Rb are located in the stacking direction between the uppermost surface of the uppermost p-type contact layer 311 and the lowermost surface of the lowermost first p-side guiding layer 306 among all the p-side guiding layers in the semiconductor laser element 300. More specifically, the bottom surface 308Tb and the lower end of the ridge 308Rb are located in the stacking direction between the uppermost surface and the lowermost surface of the lowermost first p-side guiding layer 306. In this embodiment, the bottom surface 308Tb and the lower end of the ridge 308Rb are located 100 nm below the uppermost surface of the first p-side guiding layer 306.

[0143] [3-2. Effects] In the semiconductor laser element 300 of this embodiment, the same effect of reducing operating voltage and light loss can be achieved as in the semiconductor laser element 200 of embodiment 2.

[0144] Furthermore, the semiconductor laser element 300 according to this embodiment includes: an n-type cladding layer 102; at least one n-side guiding layer disposed above the n-type cladding layer 102; an active layer 205 disposed above the at least one n-side guiding layer; at least one p-side guiding layer disposed above the active layer 205; and a p-side electrode 113 disposed above the at least one p-side guiding layer and in ohmic contact with the at least one p-side guiding layer, wherein the p-side electrode 113 comprises at least one of Ag, Al, and Rh.

[0145] Therefore, in the semiconductor laser element 300, since no p-type cladding layer or other layers are disposed between the p-side guiding layer and the p-side electrode 113, and the distance between the p-side electrode 113 and the active layer 205 is reduced, the resistance in the p-side semiconductor layer 300p can be further reduced. Thus, the operating voltage of the semiconductor laser element 300 can be further reduced.

[0146] Furthermore, removing the p-type cladding layer would increase the size of the epitaxial portion of the light distribution extending into the p-type contact layer 311, leading to increased waveguide loss in the p-type contact layer 311. However, since a p-side electrode 113 composed of Ag with a low refractive index is formed on the ridge 308R, the size of the epitaxial portion of the light distribution extending into the p-type contact layer 311 is reduced, thereby suppressing the increase in waveguide loss in the p-type GaN contact layer.

[0147] The current blocking layer 112 is an insulating layer disposed above the p-side semiconductor layer 300p. In this embodiment, the current blocking layer 112 is transmissive to light from the active layer 205. Figure 7 As shown, the current blocking layer 112 is disposed on the upper surface of the p-side semiconductor layer 300p, excluding the upper surface 308Rt of the ridge 308R. More specifically, it is continuously formed on the side surface 308Rs of the ridge 308R, the bottom surface 308Tb of the ridge 308R, the side surface 308Ps of the protrusion 308P on the ridge 308R side, and the upper surface 308Pt of the protrusion 308P. In this embodiment, the current blocking layer 112 is a SiO2 layer.

[0148] The p-side electrode 113 is a conductive layer disposed above and in ohmic contact with the p-side semiconductor layer 300p. In this embodiment, the p-side electrode 113 is in ohmic contact with the p-type contact layer 311. Figure 7 As shown, the p-side electrode 113 is disposed on the upper surface 308Rt of the ridge 308R of the p-type contact layer 311, and is disposed on the side surface 308Rs of the ridge 308R, the bottom surface 308Tb of the ridge 308R, the side surface 308Ps of the protrusion 308P on the ridge 308R side and the upper surface 308Pt of the protrusion 308P via the current blocking layer 112.

[0149] In this embodiment, the lower end of the ridge 308Rb is located in the stacking direction between the uppermost surface of the uppermost layer and the lowermost surface of the lowermost layer of at least one p-side guiding layer of the semiconductor laser element 300. Therefore, the distance between the lower end of the ridge 308Rb and the active layer 205 is reduced. Consequently, the effective refractive index difference ΔN increases. In this embodiment, since the lower end of the ridge 308Rb is located in the stacking direction between the uppermost surface and the lowermost surface of the first p-side guiding layer 306, which is the lowermost layer of at least one p-side guiding layer of the semiconductor laser element 300, the distance between the lower end of the ridge 308Rb and the active layer 205 is particularly small. Therefore, the increase in the effective refractive index difference ΔN is more significant.

[0150] Therefore, even if the effective refractive index difference ΔN changes due to variations in the component structure and film thickness during the component manufacturing process, a stable 2×10⁻⁶ refractive index difference can still be obtained. -3 The above values ​​represent the effective refractive index difference ΔN. Therefore, as long as the effective refractive index difference ΔN is 2 × 10⁻⁶, it is sufficient. -3 As a result, with a relatively wide ridge width W of 30μm, more than three waveguide modes can be stably maintained, making the semiconductor laser element 300 a multi-mode laser element. Consequently, current-optical output characteristics with kink suppression can be obtained with good reproducibility.

[0151] Furthermore, since the lower end of the ridge 308Rb is located in the stacking direction between the uppermost and lowermost surfaces of one of the at least p-side guiding layers, and a p-side electrode 113 made of Ag is formed on the bottom surface 308Tb, the distance between the p-side electrode 113 on the bottom surface 308Tb and the active layer 205 is reduced. In this embodiment, since the lower end of the ridge 308Rb is located in the stacking direction between the uppermost and lowermost surfaces of the first p-side guiding layer 306, which is the lowermost layer among at least one p-side guiding layer, the distance between the p-side electrode 113 and the active layer 205 is particularly small. Therefore, the amount of spontaneous emission light emitted from the active layer 205 reflected at the p-side electrode 113 and fed back into the active layer 205 for reabsorption can be increased. As a result, the quantum efficiency is increased, the oscillation threshold is reduced, and the slope efficiency is improved.

[0152] Furthermore, in the absence of a p-type cladding layer in the p-side semiconductor layer 300p and with each guiding layer being undoped, the feedback of spontaneous emission light lost due to free carrier absorption is suppressed, thus increasing the quantum efficiency in the active layer 205 and further reducing the oscillation threshold. As a result, the slope efficiency is also improved.

[0153] (Implementation Method 4) The semiconductor laser element according to Embodiment 4 will now be described. The semiconductor laser element according to this embodiment differs from the semiconductor laser element 100 according to Embodiment 1 mainly in that the electron blocking layer, etc., is disposed between the first p-side guiding layer and the second p-side guiding layer. Hereinafter, the semiconductor laser element according to this embodiment will be described in relation to the differences from the semiconductor laser element 100 according to Embodiment 1.

[0154] [4-1. Overall Composition] Reference Figures 8 to 10 This will explain the overall structure of the semiconductor laser element involved in this embodiment. Figure 8 This is a schematic cross-sectional view showing the overall structure of the semiconductor laser element 400 according to this embodiment. Figure 8 In, with Figure 2A Similarly, a cross-section of the semiconductor laser element 400 perpendicular to the Y-axis direction is shown. Figure 9 This is a schematic diagram illustrating the distribution of the bandgap energy and impurity concentration of the semiconductor laser element 400 according to this embodiment in the stacking direction. Figure 10 This diagram illustrates the structure of each layer of the semiconductor stack 400S according to this embodiment, excluding the substrate 101.

[0155] like Figure 8 As shown, the semiconductor laser element 400 according to this embodiment includes a semiconductor laminate 400S, a current blocking layer 112, a p-side electrode 113, a bonding layer 421, a pad electrode 422, and an n-side electrode 114. The semiconductor laminate 400S has a substrate 101, a base layer 431, a buffer layer 432, an n-type cladding layer 402, at least one n-side guiding layer, an active layer 405, and a p-side semiconductor layer 400p. An element separation groove 10T is formed on the side surface (end face in the X-axis direction) of the semiconductor laminate 400S. The element separation groove 10T is a groove used to monolithize the semiconductor laser element 400.

[0156] In the semiconductor laser element 400, a first n-side guiding layer 403 and a second n-side guiding layer 404 are provided as at least one n-side guiding layer.

[0157] The p-side semiconductor layer 400p has at least one p-side guiding layer, a first intermediate layer 441, an electron blocking layer 409, a second intermediate layer 442, and a p-side semiconductor outer layer 400u.

[0158] In the semiconductor laser element 400, a first p-side guiding layer 406 and a second p-side guiding layer 407 are provided as at least one p-side guiding layer.

[0159] The p-side semiconductor outer layer 400u is a semiconductor layer disposed above and in contact with at least one p-side guiding layer. In this embodiment, the p-side semiconductor outer layer 400u has a p-type cladding layer 410 and a p-type contact layer 411.

[0160] The substrate layer 431 is an n-type semiconductor layer disposed above the substrate 101. The average Al composition ratio of the substrate layer 431 can be smaller than the average Al composition ratio of the n-type cladding layer 402. In this embodiment, as... Figure 10 As shown, the substrate layer 431 is a doped layer disposed on the substrate 101 with an average doping concentration of 1.0 × 10⁻⁶. 18 cm -3 n-type Al with a Si film thickness of 1000 nm 0.02 Ga 0.98 N layers.

[0161] Buffer layer 432 is an n-type semiconductor layer disposed between substrate 101 and n-type cladding layer 402. In this embodiment, buffer layer 432 is disposed on substrate layer 431. In this embodiment, buffer layer 432 has a film thickness of 10 nm and is doped with an average concentration of 1.0 × 10⁻⁶. 18 cm -3 An n-type GaN layer of Si; a film with a thickness of 150 nm is disposed on this layer, doped with an average concentration of 1.0 × 10⁻⁶. 18 cm -3 Si n-type In 0.04 Ga 0.96 N-layer; and a film with a thickness of 10 nm and doped with an average concentration of 1.0 × 10⁻⁶ on this layer. 18 cm -3 The n-type GaN layer of Si.

[0162] The n-type cladding layer 402 is an Al-containing n-type nitride semiconductor layer disposed above the substrate 101. In this embodiment, the n-type cladding layer 402 is disposed on the buffer layer 432. The average Al composition ratio of the n-type cladding layer 402 is greater than the average Al composition ratio of one or more n-side guiding layers. The average Al composition ratio of the n-type cladding layer 402 can be less than 10%. In this embodiment, the n-type cladding layer 402 has a film thickness of 1500 nm and is doped with an average concentration of 1.0 × 10⁻⁶. 18 cm -3 n-type Al of Si 0.065 Ga 0.935 N layers.

[0163] In this disclosure, the average Al composition ratio of a certain layer refers to the Al composition ratio obtained by integrating the Al composition ratio of the layer at a certain position in the stacking direction from the interface position of the layer on the side closer to the substrate 101 in the stacking direction to the interface position on the side farther from the substrate 101 along the stacking direction, and dividing the result by the film thickness of the layer.

[0164] The first n-side guiding layer 403 is an Al-containing nitride semiconductor layer disposed above the n-type cladding layer 402. The first n-side guiding layer 403 has a larger average refractive index and a smaller average bandgap energy than the n-type cladding layer 402. The average Al composition ratio of the first n-side guiding layer 403 can be less than 10%. In this embodiment, the first n-side guiding layer 403 has a film thickness of 127 nm and is doped with an average concentration of 1.0 × 10⁻⁶. 18 cm -3 n-type Al of Si 0.04 Ga 0.96 N layers.

[0165] The second n-side guiding layer 404 is an Al-containing nitride semiconductor layer disposed above the n-type cladding layer 402. In this embodiment, the second n-side guiding layer 404 is disposed above the first n-side guiding layer 403. The second n-side guiding layer 404 has a larger average refractive index and a smaller average bandgap energy than the n-type cladding layer 402. The average Al composition ratio of the second n-side guiding layer 404 can be less than 10%. In this embodiment, the second n-side guiding layer 404 is an undoped Al layer with a thickness of 80 nm. 0.03 Ga 0.97 N layers.

[0166] The active layer 405 is a light-emitting layer disposed above one or more n-sided guiding layers. In this embodiment, the active layer 405 is disposed above the second n-sided guiding layer 404. The active layer 405 is as follows... Figure 9 The diagram shows a nitride-based semiconductor layer having a well layer 405b and Al-containing barrier layers 405a and 405c. The well layer 405b is disposed between the barrier layers 405a and 405c. In this embodiment, the active layer 405 emits ultraviolet light with a wavelength of approximately 375 nm. It should be noted that the configuration of the active layer 405 is not limited to this. For example, the active layer 405 may also have a multiple quantum well structure. Specifically, the active layer 405 may have three or more barrier layers and two or more well layers. That is, the active layer 405 includes at least one well layer and multiple barrier layers.

[0167] Barrier layers 405a and 405c are each nitride-based semiconductor layers disposed above one or more n-side guiding layers and functioning as barriers in a quantum well structure. Barrier layer 405c is disposed above barrier layer 405a. In this embodiment, the average bandgap energy of each of barrier layers 405a and 405c is greater than the average bandgap energy of well layer 405b. In this embodiment, barrier layer 405a is an undoped Al film with a thickness of 7 nm. 0.04 Ga 0.96 N-layer; the barrier layer 405c is an undoped Al film with a thickness of 5 nm. 0.05 Ga 0.95 N layers.

[0168] Well layer 405b is a nitride-based semiconductor layer disposed above barrier layer 405a and functioning as a well in a quantum well structure. In this embodiment, well layer 405b is an undoped In film with a thickness of 17.5 nm. 0.01 Ga 0.99 N layers.

[0169] The first p-side guiding layer 406 is an Al-containing nitride semiconductor layer disposed between the active layer 405 and the electron blocking layer 409. In this embodiment, the first p-side guiding layer 406 is disposed below the first intermediate layer 441. The average refractive index of the first p-side guiding layer 406 is greater than the average refractive index of at least one of the n-type cladding layer 402 and the p-type cladding layer 410, and its average bandgap energy is less than the average bandgap energy of at least one of the n-type cladding layer 402 and the p-type cladding layer 410. In addition, the average bandgap energy of the first p-side guiding layer 406 is less than the average bandgap energy of the second intermediate layer 442, and less than the average bandgap energy of the uppermost (i.e., closest to the electron blocking layer 409) barrier layer among the plurality of barrier layers in the active layer 405. As a result, electrical conduction from the p-type cladding layer 410 to the electron hole in the active layer 405 is easier. Therefore, the operating voltage of the semiconductor laser element 400 can be reduced.

[0170] In this embodiment, the average bandgap energy of the first p-side guiding layer 406 is less than the average bandgap energy of the first intermediate layer 441. An AlGaInN layer can be used as the first p-side guiding layer 406. The film thickness of the first p-side guiding layer 406 is, for example, 9 nm or more and 60 nm or less. In this embodiment, the first p-side guiding layer 406 is an undoped Al layer with a film thickness of 9 nm. 0.04 Ga 0.947 In 0.013 N layers.

[0171] The first intermediate layer 441 is an Al-containing nitride semiconductor layer disposed between the first p-side guiding layer 406 and the electron blocking layer 409. The average bandgap energy of the first intermediate layer 441 is greater than the average bandgap energy of the first p-side guiding layer 406 and less than the average bandgap energy of the electron blocking layer 409. In this embodiment, the first intermediate layer 441 is a p-type Al layer with a thickness of 3 nm. 0.04 Ga 0.96 N layers. The first intermediate layer 441 can, for example, be doped with an average concentration of 2.0 × 10⁻⁶. 18 cm -3 The following p-type impurities (the first intermediate layer 441 can also be undoped).

[0172] Electron blocking layer 409 is an Al-containing p-type nitride semiconductor layer disposed above active layer 405. The average bandgap energy of electron blocking layer 409 is greater than the average bandgap energy of barrier layer 405c. This suppresses electron leakage from active layer 405 to p-type cladding layer 410. In this embodiment, the average bandgap energy of electron blocking layer 409 is greater than the average bandgap energy of each of the first intermediate layer 441, second intermediate layer 442, and p-type cladding layer 410. The average impurity concentration of electron blocking layer 409 is higher than the average impurity concentration of each of the first intermediate layer 441, second intermediate layer 442, first p-side guiding layer 406, and second p-side guiding layer 407. In this embodiment, electron blocking layer 409 has a thickness of 1.6 nm and is doped with an average concentration of 1.5 × 10⁻⁶. 19 cm -3 p-type Al of Mg 0.36 Ga 0.64 N layers.

[0173] The second intermediate layer 442 is an Al-containing p-type nitride semiconductor layer disposed above the electron blocking layer 409. In this embodiment, the second intermediate layer 442 is a 56 nm thick layer doped with an average concentration of 1.0 × 10⁻⁶. 19 cm -3 p-type Al of Mg 0.05 Ga 0.95 N layers.

[0174] The second p-side guiding layer 407 is an Al-containing nitride semiconductor layer disposed above the electron blocking layer 409. In this embodiment, the second p-side guiding layer 407 is disposed above the second intermediate layer 442. In this embodiment, the average bandgap energy of the second p-side guiding layer 407 is lower than the average bandgap energy of the second intermediate layer 442 and the p-type cladding layer 410. The average Al composition ratio of the second p-side guiding layer 407 can be less than 10%. In this embodiment, the second p-side guiding layer 407 has a film thickness of 50 nm and is doped with an average concentration of 2.0 × 10⁻⁶. 19 cm-3 p-type Al of Mg 0.03 Ga 0.97 N layers.

[0175] The p-type cladding layer 410 is an Al-containing p-type nitride semiconductor layer disposed above the second p-side guiding layer 407. The average bandgap energy of the p-type cladding layer 410 is less than the average bandgap energy of the electron blocking layer 409. The average Al composition ratio of the p-type cladding layer 410 can be less than 10%. The impurity concentration of the p-type cladding layer 410 at the end near the active layer 405 can be lower than the impurity concentration at the end away from the active layer 405. Therefore, since the impurity concentration in the high-intensity region of the p-type cladding layer 410 can be reduced, the free carrier loss of light caused by impurities can be reduced. In this embodiment, the p-type cladding layer 410 is a 30 nm thick layer doped with an average concentration of 2.0 × 10⁻⁶. 19 cm -3 p-type Al of Mg 0.065 Ga 0.935 N layers.

[0176] The p-type contact layer 411 is a p-type nitride semiconductor layer disposed above the p-type cladding layer 410 and in ohmic contact with the p-side electrode 113. In this embodiment, the p-type contact layer 411 has a film thickness of 30 nm and is doped with an average concentration of 2.0 × 10⁻⁶. 19 cm -3 A p-type GaN layer of Mg, and a 10 nm thick film of Mg doped with an average concentration of 2.0 × 10⁻⁶. 20 cm -3 The p-type GaN layer of Mg.

[0177] A ridge 410R is formed in the second intermediate layer 442, the second p-side guiding layer 407, the p-type cladding layer 410, and the p-type contact layer 411 of the semiconductor laminate 400S. The ridge 410R is a portion protruding upward from the bottom surface 410Tb and extending along the Y-axis. The ridge 410R has an upper surface 410Rt and a side surface 410Rs. The side surface 410Rs is a surface in the ridge 410R that connects the upper surface 410Rt and the bottom surface 410Tb. The side surface 410Rs is in contact with the bottom surface 410Tb at the lower end 410Rb of the ridge.

[0178] In this embodiment, two protrusions 410P are formed in the semiconductor stack 400S. Each of the two protrusions 410P protrudes upward from the bottom surface 410Tb and extends along the Y-axis. A ridge 410R is disposed between the two protrusions 410P. Each of the two protrusions 410P has an upper surface 410Pt and a side surface 410Ps. A groove 410T is formed between each of the two protrusions 410P and the ridge 410R. The groove 410T is disposed along the ridge 410R and extends along the Y-axis. The side surface 410Ps is a surface in the surface of the protrusion 410P that connects the upper surface 410Pt and the bottom surface 410Tb. In this embodiment, the position of the upper surface 410Pt of the protrusion 410P in the stacking direction is the same as the position of the upper surface 410Rt of the ridge 410R in the stacking direction.

[0179] In this embodiment, the ridge width W is approximately 15 μm. Furthermore, the bottom surface 410Tb and the lower end of the ridge 410Rb are located in the stacking direction between the uppermost surface of the uppermost layer and the lowermost surface of the lowermost layer of at least one p-side guiding layer of the semiconductor laser element 400. More specifically, the bottom surface 410Tb and the lower end of the ridge 410Rb are located in the stacking direction between the uppermost surface and the lowermost surface of the second intermediate layer 442.

[0180] like Figure 8 As shown, the distance between the lower end 410Rb of the ridge and the electron blocking layer 409 is set as dc. In this embodiment, the distance dc is 35nm.

[0181] The current blocking layer 112 is an insulating layer disposed above the p-type cladding layer 410. In this embodiment, the current blocking layer 112 is an insulating layer that is transmissive to light from the active layer 405. The current blocking layer 112 is disposed on the upper surface of the semiconductor stack 400S, excluding the upper surface of the ridge 410R. Alternatively, the current blocking layer 112 may be disposed on a portion of the upper surface of the ridge 410R. For example, the current blocking layer 112 may be disposed on the edge region of the upper surface of the ridge 410R. In this embodiment, the current blocking layer 112 is a SiO2 layer with a thickness of 300 nm.

[0182] The p-side electrode 113 is a conductive layer disposed above the p-type contact layer 411. In this embodiment, the p-side electrode 113 is in contact with the p-type contact layer 411. The p-side electrode 113 contains at least one of Ag, Al, and Rh. In this embodiment, the p-side electrode 113 has an Ag layer with a thickness of 100 nm and a Pt layer with a thickness of 100 nm disposed on the Ag layer.

[0183] The adhesion layer 421 is a metal layer disposed between the current blocking layer 112 and the pad electrode 422. The adhesion layer 421 has the function of improving the adhesion of the pad electrode 422. The adhesion layer 421 is disposed on the side surface 410Rs of the ridge 410R, the bottom surface 410Tb, the side surface 410Ps of the ridge 410R side of the protrusion 410P, and the upper surface 410Pt of the protrusion 410P via the current blocking layer 112. Alternatively, the adhesion layer 421 may also be disposed above the p-side electrode 113. In this embodiment, the adhesion layer 421 has a Ti layer with a thickness of 10 nm disposed on the current blocking layer 112 and a Pt layer with a thickness of 100 nm disposed on the Ti layer. It should be noted that in the adhesion layer 421, a layer made of a laser-absorbing material such as Cr or Ni may be used instead of the Ti layer.

[0184] The pad electrode 422 is a pad-shaped electrode disposed above the p-side electrode 113. In this embodiment, the pad electrode 422 is disposed above the p-side electrode 113 and the bonding layer 421. In this embodiment, the pad electrode 422 is an Au layer with a film thickness of 2.0 μm.

[0185] [4-2. Effects] The semiconductor laser element 400 according to this embodiment includes: an n-type cladding layer 402; at least one n-side guiding layer disposed above the n-type cladding layer 402; an active layer 405 disposed above the at least one n-side guiding layer; a p-side semiconductor layer 400p disposed above the active layer 405; and a p-side electrode 113 disposed above the p-side semiconductor layer 400p and in ohmic contact with the p-side semiconductor layer 400p. The active layer 405 has at least one well layer, and a second spacing between the at least one well layer 405b closest to the n-type cladding layer 402 and the p-side electrode 113 is smaller than a first spacing between the at least one well layer 405b closest to the n-type cladding layer 402 and the p-side electrode 113. The p-side electrode 113 includes at least one of Ag, Al, and Rh.

[0186] In this embodiment, the first interval is equal to the total thickness of the first n-side guiding layer 403, the second n-side guiding layer 404, and the barrier layer 405a. The second interval is equal to the total thickness of the barrier layer 405c, the first p-side guiding layer 406, the first intermediate layer 441, the electron blocking layer 409, the second intermediate layer 442, the second p-side guiding layer 407, the p-type cladding layer 410, and the p-type contact layer 411. When a ridge 410R is formed in the p-type cladding layer 410, the second interval represents the distance between the well layer 405b and the p-side electrode 113 in the region containing the ridge 410R.

[0187] Thus, in the semiconductor laser element 400 according to this embodiment, since the second interval is smaller than the first interval, the resistance in the p-side semiconductor layer 400p can be further reduced. Therefore, the operating voltage of the semiconductor laser element 400 can be further reduced.

[0188] In the semiconductor laser element 400 of this embodiment, the p-side semiconductor layer 400p may also have: at least one p-side guiding layer; and a p-side semiconductor outer layer 400u disposed above and in contact with the at least one p-side guiding layer.

[0189] Accordingly, by making the average refractive index of this p-side semiconductor outer layer 400u less than the average refractive index of one or more p-side guiding layers, light can be confined within one or more p-side guiding layers.

[0190] In the semiconductor laser element 400 of this embodiment, the film thickness of the p-side semiconductor outer layer 400u may be less than the film thickness of the at least one p-side guiding layer from the p-side guiding layer (first p-side guiding layer 406) closest to the active layer 405 to the p-side guiding layer (second p-side guiding layer 407) furthest from the active layer 405.

[0191] Thus, by reducing the film thickness of the p-side semiconductor outer layer 400u, the resistance in the p-side semiconductor layer 400p can be reduced. Therefore, the operating voltage of the semiconductor laser element 400 can be reduced.

[0192] In the semiconductor laser element 400 of this embodiment, the p-side semiconductor layer 400p may have at least one p-side guiding layer, and the p-side electrode 113 may be in ohmic contact with the at least one p-side guiding layer.

[0193] Therefore, in the semiconductor laser element 400, since no p-type cladding layer or other layer is disposed between the p-side guiding layer and the p-side electrode 113, the resistance in the p-side semiconductor layer 400p can be further reduced. Thus, the operating voltage of the semiconductor laser element 400 can be further reduced.

[0194] In the semiconductor laser element 400 according to this embodiment, similar to the semiconductor laser element 100 according to Embodiment 1, in at least one well layer of the active layer 405, the thickness of the p-side semiconductor outer layer 400u is smaller than the first interval between the well layer 405b closest to the n-type cladding layer 402 and the n-type cladding layer 402, and the p-side electrode 113 includes at least one of Ag, Al, and Rh. Furthermore, the thickness of the p-side semiconductor outer layer 400u may also be smaller than the thickness of the at least one p-side guiding layer from the first p-side guiding layer 406 closest to the active layer 405 to the second p-side guiding layer 407 furthest from the active layer 405. Here, the thickness from the first p-side guiding layer 406 to the second p-side guiding layer 407 includes not only the thickness of the first p-side guiding layer 406 and the second p-side guiding layer 407 themselves, but also the thickness of the layers disposed between them. In other words, the film thickness from the first p-side guiding layer 406 to the second p-side guiding layer 407 refers to the total film thickness of the first p-side guiding layer 406, the first intermediate layer 441, the electron blocking layer 409, the second intermediate layer 442, and the second p-side guiding layer 407.

[0195] Therefore, in the semiconductor laser element 400 according to this embodiment, similar to the semiconductor laser element 100 according to Embodiment 1, the operating voltage and light loss can be reduced.

[0196] In the semiconductor laser element 400 of this embodiment, the at least one p-side guiding layer has: a first p-side guiding layer 406 disposed as an inner guiding layer at a position closest to the active layer 405; and a second p-side guiding layer 407 disposed as an outer guiding layer at a position closest to the p-side electrode 113. The semiconductor laser element 400 may also include an electron blocking layer 409 disposed between the outer guiding layer and the inner guiding layer.

[0197] Accordingly, leakage of electrons to the outside of the electron blocking layer 409 can be suppressed. Therefore, by increasing the recombination probability of electrons and holes in the active layer 405, the light output of the semiconductor laser element 400 can be improved.

[0198] The semiconductor laser element 400 according to this embodiment may further include a second intermediate layer 442 above the electron blocking layer 409. The average bandgap energy of the second intermediate layer 442 is lower than the average bandgap energy of the electron blocking layer 409 but higher than the average bandgap energy of the second p-side guiding layer 407. The average impurity concentration of the second intermediate layer 442 is lower than the average impurity concentration of the electron blocking layer 409 but higher than the average impurity concentration of the second p-side guiding layer 407.

[0199] Thus, in the semiconductor laser element 400 according to this embodiment, in the region above the electron blocking layer 409 where the impurity concentration is high, by providing a second intermediate layer 442 with an average bandgap energy greater than that of the second p-side guiding layer 407, the light absorption edge in this region can be moved towards the high-energy side (short-wavelength side). Therefore, in the semiconductor laser element 400 according to this embodiment, light absorption in this region can be suppressed. Thus, according to the semiconductor laser element 400 according to this embodiment, light loss can be suppressed while reducing the Al composition ratio of each layer, such as the second p-side guiding layer 407 and the p-type cladding layer 410.

[0200] The semiconductor laser element 400 according to this embodiment may also include a first p-side guiding layer 406 disposed between the active layer 405 and the electron blocking layer 409.

[0201] This allows the peak of the light intensity distribution to be closer to the active layer 405, thereby reducing the operating voltage and current of the semiconductor laser element 400 and increasing the light confinement factor and socket efficiency (WPE).

[0202] In the semiconductor laser element 400 of this embodiment, the bandgap energy of the first p-side guiding layer 406 can be lower than the bandgap energy of the barrier layer 405c adjacent to it.

[0203] This increases the refractive index of the first p-side guiding layer 406 and improves its conductivity.

[0204] In the semiconductor laser element 400 of this embodiment, the bandgap energy of the first p-side guiding layer 406 can be lower than the bandgap energy of the second p-side guiding layer 407.

[0205] Accordingly, since the refractive index of the first p-side guiding layer 406 can be made higher than that of the second p-side guiding layer 407, the operating voltage and operating current can be reduced, and the light confinement coefficient, effective refractive index difference and WPE can be increased.

[0206] In the semiconductor laser element 400 of this embodiment, the first p-side guiding layer 406 may also be an undoped AlGaInN layer.

[0207] Accordingly, light absorption caused by increased impurity concentration can be suppressed. Furthermore, by using an AlGaInN layer as the first p-side guiding layer 406, an AlGaInN layer that has compressive stress relative to the substrate 101, acting as a compressive strain layer, can be disposed below and near the ridge 410R. This reduces the shear stress at the lower end of the ridge 410R caused by the AlGaN layer, which has tensile properties relative to the substrate 101. Moreover, wafer warping, which serves as the substrate for manufacturing the semiconductor laser element 400, can be suppressed, and wafer breakage during subsequent processes after the first p-side guiding layer 406 is stacked can be prevented.

[0208] In the semiconductor laser element 400 according to this embodiment, the Al composition ratio of the first p-side guiding layer 406 can be equal to the Al composition ratio of the adjacent barrier layer 405c. In this case, when the barrier layer 405c and the first p-side guiding layer 406 are formed successively, in the process of forming the first p-side guiding layer 406, only the In composition ratio needs to be changed for the process of forming the barrier layer 405c. Therefore, the controllability of atomic composition in the formation process of the first p-side guiding layer 406 can be improved, thereby making the composition of the first p-side guiding layer 406 more uniformly distributed in the plane (in the plane perpendicular to the stacking direction). Thus, for example, when multiple semiconductor laser elements 400 are formed on a wafer, the characteristics of each semiconductor laser element 400 can be made uniform.

[0209] In the semiconductor laser element 400 according to this embodiment, the In composition ratio of the first p-side guiding layer 406 can vary depending on its position in the stacking direction. For example, the In composition ratio of the region of the first p-side guiding layer 406 near the active layer 405 can be greater than the In composition ratio of the region away from the active layer 405. Accordingly, the bandgap energy of the region of the first p-side guiding layer 406 near the active layer 405 can be reduced, thereby improving the hole conductivity in that region. Therefore, the operating voltage of the semiconductor laser element 400 can be further reduced.

[0210] Furthermore, when the semiconductor laser element 400 is an ultraviolet laser element having a GaN substrate 101, the following problem exists. In this case, since the effective refractive index of the semiconductor laser element 400 is lower than the refractive index of the substrate 101 relative to the waveguide mode, if waveguide mode light reaches the substrate, leakage light (i.e., light component leaking into the substrate 101) will be generated. This leakage light will not attenuate within the substrate 101 and will diffuse throughout the entire substrate 101. Here, since the refractive index of the trench 410T is lower, the light distribution in the outer region of the ridge (directly below the trench 410T) in the waveguide mode will extend further towards the substrate 101 than the light distribution in the inner region of the ridge (the light distribution directly below the ridge 410R), thus making it more likely to become a component leaking into the substrate 101. When a leakage component into the substrate 101 is generated in the light distribution in the outer region of the ridge, the effective refractive index of the light distribution along the stacking direction in the outer region of the ridge becomes higher than the effective refractive index of the light distribution along the stacking direction in the inner region of the ridge, thereby forming a refractive index anti-waveguide state. When in the refractive index anti-waveguide state, the light distribution within the ridge region is difficult to stably confine in the horizontal direction (X-axis direction), thus easily generating kinks in the current-light output characteristics, leading to reduced slope efficiency and increased oscillation threshold. Furthermore, when the ridge width W is narrow, the proportion of light distributed in the outer region of the ridge increases in the waveguide mode light distribution. Therefore, the narrower the ridge width W, the easier it is for light components to leak into the substrate 101. Therefore, to suppress the generation of light components leaking into the substrate 101 from the light distribution in the outer region of the ridge, a smaller ridge width W requires a higher effective refractive index difference ΔN. When the ridge width W is 15 μm, an effective refractive index difference ΔN of 1.0 × 10⁻⁶ is required. -2 Such large values ​​as those above.

[0211] In the semiconductor laser element 400 of this embodiment, by forming a second p-side guiding layer 407 with a high refractive index within the ridge 410R, the waveguide mode light distribution of the waveguide acts in the direction extending into the region within the ridge, thereby increasing the effective refractive index of the light distribution in the region within the ridge along the stacking direction. As a result, the effective refractive index difference ΔN increases. By increasing the effective refractive index difference ΔN, the proportion of light distribution existing in the region outside the ridge in the waveguide mode light distribution of the waveguide can be reduced. In this way, the generation of light components leaking into the substrate 101 can be suppressed. In addition, by providing a p-type cladding layer 410, the semiconductor laser element 400 of this embodiment can reduce the size of the light distribution epitaxial portion extending into the p-type contact layer 411, thereby suppressing the occurrence of waveguide loss in the p-type contact layer 411. Furthermore, by setting a bottom surface 410Tb and a ridge lower end 410Rb in the middle of the p-side guiding layer (above the electron blocking layer 409), and by setting the metal disposed on the bottom surface 410Tb as a material with high light absorption such as Ti, the absorption loss of the material with high light absorption such as Ti can be used to attenuate the light distribution extending to the region outside the ridge, thereby suppressing the generation of light components leaking to the substrate 101.

[0212] In this embodiment, the lower end 410Rb of the ridge is located in the stacking direction between the uppermost surface of the uppermost layer and the lowermost surface of the lowermost layer of at least one p-side guiding layer of the semiconductor laser element 400. Therefore, the distance between the lower end 410Rb of the ridge and the active layer 405 is reduced. Consequently, the effective refractive index difference ΔN increases. Therefore, even if the effective refractive index difference ΔN changes due to variations in the composition and film thickness of the element structure during the device manufacturing process, a stable 2×10⁻⁶ refractive index difference can be obtained. -3 The above values ​​represent the effective refractive index difference ΔN.

[0213] (Implementation Method 5) The semiconductor laser element according to Embodiment 5 will now be described. The semiconductor laser element according to this embodiment differs from the semiconductor laser element 400 according to Embodiment 4 primarily in that it does not have a p-side semiconductor outer layer. Hereinafter, the semiconductor laser element according to this embodiment will be described in relation to the differences from the semiconductor laser element 400 according to Embodiment 4.

[0214] [5-1. Overall Composition] Reference Figure 11 This will explain the overall structure of the semiconductor laser element involved in this embodiment. Figure 11 This is a schematic cross-sectional view showing the overall structure of the semiconductor laser element 500 according to this embodiment. Figure 11 In, with Figure 2ASimilarly, a cross-section of the semiconductor laser element 500 perpendicular to the Y-axis direction is shown.

[0215] like Figure 11 As shown, the semiconductor laser element 500 according to this embodiment includes a semiconductor laminate 500S, a current blocking layer 112, a p-side electrode 113, a bonding layer 421, a pad electrode 422, and an n-side electrode 114. The semiconductor laminate 500S includes a substrate 101, a base layer 431, a buffer layer 432, an n-type cladding layer 402, at least one n-side guiding layer, an active layer 405, and a p-side semiconductor layer 500p.

[0216] The p-side semiconductor layer 500p has at least one p-side guiding layer, a first intermediate layer 441, an electron blocking layer 409, and a second intermediate layer 442.

[0217] The semiconductor laser element 500 has a first p-side guiding layer 406, a second p-side guiding layer 507, and a p-type contact layer 511, serving as at least one p-side guiding layer. In this embodiment, since the p-side semiconductor layer 500p does not have a p-side semiconductor outer layer, the p-type contact layer 511 also functions as a p-side guiding layer.

[0218] The second p-side guiding layer 507 involved in this embodiment is an Al-containing nitride semiconductor layer disposed above the electron blocking layer 409. In this embodiment, the second p-side guiding layer 507 is disposed above the second intermediate layer 442. In this embodiment, the average bandgap energy of the second p-side guiding layer 507 is less than the average bandgap energy of the second intermediate layer 442. The average Al composition ratio of the second p-side guiding layer 507 can be less than 10%. In this embodiment, the second p-side guiding layer 507 has a film thickness of 50 nm and is doped with an average concentration of 2.0 × 10⁻⁶. 19 cm -3 p-type Al of Mg 0.03 Ga 0.97 N layers.

[0219] The p-type contact layer 511 is a p-type nitride semiconductor layer that makes an ohmic contact with the p-side electrode 113. In this embodiment, the p-type contact layer 511 also functions as a p-side guiding layer. The p-type contact layer 511 has a thickness of 10 nm and is doped with an average concentration of 2.0 × 10⁻⁶. 20 cm -3 p-type Al of Mg 0.03 Ga 0.97 N layers.

[0220] A ridge 507R is formed in the second intermediate layer 442, the second p-side guiding layer 507, and the p-type contact layer 511 of the semiconductor laminate 500S. The ridge 507R is a portion that protrudes upward from the bottom surface 507Tb and extends along the Y-axis direction. The ridge 507R has an upper surface 507Rt and a side surface 507Rs. The side surface 507Rs is a surface in the surface of the ridge 507R that connects the upper surface 507Rt and the bottom surface 507Tb. The side surface 507Rs is in contact with the bottom surface 507Tb at the lower end 507Rb of the ridge.

[0221] In this embodiment, two protrusions 507P are formed in the semiconductor stack 500S. Each of the two protrusions 507P is a portion that protrudes upward from the bottom surface 507Tb and extends along the Y-axis direction. A ridge 507R is disposed between the two protrusions 507P. Each of the two protrusions 507P has an upper surface 507Pt and a side surface 507Ps. A trench 507T is formed between each of the two protrusions 507P and the ridge 507R. The trench 507T is disposed along the ridge 507R and extends along the Y-axis direction. The side surface 507Ps is a surface in the surface of the protrusion 507P that connects the upper surface 507Pt and the bottom surface 507Tb. In this embodiment, the position of the upper surface 507Pt of the protrusion 507P in the stacking direction is the same as the position of the upper surface 507Rt of the ridge 507R in the stacking direction.

[0222] In this embodiment, the ridge width W is approximately 15 μm. Furthermore, the bottom surface 507Tb and the lower end of the ridge 507Rb are located between the uppermost and lowermost surfaces of the second intermediate layer 442 in the stacking direction.

[0223] [5-2. Effects] In the semiconductor laser element 500 of this embodiment, the same effect as that of the semiconductor laser element 400 of embodiment 4 can also be obtained.

[0224] Furthermore, in the semiconductor laser element 500 of this embodiment, the p-side semiconductor layer 500p has at least one p-side guiding layer, and the p-side electrode 113 is in ohmic contact with the at least one p-side guiding layer.

[0225] Therefore, in the semiconductor laser element 500, since no p-type cladding layer or other layer is disposed between the p-side guiding layer and the p-side electrode 113, the resistance in the p-side semiconductor layer 500p can be further reduced. Thus, the operating voltage of the semiconductor laser element 500 can be further reduced.

[0226] Furthermore, since there is no low-refractive-index p-type cladding layer inside the ridge, the effective refractive index of the vertical light distribution inside the ridge increases, thereby increasing ΔN. When ΔN increases, the proportion of light distribution outside the ridge in the waveguide mode light distribution of the waveguide can be reduced. As a result, the generation of light components leaking into the substrate can be suppressed.

[0227] (Implementation Method 6) The semiconductor laser element according to Embodiment 6 will now be described. The semiconductor laser element according to this embodiment differs from the semiconductor laser element 400 according to Embodiment 4 in the composition of the active layer and the first p-side guiding layer. Hereinafter, the semiconductor laser element according to this embodiment will be described in relation to the differences from the semiconductor laser element 400 according to Embodiment 4.

[0228] [6-1. Overall Composition] Reference Figure 12 and Figure 13 This will explain the overall structure of the semiconductor laser element involved in this embodiment. Figure 12 This is a schematic cross-sectional view showing the overall structure of the semiconductor laser element 600 according to this embodiment. Figure 12 In, with Figure 2A Similarly, a cross-section of the semiconductor laser element 600 perpendicular to the Y-axis direction is shown. Figure 13 This is a schematic diagram illustrating the distribution of the bandgap energy and impurity concentration of the semiconductor laser element 600 according to this embodiment in the stacking direction.

[0229] like Figure 12 As shown, the semiconductor laser element 600 according to this embodiment includes a semiconductor stack 600S, a current blocking layer 112, a p-side electrode 613, a bonding layer 421, a pad electrode 422, and an n-side electrode 114. The semiconductor stack 600S includes a substrate 101, a base layer 431, a buffer layer 432, an n-type cladding layer 402, at least one n-side guiding layer, an active layer 605, and a p-side semiconductor layer 600p.

[0230] The p-side semiconductor layer 600p has at least one p-side guiding layer, a first intermediate layer 441, an electron blocking layer 409, a second intermediate layer 442, and a p-side semiconductor outer layer 400u.

[0231] The semiconductor laser element 600 has a first p-side guiding layer 606 and a second p-side guiding layer 407 as at least one p-side guiding layer.

[0232] The first n-side guiding layer 403 is an Al-containing nitride semiconductor layer disposed above the n-type cladding layer 402. The first n-side guiding layer 403 has a larger average refractive index and a smaller average bandgap energy than the n-type cladding layer 402. The average Al composition ratio of the first n-side guiding layer 403 can be less than 10%. In this embodiment, the first n-side guiding layer 403 has a film thickness of 127 nm and is doped with an average concentration of 1.0 × 10⁻⁶. 18 cm -3 n-type Al of Si 0.03 Ga 0.97 N layers.

[0233] The active layer 605 is a light-emitting layer disposed above one or more n-sided guiding layers. In this embodiment, the active layer 605 is disposed above the second n-sided guiding layer 404. Figure 12 As shown, the active layer 605 is a nitride-based semiconductor layer having a well layer 405b and barrier layers 405a and 605c containing Al.

[0234] The barrier layer 605c is a nitride-based semiconductor layer disposed above one or more n-sided guiding layers and functioning as a barrier for the quantum well structure. The barrier layer 605c is disposed above the barrier layer 405a. In this embodiment, the average bandgap energy of the barrier layer 605c is greater than the average bandgap energy of the well layer 405b. In this embodiment, the barrier layer 605c is a multilayer film, consisting of an inner barrier layer 605c1 and an outer barrier layer 605c2 disposed on the inner barrier layer 605c1 (see [link to relevant documentation]). Figure 13 The inner barrier layer 605c1 is an undoped Al film with a thickness of 5 nm. 0.04 Ga 0.96 N layers. The band gap energy of the outer barrier layer 605c2 is greater than that of the inner barrier layer 605c1, and its Al composition is higher than that of the inner barrier layer 605c1. The outer barrier layer 605c2 is an undoped Al film with a thickness of 3 nm. 0.07 Ga 0.93 N layers.

[0235] The first p-side guiding layer 606 is an Al-containing nitride semiconductor layer disposed between the active layer 605 and the electron blocking layer 409. In this embodiment, the first p-side guiding layer 606 is disposed below the first intermediate layer 441. The average refractive index of the first p-side guiding layer 606 is greater than the average refractive index of at least one of the n-type cladding layer 402 and the p-type cladding layer 410, and its average bandgap energy is less than the average bandgap energy of at least one of the n-type cladding layer 402 and the p-type cladding layer 410. In addition, the average bandgap energy of the first p-side guiding layer 606 is less than the average bandgap energy of the second intermediate layer 442, and less than the average bandgap energy of the uppermost (i.e., closest to the electron blocking layer 409) barrier layer among the plurality of barrier layers in the active layer 605.

[0236] In this embodiment, the average bandgap energy of the first p-side guiding layer 606 is less than the average bandgap energy of the first intermediate layer 441. For example, an AlGaN layer can be used as the first p-side guiding layer 606. The film thickness of the first p-side guiding layer 606 is, for example, 9 nm or more and 60 nm or less. In this embodiment, the first p-side guiding layer 606 is an undoped Al material with a film thickness of 9 nm. 0.04 Ga 0.96 N layers.

[0237] The p-side electrode 613 is a conductive layer disposed above the p-type contact layer 411. In this embodiment, the p-side electrode 613 is in contact with the p-type contact layer 411. The p-side electrode 613 contains at least one of Ag, Al, and Rh. In this embodiment, the p-side electrode 613 has an Ag layer with a thickness of 50 nm and a Pt layer with a thickness of 50 nm disposed on the Ag layer.

[0238] [6-2. Effects] In the semiconductor laser element 600 of this embodiment, the operating voltage and light loss can also be reduced, just like in the semiconductor laser element 400 of embodiment 4.

[0239] In the semiconductor laser element 600 according to this embodiment, the first p-side guiding layer 606 is made of AlGaN, and the Al composition ratio of the first p-side guiding layer 606 can be lower than the Al composition ratio of the second p-side guiding layer 407. For example, in this embodiment, since the Al composition ratio of the second p-side guiding layer 407 is 3%, the Al composition ratio of the first p-side guiding layer 606 can be lower than 3%.

[0240] Therefore, since the refractive index of the first p-side guiding layer 606 can be made higher than that of the second p-side guiding layer 407, the operating voltage and operating current can be reduced, and the light confinement factor, effective refractive index difference and socket efficiency (WPE) can be increased.

[0241] (Implementation Method 7) The semiconductor laser element according to Embodiment 7 will now be described. The semiconductor laser element according to this embodiment differs from the semiconductor laser element 600 according to Embodiment 6 primarily in that it does not have a p-side semiconductor outer layer. Hereinafter, the semiconductor laser element according to this embodiment will be described focusing on its differences from the semiconductor laser element 600 according to Embodiment 6.

[0242] [7-1. Overall Composition] The following reference Figure 14 The overall configuration of the semiconductor laser element involved in this embodiment will be described. Figure 14 This is a schematic cross-sectional view showing the overall configuration of the semiconductor laser element 700 according to this embodiment. Figure 2A same, Figure 14 A cross-section of the semiconductor laser element 700 perpendicular to the Y-axis is shown.

[0243] like Figure 14 As shown, the semiconductor laser element 700 according to this embodiment includes a semiconductor laminate 700S, a current blocking layer 112, a p-side electrode 113, an adhesion layer 421, a pad electrode 422, and an n-side electrode 114. The semiconductor laminate 700S includes a substrate 101, a base layer 431, a buffer layer 432, an n-type cladding layer 402, at least one n-side guiding layer, an active layer 605, and a p-side semiconductor layer 700p.

[0244] The p-side semiconductor layer 700p has a first intermediate layer 441, an electron blocking layer 409, and a second intermediate layer 442 as at least one p-side guiding layer.

[0245] The semiconductor laser element 700 has a first p-side guiding layer 606, a second p-side guiding layer 507, and a p-type contact layer 511 as at least one p-side guiding layer.

[0246] The second p-side guiding layer 507 has the same structure as the second p-side guiding layer 507 according to Embodiment 5. Specifically, the second p-side guiding layer 507 is doped with an average concentration of 2.0 × 10⁻⁶. 19 cm -3 The Mg film thickness is 50 nm for p-type Al 0.03 Ga 0.97 N layers.

[0247] The p-type contact layer 511 has the same structure as the p-type contact layer 511 according to Embodiment 5. Specifically, the p-type contact layer 511 is doped with an average concentration of 2.0 × 10⁻⁶. 20 cm-3 The Mg film thickness is 10 nm for p-type Al 0.03 Ga 0.97 N layers.

[0248] The p-side electrode 113 has the same structure as the p-side electrode 113 according to Embodiment 4. Specifically, the p-side electrode 113 has an Ag layer with a thickness of 100 nm and a Pt layer with a thickness of 100 nm disposed on the Ag layer.

[0249] [7-2. Effects] In the semiconductor laser element 700 of this embodiment, the same effect as that of the semiconductor laser element 600 of embodiment 6 can also be achieved.

[0250] Furthermore, in the semiconductor laser element 700 of this embodiment, the p-side semiconductor layer 700p has at least one p-side guiding layer, and the p-side electrode 113 is in ohmic contact with the at least one p-side guiding layer.

[0251] Therefore, in the semiconductor laser element 700, since no p-type cladding layer or other layer is provided between the p-side guiding layer and the p-side electrode 113, the resistance in the p-side semiconductor layer 700p can be further reduced. Thus, the operating voltage of the semiconductor laser element 700 can be further reduced.

[0252] (Implementation Method 8) The semiconductor laser element according to Embodiment 8 will now be described. The semiconductor laser element according to this embodiment differs from the semiconductor laser element 100 according to Embodiment 1 mainly in that it is a GaAs-based semiconductor laser element and has a hole-blocking layer. The semiconductor laser element according to this embodiment will be described below focusing on the differences from the semiconductor laser element 100 according to Embodiment 1.

[0253] [8-1. Overall Composition] The following reference Figures 15 to 19 This will explain the overall structure of the semiconductor laser element involved in this embodiment. Figure 15 This is a schematic cross-sectional view showing the overall structure of the semiconductor laser element 800 according to this embodiment. Figure 15 Zhongyu Figure 2A Similarly, a cross-section of the semiconductor laser element 800 perpendicular to the Y-axis direction is shown. Figure 16 This is a schematic cross-sectional view showing the structure of the hole blocking layer 840 of the semiconductor laser element 800 according to this embodiment. Figure 17 This is a schematic cross-sectional view showing the structure of the active layer 805 of the semiconductor laser element 800 according to this embodiment. Figure 18and Figure 19 This is a diagram showing the structure of each layer of the semiconductor stack 800S according to this embodiment, excluding the substrate 801.

[0254] like Figure 15 As shown, the semiconductor laser element 800 according to this embodiment includes a semiconductor stack 800S, a current blocking layer 812, a p-side electrode 813, a pad electrode 822, and an n-side electrode 814. The semiconductor stack 800S includes a substrate 801, a buffer layer 832, a boundary layer 833, an n-type cladding layer 802, at least one n-side guiding layer, an active layer 805, and a p-side semiconductor layer 800p.

[0255] The semiconductor laser element 800 has a first n-side guiding layer 803 and a second n-side guiding layer 804 as at least one n-side guiding layer.

[0256] The p-side semiconductor layer 800p has an electron blocking layer 809, at least one p-side guiding layer, and a p-side semiconductor outer layer 800u.

[0257] The semiconductor laser element 800 has a p-side guiding layer 806 as at least one p-side guiding layer.

[0258] The p-side semiconductor outer layer 800u is a semiconductor layer disposed above and in contact with at least one p-side guiding layer. In this embodiment, the p-side semiconductor outer layer 800u has a p-type cladding layer 810 and a p-type contact layer 811.

[0259] Substrate 801 is a plate-shaped component constituting the pedestal of semiconductor laser element 800. In this embodiment, substrate 801 is doped with an average concentration of 1.0 × 10⁻⁶. 18 cm －3 An n-type GaAs substrate with an n-type impurity (Si) thickness of 100 μm. On the lower surface of substrate 801 ( Figure 15 The lower main surface is equipped with n-side electrodes 814.

[0260] Buffer layer 832 is an n-type semiconductor layer disposed above substrate 801. In this embodiment, buffer layer 832 is disposed between substrate 801 and boundary layer 833. Figure 18 As shown, buffer layer 832 is doped with an average concentration of 3.0 × 10⁻⁶. 17 cm －3 The n-type GaAs layer with an n-type impurity (Si) has a film thickness of 0.50 μm.

[0261] Boundary layer 833 is an n-type semiconductor layer disposed between buffer layer 832 and n-type cladding layer 802. In this embodiment, boundary layer 833 is doped with an average concentration of 2.0 × 10⁻⁶.18 cm －3 The n-type impurity (Si) film thickness is 0.05 μm in n-type Al. X Ga 1－X As layer (0.15≤X≤0.29). The Al composition ratio X of boundary layer 833 increases as it approaches the n-type coating layer 802. The Al composition ratio X of boundary layer 833 is 0.15 at the interface with buffer layer 832 and 0.29 at the interface with n-type coating layer 802.

[0262] The n-type cladding layer 802 is an n-type semiconductor layer disposed above the substrate 801. The average refractive index of the n-type cladding layer 802 is less than the average refractive index of the active layer 805. In this embodiment, the n-type cladding layer 802 is an n-type Al disposed on the boundary layer 833. 0.29 Ga 0.71 The As layer. More specifically, such as Figure 18 As shown, the n-type cladding layer 802 has an average doping concentration of 2.0 × 10⁻⁶. 18 cm －3 The n-type impurity (Si) film thickness is 2.50 μm in n-type Al. 0.29 Ga 0.71 The As layer, on which an average doping concentration of 5.0 × 10⁻⁶ is disposed, is also present. 17 cm －3 The n-type impurity (Si) film thickness is 0.20 μm in n-type Al. 0.29 Ga 0.71 The As layer, on which an average doping concentration of 2.0 × 10⁻⁶ is disposed, is also present. 17 cm －3 The n-type impurity (Si) film thickness is 0.30 μm in n-type Al. 0.29 Ga 0.71 An As layer, and doped with an average concentration of 1.0 × 10⁻⁶ on this layer. 17 cm －3 The n-type impurity (Si) film thickness is 0.20 μm in n-type Al. 0.29 Ga 0.71 As layer.

[0263] The first n-side guiding layer 803 is composed of Al v4 Ga 1－v4 P w4 As 1－w4 An example of an n-sided guiding layer composed of (0≤v4≤1, 0≤w4<1). In this embodiment, the first n-sided guiding layer 803 has a doping concentration of 3.5×10⁻⁶. 16 cm －3 The n-type impurity (Si) film thickness is 0.56 μm in n-type Al. 0.23 Ga0.77 The As layer, on which an average doping concentration of 3.5 × 10⁻⁶ is disposed, is also present. 17 cm －3 The n-type impurity (Si) film thickness is 0.32 μm in n-type Al. 0.21 Ga 0.79 An As layer, and doped with an average concentration of 1.0 × 10⁻⁶ on that layer. 17 cm －3 The n-type impurity (Si) film thickness is 0.020 μm in n-type Al. 0.15 Ga 0.85 As layer.

[0264] The hole blocking layer 840 is a semiconductor layer disposed above the n-type overlay layer 802. The hole blocking layer 840 functions to suppress hole leakage from the active layer 805 to the first n-side guiding layer 803. In this embodiment, as... Figure 15 As shown, the hole blocking layer 840 is disposed above the first n-side guiding layer 803 and has a first hole blocking layer 841a, a first intermediate layer 842a, a second hole blocking layer 841b, a second intermediate layer 842b, a third hole blocking layer 841c, a third intermediate layer 842c, a fourth hole blocking layer 841d, a fourth intermediate layer 842d and a fifth hole blocking layer 841e.

[0265] The first hole-blocking layer 841a is disposed above the n-type cladding layer 802, and is composed of (Al) x1 Ga 1－x1 ) y1 In 1－y1 A semiconductor layer composed of P(0≤x1≤1, 0≤y1≤1). In this embodiment, the first hole blocking layer 841a is disposed above the first n-side guiding layer 803.

[0266] The first intermediate layer 842a is disposed above the first hole blocking layer 841a, and is composed of Al x2 Ga 1－x2 P y2 As 1－y2 A semiconductor layer consisting of (0≤x2≤1, 0≤y2<1).

[0267] The second hole-blocking layer 841b is disposed above the first intermediate layer 842a, and is composed of (Al) x3 Ga 1－x3 ) y3 In 1－y3 A semiconductor layer composed of P(0≤x3≤1,0≤y3≤1).

[0268] The second intermediate layer 842b is disposed above the second hole blocking layer 841b, and is composed of Al x4 Ga1－x4 P y4 As 1－y4 A semiconductor layer consisting of (0≤x4≤1, 0≤y4<1).

[0269] The third hole-blocking layer 841c is disposed above the second intermediate layer 842b, and is composed of (Al) x5 Ga 1－x5 ) y5 In 1－y5 A semiconductor layer composed of P(0≤x5≤1, 0≤y5≤1).

[0270] The third intermediate layer 842c is disposed above the third hole blocking layer 841c, and is composed of Al x6 Ga 1－x6 P y6 As 1－y6 A semiconductor layer consisting of (0≤x6≤1, 0≤y6<1).

[0271] The fourth hole-blocking layer 841d is positioned above the third intermediate layer 842c and is composed of (Al) x7 Ga 1－x7 ) y7 In 1－y7 A semiconductor layer composed of P(0≤x7≤1,0≤y7≤1).

[0272] The fourth intermediate layer 842d is positioned above the fourth hole-blocking layer 841d and is composed of Al. x8 Ga 1－x8 P y8 As 1－y8 A semiconductor layer consisting of (0≤x8≤1, 0≤y8<1).

[0273] The fifth hole-blocking layer 841e is positioned above the fourth intermediate layer 842d and is composed of (Al) x9 Ga 1－x9 ) y9 In 1－y9 A semiconductor layer composed of P(0≤x9≤1,0≤y9≤1).

[0274] The average bandgap energy of the first hole blocking layer 841a, the second hole blocking layer 841b, the third hole blocking layer 841c, the fourth hole blocking layer 841d, and the fifth hole blocking layer 841e is greater than the average bandgap energy of the first intermediate layer 842a, the second intermediate layer 842b, the third intermediate layer 842c, and the fourth intermediate layer 842d.

[0275] In this embodiment, such as Figure 18As shown, the first hole blocking layer 841a, the second hole blocking layer 841b, the third hole blocking layer 841c, the fourth hole blocking layer 841d, and the fifth hole blocking layer 841e are each doped with an average concentration of 1.0 × 10⁻⁶. 17 cm －3 The n-type impurity (Si) film thickness is 0.004 μm. 0.12 Ga 0.88 ) 0.51 In 0.49 The p-layer. Additionally, the first intermediate layer 842a, the second intermediate layer 842b, the third intermediate layer 842c, and the fourth intermediate layer 842d are each doped with an average concentration of 1.0 × 10⁻⁶. 17 cm －3 The n-type impurity (Si) film thickness is 0.004 μm in n-type Al. 0.15 Ga 0.85 As layer.

[0276] In this embodiment, the second n-side guiding layer 804 is disposed between the hole blocking layer 840 and the active layer 805, and is composed of Al. v4 Ga 1－v4 P w4 As 1－w4 An example of an n-sided guiding layer consisting of (0≤v4≤1, 0≤w4<1). More specifically, such as... Figure 18 As shown, the second n-side guiding layer 804 is doped with an average concentration of 1.0 × 10⁻⁶. 17 cm －3 The n-type impurity (Si) film thickness is 0.020 μm in n-type Al. 0.15 Ga 0.85 As layer.

[0277] like Figure 17 As shown, the active layer 805 has a barrier layer 805a, a well layer 805b disposed above the barrier layer 805a, and a barrier layer 805c disposed above the well layer 805b. Figure 19 As shown, the barrier layer 805a involved in this embodiment is an undoped Al film with a thickness of 0.025 μm. 0.10 Ga 0.90 As layer. Well layer 805b is an undoped In film with a thickness of 0.0090 μm. 0.135 Ga 0.865 As layer. The barrier layer 805c is an undoped Al layer with a thickness of 0.025 μm. 0.10 Ga 0.90 As layer.

[0278] An electron blocking layer 809 is disposed between the active layer 805 and the p-type cladding layer 810, and is a semiconductor layer that acts as a potential barrier for electrons. In this embodiment, the electron blocking layer 809 is disposed above and in contact with the active layer 805. The electron blocking layer 809 is doped with an average concentration of 3.0 × 10⁻⁶. 16 cm －3 The p-type impurity (C) film thickness is 0.020 μm in p-type Al. 0.90 Ga 0.10 As layer.

[0279] p-side guiding layer 806 is made of Al v3 Ga 1－v3 P w3 As 1－w3 It consists of (0≤v3≤1, 0≤w3<1). More specifically, such as Figure 19 As shown, the p-side guiding layer 806 has: an undoped Al film with a thickness of 0.010 μm. 0.15 Ga 0.85 The As layer is the first layer; the layer above the first layer is doped with an average concentration of 3.0 × 10⁻⁶. 16 cm －3 The p-type impurity (C) film thickness is 0.020 μm in p-type Al. 0.25 Ga 0.75 The As layer is the second layer; the layer above the second layer is doped with an average concentration of 4.0 × 10⁻⁶. 16 cm －3 Above and 1.5×10 17 cm －3 The following p-type impurity (C) has a film thickness of 0.16 μm in p-type Al. Xp Ga 1－Xp The As layer (0.25≤Xp≤0.26), i.e., the third layer; and the doped layer above the third layer with an average concentration of 3.0×10⁻⁶. 16 cm －3 The p-type impurity (C) film thickness is 0.10 μm in p-type Al. 0.26 Ga 0.74 The As layer is the fourth layer. In the third layer, the Al component ratio and the concentration of p-type impurities increase with distance from the active layer 805.

[0280] p-type coating 810 is made of Al v6 Ga 1－v6 P w6 As 1－w6 It consists of (0≤v6≤1, 0≤w6<1). More specifically, such as Figure 19 As shown, the p-type cladding layer 810 has a doping concentration of 1.0 × 10⁻⁶. 18 cm －3The p-type impurity (C) film thickness is 0.05 μm in p-type Al. 0.75 Ga 0.25 An As layer; and doped with a concentration of 1.0 × 10⁻⁶ on this layer. 18 cm －3 The p-type impurity (C) film thickness is 0.10 μm in p-type Al. 0.85 Ga 0.15 As layer.

[0281] like Figure 19 As shown, the p-type contact layer 811 is doped with a concentration of 3.0 × 10⁻⁶. 19 cm －3 The p-type GaAs layer with a thickness of 0.10 μm contains p-type impurities (C).

[0282] A ridge 811R is formed in the second intermediate layer 442 and the p-type contact layer 811 of the semiconductor stack 800S. The ridge 811R is a portion that protrudes upward from the bottom surface 811Tb and extends along the Y-axis. The ridge 811R has an upper surface 811Rt and a side surface 811Rs. The side surface 811Rs is a surface in the surface of the ridge 811R that connects the upper surface 811Rt and the bottom surface 811Tb. The side surface 811Rs contacts the bottom surface 811Tb at the lower end 811Rb of the ridge.

[0283] In this embodiment, two protrusions 811P are formed in the semiconductor stack 800S. Each of the two protrusions 811P protrudes upward from the bottom surface 811Tb and extends along the Y-axis. A ridge 811R is disposed between the two protrusions 811P. Each of the two protrusions 811P has an upper surface 811Pt and a side surface 811Ps. A groove 811T is formed between each of the two protrusions 811P and the ridge 811R. The groove 811T is disposed along the ridge 811R and extends along the Y-axis. The side surface 811Ps is a surface in the surface of the protrusion 811P that connects the upper surface 811Pt and the bottom surface 811Tb. In this embodiment, the position of the upper surface 811Pt of the protrusion 811P in the stacking direction is the same as the position of the upper surface 811Rt of the ridge 811R in the stacking direction.

[0284] In this embodiment, the bottom surface 811Tb and the lower end of the ridge 811Rb are located on the top of the p-type covering layer 810 in the stacking direction.

[0285] The current blocking layer 812 is an insulating layer disposed above the p-type cladding layer 810. In this embodiment, the current blocking layer 812 is an insulating layer that is transmissive to light from the active layer 805. The current blocking layer 812 is disposed on the upper surface of the semiconductor stack 800S, at the end of the upper surface of the ridge 811R, and in the region other than the upper surface of the ridge 811R. In this embodiment, the current blocking layer 812 is a SiN layer with a thickness of 100 nm.

[0286] The p-side electrode 813 is a conductive layer disposed above the p-type contact layer 811. In this embodiment, the p-side electrode 813 is in contact with the p-type contact layer 811. The p-side electrode 813 contains at least one of Ag, Al, and Rh. In this embodiment, the p-side electrode 813 has an Ag layer with a thickness of 200 nm and a Pt layer with a thickness of 100 nm disposed on the Ag layer.

[0287] The pad electrode 822 is a pad-shaped electrode disposed above the p-side electrode 813. In this embodiment, the pad electrode 822 is disposed above the p-side electrode 813. In this embodiment, the pad electrode 822 is an Au layer with a film thickness of 2.0 μm.

[0288] The n-side electrode 814 is an electrode disposed on the lower surface of the substrate 801. The structure of the n-side electrode 814 is not particularly limited as long as it is conductive. As the n-side electrode 814, a multilayer film or the like can be used, including a 90 nm thick AuGe film, a 20 nm thick Ni film, a 50 nm thick Au film, a 100 nm thick Ti film, a 50 nm thick Pt film, a 50 nm thick Ti film, a 100 nm thick Pt film, and a 500 nm thick Au film, sequentially stacked from the substrate 801 side.

[0289] [8-2. Effects] In the semiconductor laser element 800 according to this embodiment, similar to the semiconductor laser element 100 according to Embodiment 1, the thickness of the p-side semiconductor outer layer 800u is smaller than the first interval between the well layer 805b closest to the n-type cladding layer 802 in at least one well layer of the active layer 805 and the n-type cladding layer 802, and the p-side electrode 813 includes at least one of Ag, Al, and Rh. Furthermore, the second interval between the well layer 805b closest to the p-side electrode 813 in at least one well layer of the active layer 805 and the p-side electrode 813 can be smaller than the first interval. Additionally, the thickness of the p-side semiconductor outer layer 800u can be smaller than the thickness of the p-side guiding layer 806. Here, the thickness of the p-side guiding layer 806 refers to an example of the thickness of one or more p-side guiding layers, from the p-side guiding layer closest to the active layer 805 to the p-side guiding layer furthest from the active layer 805.

[0290] Accordingly, in the semiconductor laser element 800 of this embodiment, similar to the semiconductor laser element 100 of Embodiment 1, the operating voltage and optical loss can be reduced.

[0291] The semiconductor laser element 800 according to this embodiment includes an electron blocking layer disposed above and in contact with the active layer 805.

[0292] Accordingly, electron leakage from the active layer 805 can be suppressed. Therefore, by increasing the recombination probability of electrons and holes in the active layer 805, the light output of the semiconductor laser element 800 can be improved.

[0293] The semiconductor laser element 800 according to this embodiment includes a hole blocking layer 840 disposed between an n-type cladding layer 802 and an active layer 805. The hole blocking layer 840 comprises: (Al) x1 Ga 1－x1 ) y1 In 1－y1 A first hole-blocking layer 841a composed of P(0≤x1≤1, 0≤y1≤1); and an Al-based structure disposed above the first hole-blocking layer 841a. x2 Ga 1－x2 P y2 As 1－y2 The first intermediate layer 842a, consisting of (0≤x2≤1, 0≤y2<1), and the layer above the first intermediate layer 842a, consisting of (Alx3Ga) 1－x3 )y3In 1－y3 The second hole blocking layer 841b, composed of P(0≤x3≤1,0≤y3≤1), has an average bandgap energy that is greater than that of the average bandgap energy of the first intermediate layer 842a.

[0294] Therefore, the potential barrier in the conduction band of the hole blocking layer 840 can be suppressed. Thus, the hole blocking layer 840 can suppress hole leakage from the active layer 805 to the n-type coating layer 802, while reducing the potential barrier for electrons in the hole blocking layer 840.

[0295] Furthermore, by including the first hole blocking layer 841a, the first intermediate layer 842a, and the second hole blocking layer 841b, two or more blocking layers targeting holes can be formed. Therefore, for example, compared to a semiconductor laser element that only has a single blocking layer targeting holes, leakage of holes from the active layer 805 to the n-type cladding layer 802 can be better suppressed.

[0296] In the hole blocking layer 840 according to this embodiment, by adjusting the P composition ratio of the first intermediate layer 842a to the fourth intermediate layer 842d, at least a portion of the lattice mismatch between the first intermediate layer 842a to the fourth intermediate layer 842d and the substrate 801 can be offset by utilizing the lattice mismatch between the first intermediate layer 842a to the fourth intermediate layer 842d and the substrate 801. Therefore, the stacking strain in the hole blocking layer 840 can be reduced. Accordingly, since crystal defects in the semiconductor laser element 800 can be reduced, the reliability of the semiconductor laser element 800 can be improved.

[0297] (Implementation Method 9) The semiconductor laser element according to Embodiment 9 will now be described. The semiconductor laser element according to this embodiment differs from the semiconductor laser element 400 according to Embodiment 4 in that no protrusions are formed in the semiconductor laminate, etc. The semiconductor laser element according to this embodiment will be described below focusing on the differences from the semiconductor laser element 400 according to Embodiment 4.

[0298] [9-1. Overall Composition] The following reference Figure 20 This will explain the overall structure of the semiconductor laser element involved in this embodiment. Figure 20 This is a schematic cross-sectional view showing the overall configuration of the semiconductor laser element 900 according to this embodiment. Figure 20 and Figure 2A Similarly, a cross-section of the semiconductor laser element 900 perpendicular to the Y-axis direction is shown.

[0299] like Figure 20As shown, the semiconductor laser element 900 according to this embodiment includes a semiconductor laminate 900S, a current blocking layer 112, a p-side electrode 913, a bonding layer 921, a pad electrode 922, and an n-side electrode 114. The semiconductor laminate 900S has a substrate 101, a base layer 431, a buffer layer 432, an n-type cladding layer 402, at least one n-side guiding layer, an active layer 405, and a p-side semiconductor layer 900p. An element separation groove 10T is formed on the side surface (end face in the X-axis direction) of the semiconductor laminate 900S.

[0300] The semiconductor laser element 900 has a first n-side guiding layer 403 and a second n-side guiding layer 404 as at least one n-side guiding layer.

[0301] The p-side semiconductor layer 900p has at least one p-side guiding layer, a first intermediate layer 441, an electron blocking layer 409, a second intermediate layer 442, and a p-side semiconductor outer layer 400u.

[0302] The semiconductor laser element 900 has a first p-side guiding layer 906 and a second p-side guiding layer 407 as at least one p-side guiding layer.

[0303] The first p-side guiding layer 906 is disposed between the active layer 405 and the electron blocking layer 409, and is an Al-containing nitride-based semiconductor layer. In this embodiment, the first p-side guiding layer 906 is disposed below the first intermediate layer 441. The average refractive index of the first p-side guiding layer 906 is greater than the average refractive index of at least one of the n-type cladding layer 402 and the p-type cladding layer 410, and its average bandgap energy is less than the average bandgap energy of at least one of them. In addition, the average bandgap energy of the first p-side guiding layer 906 is less than the average bandgap energy of the second intermediate layer 442 and the average bandgap energy of the uppermost (i.e., closest to the electron blocking layer 409) barrier layer among the plurality of barrier layers in the active layer 405. Accordingly, it is possible to facilitate the electrical conduction of electron holes from the p-type cladding layer 410 to the active layer 405. Therefore, the operating voltage of the semiconductor laser element 900 can be reduced.

[0304] In this embodiment, the average bandgap energy of the first p-side guiding layer 906 is less than the average bandgap energy of the first intermediate layer 441. The first p-side guiding layer 906 can be an AlGaInN layer. In this embodiment, the first p-side guiding layer 906 is an undoped Al film with a thickness of 20 nm. 0.04 Ga 0.947 In 0.013 N layers.

[0305] The p-type contact layer 411 is disposed above the p-type cladding layer 410 and is a p-type nitride semiconductor layer that forms an ohmic contact with the p-side electrode 113. In this embodiment, the p-type contact layer 411 has a doping concentration of 2.0 × 10⁻⁶. 19 cm －3 The film consists of a 30 nm thick p-type GaN layer of Mg, and doped with an average concentration of 2.0 × 10⁻⁶ Mg. 20 cm －3 The Mg film is a 10 nm thick p-type GaN layer.

[0306] A ridge 910R is formed in the first p-side guiding layer 906, the first intermediate layer 441, the electron blocking layer 409, the second intermediate layer 442, the second p-side guiding layer 407, the p-type cladding layer 410, and the p-type contact layer 411 of the semiconductor laminate 900S. The ridge 910R is a portion that protrudes upward from the bottom surface 910Tb and extends along the Y-axis. The ridge 910R has an upper surface 910Rt and a side surface 910Rs. The side surface 910Rs is a surface in the surface of the ridge 910R that connects the upper surface 910Rt and the bottom surface 910Tb. The side surface 910Rs contacts the bottom surface 910Tb at the lower end 910Rb of the ridge.

[0307] In this embodiment, no protrusions are formed in the semiconductor stack 900S. The bottom surface 910Tb involved in this embodiment is a flat surface extending from the lower end 910Rb of the ridge to the component separation groove 10T.

[0308] In this embodiment, the ridge width W is approximately 15 μm. Furthermore, the bottom surface 910Tb and the lower end of the ridge 910Rb are located in the stacking direction between the uppermost surface of the uppermost layer and the lowermost surface of the lowermost layer of at least one p-side guiding layer in the semiconductor laser element 900. More specifically, the bottom surface 910Tb and the lower end of the ridge 910Rb are located in the stacking direction between the uppermost surface and the lowermost surface of the first p-side guiding layer 906, which is the lowermost layer in the at least one p-side guiding layer of the semiconductor laser element 900. In this embodiment, the bottom surface 910Tb and the lower end of the ridge 910Rb are located 10 nm below the uppermost surface of the first p-side guiding layer 906.

[0309] The current blocking layer 112 is an insulating layer disposed above the p-side semiconductor layer 900p. In this embodiment, the current blocking layer 112 is transmissive to light from the active layer 405. Figure 20 As shown, the current blocking layer 112 is disposed on the upper surface of the semiconductor stack 900S, except for the upper surface 910Rt of the ridge 910R. More specifically, it is continuously formed on the side surface 910Rs, bottom surface 910Tb of the ridge 910R, and the component separation trench 10T.

[0310] The bonding layer 921 is a metal layer disposed between the current blocking layer 112 and the pad electrode 922. The bonding layer 921 has the function of improving the adhesion of the pad electrode 922. The bonding layer 921 is disposed on the bottom surface 910Tb via the current blocking layer 112. In this embodiment, the bonding layer 921 is disposed on a portion of the bottom surface 910Tb. The bonding layer 921 is not disposed in the region of the bottom surface 910Tb near the ridge 910R. That is, the bonding layer 921 is spaced apart from the current blocking layer 112 disposed on the side surface 910Rs of the ridge 910R. In this embodiment, the bonding layer 921 has a Ti layer with a film thickness of 10 nm disposed on the current blocking layer 112 and a Pt layer with a film thickness of 100 nm disposed on the Ti layer. It should be noted that in the bonding layer 921, a layer made of a laser-absorbing material such as Cr or Ni can also be used instead of the Ti layer.

[0311] The p-side electrode 913 is a conductive layer disposed above the p-side semiconductor layer 900p and in ohmic contact with the p-side semiconductor layer 900p. In this embodiment, the p-side electrode 913 is in ohmic contact with the outer p-side semiconductor layer 400µm. Figure 20 As shown, the p-side electrode 913 is not only disposed on the upper surface 910Rt of the ridge 910R of the p-type contact layer 411, but also continuously disposed on the side surface 910Rs and bottom surface 910Tb of the ridge 910R via the current blocking layer 112. In this embodiment, the p-side electrode 913 is also disposed on a portion of the region between the bonding layer 921 and the pad electrode 922. The p-side electrode 913 is located above and in contact with the current blocking layer 112 between the side surface 910Rs of the ridge 910R and the bonding layer 921. The p-side electrode 913 contains at least one of Ag, Al, and Rh.

[0312] The pad electrode 922 is a pad-shaped electrode disposed above the p-side electrode 913. In this embodiment, the pad electrode 922 is disposed above the p-side electrode 913 and the bonding layer 921. In this embodiment, the pad electrode 922 is an Au layer with a film thickness of 2.0 μm.

[0313] In the semiconductor laser element 900 according to this embodiment, since the lower end 910Rb of the ridge is located in the first p-side guiding layer 906 between the electron blocking layer 409 and the active layer 405, the distance between the lower end 910Rb of the ridge and the active layer 405 is further reduced compared to the semiconductor laser element 400 according to Embodiment 4. Furthermore, since the p-side electrode 913, made of Ag with a low refractive index, is formed on the current blocking layer 112 near the side surface 910Rs of the ridge 910R, the effective refractive index difference ΔN can be increased. With the increase of the effective refractive index difference ΔN, the proportion of light distribution outside the ridge 910R in the waveguide mode light distribution of the waveguide can be reduced. Thus, the generation of light components leaking into the substrate 101 can be suppressed.

[0314] Furthermore, the p-side electrode 913 is disposed above and in contact with the current blocking layer 112 between the side surface 910Rs of the ridge 910R and the adhering layer 921. That is, since the p-side electrode 913, made of Ag, is formed on the current blocking layer 112 near the side surface 910Rs of the ridge 910R, the distance between the p-side electrode 913 on the current blocking layer 112 near the side surface 910Rs of the ridge 910R and the active layer 405 is reduced. Therefore, the amount of spontaneous emission light emitted from the active layer 405 that is reflected back to the active layer 405 after being emitted from the p-side electrode 913 and reabsorbed is increased. As a result, quantum efficiency is improved, the oscillation threshold is reduced, and slope efficiency is improved.

[0315] (Variations, etc.) The semiconductor laser element involved in this disclosure has been described above based on various embodiments, but this disclosure is not limited to the above embodiments.

[0316] For example, in the embodiments described above, an example of a semiconductor laser element having a resonant cavity formed by two end faces is shown, but the semiconductor laser element is not limited to this. For example, the semiconductor laser element may also be a superluminescent diode. In this case, the reflectivity of the end face of the semiconductor stack of the semiconductor laser element can be 0.1% or less. This reflectivity can be achieved, for example, by forming an anti-reflection film made of a dielectric multilayer film or the like on the end face. Alternatively, if the ridge that serves as a waveguide is provided as an inclined stripe structure that is inclined at 5° or more to the normal direction of the front face and intersects the front face, the proportion of the waveguide light reflected from the front face that is coupled back to the waveguide to become waveguide light can be reduced to a small value of 0.1% or less.

[0317] Furthermore, although the semiconductor laser devices involved in the above embodiments have electron blocking layers and current blocking layers, they are not necessarily required to have these layers.

[0318] Furthermore, any form obtained by performing various modifications to the above embodiments that can be conceived by those skilled in the art, or any form achieved by arbitrarily combining the constituent elements and functions of the above embodiments without departing from the spirit of this disclosure, is included in this disclosure.

[0319] Industrial availability The semiconductor laser element disclosed herein can be used, for example, as a high-output and high-efficiency light source for use in processing machines.

[0320] Explanation of reference numerals in the attached figures 10T Component Separation Tank 100, 200, 300, 400, 500, 600, 700, 800, 900 semiconductor laser elements 100F, 100R end faces 100p, 200p, 300p, 400p, 500p, 600p, 700p, 800p, 900p p-side semiconductor layer 100S, 200S, 300S, 400S, 500S, 600S, 700S, 800S, 900S semiconductor laminates 100u, 200u, 400u, 800u p-side semiconductor outer layer 101, 801 substrates 102, 402, 802 n-type coating 103, 403, 803 First n-side guiding layer 104, 204, 404, 804 Second n-side guiding layer 105, 205, 405, 605, 805 active layers 105a, 105c, 105e, 205a, 205c, 205e, 405a, 405c, 605c, 805a, 805c barrier layers 105b, 105d, 205b, 205d, 405b, 805b well layers 106, 206, 306, 406, 606, 906 First p-side guiding layer 107, 407, 507 Second p-side guiding layer 108, 308 Third p-side guiding layer 109, 409, 809 electron blocking layers 110, 210, 410, 810 p-type coating 110P, 210P, 308P, 410P, 507P, 811P protrusions 110Ps, 110Rs, 210Ps, 210Rs, 308Ps, 308Rs, 410Ps, 410Rs, 507Ps, 507Rs, 811Ps, 811Rs, 910Rs (Side view) Upper surfaces of 110Pt, 110Rt, 210Pt, 210Rt, 308Pt, 308Rt, 410Pt, 410Rt, 507Pt, 507Rt, 811Pt, 811Rt, and 910Rt 110R, 210R, 308R, 410R, 507R, 811R, 910R (spine section) 110Rb, 210Rb, 308Rb, 410Rb, 507Rb, 811Rb, 910Rb Lower end of the ridge 110T, 210T, 308T, 410T, 507T, 811T trenches 110Tb, 210Tb, 308Tb, 410Tb, 507Tb, 811Tb, 910Tb Bottom 111, 211, 311, 411, 511, 811 p-type contact layer 112, 812 Current blocking layer 113, 613, 813, 913 p-side electrodes 114, 814 n-side electrodes 421, 921 Adhesive Layer 422, 822, 922 pad electrodes 431 Basal layer 432, 832 Buffer Layer 441 First Intermediate Layer 442 Second Intermediate Layer 605c1 inner barrier layer 605c2 outer barrier layer 806 p-side guiding layer 833 Boundary Layer 840 Hole-blocking layer 841a First Hole Blocking Layer 841b Second Cavity Blocking Layer 841c Third Cavity Blocking Layer 841d Fourth Hole Blocking Layer 841e Fifth Cavity Blocking Layer 842a First Intermediate Layer 842b Second Intermediate Layer 842c Third Intermediate Layer 842d Fourth intermediate layer.

Claims

1. A semiconductor laser element, The semiconductor laser element comprises: n-type coating layer; At least one n-side guide layer disposed above the n-type overlay layer; An active layer disposed above the at least one n-side guiding layer; A p-side semiconductor layer disposed above the active layer; as well as A p-side electrode is disposed above the p-side semiconductor layer and in ohmic contact with the p-side semiconductor layer. The active layer has at least one well layer. The second spacing between the well layer closest to the n-type cladding layer and the p-side electrode in the at least one well layer is smaller than the first spacing between the well layer and the n-type cladding layer. The p-side electrode contains at least one of Ag, Al, and Rh.

2. The semiconductor laser element as described in claim 1, The p-side semiconductor layer has: At least one p-side guiding layer; and A p-side semiconductor outer layer disposed above and in contact with the at least one p-side guiding layer.

3. The semiconductor laser element as described in claim 2, The thickness of the outer layer of the p-side semiconductor is less than the thickness of the p-side guiding layer from the p-side guiding layer closest to the active layer to the p-side guiding layer farthest from the active layer in the at least one p-side guiding layer.

4. The semiconductor laser element as described in claim 1, The p-side semiconductor layer has at least one p-side guiding layer. The p-side electrode and the at least one p-side guiding layer are in ohmic contact.

5. A semiconductor laser element, The semiconductor laser element comprises: n-type coating layer; At least one n-side guide layer disposed above the n-type overlay layer; An active layer disposed above the at least one n-side guiding layer; At least one p-side guiding layer is disposed above the active layer; A p-side semiconductor outer layer disposed above and in contact with the at least one p-side guiding layer; as well as The p-side electrode is disposed above the outer layer of the p-side semiconductor and in ohmic contact with the outer layer of the p-side semiconductor. The thickness of the outer layer of the p-side semiconductor is less than the thickness of the p-side guiding layer from the p-side guiding layer closest to the active layer to the p-side guiding layer farthest from the active layer in the at least one p-side guiding layer. The p-side electrode contains at least one of Ag, Al, and Rh.

6. A semiconductor laser element, The semiconductor laser element comprises: n-type coating layer; At least one n-side guide layer disposed above the n-type overlay layer; An active layer disposed above the at least one n-side guiding layer; At least one p-side guiding layer is disposed above the active layer; A p-side semiconductor outer layer disposed above and in contact with the at least one p-side guiding layer; as well as The p-side electrode is disposed above the outer layer of the p-side semiconductor and in ohmic contact with the outer layer of the p-side semiconductor. The active layer has at least one well layer. The thickness of the outer layer of the p-side semiconductor is less than the first interval between the at least one well layer closest to the n-type cladding layer and the n-type cladding layer. The p-side electrode contains at least one of Ag, Al, and Rh.

7. The semiconductor laser element as described in any one of claims 2 to 6, The at least one p-side guiding layer has an inner guiding layer configured at the position closest to the active layer.

8. The semiconductor laser element as described in claim 7, The at least one p-side guiding layer has an outer guiding layer disposed at a position closest to the p-side electrode. The semiconductor laser element also includes an electron blocking layer disposed between the outer guiding layer and the inner guiding layer.

9. The semiconductor laser element as described in any one of claims 2 to 7, One of the at least one p-side guiding layers is an undoped semiconductor layer.

10. The semiconductor laser element according to any one of claims 2, 3, 5, and 6, The p-side semiconductor outer layer has a p-type contact layer that contacts the p-side electrode.

11. The semiconductor laser element according to any one of claims 2, 3, 5, 6, and 10, The outer layer of the p-side semiconductor has an electron blocking layer.

12. The semiconductor laser element according to any one of claims 2, 3, 5, 6, 10, and 11, The outer layer of the p-side semiconductor has a p-type cladding layer.

13. The semiconductor laser element according to any one of claims 1 to 7, 9, and 10, The semiconductor laser element has an electron blocking layer disposed above and in contact with the active layer.

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