Voltage comparison circuit and current detection system

Abstract

The invention provides a voltage comparison circuit. The voltage comparison circuit comprises a voltage comparator, a voltage control circuit and a reference voltage variable circuit, the voltage comparator compares an input voltage with a reference voltage and outputs a first output voltage corresponding to the comparison result. The voltage control circuit receives the first output voltage and generates a second output voltage. The reference voltage variable circuit receives the second output voltage and outputs the corresponding reference voltage to the voltage comparator. When the input voltage is greater than or equal to the reference voltage, the first output voltage becomes zero, the second output voltage becomes a supply voltage, and the reference voltage becomes a reference voltage lower limit. When the input voltage is smaller than the reference voltage, the first output voltage becomes the supply voltage, the second output voltage becomes zero, and the reference voltage becomes a reference voltage upper limit.

Description

Technical Field

[0001] This invention relates to a voltage comparison circuit, and more particularly to a voltage comparison circuit capable of automatically adjusting the output voltage, and a current detection system using the aforementioned voltage comparison circuit. Background Technology

[0002] Typically, circuit systems include microcontrollers to detect system current. This allows the microcontroller to reduce system performance to prevent damage when current is too high, and to increase performance when current is too low. However, since system current variations are not constant, placing the microcontroller near the detection point can cause it to frequently adjust system performance, potentially compressing other microcontroller functions and affecting other system operations. Therefore, a new solution is needed to address these issues. Summary of the Invention

[0003] According to an embodiment of this disclosure, a voltage comparison circuit is provided, including a voltage comparator, a voltage control circuit, and a variable reference voltage circuit. The voltage comparator is configured to compare an input voltage and a reference voltage, and output a first output voltage corresponding to the comparison result. The voltage control circuit is configured to receive the first output voltage and generate a second output voltage. The variable reference voltage circuit is configured to receive the second output voltage and output the corresponding reference voltage to the voltage comparator. Wherein, when the input voltage is greater than or equal to the reference voltage, the first output voltage becomes zero, the second output voltage becomes equal to a supply voltage, and the reference voltage becomes equal to a lower reference voltage limit. Wherein, when the input voltage is less than the reference voltage, the first output voltage becomes equal to the supply voltage, the second output voltage becomes zero, and the reference voltage becomes equal to an upper reference voltage limit.

[0004] According to an embodiment of this disclosure, a current detection system is further provided, including the aforementioned voltage comparison circuit, a detection resistor, a current detection circuit, a first system circuit, and a second system circuit. The current detection circuit is configured to detect an input current flowing through the detection resistor and convert the input current into an input voltage for output to the voltage comparison circuit. The first system circuit is configured to receive the first output voltage, and the second system circuit is configured to receive the second output voltage. Wherein, when the first output voltage is equal to zero and the second output voltage is equal to the supply voltage, the first system circuit and the second system circuit perform a frequency reduction operation, causing the input current to decrease. Wherein, when the first output voltage is equal to the supply voltage and the second output voltage is equal to zero, the first system circuit and the second system circuit perform a frequency increase operation, causing the input current to increase. Attached Figure Description

[0005] Figure 1 This is a block diagram of a voltage comparison circuit described according to an embodiment of the present disclosure.

[0006] Figure 2 This is a circuit diagram of one example of a voltage comparison circuit described according to embodiments of the present disclosure.

[0007] Figure 3 This is a hysteresis curve diagram described according to embodiments of the present disclosure.

[0008] Figure 4 This is a timing diagram of multiple voltages as described in the embodiments of this disclosure.

[0009] Figure 5 This is a block diagram of a current detection system described according to an embodiment of the present disclosure. Detailed Implementation

[0010] Several embodiments are described herein with reference to the accompanying illustrations, in which similar reference numerals are used to denote similar or equivalent components. The illustrations are not necessarily drawn to scale and are for illustrative purposes only, illustrating aspects and features of this disclosure. Numerous specific details, relationships, and methods are set forth to provide a complete understanding of particular aspects and features of this disclosure; however, those skilled in the art will understand that these aspects and features can be practiced without one or more of the aforementioned specific details, in other relationships, or using other methods. In some instances, well-known structures or operations are not shown in detail for illustrative purposes. The various embodiments disclosed herein are not necessarily limited to the illustrative order of actions or events; some actions may occur in a different order and / or simultaneously with other actions or events. Furthermore, not all illustrative actions are necessary to implement particular aspects and features of this disclosure.

[0011] Figure 1 This is a block diagram of a voltage comparison circuit 100 described according to an embodiment of the present disclosure. For example... Figure 1 As shown, the voltage comparison circuit 100 includes a voltage comparator 110, a voltage control circuit 120, and a reference voltage variable circuit 130. A supply voltage Vcc is configured to serve as the power supply for the voltage comparator 110, the voltage control circuit 120, and the reference voltage variable circuit 130. The voltage comparator 110 is configured to receive an input voltage Vin and a reference voltage Vref, and output an output voltage Vout1. When the input voltage Vin is greater than or equal to the reference voltage Vref, the output voltage Vout1 is zero. When the input voltage Vin is less than the reference voltage Vref, the output voltage Vout1 is the supply voltage Vcc.

[0012] Voltage control circuit 120 is configured to be coupled to voltage comparator 110 to receive output voltage Vout1 and output an output voltage Vout2. Reference voltage variable circuit 130 is configured to be coupled to voltage control circuit 120 to receive output voltage Vout2 and output a reference voltage Vref. The reference voltage Vref is then output to voltage comparator 110, which in turn compares the input voltage Vin with the reference voltage Vref, thereby achieving automatic voltage regulation. Detailed operation of voltage comparator circuit 100 will be described below. Figure 3 and Figure 4 Please provide an explanation.

[0013] Figure 2 This is a circuit diagram of one example of a voltage comparison circuit 100 described according to embodiments of the present disclosure. Figure 2 As shown, voltage comparator 110 includes a comparator 112 and a resistor R1. Comparator 112 has a negative input terminal (labeled "-"), a positive input terminal (labeled "+"), and an output terminal OUT. The negative input terminal is configured to receive an input voltage Vin, the positive input terminal is configured to receive a reference voltage Vref, and the output terminal OUT outputs an output voltage Vout1. One end of resistor R1 is coupled to the supply voltage Vcc, and the other end is coupled to the output terminal OUT. Therefore, when the input voltage Vin is greater than or equal to the reference voltage Vref, the output terminal OUT of comparator 112 is coupled to ground, making the output voltage Vout1 equal to zero. When the input voltage Vin is less than the reference voltage Vref, the output terminal OUT of comparator 112 is coupled to the supply voltage Vcc through resistor R1, making the output voltage Vout1 equal to the supply voltage Vcc.

[0014] like Figure 2As shown, the voltage control circuit 120 includes a transistor M1 and a resistor R2, wherein the transistor M1 can be an N-type metal-oxide semiconductor transistor (NMOS). A gate terminal G1 of transistor M1 is coupled to the output terminal OUT of comparator 112 to receive the output voltage Vout1. A drain terminal D1 of transistor M1 is configured to output the output voltage Vout2 to the reference voltage variable circuit 130, while a source terminal S1 of transistor M1 is coupled to ground. One end of resistor R2 is coupled to the supply voltage Vcc, and the other end is coupled to the drain terminal of transistor M1. When the output voltage Vout1 is zero, transistor M1 is not turned on, and the drain terminal D1 of transistor M1 is coupled to the supply voltage Vcc through resistor R2, making the output voltage Vout2 equal to the supply voltage Vcc. When the output voltage Vout1 is equal to the supply voltage Vcc, transistor M1 is turned on, making the drain terminal D1 of transistor M1 coupled to ground through transistor M1, thereby making the output voltage Vout2 equal to zero.

[0015] like Figure 2 As shown, the variable reference voltage circuit 130 includes a transistor M2 and multiple resistors R3, R4, and R5, wherein transistor M2 may be an NMOS. A gate terminal G2 of transistor M2 is coupled to the drain terminal D1 of transistor M1 to receive the output voltage Vout2. A drain terminal D2 of transistor M2 is coupled to one end of resistor R3, while a source terminal S2 of transistor M2 is coupled to ground. The other end of resistor R3 is coupled to a node N1. One end of resistor R4 is coupled to the supply voltage Vcc, and the other end is coupled to node N1. One end of resistor R5 is coupled to node N1, and the other end is coupled to ground.

[0016] When the output voltage Vout2 is zero, transistor M2 is not turned on. Resistors R4 and R5 divide the supply voltage Vcc to generate a reference voltage Vref. This reference voltage Vref is the maximum input voltage Vin_H (i.e., the upper limit of the reference voltage), as shown in the following formula:

[0017]

[0018] When the output voltage Vout2 equals the supply voltage Vcc, transistor M2 turns on, and one end of resistor R3 is coupled to ground through transistor M2. Therefore, resistors R3, R4, and R5 divide the supply voltage Vcc to generate a reference voltage Vref, and this reference voltage Vref is a minimum input voltage Vin_L (i.e., the lower limit of the reference voltage), as shown in the following formula:

[0019]

[0020] Figure 3 This is a hysteresis curve 300 described according to an embodiment of the present disclosure. For the output voltage Vout1, in one embodiment, if the initial input voltage Vin is greater than or equal to the maximum input voltage Vin_H, then the output voltage Vout1 is zero, and it will not change from zero to the supply voltage Vcc until the input voltage Vin drops to the minimum input voltage Vin_L. Then, if the input voltage Vin continues to decrease, the output voltage Vout1 remains at the supply voltage Vcc. Conversely, if the input voltage Vin increases, the output voltage Vout1 will not change from the supply voltage Vcc to zero until the input voltage Vin rises to the maximum input voltage Vin_H. In another embodiment, if the initial input voltage Vin is less than the minimum input voltage Vin_L, then the output voltage Vout1 is equal to the supply voltage Vcc, and it will not change from the supply voltage Vcc to zero until the input voltage Vin rises to the maximum input voltage Vin_H. Then, if the input voltage Vin continues to increase, the output voltage Vout1 remains zero. Conversely, if the input voltage Vin decreases, the output voltage Vout1 will not change from zero to the supply voltage Vcc until the input voltage Vin decreases to the minimum input voltage Vin_L.

[0021] Referring again to the figures. For the output voltage Vout2, in one embodiment, if the initial input voltage Vin is greater than or equal to the maximum input voltage Vin_H, then the output voltage Vout2 is equal to the supply voltage Vcc, and Vout2 will not change from the supply voltage Vcc to zero until the input voltage Vin drops to the minimum input voltage Vin_L. Then, if the input voltage Vin continues to decrease, the output voltage Vout2 remains zero. Conversely, if the input voltage Vin increases, then the output voltage Vout2 will not change from zero to the supply voltage Vcc until the input voltage Vin rises to the maximum input voltage Vin_H. In another embodiment, if the initial input voltage Vin is less than the minimum input voltage Vin_L, then the output voltage Vout2 is equal to zero, and Vout2 will not change from zero to the supply voltage Vcc until the input voltage Vin rises to the maximum input voltage Vin_H. Then, if the input voltage Vin continues to increase, the output voltage Vout2 remains at the supply voltage Vcc. Conversely, if the input voltage Vin decreases, the output voltage Vout2 will not change from the supply voltage Vcc to zero until the input voltage Vin drops to the minimum input voltage Vin_L.

[0022] Figure 4This is a timing diagram 400 for multiple voltages described according to embodiments of the present disclosure. The detailed operation of the voltage comparison circuit 100 is explained using the characteristics presented by the hysteresis curve 300, in conjunction with the voltage changes shown in the timing diagram 400. For example... Figure 4 As shown, before a time t1, the input voltage Vin is greater than the minimum input voltage Vin_L, but less than the maximum input voltage Vin_H, and the reference voltage Vref is equal to the supply voltage Vcc. At this time, the input voltage Vin is less than the reference voltage Vref, making the output voltage Vout1 equal to the supply voltage Vcc, transistor M1 is turned on, and therefore the output voltage Vout2 is equal to zero.

[0023] Then, at time t1, the input voltage Vin rises to be greater than or equal to the maximum input voltage Vin_H, and the reference voltage Vref is equal to the maximum input voltage Vin_H. At this time, the input voltage Vin is greater than or equal to the reference voltage Vref, causing the output voltage Vout1 to change from the supply voltage Vcc to zero, and transistor M1 is not turned on. Therefore, the output voltage Vout2 changes from zero to the supply voltage Vcc, and transistor M2 turns on. At this time, the reference voltage Vref is equal to the minimum input voltage Vin_L generated by the voltage divider of the supply voltage Vcc by resistors R3, R4, and R5.

[0024] At times t2 and t4, the input voltage Vin drops from greater than or equal to the maximum input voltage Vin_H to less than the minimum input voltage Vin_L, and the reference voltage Vref is equal to the minimum input voltage Vin_L. At this point, the input voltage Vin is less than the reference voltage Vref (i.e., the condition of "dropping to the minimum input voltage Vin_L" has been met), causing the output voltage Vout1 to change from zero to the supply voltage Vcc, and transistor M1 to turn on. Therefore, the output voltage Vout2 changes from the supply voltage Vcc to zero, and transistor M2 does not turn on. At this time, the reference voltage Vref is equal to the maximum input voltage Vin_H generated by the voltage divider of the supply voltage Vcc by resistors R4 and R5.

[0025] At times t3 and t5, the input voltage Vin rises to a level greater than or equal to the maximum input voltage Vin_H, and the reference voltage Vref is equal to the maximum input voltage Vin_H. At this point, the input voltage Vin is greater than or equal to the reference voltage Vref (i.e., the condition of "rising to the maximum input voltage Vin_H" has been met), causing the output voltage Vout1 to change from the supply voltage Vcc to zero. Transistor M1 is not conducting, therefore the output voltage Vout2 changes from zero to the supply voltage Vcc, and transistor M2 conducts. At this time, the reference voltage Vref is equal to the minimum input voltage Vin_L generated by the voltage divider formed by resistors R3, R4, and R5 on the supply voltage Vcc.

[0026] It should be noted that during the time interval t3 to t4, the input voltage Vin switches multiple times between two states: greater than or equal to the maximum input voltage Vin_H, and less than the maximum input voltage Vin_H but greater than the minimum input voltage Vin_L. However, due to the hysteresis curve characteristic of the voltage comparator circuit 100 (Figure 200), when the input voltage Vin changes from Vin≥Vin_H to Vin_H>Vin>Vin_L, the reference voltage Vref and output voltages Vout1 and Vout2 do not change. Conversely, when the input voltage Vin changes from Vin_H>Vin>Vin_L to Vin≥Vin_H, the reference voltage Vref does not change. Furthermore, since the input voltage Vin does not experience a drop below the minimum input voltage Vin_L, the output voltages Vout1 and Vout2 also do not change.

[0027] Figure 5 This is a block diagram of a current detection system 400 described according to an embodiment of the present disclosure. The current detection system 400 includes a current detection circuit 410, a detection resistor RD, a voltage comparison circuit 100, a first system circuit 420, and a second system circuit 430. The current detection system 400 receives an input current Iin and provides it to the first system circuit 420 and the second system circuit 430, which are functional blocks. The current detection circuit 410 measures the input current Iin through nodes N2 and N3 via the detection resistor RD, converts it into a corresponding detection voltage VD, multiplies it by a gain Av, generates an input voltage Vin, and outputs it to the voltage comparison circuit 100.

[0028] Next, the voltage comparator circuit 100 generates output voltages Vout1 and Vout2, as well as a new reference voltage Vref, based on the currently received input voltage Vin and the default reference voltage Vref (i.e., the reference voltage Vref when the input voltage Vin is absent or zero). The output voltages Vout1 and Vout2 are then output to the first system circuit 420 and the second system circuit 430, respectively, to control the frequency down-conversion and / or frequency up-conversion operations of the first system circuit 420 and the second system circuit 430.

[0029] For example, when the input current Iin is greater than or equal to 9A, the first system circuit 420 and the second system circuit 430 need to perform frequency reduction operation, while when the input current Iin is less than 4A, the first system circuit 420 and the second system circuit 430 need to perform frequency increase operation. In some embodiments, the relationship between the input voltage Vin and the input current Iin is Vin = Iin x 0.2. Therefore, when the input current Iin is 9A, the input voltage Vin is 1.8V, and when the input current Iin is 4A, the input voltage Vin is 0.8V. At this time, by adjusting the supply voltage Vcc and the resistance values ​​of resistors R3, R4, and R5, the default reference voltage Vref (i.e., the maximum input voltage Vin_H) corresponding to the maximum frequency modulation value of the input current Iin (current value of 9A, corresponding voltage of 1.8V) and the minimum input voltage Vin_L corresponding to the minimum frequency modulation value of the input current Iin (current value of 4A, corresponding voltage of 0.8V) can be obtained.

[0030] When the input current Iin is greater than 9A, the input voltage Vin will rise to greater than or equal to 1.8V (that is, greater than or equal to the reference voltage Vref with the maximum input voltage Vin_H). At this time, the output voltage Vout1 is equal to zero, and the output voltage Vout2 is equal to the supply voltage Vcc. The output voltages Vout1 and Vout2 are output to the first system circuit 420 and the second system circuit 430 respectively for frequency reduction and / or frequency increase operations. By configuring the first system circuit 420 to reduce the frequency when the output voltage Vout1 is zero, and configuring the second system circuit 430 to reduce the frequency when the output voltage Vout2 is equal to the supply voltage Vcc, the first system circuit 420 and the second system circuit 430 can be simultaneously reduced when the input current Iin is greater than 9A, thereby reducing the input current Iin.

[0031] Conversely, when the input current Iin is less than 4A, the input voltage Vin will drop to less than 0.8V (that is, less than the reference voltage Vref with the minimum input voltage Vin_L). At this time, the output voltage Vout1 is equal to the supply voltage Vcc, and the output voltage Vout1 is zero. Since the first system circuit 420 is configured to down-clock when the output voltage Vout1 is zero, and the second system circuit 430 is configured to down-clock when the output voltage Vout2 is equal to the supply voltage Vcc, when the output voltage Vout1 is equal to the supply voltage Vcc and the output voltage Vout1 is zero, the first system circuit 420 and the second system circuit 430 can be up-clocked simultaneously (that is, restored to the operating efficiency before down-clocking), thereby achieving the effect of increasing the input current Iin.

[0032] The voltage comparison circuit 100 provided in this disclosure can automatically adjust the output voltages Vout1, Vout2, and the reference voltage Vref for the next comparison based on the current input voltage Vin and the reference voltage Vref. If the current input voltage Vin is greater than or equal to the current reference voltage Vref, the output voltage Vout1 is zero, the output voltage Vout2 is equal to the supply voltage Vcc, and the next reference voltage Vref is equal to the minimum input voltage Vin_L (i.e., the lower limit of the reference voltage). If the current input voltage Vin is less than the current reference voltage Vref, the output voltage Vout1 is equal to the supply voltage Vcc, the output voltage Vout2 is zero, and the next reference voltage Vref is equal to the maximum input voltage Vin_H (i.e., the upper limit of the reference voltage).

[0033] This disclosure further provides a current detection system, including a voltage comparator circuit 100, a current detection circuit, a detection resistor, and system circuitry. The current detection circuit obtains a detection voltage VD through the detection resistor, multiplies it by a gain Av to generate an input voltage Vin, and outputs it to the voltage comparator circuit 100. Then, after performing the operations described in this disclosure, the voltage comparator circuit 100 generates output voltages Vout1 and Vout2, which are output to different system circuits respectively. This allows the system circuits to down-clock and / or up-clock, achieving automatic adjustment of the input current Iin without the need for an additional microcontroller.

[0034] [Symbol Explanation]

[0035] 100: Voltage Comparator Circuit

[0036] 110: Voltage comparator

[0037] 112: Comparator

[0038] 120: Voltage control circuit

[0039] 130: Variable reference voltage circuit

[0040] 200: Hysteresis Curve

[0041] 300: Timing Diagram

[0042] 400: Current Detection System

[0043] 410: Current detection circuit

[0044] 420: First System Circuit

[0045] 430: Second system circuit

[0046] Vcc: Supply voltage

[0047] Vin: Input voltage

[0048] Vout1, Vout2: Output voltage

[0049] Vref: Reference voltage

[0050] OUT: Output terminal

[0051] M1, M2: Transistors

[0052] G1, G2: Gate terminals

[0053] D1, D2: Leakage extremes

[0054] S1, S2: Source extremes

[0055] R1, R2, R3, R4, R5: Resistors

[0056] N1, N2, N3: Nodes

[0057] Vin_L: Minimum input voltage

[0058] Vin_H: Maximum input voltage

[0059] t1, t2, t3, t4, t5: Time

[0060] Iin: Input current

[0061] RD: Sensing resistor

Claims

1. A voltage comparator circuit, comprising: A voltage comparator is configured to compare an input voltage and a reference voltage and output a first output voltage corresponding to the comparison result; A voltage control circuit is configured to receive the first output voltage and generate a second output voltage; and A variable reference voltage circuit is configured to receive the second output voltage and output the corresponding reference voltage to the voltage comparator. When the input voltage is greater than or equal to the reference voltage, the first output voltage becomes zero, the second output voltage becomes a supply voltage, and the reference voltage becomes a lower limit of the reference voltage. When the input voltage is less than the reference voltage, the first output voltage becomes the supply voltage, the second output voltage becomes zero, and the reference voltage becomes an upper limit of the reference voltage.

2. The voltage comparator circuit as claimed in claim 1, wherein the voltage comparator comprises: A comparator has a negative input terminal, a positive input terminal and an output terminal, wherein the negative input terminal is configured to receive the input voltage, the positive input terminal is configured to receive the reference voltage, and the output terminal is configured to output the first output voltage. as well as A first resistor has a first terminal and a second terminal, wherein the first terminal is configured to be coupled to the supply voltage and the second terminal is configured to be coupled to the output terminal.

3. The voltage comparison circuit as described in claim 2, wherein the voltage control circuit comprises: A first transistor has a first gate terminal, a first drain terminal, and a first source terminal, wherein the first gate terminal is coupled to the output terminal of the comparator, the first drain terminal is configured to output the second output signal, and the first source terminal is coupled to ground; and A second resistor has a third terminal and a fourth terminal, wherein the third terminal is coupled to the supply voltage and the fourth terminal is coupled to the first drain terminal.

4. The voltage comparison circuit as described in claim 3, wherein the variable reference voltage circuit comprises: A second transistor has a second gate terminal, a second drain terminal and a second source terminal, wherein the second gate terminal is coupled to the first drain terminal of the first transistor, and the second source terminal is coupled to ground. A third resistor has a fifth terminal and a sixth terminal, wherein the fifth terminal is coupled to the second drain terminal of the second transistor, and the sixth terminal is coupled to a first node. A fourth resistor has a seventh terminal and an eighth terminal, wherein the seventh terminal is coupled to the supply voltage and the eighth terminal is coupled to the first node. as well as A fifth resistor has a ninth terminal and a tenth terminal, wherein the ninth terminal is coupled to the first node and the tenth terminal is coupled to ground. The aforementioned variable reference voltage circuit outputs the aforementioned reference voltage from the aforementioned first node.

5. The voltage comparison circuit as described in claim 1, wherein: When the input voltage is greater than or equal to the upper limit of the reference voltage, in response to the input voltage dropping to the lower limit of the reference voltage, the first output voltage changes from zero to the supply voltage, and the second output voltage changes from the supply voltage to zero. as well as After the input voltage drops to the lower limit of the reference voltage, in response to the input voltage rising to the upper limit of the reference voltage, the first output voltage changes from the supply voltage to zero, and the second output voltage changes from zero to the supply voltage.

6. The voltage comparison circuit as claimed in claim 5, wherein when the input voltage is greater than or equal to the upper limit of the reference voltage, in response to the increase of the input voltage, the first output voltage is maintained at zero, and the second output voltage is maintained at equal to the supply voltage.

7. The voltage comparator circuit as described in claim 1, wherein: When the input voltage is less than the lower limit of the reference voltage, in response to the input voltage rising to the upper limit of the reference voltage, the first output voltage changes from the supply voltage to zero, and the second output voltage changes from zero to the supply voltage. as well as After the input voltage rises to the upper limit of the reference voltage, in response to the input voltage falling to the lower limit of the reference voltage, the first output voltage changes from zero to the supply voltage, and the second output voltage changes from the supply voltage to zero.

8. The voltage comparison circuit of claim 7, wherein when the input voltage is less than the lower limit of the reference voltage, in response to the decrease in the input voltage, the first output voltage is maintained equal to the supply voltage, and the second output voltage is maintained at zero.

9. The voltage comparison circuit as described in claim 4, wherein the first transistor and the second transistor are N-type metal-oxide-semiconductor transistors (NMOS).

10. A current detection system, comprising: The voltage comparison circuit as described in claim 1; One detection resistor; A current detection circuit is configured to detect an input current flowing through the detection resistor and convert the input current into an input voltage to be output to the voltage comparison circuit. A first system circuit is configured to receive the aforementioned first output voltage; as well as A second system circuit is configured to receive the aforementioned second output voltage. When the first output voltage is equal to zero and the second output voltage is equal to the supply voltage, the first system circuit and the second system circuit perform frequency reduction operation, thereby reducing the input current. as well as When the first output voltage is equal to the supply voltage and the second output voltage is zero, the first system circuit and the second system circuit perform frequency upsampling operation, causing the input current to increase.

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