High-frequency switching voltage clamped interleaved three-level ANPC inverter and its control method

Abstract

This invention discloses a high-frequency switching voltage clamped interleaved three-level ANPC inverter, comprising a DC bus capacitor, a power frequency bridge arm, a low-frequency bridge arm, a high-frequency bridge arm, a low-frequency inductor, and a high-frequency inductor; the power frequency bridge arm includes a switch. S w1 , S w2 , S w3 and S w4 The input terminal of the power frequency bridge arm is connected to a DC voltage, and its midpoint is connected to one of the AC output terminals. Switch. S w1 , S w2 Midpoint and switch S w3 , S w4 The midpoints are independently led out and connected to the low-frequency switch. S wL1 and S wL2 and high frequency switches S wH1 and S wH2 The hybrid interleaved half-bridge module consists of a low-frequency bridge arm whose midpoint is connected to one end of a low-frequency inductor, and a high-frequency bridge arm whose midpoint is connected to the other end of a low-frequency inductor, and also to one end of a high-frequency inductor. The other end of the high-frequency inductor serves as the other end of the AC output. This design can solve the problem of uncompensated current ripple across the entire power range; the corresponding control method allows for free distribution of power between the two phases.

Description

Technical Field

[0001] This invention relates to the field of power electronic conversion technology, specifically to a high-frequency switching voltage clamped interleaved three-level ANPC inverter and its control method. Background Technology

[0002] In recent years, voltage source inverters have been widely used in new energy power generation, energy storage, uninterruptible power supplies (UPS), and electric vehicle drives. These fields have varying degrees of high requirements for inverter energy conversion efficiency, power capacity, power density, and dynamic response speed. High-frequency use of power devices can reduce the size of filter inductors and capacitors, helping to improve system power density and dynamic response speed. However, using traditional Si-based high-power devices like IGBTs introduces higher switching losses, and the operating junction temperature of the devices is also higher at high frequencies, which is detrimental to improving system energy conversion efficiency and power capacity. Wide-bandgap semiconductor devices like SiC MOSFETs offer low switching losses and fast switching speeds, providing an effective solution to the contradictions between these performance improvements. However, their cost, several times higher than Si IGBTs at the same power level, and reliability issues limit their use in high-power applications.

[0003] The operating voltage of a two-level inverter is limited by the withstand voltage of a single power device. To improve the operating voltage, multi-level structures have been introduced. Multi-level inverter topologies can reduce composite voltage harmonics, but using wide-bandgap devices for all devices would lead to high costs. Currently, the midpoint clamp structure is the most common multi-level inverter topology. Taking the most commonly used three-level topology as an example, compared to the diode-clamped topology, the switching devices in the Active Neutral Point Clamped (ANPC) topology are all fully controlled devices. By using an appropriate modulation method, the commutation path of the switching transistors can be reduced, and high-frequency operation can be concentrated on a few devices. Based on this, 2SiC&4Si and 4SiC&2Si hybrid three-level ANPC inverter topologies have been proposed. Si IGBTs and SiC MOSFETs operate at power frequency and high frequency, respectively, giving full play to the characteristics and advantages of heterogeneous devices and achieving superior performance at a lower cost compared to all-SiC topologies. However, even in the 2SiC & 4Si topology, selecting full-power SiC MOSFETs solely based on switching frequency still introduces considerable cost. Furthermore, existing control methods cause SiC MOSFETs to operate at high frequency throughout the entire power frequency cycle, resulting in excessive concentration of losses and limiting the system's power capacity. In contrast, the control method of the 4SiC & 2Si inverter topology allows a single SiC MOSFET to operate at high frequency for only half of the power frequency cycle, reducing losses and thermal stress on individual devices. However, using multiple high-capacity SiC MOSFETs leads to even higher costs. To address the trade-off between cost, efficiency, and capacity performance improvements in existing hybrid three-level ANPC inverters, researchers have proposed a three-level ANPC inverter based on a Si / SiC hybrid interleaved half-bridge. This design replaces the all-SiC bridge arms in the 2SiC&4Si topology with a two-phase hybrid dual-frequency interleaved parallel half-bridge composed of low-frequency, high-capacity Si IGBT bridge arms and low-frequency inductors, and high-frequency, low-capacity SiC MOSFET bridge arms and high-frequency inductors. Other components still utilize high-capacity Si IGBTs, saving on system hardware costs and achieving near-or even higher energy conversion efficiency and higher system capacity. The two-phase half-bridge employs a frequency-interleaved operating mode, allowing for free power distribution and ripple compensation. However, in DC / AC converters, output voltage and current are time-varying. Under certain output voltages, high-frequency current may not be able to fully compensate for low-frequency current, resulting in abnormal composite current ripple and affecting the inverter's output power quality. Summary of the Invention

[0004] In view of this, to solve the aforementioned problems in the prior art, this invention proposes a high-frequency switching voltage clamped interleaved three-level ANPC inverter and its control method. The two-phase bridge arms still use low-frequency, high-capacity Si IGBTs and high-frequency, low-capacity SiC MOSFETs, with the high-frequency inductor placed in the total current loop. In this case, the high-frequency inductor voltage is clamped by the high-frequency switch, and the total inductor current ripple is directly determined by the high switching frequency and the high-frequency inductor in the total current loop. The Si / SiC two-phase inductor current ripples will be completely interleaved and compensated across the entire output voltage range of the inverter, ensuring high power quality output across the entire power range. The corresponding control method enables both interleaved compensation of the two-phase current ripples and free distribution of the two-phase power.

[0005] The present invention solves the above problems through the following technical means:

[0006] On one hand, the present invention provides a high-frequency switching voltage clamped interleaved three-level ANPC inverter, including a DC bus capacitor, a power frequency bridge arm, a low-frequency bridge arm, a high-frequency bridge arm, and a low-frequency inductor. L 1 and high-frequency inductors L 2;

[0007] The DC bus capacitor includes two capacitors connected in series. C 1 and capacitor C 2 ,capacitance C 1 and capacitor C 2 The capacitors have equal capacitance and are used to equally divide the DC bus voltage; C 1 and capacitor C 2 The midpoint of the series connection is the midpoint of the DC bus, and the midpoint of the DC bus is connected to one end of the AC output.

[0008] The input terminal of the power frequency bridge arm is connected to the DC bus voltage, and the midpoint of the power frequency bridge arm is connected to the midpoint of the DC bus; the power frequency bridge arm includes a series power frequency switch. S w1 Power frequency switch S w2 Power frequency switch S w3 and power frequency switch S w4 Power frequency switch S w1 With power frequency switch S w2 The midpoint of the series connection is the first connection point, and the power frequency switch is used. S w3 With power frequency switch Sw4 The midpoint of the series connection is the second connection point;

[0009] The low-frequency bridge arm includes low-frequency switches connected in series. S wL1 and low frequency switches S wL2 Low-frequency switch S wL1 and low frequency switches S wL2 The midpoint of the series connection is the third connection point, and the input end of the low-frequency bridge arm is connected to the first connection point and the second connection point;

[0010] The high-frequency bridge arm includes high-frequency switches connected in series. S wH1 and high frequency switches S wH2 High-frequency switch S wH1 and high frequency switches S wH2 The midpoint of the series connection is the fourth connection point, and the input end of the high-frequency bridge arm is connected to the first connection point and the second connection point;

[0011] The third connection point and the low-frequency inductor L 1 One end is connected to a low-frequency inductor. L 1 The other end is connected to the fourth connection point, which is also connected to the high-frequency inductor. L 2 One end is connected to a high-frequency inductor. L 2 The other end serves as the other end for communication output.

[0012] Preferably, the power frequency switch S w1 Power frequency switch S w2 Power frequency switch S w3 and power frequency switch S w4 The low-frequency switch uses a high-capacity Si IGBT. S wL1 and low frequency switches S wL2 The high-frequency switch uses a high-capacity Si IGBT. S wH1 and high frequency switches S wH2 It uses small-capacity SiC MOSFETs.

[0013] Preferably, the capacitor C1 and capacitor C 2 The capacity of each is not less than 1000μF.

[0014] Preferably, the switching frequency of the power frequency bridge arm is 50Hz-60Hz, the switching frequency of the low frequency bridge arm is 1kHz-10kHz, and the switching frequency of the high frequency bridge arm is 20kHz-100kHz.

[0015] Preferably, the power frequency switch operates once every half power frequency cycle to process the full power. During the entire cycle, the low-frequency branch, composed of low-frequency switches and low-frequency inductors, processes the main power at a low switching frequency, while the remaining power is processed by high-frequency switches. The low-frequency operation of the Si phase switches reduces switching losses, and low-frequency ripple is generated on the low-frequency inductors. The high-frequency inductor is located on the main circuit, and the SiC phase high-frequency switch directly clamps its voltage to ensure that the total current ripple has high switching spectrum characteristics. At this time, the SiC phase half-bridge current ripple and the Si phase half-bridge ripple are completely compensated within the entire output voltage range.

[0016] On the other hand, the present invention provides a control method for a high-frequency switching voltage clamped interleaved three-level ANPC inverter, comprising the following steps:

[0017] Construct an output voltage control outer loop and use a PI regulator to track a sinusoidal reference voltage. V ref Output total reference current I ref Use total reference current I ref The modulation signal is compared with 0 to generate an open-loop complementary power frequency signal, which controls the power frequency switch. S w1 Power frequency switch S w2 Power frequency switch S w3 and power frequency switch Sw 4. On / off state;

[0018] Construct a high-frequency current control inner loop and collect the total actual current of the high-frequency inductor. I L Calculate the total reference current. I ref Total actual current of high-frequency inductor I L The error is input to the high-frequency total current controller to obtain the duty cycle of the high-frequency bridge arm. D sH Duty cycle of high-frequency bridge arms D sH High-frequency switching is obtained by comparing with a high-frequency triangular carrier wave. S wH1 Switching signalS Hf1 and high frequency switches S wH2 Switching signal S Hf2 ;

[0019] Construct a low-frequency current control inner loop and set the power distribution ratio. K Total reference current I ref With power distribution ratio K Multiply to obtain the reference current of the low-frequency branch, and collect the actual current of the low-frequency inductor. I L1 Calculate the reference current of the low-frequency branch and the actual current of the low-frequency inductor. I L1 The error is input to the low-frequency current controller, combined with the duty cycle of the high-frequency bridge arm. D sH The duty cycle of the low-frequency bridge arm is obtained. D sL Duty cycle of the low-frequency bridge arm D sL Low-frequency switching is obtained by comparing with low-frequency triangular carrier waves. S wL1 Switching signal S Lf1 and low frequency switches S wL2 Switching signal S Lf2 .

[0020] Preferably, the total reference current I ref The modulation signal is compared with 0 to generate an open-loop complementary power frequency signal, as shown in equation (1): In the formula, S 1 and S 3 indicates driving the power frequency switch S w1 and power frequency switch S w3 The switch signal, S 2 and S 4 indicates driving the power frequency switch S w2 and power frequency switch Sw 4. Switch signal.

[0021] Preferably, the switching signal generation logic of the power frequency bridge arm is as follows: when I ref When >0, the power frequency switch S w1 and power frequency switch Sw3 On, power frequency switch S w2 and power frequency switch Sw 4. Turn off; when I ref When <0, the power frequency switch S w1 and power frequency switch S w3 Off, power frequency switch S w2 and power frequency switch Sw 4. Conduction.

[0022] Preferably, the high-frequency total current controller employs average current deadbeat predictive control, and the duty cycle of the high-frequency bridge arm is... D sH The prediction is: In the formula, k Indicates the first k One high-frequency control cycle, V in Indicates the DC bus voltage. I ref For the total reference current, I L This represents the total actual current of the high-frequency inductor. V o Indicates the output AC voltage. T sH Indicates the high-frequency switching period. L 1 represents the inductance value of a low-frequency inductor. L 2 represents the inductance value of the high-frequency inductor. S 1 and S 3 indicates driving the power frequency switch S w1 and power frequency switch S w3 The switching signal.

[0023] Preferably, the low-frequency current controller employs deadbeat predictive control, and the duty cycle of the low-frequency bridge arm is... D sL The prediction is: In the formula, q Indicates the first q One low-frequency control cycle T sL Indicates the low-frequency switching period. I ref For the total reference current, K For power allocation ratio, V in Indicates the DC bus voltage.I L1 This represents the actual current of the low-frequency inductor. L 1 represents the inductance value of a low-frequency inductor. D sH This represents the duty cycle of the high-frequency bridge arm.

[0024] Compared with the prior art, the beneficial effects of the present invention include at least the following:

[0025] This invention proposes a high-frequency switching voltage-clamped interleaved three-level ANPC inverter and its control method. In this inverter, the power frequency and low-frequency switches utilize large-capacity Si IGBTs, while the high-frequency switch employs small-capacity SiC MOSFETs. In this configuration, the high-frequency inductor voltage is clamped by the high-frequency switch, and the total inductor current ripple is directly determined by the high switching frequency and the high-frequency inductor of the total current loop. The Si / SiC two-phase inductor current ripples are completely interleaved and compensated across the entire output voltage range of the inverter, ensuring high power quality output across the entire power range. The corresponding control method enables both interleaved compensation of the two-phase current ripples at different frequencies and free distribution of the two-phase power. Compared to the traditional full-power 2SiC&4Si and 4SiC&2Si three-level ANPC topologies that directly replace components based on switching frequency, this topology can save costs and reduce losses. Compared to the previously proposed three-level ANPC inverter based on a Si / SiC hybrid interleaved half-bridge, it can solve the problem of uncompensated current ripple across the entire power range and improve power quality. The control method used can achieve free current distribution among heterogeneous components, increasing the system's power capacity. Attached Figure Description

[0026] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0027] Figure 1 This is the circuit diagram of the high-frequency switching voltage clamped interleaved three-level ANPC inverter of the present invention;

[0028] Figure 2 This is a schematic diagram of the high-frequency switching voltage clamped interleaved three-level ANPC inverter and its control method of the present invention;

[0029] Figure 3 This is a control block diagram of the high-frequency switching voltage clamped interleaved three-level ANPC inverter of the present invention;

[0030] Figure 4These are waveform diagrams of a three-level hybrid interleaved three-level ANPC inverter within the power frequency cycle, where (a) is the conventional type and (b) is the voltage clamping type proposed in this invention.

[0031] Figure 5 This is a traditional hybrid interleaved ANPC low-frequency periodic current ripple waveform. (a) shows the area near the peak point; (b) shows the area near the zero-crossing point.

[0032] Figure 6 This invention provides a high-frequency clamped hybrid interleaved ANPC low-frequency periodic current ripple waveform. Detailed Implementation

[0033] To make the above-mentioned objects, features, and advantages of the present invention more apparent and understandable, the technical solutions of the present invention will be described in detail below with reference to the accompanying drawings and specific embodiments. It should be noted that the described embodiments are merely some embodiments of the present invention, and not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative effort are within the scope of protection of the present invention.

[0034] like Figure 1 As shown, this invention provides a high-frequency switching voltage clamped interleaved three-level ANPC inverter, including a DC bus capacitor, a power frequency bridge arm, a low-frequency bridge arm, a high-frequency bridge arm, and a low-frequency inductor. L 1 and high-frequency inductors L 2;

[0035] The DC bus capacitor includes two capacitors connected in series. C 1 and capacitor C 2 ,capacitance C 1 and capacitor C 2 The capacitors have equal capacitance and are used to equally divide the DC bus voltage; C 1 and capacitor C 2 The midpoint of the series connection is the midpoint n of the DC bus, and the midpoint n of the DC bus is connected to one end of the AC output.

[0036] The input terminals a and b of the power frequency bridge arm are connected to the DC bus voltage, and the midpoint of the power frequency bridge arm is connected to the midpoint n of the DC bus; the power frequency bridge arm includes a series power frequency switch. S w1 Power frequency switch S w2 Power frequency switch S w3 and power frequency switch S w4Power frequency switch S w1 With power frequency switch S w2 The midpoint of the series connection is the first connection point, and the power frequency switch is used. S w3 With power frequency switch S w4 The midpoint of the series connection is the second connection point;

[0037] The low-frequency bridge arm includes low-frequency switches connected in series. S wL1 and low frequency switches S wL2 Low-frequency switch S wL1 and low frequency switches S wL2 The midpoint of the series connection is the third connection point, and the input end of the low-frequency bridge arm is connected to the first connection point and the second connection point;

[0038] The high-frequency bridge arm includes high-frequency switches connected in series. S wH1 and high frequency switches S wH2 High-frequency switch S wH1 and high frequency switches S wH2 The midpoint of the series connection is the fourth connection point, and the input end of the high-frequency bridge arm is connected to the first connection point and the second connection point;

[0039] The third connection point and the low-frequency inductor L 1 One end is connected to a low-frequency inductor. L 1 The other end is connected to the fourth connection point, which is also connected to the high-frequency inductor. L 2 One end is connected to a high-frequency inductor. L 2 The other end serves as the other end for communication output.

[0040] Two capacitors in series C 1 and capacitor C 2. The capacitors are sufficiently large and completely equal to ensure that the bus voltage is evenly divided across both. Specifically, the capacitors... C 1 and capacitor C 2 The capacity of each is not less than 1000μF.

[0041] The switching frequency of the power frequency bridge arm is 50Hz-60Hz, the switching frequency of the low frequency bridge arm is 1kHz-10kHz, and the switching frequency of the high frequency bridge arm is 20kHz-100kHz.

[0042] like Figure 2 As shown, power frequency and low frequency switching devices S w1 、S w2 、S w3 、S w4 and S wL1 , S wL2 All use high-capacity Si IGBTs and high-frequency switching devices. S wH1 , S wH2 Small-capacity SiC MOSFETs are used. The power frequency half-bridge switch operates once every half power frequency cycle to handle full power. Throughout the cycle, the low-frequency branch, composed of low-frequency switches and low-frequency inductors, handles the main power at a lower switching frequency, while the remaining power is handled by the high-frequency half-bridge. The low-frequency operation of the Si phase switches reduces switching losses, but generates a larger low-frequency ripple on the low-frequency inductor. The high-frequency inductor is located on the main circuit, and the SiC phase high-frequency switch directly clamps its voltage, ensuring that the total current ripple has superior high-switching spectrum characteristics. At this time, the current ripple of the SiC phase half-bridge will naturally and completely compensate for the ripple of the Si phase half-bridge across the entire output voltage range.

[0043] Figure 3 The specific control flow for a hybrid interleaved three-level ANPC inverter circuit composed of SiC and Si devices is presented. Taking a purely resistive load as an example, the outer loop of the output voltage control uses a PI regulator to track a sinusoidal reference voltage. V ref This generates the total reference current. I ref The reference current serves as the tracking signal for the inner loop of current control. Furthermore, the reference current is also used as a modulation signal compared with 0 to generate an open-loop complementary power frequency signal, as shown in equation (1): In the formula, S 1 and S 3 indicates the driving device. S w1 and S w3 The switch signal, S 2 and S 4 indicates the driving device. S w2 and Sw4. Switch signal.

[0044] The total current, also known as the high-frequency inductor current, can be directly controlled by controlling the high-frequency SiC half-bridge switch during the upper and lower half-cycles of the load current; the total reference current signal... I ref With total actual current I L The error input to the high-frequency total current controller obtains the high-frequency switch duty cycle. D sH If the controller uses average current deadbeat predictive control, then: In the formula, k Indicates the first k One high-frequency control cycle, V in Indicates the DC bus voltage. V o Indicates the output AC voltage. L 1 represents the inductance value of a low-frequency inductor. L 2 represents the inductance value of the high-frequency inductor. T sH This indicates the high-frequency switching period. The high-frequency duty cycle is compared with the high-frequency triangular carrier wave to obtain the high-frequency SiC phase half-bridge switching signal. S Hf1 , S Hf2 .

[0045] Low-frequency current control also employs deadbeat predictive control, with a total reference current. I ref With power distribution ratio K Multiplying these two values ​​yields the reference current for the low-frequency branch current control loop of phase Si. The error between this reference current and the actual current of phase Si is input into the low-frequency current controller to obtain the duty cycle of the low-frequency switch. D sL In this circuit, the voltage of the low-frequency inductor is determined by both the low-frequency and high-frequency switches. Table 1 shows the voltage state of the low-frequency inductor under four high- and low-frequency switching states, as well as the duration of each switching state within one low-frequency cycle. S Lf / S Hf A value of 1 indicates that the upper transistor of the low-frequency / high-frequency half-bridge is turned on and the lower transistor is turned off; S Lf / S Hf A value of 0 indicates that the lower transistor of the low-frequency / high-frequency half-bridge is turned on and the upper transistor is turned off. To achieve deadbeat control of the average current of the Si phase, the duty cycle of the Si phase switches... D sL It can be predicted that: In the formula, q Indicates the first q One low-frequency control cycle I L1 This represents the actual current of the low-frequency inductor. T sL This indicates the low-frequency switching period. The low-frequency duty cycle is compared with the low-frequency triangular carrier wave to obtain the low-frequency Si-phase half-bridge switching signal. S Lf1 , S Lf2 .

[0046] Table 1. Low-frequency inductor voltage under different switching states

[0047]

[0048] Figure 4 (a) and (b) respectively show the waveforms of the output voltage and current of the Si and SiC phases during several full power frequency cycles for the high-frequency switching voltage clamped hybrid interleaved three-level ANPC inverter described in this patent and the traditional hybrid dual-frequency interleaved three-level ANPC inverter, with the same inductance and the same high switching frequency of the SiC phase. The traditional hybrid dual-frequency interleaved three-level ANPC inverter exhibits abnormal ripple in the total current near the zero-crossing and peak points of the output voltage due to incomplete compensation of the two-phase current, such as... Figure 5 As shown in (a) and (b). Figure 6 The proposed inverter topology current ripple detail compensation diagram is presented. Compared with the traditional hybrid dual-frequency interleaved topology, although the Si phase current ripple detail shape in the proposed topology is somewhat abnormal, the two phase current ripples can completely compensate for each other in the full power range, resulting in superior high-frequency total current ripple and achieving higher output power quality.

[0049] This invention proposes a high-frequency switching voltage-clamped interleaved three-level ANPC inverter and its control method. In this inverter, the power frequency and low-frequency switches utilize large-capacity Si IGBTs, while the high-frequency switch employs small-capacity SiC MOSFETs. In this configuration, the high-frequency inductor voltage is clamped by the high-frequency switch, and the total inductor current ripple is directly determined by the high switching frequency and the high-frequency inductor of the total current loop. The Si / SiC two-phase inductor current ripples are completely interleaved and compensated across the entire output voltage range of the inverter, ensuring high power quality output across the entire power range. The corresponding control method enables both interleaved compensation of the two-phase current ripples at different frequencies and free distribution of the two-phase power. Compared to the traditional full-power 2SiC&4Si and 4SiC&2Si three-level ANPC topologies that directly replace components based on switching frequency, this topology can save costs and reduce losses. Compared to the previously proposed three-level ANPC inverter based on a Si / SiC hybrid interleaved half-bridge, it can solve the problem of uncompensated current ripple across the entire power range and improve power quality. The control method used can achieve free current distribution among heterogeneous components, increasing the system's power capacity.

[0050] The present invention will now be described with reference to specific embodiments:

[0051] Example 1: Application of Distributed Photovoltaic Grid-Connected Power Generation System

[0052] Application scenario requirements

[0053] Distributed photovoltaic grid-connected systems require efficient inversion and grid connection of photovoltaic power. This necessitates inverters with a power rating of 100kW, a conversion efficiency of over 98%, and a total harmonic distortion (THD) of less than 2% for the grid-connected current. Simultaneously, hardware costs must be controlled to meet the economic requirements of distributed scenarios. Traditional 2SiC & 4Si topologies suffer from excessively high costs due to full-power SiC devices, while early hybrid interleaved topologies are prone to current ripple anomalies at the zero-crossing point of the output voltage, affecting the quality of grid-connected power.

[0054] Implementation Configuration

[0055] 1. Selection of core components in the topology: The DC bus uses two 470μF / 1000V electrolytic capacitors. C 1 , C 2 Series connection ensures equal voltage distribution between the two busbars, adapting to the 800V DC input of the photovoltaic array. (Power frequency unit) S w1 , S w2 , S w3 , S w4 and low-frequency bridge arm SwL1 , S wL2 All use high-capacity 1200V / 400A Si IGBTs, high-frequency bridge arms S wH1 , S wH2 The use of a small-capacity 1200V / 50A SiC MOSFET significantly reduces the cost of wide-bandgap devices. Low-frequency inductor. L 1 A 150μH ferrite inductor was selected as the high-frequency inductor. L 2 A 20μH nanocrystalline inductor was selected to meet the requirements for ripple compensation and high-frequency characteristics.

[0056] 2. Control Parameter Settings: The outer loop of the output voltage control uses a PI regulator with a proportional gain of 0.8 and an integral time constant of 0.01s to accurately track the 220V / 50Hz sinusoidal reference voltage. V ref Generate total reference current I ref Power allocation ratio K The setting is 0.7, meaning 70% of the power is handled by the low-frequency Si IGBT branch, and 30% is supplemented by the high-frequency SiC MOSFET branch. High-frequency control cycle. T sH Set to 10μs (switching frequency 100kHz), low-frequency control cycle T sL The switching frequency is set to 100μs (10kHz), and both adopt the average current deadbeat predictive control algorithm.

[0057] Implementation effect

[0058] When the inverter operates within the photovoltaic array output power range of 50kW-100kW, the voltage of the high-frequency inductor L2 is directly clamped by the SiC high-frequency switch. The total current ripple is determined by the 100kHz switching frequency and the 20μH inductor, with the ripple peak controlled within 3A. Waveform monitoring shows that the low-frequency current ripple of the Si phase and the high-frequency current ripple of the SiC phase are completely interleaved and compensated across the entire output voltage range. Even near the zero-crossing point and peak point of the output voltage, there is no abnormal ripple phenomenon as seen in traditional topologies. The grid-connected current THD is only 1.2%, meeting the requirements of GB / T 19964-2012 "Technical Regulations for Photovoltaic Power Stations Connected to Power Systems". The system conversion efficiency reaches 98.5%, reducing costs by 35% compared to the traditional 2SiC&4Si topology, while also solving the ripple compensation defects of early hybrid interleaved topologies.

[0059] Example 2: Charging and discharging applications of industrial and commercial energy storage systems

[0060] Application scenario requirements

[0061] Commercial and industrial energy storage systems need to achieve bidirectional energy conversion between charging during off-peak hours and discharging during peak hours, with a power rating of 250kW. This requires inverters to have a fast response time (≤10ms) when switching between charging and discharging modes, and to maintain low loss and stable output over a wide power range (25kW-250kW). Traditional 4SiC & 2Si topologies suffer from high costs due to the use of multiple high-capacity SiC devices, while ordinary hybrid topologies are prone to current surges during charging and discharging switching due to ripple compensation failure.

[0062] Implementation Configuration

[0063] 1. Selection of core components in the topology: The DC bus uses two 1000μF / 1200V film capacitors. C 1 , C 2 Series connection, adapted to the 900V DC bus of energy storage battery packs. The power frequency unit and low-frequency bridge arm use 1700V / 600A Si IGBTs, while the high-frequency bridge arm uses small-capacity 1700V / 100A SiC MOSFETs, balancing device voltage withstand capability and cost. Low-frequency inductor... L 1 Select a 100μH high-frequency inductor L 2 Both 15μH and water-cooled heat dissipation structures are selected to adapt to high-power scenarios.

[0064] 2. Control Strategy Adaptation: Based on the difference in current direction between charging and discharging modes, dynamic switching is achieved through open-loop complementary power frequency signals. S w1 - S w4 The conduction state during discharge I ref >0, control S w1 , S w3 Conductive, S w2 , S w4 Off; during charging I ref <0, switch to S w1 , S w3 Shut down S w2 , S w4 On. Power distribution ratio KA dynamic adjustment strategy is adopted: when the charging and discharging power is ≥150kW, K Set to 0.8 to reduce the load on high-frequency branches; when power <150kW, K Adjusted to 0.6 to improve dynamic response speed. Both the high-frequency and low-frequency controllers employ deadbeat predictive control, achieved through real-time data acquisition. V in , V o The duty cycle is dynamically updated in conjunction with the inductor current signal. D sH and D sL .

[0065] Implementation effect

[0066] This inverter exhibits a response time of only 8ms during charge / discharge mode switching with no significant current surge. Across the full power range from 25kW light load to 250kW heavy load, the total current ripple remains consistently below 5A. Status monitoring reveals that the low-frequency inductor voltage conforms to the pattern shown in Table 1 under all four high- and low-frequency switching combinations, demonstrating precise compensation for the current ripple between the Si and SiC phases. The system achieves a charging efficiency of 98.2% and a discharging efficiency of 98.4%, resulting in a 40% cost reduction compared to the 4SiC & 2Si topology. Furthermore, during continuous charge / discharge cycle testing, the highest junction temperature of the SiC device is only 75℃, with uniform thermal stress distribution, enhancing the long-term reliability of the system.

[0067] Example 3: Application of Electric Vehicle Drive System

[0068] Application scenario requirements

[0069] Electric vehicle drive systems require a drive power of 150kW, necessitating inverters with small size, high power density (≥2kW / L), and stable output torque and low current ripple under various operating conditions such as vehicle acceleration, deceleration, and constant speed, to ensure a smooth driving experience and motor lifespan. Traditional two-level inverters lack sufficient power density, while all-SiC three-level topologies are too expensive to meet the requirements of automotive applications.

[0070] Implementation Configuration

[0071] 1. Selection of core components in the topology: The DC bus uses two miniaturized 220μF / 800V film capacitors. C 1 , C 2This is suitable for 400V power batteries in electric vehicles. The power frequency unit and low-frequency bridge arm use 1200V / 300A Si IGBT modules (with integrated heat dissipation structure), while the high-frequency bridge arm uses 1200V / 80A small-capacity SiC MOSFETs (using TO-247 packages to reduce size). Low-frequency inductor... L 1 Select an 80μH flat inductor, a high-frequency inductor. L 2 An integrated inductor with a 15μH capacity is selected, and the overall topology volume is controlled within 75L, achieving a power density of 2kW / L.

[0072] 2. Control and Operating Condition Adaptation: The output voltage control outer loop is linked to the motor speed loop. The PI regulator parameters are dynamically optimized according to the operating conditions—the proportional gain is adjusted to 1.0 during acceleration to improve response, and reduced to 0.6 during constant speed to maintain stability. Power distribution ratio. K Linked to motor speed: at low speed (≤1000rpm) K =0.5, torque is quickly adjusted through the high-frequency branch; at high speed (≥3000rpm) K =0.8, reducing high-frequency losses. High-frequency switching cycle T sH Set to 8μs (125kHz) to reduce inductor size and low-frequency switching cycle. T sL Set to 80μs (12.5kHz) to balance loss and response speed.

[0073] Implementation effect

[0074] During the 0-100km / h acceleration of an electric vehicle, the inverter exhibits motor torque fluctuations of less than 3%, with no noticeable jerking. During constant-speed driving, the stator current THD is only 1.5%, lower than the 3.8% of traditional topologies. In rapid deceleration energy recovery mode, the high-frequency inductor voltage is quickly clamped, resulting in a peak recovery current ripple of only 2.8A and an energy recovery efficiency of 97.8%. Compared to the all-SiC three-level topology, hardware costs are reduced by 50%, and the overall size is reduced by 30%, perfectly suited to the limited space requirements of automotive applications. After two hours of continuous operation, the Si IGBT junction temperature is 68℃, and the SiC MOSFET junction temperature is 72℃, both within the safe operating range.

[0075] The embodiments described above are merely illustrative of several implementations of the present invention, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of the present invention. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention, and these modifications and improvements all fall within the scope of protection of the present invention. Therefore, the scope of protection of this patent should be determined by the appended claims.

Claims

1. A control method for a high-frequency switching voltage clamped interleaved three-level ANPC inverter, wherein the high-frequency switching voltage clamped interleaved three-level ANPC inverter includes a DC bus capacitor, a power frequency bridge arm, a low-frequency bridge arm, a high-frequency bridge arm, and a low-frequency inductor. L 1 and high-frequency inductors L 2; The DC bus capacitor includes two capacitors connected in series. C 1 and capacitor C 2 ,capacitance C 1 and capacitor C 2 The capacitors have equal capacitance and are used to equally divide the DC bus voltage; C 1 and capacitor C 2 The midpoint of the series connection is the midpoint of the DC bus, and the midpoint of the DC bus is connected to one end of the AC output. The input terminal of the power frequency bridge arm is connected to the DC bus voltage, and the midpoint of the power frequency bridge arm is connected to the midpoint of the DC bus; the power frequency bridge arm includes a series power frequency switch. S w1 Power frequency switch S w2 Power frequency switch S w3 and power frequency switch S w4 Power frequency switch S w1 With power frequency switch S w2 The midpoint of the series connection is the first connection point, and the power frequency switch is used. S w3 With power frequency switch S w4 The midpoint of the series connection is the second connection point; The low-frequency bridge arm includes low-frequency switches connected in series. S wL1 and low frequency switches S wL2 Low-frequency switch S wL1 and low frequency switches S wL2 The midpoint of the series connection is the third connection point, and the input end of the low-frequency bridge arm is connected to the first connection point and the second connection point; The high-frequency bridge arm includes high-frequency switches connected in series. S wH1 and high frequency switches S wH2 High-frequency switching S wH1 and high frequency switches S wH2 The midpoint of the series connection is the fourth connection point, and the input end of the high-frequency bridge arm is connected to the first connection point and the second connection point; The third connection point and the low-frequency inductor L 1 One end is connected to a low-frequency inductor. L 1 The other end is connected to the fourth connection point, which is also connected to the high-frequency inductor. L 2 One end is connected to a high-frequency inductor. L 2 The other end serves as the other end of the communication output; Its features are, The control method includes the following steps: Construct an output voltage control outer loop and use a PI regulator to track a sinusoidal reference voltage. V ref Output total reference current I ref Use total reference current I ref The modulation signal is compared with 0 to generate an open-loop complementary power frequency signal, which controls the power frequency switch. S w1 Power frequency switch S w2 Power frequency switch S w3 and power frequency switch Sw 4. On / off state; Construct a high-frequency current control inner loop and collect the total actual current of the high-frequency inductor. I L Calculate the total reference current. I ref Total actual current of high-frequency inductor I L The error is input to the high-frequency total current controller to obtain the duty cycle of the high-frequency bridge arm. D sH Duty cycle of high-frequency bridge arms D sH High-frequency switching is obtained by comparing with a high-frequency triangular carrier wave. S wH1 Switching signal S Hf1 and high frequency switches S wH2 Switching signal S Hf2 ; Construct a low-frequency current control inner loop and set the power distribution ratio. K Total reference current I ref With power distribution ratio K Multiply to obtain the reference current of the low-frequency branch, and collect the actual current of the low-frequency inductor. I L1 Calculate the reference current of the low-frequency branch and the actual current of the low-frequency inductor. I L1 The error is input to the low-frequency current controller, combined with the duty cycle of the high-frequency bridge arm. D sH The duty cycle of the low-frequency bridge arm is obtained. D sL Duty cycle of the low-frequency bridge arm D sL Low-frequency switching is obtained by comparing with low-frequency triangular carrier waves. S wL1 Switching signal S Lf1 and low frequency switches S wL2 Switching signal S Lf2 .

2. The control method for the high-frequency switching voltage clamped interleaved three-level ANPC inverter according to claim 1, characterized in that, The power frequency switch S w1 Power frequency switch S w2 Power frequency switch S w3 and power frequency switch S w4 The low-frequency switch uses a high-capacity Si IGBT. S wL1 and low frequency switches S wL2 The high-frequency switch uses a high-capacity Si IGBT. S wH1 and high frequency switches S wH2 It uses small-capacity SiC MOSFETs.

3. The control method for the high-frequency switching voltage clamped interleaved three-level ANPC inverter according to claim 1, characterized in that, The capacitor C 1 and capacitor C 2 The capacity of each is not less than 1000μF.

4. The control method for the high-frequency switching voltage clamped interleaved three-level ANPC inverter according to claim 1, characterized in that, The switching frequency of the power frequency bridge arm is 50Hz-60Hz, the switching frequency of the low frequency bridge arm is 1kHz-10kHz, and the switching frequency of the high frequency bridge arm is 20kHz-100kHz.

5. The control method for the high-frequency switching voltage clamped interleaved three-level ANPC inverter according to claim 1, characterized in that, The power frequency switch operates once every half power frequency cycle to process the full power. During the entire cycle, the low-frequency branch, composed of low-frequency switches and low-frequency inductors, processes the main power at a low switching frequency, while the remaining power is processed by high-frequency switches. The low-frequency operation of the Si phase switches reduces switching losses, and low-frequency ripple is generated on the low-frequency inductors. The high-frequency inductor is located on the main circuit, and the SiC phase high-frequency switch directly clamps its voltage to ensure that the total current ripple has high switching spectrum characteristics. At this time, the SiC phase half-bridge current ripple and the Si phase half-bridge ripple are completely compensated within the entire output voltage range.

6. The control method for the high-frequency switching voltage clamped interleaved three-level ANPC inverter according to claim 1, characterized in that, Total reference current I ref The modulation signal is compared with 0 to generate an open-loop complementary power frequency signal, as shown in equation (1): In the formula, S 1 and S 3 indicates driving the power frequency switch S w1 and power frequency switch S w3 The switch signal, S 2 and S 4 indicates driving the power frequency switch S w2 and power frequency switch Sw 4. Switch signal.

7. The control method for a high-frequency switching voltage clamped interleaved three-level ANPC inverter according to claim 1, characterized in that, The switching signal generation logic of the power frequency bridge arm is as follows: when I ref When >0, the power frequency switch S w1 and power frequency switch S w3 On, power frequency switch S w2 and power frequency switch Sw 4. Shutdown; when I ref When <0, the power frequency switch S w1 and power frequency switch S w3 Off, power frequency switch S w2 and power frequency switch Sw 4. Conduction.

8. The control method for a high-frequency switching voltage clamped interleaved three-level ANPC inverter according to claim 1, characterized in that, The high-frequency total current controller employs deadbeat predictive control of average current, and the duty cycle of the high-frequency bridge arm... D sH The prediction is: In the formula, k Indicates the first k One high-frequency control cycle, V in Indicates the DC bus voltage. I ref For the total reference current, I L This represents the total actual current of the high-frequency inductor. V o Indicates the output AC voltage. T sH Indicates the high-frequency switching period. L 1 represents the inductance value of a low-frequency inductor. L 2 represents the inductance value of the high-frequency inductor. S 1 and S 3 indicates driving the power frequency switch S w1 and power frequency switch S w3 The switching signal.

9. The control method for a high-frequency switching voltage clamped interleaved three-level ANPC inverter according to claim 1, characterized in that, The low-frequency current controller employs deadbeat predictive control, and the duty cycle of the low-frequency bridge arm... D sL The prediction is: In the formula, q Indicates the first q One low-frequency control cycle T sL Indicates the low-frequency switching period. I ref For the total reference current, K For power allocation ratio, V in Indicates the DC bus voltage. I L1 This represents the actual current of the low-frequency inductor. L 1 represents the inductance value of a low-frequency inductor. D sH This represents the duty cycle of the high-frequency bridge arm.

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