Data converter system and method

Abstract

The invention relates to a data converter system and method. The present disclosure relates to a data converter system and a method for operating a data converter system. Edge processing is not to use the controller to determine a new input to the data converter, but to reduce controller signal processing requirements by utilizing processing occurring at the data converter itself. This reduces data transfer requirements between components, thereby reducing latency in the system.

Description

Technical Field

[0001] This disclosure relates to apparatus and methods for converting data or information. Background Technology

[0002] Data converters transform data from one form to another. A digital-to-analog converter (DAC) converts digital input code into an analog output signal. DACs can also achieve this analog-to-analog conversion through quantized changes in impedance, such as capacitive DACs or digital potentiometers or rheostats. An analog-to-digital converter (ADC) converts analog input signals into digital output code. ADCs and DACs are widely used in various applications, such as signal processing, control, and biasing.

[0003] In a typical control system, analog feedback signals are received from an external system, converted into digital signals, and processed by a microprocessor to generate digital control signals based on the digital representation of the feedback signals. These digital control signals are then converted into analog control signals and provided to the external system.

[0004] The conversion from analog to digital and from digital to analog allows the use of digital controllers; however, the conversion and processing of data introduce latency, delays the provision of control signals, and increases the power consumed by the control system. In systems comprising multiple components, the transmission of data or information (especially serial data) between components further increases latency and power consumption. Summary of the Invention

[0005] The inventors have recognized a particular need for an improved system and method to reduce latency and power consumption in data converter systems.

[0006] A method for data transformation is provided. In this method, data communication between the controller and the data transformation is reduced by increasing the processing that occurs at the data converter.

[0007] According to a first aspect of this disclosure, a method for operating a data converter system is provided, the method comprising: receiving an input signal at the data converter system; determining a difference between a value of the input signal and a target value by a controller of the data converter system; transmitting the difference from the controller to a data converter of the data converter system; generating an actuation signal by the data converter based on the difference; and outputting the actuation signal to control circuitry outside the data converter system.

[0008] According to a second aspect of this disclosure, a data converter system is provided, the data converter system being configured to receive an input signal and output an actuation signal, wherein the data converter system includes: a controller configured to receive the input signal and determine a difference between a value of the input signal and a target value; and a data converter configured to receive the difference from the controller and generate an actuation signal based on the difference, the data converter being configured to output the actuation signal to control circuitry external to the data converter system.

[0009] According to a third aspect of this disclosure, a method for operating a data converter system is provided, the method comprising: receiving a digital input signal at the data converter system; determining a difference between a value of the digital input signal and a target value by a controller of the data converter system; transmitting the difference from the controller to a digital-to-analog converter (DAC) of the data converter system; generating an analog actuation signal by the DAC based on the difference; and outputting the actuation signal to control circuitry outside the data converter system. Attached Figure Description

[0010] Various aspects of this disclosure will now be described by way of example only and with reference to the accompanying drawings, wherein the same reference numerals refer to the same parts, and wherein:

[0011] Figure 1 This is a schematic diagram of an example of a data converter or a control system including a data converter;

[0012] Figure 2 This is a flowchart illustrating an example of a method for controlling a data converter system;

[0013] Figure 3 It is control Figure 1 A flowchart illustrating an example of a method for simultaneously transmitting reduced digital signals between a data converter system and a controller;

[0014] Figure 4 This is a schematic diagram of an example of a data converter system that includes a single data converter;

[0015] Figure 5 It is used for control Figure 4 A flowchart illustrating an example of a method for a data converter system;

[0016] Figure 6 yes Figure 4 Alternative schematic diagrams of an example data converter system;

[0017] Figure 7 This is a schematic diagram of an example of a data converter system that includes a modeling system;

[0018] Figure 8 It is used for training Figure 7A flowchart illustrating an example of a modeling system using a model-controlled data converter system; and

[0019] Figure 9 This is a flowchart illustrating an example of a method for using the generated model; and

[0020] Figure 10 This is a flowchart of an example of a method used to validate the generated model. Detailed Implementation

[0021] Electronic circuits can be controlled by feedback-based control systems or control loops. The control system receives input or feedback signals from the circuit and generates control signals to provide to that circuit. Sensing may not be entirely direct, such as anisotropic magnetoresistive (AMR) or Hall effect sensor subsystems. The control system aims to modify the control signals so that the feedback signals operate in a desired manner, such as tracking a reference or target level, value, or signal.

[0022] In many circuits, the feedback signal is an analog signal. For the system to operate efficiently, the control system includes a digital processor or controller that determines the desired changes in the control signal to reduce the difference between the feedback signal and the target signal. Therefore, the feedback signal received from external circuitry is coupled to an analog-to-digital converter (ADC) and converted from an analog signal to a digital signal. The controller receives the converted digital signal and uses it to determine the difference between the converted digital signal and the target level or signal. Because the control system operates in multiple domains, it can be referred to as a data converter system.

[0023] This difference can be referred to as the difference signal. The generated difference signal and any further processing that occurs at the controller or within the data converter system are limited by the data converters (e.g., ADCs and / or DACs) within the data converter system, including analog mixed-signal performance, data converter resolution, and signal-to-noise ratio (SNR) performance.

[0024] After determining the difference, the controller further determines the required difference, variation, or "delta" in the controller's digital output word to reduce the difference. This delta signal can be added to an offset term and scaled before being added to the previously converted digital word, and the new digital word is provided to the digital-to-analog converter (DAC). Offset terms and scaling can be applied to compensate for different resolutions of the data converter and offsets within the system. Since control systems are typically iterative, the new digital word can be an updated version of the previous digital word. For example, in the case where the difference is a percentage difference, the difference signal can represent the percentage, and the new digital word can be the previous digital word updated by the percentage difference. The difference signal can be any signal representing the difference between the target signal and the feedback signal; for example, it can be a percentage difference between signals, an arithmetic function such as the result of subtraction, a signal representing a portion of the difference, a ratio, etc.

[0025] The new digital word is provided to the DAC and converted into an analog output, control, or actuation signal. This actuation signal is then provided to external circuitry. In this way, the actuation signal is based on a comparison between a feedback signal and a target value.

[0026] Providing analog-to-digital and digital-to-analog conversions slows down the supply of control signals to external circuitry, delaying the time required for the external circuitry's output to reach or stabilize near target values. Any conversion process introduces latency into the data converter system. Furthermore, determining the required scaling or offset to correct for different resolutions of the data converter introduces latency and processing requirements at the controller. However, the converter is necessary to allow the use of digital controllers, firmware controllers, or software controllers. Additionally, transmitting new digital words to the DAC increases interface time and power consumption. Improvements to the data converter system are needed to reduce latency and power consumption, and to provide improved feedback to external circuitry. Electromagnetic interference (EMI) and electromagnetic coupling (EMC) in the data converter system also need to be improved.

[0027] The inventors of this invention have determined that the conversion between different signal types (analog to digital and vice versa) and the transmission of data between different components of a data converter system constitute a very significant delay, increasing the power consumption of the data converter system. This is even more pronounced in system designs using varying serial interfaces. Furthermore, the reduction in data communication lowers the amplitude and frequency of EMI, at least because EMI may be generated by drivers of intermediate or high-frequency signals between components that must drive relatively large capacitive loads.

[0028] To reduce power consumption, the inventors have determined that the conversion results can be delivered in an improved manner. This involves providing most of the necessary processing externally to edge processing of the main controller, reducing the size of the transmitted words or signals and decreasing the time required to transmit serial signals between components. Specifically, the data converter system can be modified so that the data converter performs most of the processing and determines only the difference signal, rather than the complete digital word, at the controller. The data converter can also apply offset terms and scaling. Offset terms and scaling can be used to compensate for different resolutions of the data converter and offsets within the system.

[0029] The feedback signal received from the circuit is provided to the ADC and converted from an analog signal to a digital signal. The difference between the level of the converted signal and the target value can be determined in the same manner as previously described. Generating a new digital word to be provided to the DAC based on this difference at the controller introduces increased latency. Furthermore, using the DAC to convert the new digital word increases power consumption and latency because the DAC will be used to convert every bit of the new digital word.

[0030] Instead of using a processor to determine the new digital word to be provided to the DAC, a difference signal representing the difference between the converted signal and the target signal is provided to the DAC. This reduces the processing required at the controller, lowering processing latency and power consumption, while freeing the controller to perform other tasks. Furthermore, the difference signal typically includes fewer bits than the new digital word, reducing data transfer time. The DAC can then use this difference to generate an actuation or control signal. The difference signal itself can be transmitted, or it can be a difference signal that has undergone further processing, for example, taking into account the converter resolution. Even with further processing, the signal transmitted from the controller to the DAC is significantly shorter compared to the transmission of the new word to be converted by the DAC.

[0031] The DAC can determine the necessary changes to the previous digital input word to reduce the provided differential signal. As the control system operates iteratively, the previously converted word can be updated by changing the number of LSBs of the previous digital word and only using the LSBs that have been changed for conversion.

[0032] In systems with high oversampling rates, the number of bits required can be significantly reduced, where the oversampling rate is calculated as the data conversion rate divided by twice the signal bandwidth.

[0033] Operating in this manner advantageously reduces the switching latency and power consumption between the controller and the analog-to-digital controller.

[0034] Figure 1This is a schematic diagram of a control loop 100 including circuit 110 and a control system or data converter system 120. Circuit 110 can be any circuit that operates under the control of the control or data converter system 120. Therefore, circuit 110 can be referred to as external circuit 110 because it is external to the data converter system 120, but it can be integrated with 110 in the same integrated circuit, system-in-package, or module.

[0035] The data converter system includes an analog-to-digital converter (ADC) 130, a controller 140, and a digital-to-analog converter (DAC) 150. The data converter system receives an input signal 115. The input signal 115 is coupled from the output of an external circuit 110 and may be referred to as the feedback signal 115. The ADC 130 receives the input signal 115 and converts it from analog to digital, outputting a converted signal 135. Although... Figure 1 Circuit 110 directly connected to ADC 130 is shown; however, it should be understood that circuit 110 can be indirectly coupled to ADC 130. For example, the feedback signal from circuit 110 can be buffered, amplified, and / or offset using an amplifier. The feedback signal may also be attenuated. In some cases, ADC 130 may include a resistive voltage divider attenuator at its input, allowing high-voltage signals to be scaled, attenuated, or reduced to a range that ADC 130 can tolerate or specify. Thin-film resistors can be used as part of the resistive voltage divider attenuator, which prevents the integrated circuit diode voltage breakdown mechanism from being triggered. The signal can be further subjected to common-mode variation before being coupled to ADC 130. This may involve removing or reducing a portion of the common mode present.

[0036] The data converter system further includes a controller 140. The controller can be any suitable form of processor. For example, the controller can include at least one or a combination of a microcontroller, a field-programmable gate array (FPGA), a programmable logic array (PLA), a central processing unit (CPU), a virtual CPU, a vCPU, a neural processing unit (NPU), and a graphics processing unit (GPU).

[0037] Controller 140 may include firmware or software controller 140. Controller 140 may include one or more control inputs 165. The control inputs may control the operation of controller 140. For example, the control inputs may include communication from an external system to a target level or target signal of controller 140. The control inputs may further allow control of digital calibration, dynamic component matching (DEM), and test modes including built-in self-test (BIST).

[0038] The controller 140 is configured to receive a converted signal 135 from the ADC 130. The controller is used to determine a digital output signal 145 based on the received converted signal 135 and a target signal or target level.

[0039] The data converter system further includes a digital-to-analog converter (DAC) 150. DAC 150 receives a digital output signal 145 and converts the digital output signal from digital to analog, outputting a control signal 155.

[0040] DAC 150 may include embedded digital logic, or at least some of the DAC logic may be implemented in digital controller 140. Similarly, some of the digital processing of ADC 130 may be implemented in digital controller 140.

[0041] Figure 2 This is a flowchart of a method for data conversion or a method for operating a data converter system 120.

[0042] In step S200, the method begins.

[0043] In step S210, the method includes receiving an analog input signal 115 and converting the analog input signal into a digital conversion signal 135. The digital conversion signal 135 is a digital code or word representing the analog input signal 115.

[0044] In step S220, the method includes comparing the digitally converted signal 135 with a target value or target signal to determine a difference signal. The target value or target signal may be received from an external source, pre-programmed and stored in the system's memory, or react to changes in the digitally converted signal 135. The controller 140 may provide offset and scaling characteristics to address both system scaling and the data converter difference, as well as to meet calibration requirements for each device. The controller may have additional operating modes, including calibration, test mode, built-in self-test (BIST) support, and dynamic component matching control. The controller may use non-volatile memory. The target value or target signal is a digital code or word representing the desired output of circuitry 110. The difference signal therefore represents the difference between the target signal and the digitally converted signal 135. The difference signal may be the target signal subtracted from the digitally converted signal 135, or it may represent a percentage difference between the two values.

[0045] In step S230, the method includes determining a value for a digital output word 145 of the controller 140 that reduces the difference signal between the digitally converted signal 135 and the target signal. The digital output word 145 is a digital word or digital code that is a modified version of a previously output digital word. The control system typically operates iteratively, modifying previous signals to alter the operation of the external circuitry 110. For example, where the difference signal represents a percentage difference between the digitally converted signal 135 and the target value, the digital output word 145 could be a previous digital output word modified by that percentage difference. When creating the digital output word, offsets, scaling, or further modifications may be considered. In the case of a system initial startup, the system can begin operation using an estimated or random digital output word. If the system is already operating, the previous digital output word could be a word from a previous iteration of the method.

[0046] In step S240, the digital output word 145 is transmitted to the DAC. Figure 1 A system is illustrated in which the controller 140 and DAC 150 are separate components; however, it should be understood that they can be combined into a single component. When the components are separate, a communication interface can be used between them. Parallel communication of the digital output word 145 may be feasible; however, it is undesirable for medium to high resolution data converters. Serial communication is preferred to reduce signal counting and the required interconnectivity. Hybrid systems, such as multi-bit serial systems, can be used. The use of a serial link typically requires the DAC 150 to wait for all sub-parts of word 145 to be received before conversion begins, although partial digital processing may be feasible in cases where only a portion of the digital information is received. This results in latency in the system due to both the slower transmission and the delay in receiving the complete word, especially when using serial communication.

[0047] In step S250, the digital output word 145 is converted into an analog control, actuation, or bias output signal 155. The analog control signal is provided, coupled, or output to circuit 110. Therefore, the data converter system 120 controls circuit 110 by modifying the actuation signal 155.

[0048] After outputting the actuation signal 155 in step S250, the method ends in S260. The method can be repeated such that after ending in step S260, the method returns to step S270 and starts again in step S200.

[0049] As previously described, determining the value of digital output word 145 at the controller and transmitting the new digital word to DAC 150 increases latency and power consumption. Instead, edge processing can be used to minimize the operations performed by the controller.

[0050] Figure 3 This is a flowchart of a method for data conversion or a method for operating a data converter system 120 while reducing the controller's latency and power consumption.

[0051] In step S300, the method begins.

[0052] In step S310, the method includes receiving an analog input signal 115 and converting the analog input signal into a digital conversion signal 135.

[0053] In step S320, the method includes comparing the digitally converted signal 135 with a target value or target signal to generate a difference signal.

[0054] As previously described, the target value or target signal can be received from an external source, pre-programmed and stored in the system's memory, or react to changes in the digital conversion signal 135. The target value or target signal is a digital code or word representing the desired output of circuit 110.

[0055] The ADC 130 receives the output 115 of the circuit 110 and generates a digitally converted signal 135 with finite resolution and finite SNR, and typically has a non-ideal transfer function. Furthermore, the transfer function of the ADC 130 may vary on a device-to-device basis due to process variations and voltage and temperature variations during operation (PVT error). Therefore, the digitally converted signal 135 may not be an ideal representation of the output of the circuit 110. These non-idealities can reduce the accuracy of the data converter system 120, as the controller aims to determine the difference between the outputs 115 of the circuit 110.

[0056] The target value or target signal can be calculated based on or taking into account the specifications or characteristics of the ADC 130 transfer function and the DAC 150 transfer function. Alternatively, when determining the digital word to be converted by the DAC 150, the DAC 150 can take into account the ADC specifications. ADCs typically have higher resolution and therefore may require scaling the ADC word. Differences may also exist within the nominal reference range, as well as device-to-device variations. These differences can be measured and calibrated during manufacturing, or the user can be provided with the capability to allow for, for example, variations in the voltage reference and performance optimization within a specific temperature range. System-level calibration is a useful capability, and some systems may include monitoring functions that may recommend recalibration if, for example, variations in temperature, power supply, and / or voltage references exceed a specified operating window. Therefore, the target value or signal can take into account the ADC's offset and gain errors or zero-scale and full-scale errors, as well as the ADC 130's integral nonlinearity.

[0057] The difference signal can be the target signal subtracted from the digitally converted signal 135, or it can represent the percentage difference between two values. Therefore, the difference signal can represent the difference between the target signal and the digitally converted signal 135. In other words, the difference signal represents a desired change or a necessary change in the output of circuit 110, which would cause the difference signal to be as close to zero as possible. Further processing of this difference can then be provided by DAC 150.

[0058] Alternatively, the difference signal provided to DAC 150 can be further processed by controller 130, allowing controller 130 to determine the desired change in the output of DAC 150 to reduce the magnitude or value of the difference signal. Determining the difference signal in this way requires controller 140 to determine the difference signal based on the range, resolution, and transfer function of DAC 150. In this way, the transmitted difference signal can be an incremental signal representing the desired change in the input digital word of DAC 150 that has been converted by DAC 150, or the desired change in the output of DAC 150.

[0059] In step S330, the difference signal 145 is transmitted to the DAC. By transmitting only the difference signal, the DAC 150 can determine from the difference signal the new digital word to be converted, rather than the digital word to be converted by the DAC, reducing the processing required by the controller. Furthermore, the bit length of the transmitted difference signal is typically less than the length of the complete digital word, reducing system latency in serial data transmission systems.

[0060] The difference signal itself can be transmitted or fed to DAC 150. Alternatively, a representation of the difference signal can be transmitted or fed to DAC 150.

[0061] The representation of the difference signal may include an encoded version of the difference signal, such as Huffman code or logarithmic amplitude code, as explained later. In other examples, the representation of the difference signal may include an increment signal (which is associated with the difference signal). In other examples, the representation of the difference signal may include a filtered version of the difference, a preprocessed version of the difference signal, and / or an encrypted version of the difference signal.

[0062] Step S340 includes using DAC 150 to generate an analog actuation or output signal 155 based on the received difference signal.

[0063] In the case where the received difference signal represents the difference between the target signal and the digitally converted signal 135, the DAC can generate an incremental signal (digital signal) representing the change in the value of the output signal 155 required to reduce the difference between the value of the converted signal 135 and the target value. The DAC 150 can then continue to modify the previously converted digital word with the incremental signal and convert the modified signal. Data converters or control systems are typically iterative, so previously converted digital words that have been converted by the DAC 150 can be stored. When the system is initially powered on, a random or pseudo-random word can be modified or converted to be provided to the DAC 150. Alternatively, stored values ​​from previous operations of the DAC 150 can be used.

[0064] When the received difference signal represents an increment signal, which represents the change required in the output of DAC 150 to reduce the value of the difference signal, DAC 150 can add the increment signal to the previously converted digital word, or use the increment signal to modify the previously converted digital word, and convert the modified signal.

[0065] A DAC can be used to generate an actuation signal based on a received difference signal, which varies over time in multiple steps to reduce the difference signal. For example, instead of changing the digital input word of DAC 150 in a single action to a value that predicts and essentially eliminates any difference between the target value and the input signal in a single change, multiple intermediate steps can be used to modify the digital input signal over time. These intermediate steps reduce the difference signal over time. Since controller 140 simply provides the difference signal to DAC 150, the determination of the intermediate steps and the changes in the DAC 150 input are determined at the DAC. This reduces the amount of signal that needs to be sent from controller 140 to DAC 150, as processing is performed at the DAC. The communication link between controller 140 and DAC 150 is offloaded, the processing requirements at controller 140 are reduced, and the DAC operates in an edge-processing manner to determine the required changes.

[0066] DAC 150 can be underdamped, critically damped, or overdamped. When the DAC is underdamped, changes to the input of DAC 150 based on the difference signal may cause overshoot in the difference signal or its value. For example, the difference signal may change from a positive to a negative value. An underdamped DAC 150 may be desirable to improve the overall response or transfer function of the data converter system 120, or the operation of external circuitry 110, which may be overdamped. Underdamped overshoot can provide pre-emphasis to the system further along the signal chain from DAC 150, thereby improving the overall system operation. When the DAC 150 is overdamped, changes to the DAC 150 input word may cause the difference signal to change over time, resulting in no overshoot in the output of DAC 150. In some cases, a critically damped DAC 150 can be considered ideal, where the difference signal is removed in a single change to the DAC input word. However, this may be difficult to achieve in practice due to system tolerances or other properties.

[0067] When determining the incremental signal, DAC 150 can incorporate scaling and offset modifications. The offset and scaling functions are intended to be implemented with or embedded within DAC 150 as edge processing. The scaling and offset functions take into account non-ideals in different parts of the data converter system 120, such as the transfer function, range, and resolution differences between DAC 150 and ADC 130. The scaling and offset values ​​can be set as part of the initial settings of DAC 150. If volatile memory is used, this can be done after each power-on, or these settings can be written once to storage in non-volatile memory (NVM), allowing the system to power on more quickly without requiring this initialization phase.

[0068] Step S350 includes outputting an output signal 155 to circuit 110.

[0069] After updating DAC 150 and outputting actuation signal 155 in step S350, the method ends in step S360. This method can be repeated such that after ending at step S360, the method returns to step S370 to S300 and begins again. Repetition may occur when a new DAC 150 update is required. Specifically, in cases where the DAC is used for multiple updates, where the DAC signal is updated over time based on changes in the input signal, the method can be repeated.

[0070] according to Figure 3 This method ensures that only the difference signal is transmitted to DAC 150, instead of a new digital word being converted by the DAC. This reduces serial transmission time and power consumption at controller 140.

[0071] The transmission of the difference signal from controller 140 to DAC 150 can be further optimized by using encoding to reduce latency. For example, the transmitted difference or increment signal 145 can be encoded using Huffman coding or logarithmic amplitude coding. These encoding schemes reduce the number of bits required to be transmitted between controller 140 and DAC 150. The use of Huffman coding can represent common transmitted signals using codes. This code can be predetermined and stored in both controller 140 and DAC 150. In this way, the transmission of the most frequently used or transmitted difference or increment signals can be made more efficient.

[0072] The previously described system and method relate to a circuit 110 having an analog output 115, a digital controller 140, and an analog actuation signal 155. However, it should be understood that the system can operate in conjunction with the circuit 110 having a digital output 115, an analog controller 140, and a digital actuation signal 155. Therefore, the ADC 130 can be referred to as a first converter, and the DAC 150 can be referred to as a second converter. The first converter and the second converter are of opposite types and are used for conversion from digital to analog or from analog to digital.

[0073] By transmitting a reduced signal or difference signal, the communication latency between controller 140 and DAC 150 is reduced. To further reduce latency, the transmission of the conversion signal 135 between ADC 130 and controller 140 may also include the transmission of a reduced signal or difference signal (e.g., a Huffman-coded signal or a logarithmic amplitude-coded signal), in the same manner described regarding the transmission of the difference signal between controller 140 and DAC 150. This signal may be further preprocessed, encrypted, or encoded. In the absence of an ADC, for example, external circuitry 110 provides... Figure 4 In the case of the described digital output, external circuitry can communicate using a reduced signal, or a preprocessing block can process the signal and reduce it in the same way.

[0074] Figure 1 A data converter or control system 120 including two data converters is shown. The control system 120 receives an analog input signal 115 and outputs an analog actuation signal 155. (About...) Figure 1 The external circuit 110 described is an analog circuit. However, in some cases, the circuit may operate across both the analog and digital domains.

[0075] Figure 4This is a schematic diagram of the control loop 100 including circuit 410 and data converter system 420. Circuit 410 can be any circuit that operates under the control of control or data converter system 420 and operates to receive analog input signals and output digital output signals. Therefore, circuit 410 can be referred to as external circuit 610 because it is external to data converter system 420. Circuit 410 can be integrated with data converter system 420 in the same integrated circuit, system-in-package, or module.

[0076] Data converter system 420 receives input signal 435 from data converter system 410. The input signal is a digital signal 435. Therefore, no analog-to-digital conversion is required, and thus no ADC is needed.

[0077] The operation of controller 140 and DAC 150 can follow Figure 3 The flowchart shown illustrates, in addition to the analog-to-digital conversion. Figure 5 This is a flowchart illustrating a method or operation of a data converter system 420 for data conversion, which simultaneously reduces the controller's latency and power consumption.

[0078] In step S500, the method begins.

[0079] In step S510, the method includes receiving a digital input signal 415. No conversion of the digital input signal 415 is required. The digital input signal is provided to the controller 140.

[0080] Figure 5 The steps shown are related to... Figure 3 The steps described are identical. Therefore, the operations of steps S320-S350 will not be described further here. After updating DAC 150 and outputting actuation signal 155 in step S350, the method ends at step S560. The method can be repeated such that after ending at step S560, the method returns to step S570 to S500 and starts again. A system excluding ADC 130 can result in reduced latency and lower computational complexity because the range or specifications of ADC 130 do not need to be considered.

[0081] Although Figure 4 The input signal 435 shown is received from the same circuit 410 as the circuit to which the actuation or output signal 155 is provided, but it should be understood that these signals can be received from different systems and provided or output to different systems. Figure 6 This is a schematic diagram of a control loop 100 including circuit 610 and data converter system 120. Digital input signal 635 is received from a second external circuit or system (not shown). Control system 620 can be configured with... Figure 4The control system shown and Figure 5 Operate in the same way as the method in [the previous section].

[0082] The system benefits from reduced latency and power consumption due to improvements in data transfer between controller 140 and DAC 150.

[0083] The operation of circuit 110 or input signals 115, 435, 635 can change in a predictable manner over time. For example, the target value or signal or output of circuit 110 can change over time in a known manner. Therefore, to reduce data transmission, DAC 150 or controller 140 can be used to monitor and model the behavior of circuit 110 to determine the desired changes in the output or actuation signal 155. This can allow for a reduction in the number of bits transmitted between controller 140 and DAC 150. Modeling can be performed using a programmable logic array (PLA), field-programmable gate array (FPGA), firmware, or software. For example, R... TM Python TM or Matlab TM To perform modeling.

[0084] Figure 7 It is a schematic diagram of the control loop 100, which includes circuit 710 and data converter system 720. Figure 7 The system is based on Figure 6 However, it should be understood that... Figure 7 Additional features can also be applied to Figure 1 or Figure 4 The system.

[0085] Figure 7 This includes a modeling system or circuit 760. This modeling system or circuit is a processor or controller configured to model the responses of controller 140 and DAC 150 to allow for a reduction in the complexity of the operations performed by controller 140 and DAC 150. Although the modeling system or circuit 760 is shown as a separate component of controller 140 and DAC 150, it should be understood that the functionality of the modeling system or circuit 760 may be implemented within controller 140 and / or DAC 150 or as part of the controller and / or DAC, such that controller 140 or DAC 150 may include the modeling system or circuit 760.

[0086] The modeling system or circuitry receives digital inputs 135, 435, and 635 provided to the controller and a difference signal 145 output by the controller. The modeling system or circuitry 760 is configured to provide a first control signal 765 to the controller 140 and a second control signal 770 to the DAC 150. Although the first control signal 765 and the second control signal 770 are shown as separate signals provided to the controller 140 and DAC 150, respectively, it should be understood that the first control signal 765 and the second control signal 770 can be provided to either the controller 140 or the DAC 150, which then transmits the relevant control signal to the other component. If the system is a multi-bit serial system, this can allow for a reduction in the number of serial links in the system, thereby reducing the number of interconnections. Alternatively, the number of multi-bit serial data transmissions can be reduced.

[0087] Figure 8 It is a flowchart of a method for generating models by modeling expected changes in difference or incremental signals to reduce controller latency and power consumption.

[0088] The method begins in step S800.

[0089] In steps S810-S850, the system is trained using a modeling system or circuit 760 based on multiple received inputs and outputs. During training, multiple inputs 115 are received, converted by an ADC if an ADC is present, or directly provided to a controller 140 if input 735 is a digital input. The difference signal is then provided to a DAC 150, which generates multiple actuation signals 155. Method steps S810-S850 essentially correspond to... Figure 2 , Figure 3 and Figure 5 Steps S210-S250, S310-S350, and S510-S350.

[0090] Once the output signal 155 has been output to circuit 110, the system can repeat steps S310-S350 upon receiving an updated input signal 115. The steps can be repeated continuously or periodically, with the input signal 115 being received continuously or periodically. This allows the data converter system 120 to respond to changes in the input signal 115 or changes in the target signal.

[0091] Once two or more difference or increment signals have been determined in step S820, resulting in the output of two or more output signals in step S850, the method may include transmitting or providing the input or converted signal 635 and the difference signal 145 to the modeling system or circuit S760 in step S860. This may occur continuously as signals are generated, or after multiple repetitions of method steps S810-S850 have resulted in the generation of multiple signals.

[0092] In step S860, the method includes comparing two or more difference or increment signals with two or more digital input signals 735 to generate a model representing the relationship between the signals. Model accuracy may increase when more difference or increment signals are compared to generate the model. It is recommended to iterate this type of training and fine-tune the model using a representative dataset to achieve the corresponding efficiency by optimizing the system for completing its planned tasks. It is also important to consider and include boundary and extreme cases to ensure that the model can also meet these conditions.

[0093] In step S860, based on the received digital input signal and the controller output, model training can identify whether the received signal (including input signal 635) is a periodic or repetitive pattern or signal. If this is determined, the model can be used to specify this when generating the model in step S860 or when specifying the model. Therefore, the model can be trained to identify periodic signals so that, when used, it can reproduce periodic signals at DAC 150 while reducing communication between controller 140 and DAC 150.

[0094] The difference or increment signal 145 represents the changes required for the operation of the data converter system 120. Therefore, the generated model represents how the output 155 of the data converter 120 should change over time to reduce the difference between the converted signal 135 and the target signal. Alternatively, this model can represent the relationship between the received input signal 635 and the difference signal 145. Once the model is generated in step S860, it is provided to the controller 140 and the DAC 15 in step S870.

[0095] The model architecture can be defined during system manufacturing or before model training. Therefore, the model architecture can be provided to both controller 140 and DAC 150 during manufacturing or before training. Generating the model in step S860 may include determining the model's coefficients and tuning based on the received data or training data. After training, the model coefficients and tuning determined using the modeling system or circuit 760 during model generation in step S860 can be transmitted to controller 140 and DAC 150 in step S870.

[0096] The model can be a machine learning model generated based on the inputs and outputs received by the controller 140, a time series machine learning model including various filtering effects, a neural network, a deep neural network, a long short-term memory model (LSTM), an autoencoder, a generative adversarial network (GAN), or a transformer model. Other model types can also be used.

[0097] The method for generating the model ends at step S880. The model can be trained once, thus reducing system development and deployment costs. This is particularly advantageous in application-specific solutions that utilize edge processing.

[0098] After model training concludes at step S880, the model training process can be repeated by returning to step S800 from S890. This can include retraining or further training of the model. The repetition of model training can occur intermittently or periodically based on new datasets or newly received inputs. Data received by the system can be monitored, and model parameters can be continuously or persistently adjusted.

[0099] Model retraining can be performed incrementally using reinforcement learning. Incrementally retraining the model results in small changes to the model, making retraining fast and having almost no impact on the normal operation of the data converter system.

[0100] During periods of inactivity, such as after a system power outage, during sleep mode, or during any other time or state of inactivity, it can be used Figure 8 This method allows for updating or retraining the model. If the model needs updating and the system is not powered off, the data converter system can pause or stop operation and restart after the model update.

[0101] A data converter system may have multiple use cases with significantly different characteristics or operational types. To improve system operation, multiple models can be trained based on different operational types, allowing the data converter system to adapt its operations to use different models as the operations change. This may involve switching from one mode to another by loading and using correlation coefficients, where multiple models or coefficients are stored in the data converter system's memory. Using multiple models allows the system to operate with the optimized model, providing significant improvements compared to using a single, more general model.

[0102] This model can be used by controller 140 and DAC 150 to reduce the need to transmit information or differential signals from controller 140 to DAC 150, since DAC 150 is able to determine how the output 155 of data converter system 120 should change, but exceptions may exist, and the controller will transmit the difference between the expected response and the actual target response. This allows for changes and, for example, stopping the transmission of the signal. The differential or incremental signal can still be transmitted from controller 140 to DAC 150 to allow the model to be updated, continuously improved, or compared with true results. Error correction coding (ECC) or cyclic redundancy check (CRC) can also be used to increase robustness and / or provide enhanced functional security.

[0103] After model generation, converter 140 and DAC 150 can be used to reduce differential signals 145 transmitted between components based on shared knowledge of the model. Since the model is provided to both components, the system can transmit only data related to variations beyond the modeling characteristics. Once the model has been generated, for example after system manufacturing or calibration, the modeling system or circuit 760 can be removed and no longer constitutes part of the system, at least since the model has been generated. Therefore, the modeling system or circuit 760 can be an off-chip calibration component, and during operation, the data converter can function as follows: Figure 1 , Figure 4 and Figure 6 As shown, there is no modeling system or circuit 760.

[0104] Figure 9 This is a flowchart of a method for reducing controller latency and power consumption by using a model to model the expected changes in difference or incremental signals.

[0105] The method begins at step S900.

[0106] In step S910, the method includes receiving an analog input signal 115 and converting the analog input signal into a digital conversion signal 135 (in... Figure 1 (in the system), or receive digital input signal 135 and provide the signal to controller 140.

[0107] In step S920, the method includes determining a reduced output signal to be provided to the controller 140 of the DAC 150 based on a previously generated model. Since the model and model configuration information (such as coefficients and model tuning information) are provided to both the controller 140 and the DAC 150 after training, the output signal can be a reduced version of the difference signal, having a shorter signal length or size. The reduced difference signal can represent the difference between the expected operation of the model and the desired difference signal based on the received input signal 635.

[0108] If the changes in the received input signal 635 are periodic or repetitive, the model may have been configured to recognize this. Therefore, communication between the controller 140 and the DAC 150 can be minimized, and instead, only changes in mode can be communicated between the devices. In this way, the DAC 150 acts as a peripheral device, and the controller 140 controls its operation.

[0109] In step S930, the reduced output signal is transmitted to DAC 140.

[0110] In step S940, the DAC generates an actuation signal based on the reduced output signal transmitted from the controller 140. The model implemented at the DAC 150 and controller 140 aims to reduce signal flow between components, learning from training data how the DAC should respond to the received digitally converted signal 135. Therefore, the difference signal can be reduced to a smaller signal because the DAC will be able to understand how the reduced output signal was generated by considering the model.

[0111] In step S950, DAC 150 outputs actuation signal 155.

[0112] In step S960, the method ends. The method can be repeated such that after ending at step S960, the method returns to step S970 to step S900 and begins again.

[0113] exist Figure 8 The model generated in this method may be valid for a period of time until the digital conversion signal or digital signal 135 received from circuit 110 causes an incremental signal that does not follow the generated model. This can be determined at controller 140. Therefore, when a new input signal 635 is received, the process can be repeated periodically or continuously. Figure 9 The method shown.

[0114] Figure 10 This is a flowchart of a method for reducing controller latency and power consumption by using a model to model the expected changes in a difference or increment signal, while determining whether a previously developed model accurately represents the changes in the difference or increment signal.

[0115] When this method is operated to determine the output signal 145 using a model at controller 140, the system can further use... Figure 3 or Figure 5 The method is used to determine the difference signal.

[0116] In step S910, the method includes receiving an analog input signal 115 and converting the analog input signal into a digital conversion signal 135 (in... Figure 1(in the system), or receive digital input signal 135 and provide the signal to controller 140.

[0117] In step S920, the method includes determining a reduced output signal to be provided to the controller 140 of the DAC 150 based on a previously generated model. Since the model is provided to both the controller 140 and the DAC 150 after training, the output signal can be a reduced version of the difference signal, having a shorter signal length or size.

[0118] In step S1020, the method includes determining a difference signal based on the received converted signal. Step S1020 can be considered an optional step. Conversely, step S1020 can be combined with step S920 or incorporated as part of step S920. For example, the determination can occur simultaneously.

[0119] In step S1030, the method compares the updated difference signal with the difference signal generated by the model. The difference between the updated difference signal and the difference signal generated by the model represents the error stored in the model at DAC 150 and controller 140. Therefore, after determining the error, it can be processed according to... Figure 9 The method updates or regenerates the model. This allows the model to be updated over time. The method ends at step S1040. The method can be repeated such that after ending at step S1040, the method returns to step S1050 to step S900 and starts again.

[0120] The quantization properties of arithmetic and quantization in a DAC converter can be modeled and accounted for. The effects of such quantization noise can be understood, and the signal can be truncated or rounded. If needed / as required, quantization noise can also be model-shaped noise.

[0121] Data converter systems 120, 420, 620, and 720 can be implemented at least partially as integrated circuits, system-on-a-chip (SoC), system-in-package (SiP), or modules. A portion of the data converter system can be implemented as an integrated circuit, while another portion can be virtualized using software or cloud infrastructure. Controller 140 can be implemented as a digital system, a programmable logic array (PLA), a field-programmable gate array (FPGA), firmware, or software. The data converter (DAC or ADC) can be any of many known types of data converters.

[0122] Data converter systems 120, 420, 620, and 720 may include or incorporate other operating modes besides those previously described. While controller 140 transmits the differential signal to DAC 150 to reduce latency, during debug or troubleshooting modes, the complete digital word (similar to the one described above) may be transmitted instead. Figure 2 (As described). In some cases, the system may enter a fault analysis mode, in which the differential signal is no longer transmitted, but the complete digital word is transmitted instead. This ensures that the transmitted word is accurate, allowing analysis of the differential signal or modeling how the system might malfunction.

[0123] Furthermore, DAC 150 and converter 140 may include optimizations for the transmission of a stop signal that halts the operation of DAC 150 conversion. In the case of a model-based system, the stop signal ensures that any periodic variations in DAC 150 can be stopped in a time-efficient manner, rather than allowing the system to slowly reduce the output of DAC 150 over time.

[0124] Various modifications may be made to the above examples by adding, deleting or replacing features to provide additional examples, any or all of which are intended to be covered by the appended claims.

[0125] Numbering aspect :

[0126] As a non-limiting example, some aspects of this disclosure are set forth in the following numbered aspects.

[0127] Aspect 1. A method for operating a data converter system, the method comprising:

[0128] The input signal is received at the data converter system;

[0129] The difference between the input signal value and the target value is determined by the controller of the data converter system;

[0130] The difference is transmitted from the controller to the data converter of the data converter system;

[0131] The data converter generates an actuation signal based on the difference;

[0132] The actuation signal is output to control the circuitry outside the data converter system.

[0133] Aspect 2. The method according to aspect 1, further comprising:

[0134] An incremental signal representing the change in the desired value of the actuation signal is generated to reduce the difference between the value of the input signal and the target value.

[0135] Aspect 3. The method according to aspect 2, wherein the incremental signal is generated using the controller.

[0136] Aspect 4. The method according to aspect 2, wherein the incremental signal is generated using the data converter.

[0137] Aspect 5. The method according to any of the preceding aspects, wherein the input signal, target value, and actuation signal include signals of a first signal type and a second signal type.

[0138] Aspect 6. The method according to aspect 5, wherein generating the actuation signal includes converting the incremental signal from the second signal type to the first signal type.

[0139] Aspect 7. The method according to any one of Aspect 5 or Aspect 6, wherein the input signal is a second signal type and the actuation signal is a first signal type.

[0140] Aspect 8. The method according to aspect 5 or aspect 6, wherein the input signal is the first signal type, and the actuation signal is the first signal type, and wherein the method further comprises:

[0141] The input signal is converted from the first signal type to the second signal type by a first data converter to generate a converted signal, and

[0142] Determining the difference between the level of the input signal and the target value includes determining the difference between the level of the converted signal and the target value.

[0143] Aspect 9. The method according to any one of Aspects 5 to 8, wherein the first signal type is an analog signal, and wherein the second signal type is a digital signal.

[0144] Aspect 10. The method according to any one of Aspects 5 to 8, wherein the first signal type is a digital signal and wherein the second signal type is an analog signal.

[0145] Aspect 11. The method according to any of the foregoing aspects, further comprising:

[0146] An offset factor is applied by the data converter before the actuation signal is generated.

[0147] Aspect 12. The method according to any of the preceding aspects, wherein the controller comprises at least one of the following:

[0148] microcontroller;

[0149] Field Programmable Gate Array (FPGA);

[0150] Programmable logic array (PLA);

[0151] Central Processing Unit (CPU);

[0152] Virtual CPU;

[0153] Neural Processing Unit (NPU); and

[0154] Graphics Processing Unit (GPU).

[0155] Aspect 13. The method according to any of the preceding aspects, wherein the data converter is a DAC.

[0156] Aspect 14. The method according to any one of Aspects 1 to 12, wherein the data converter is an ADC.

[0157] Aspect 15. The method according to any of the preceding aspects, wherein the difference includes the Huffman code of the difference.

[0158] Aspect 16. The method according to any of the preceding aspects, wherein the difference includes the log magnitude code of the difference.

[0159] Aspect 17. The method according to any of the preceding aspects, wherein transmitting the difference includes transmitting at least one of the following:

[0160] The filtered version of the difference;

[0161] The preprocessed version of the difference;

[0162] The encrypted version of the difference.

[0163] Aspect 19. The method according to aspect 2, wherein transmitting the difference includes transmitting the incremental signal.

[0164] Aspect 20. The method according to any of the preceding aspects, wherein receiving the input signal includes receiving a feedback signal from the circuitry outside the data converter system.

[0165] Aspect 21. The method according to any of the preceding aspects, wherein the target value is the desired output signal of the circuit outside the data converter system.

[0166] Aspect 22. The method of operating the data converter according to any one of aspects 2 to 4, further comprising:

[0167] Generate a second incremental signal;

[0168] The incremental signal, the second incremental signal, and the corresponding input signal are compared to generate a model representing the change between the incremental signal and the second incremental signal.

[0169] Aspect 23. The method of operating the data converter according to aspect 22, further comprising:

[0170] The third incremental signal is generated based on the model.

[0171] Aspect 24. The method according to aspect 22 or 23, wherein the model includes a machine learning model.

[0172] Aspect 25. The method according to any one of aspects 22 to 24, further comprising generating a plurality of incremental signals based on the model.

[0173] Aspect 26. The method according to any one of Aspects 21 to 25, wherein the model is a machine learning model configured to update based on changes in the input signal.

[0174] Aspect 27. A data converter system configured to receive an input signal and output an actuation signal, wherein the data converter system comprises:

[0175] A controller configured to receive the input signal and determine the difference between the value of the input signal and a target value;

[0176] A data converter configured to receive the difference from the controller and generate an actuation signal based on the difference, the data converter being configured to output the actuation signal to control circuitry outside the data converter system.

[0177] Aspect 28. The data converter system according to aspect 27, wherein the data converter is further configured to generate an incremental signal representing a change in a desired value of the actuation signal to reduce the difference between the value of the input signal and the target value.

[0178] Aspect 29. The data converter system according to any one of Aspects 27 or 28, wherein the input signal, target value, and actuation signal comprise signals of a first signal type and a second signal type.

[0179] Aspect 30. The data converter system according to aspect 29, wherein the input signal is the first signal type, and wherein the system further comprises:

[0180] A first data converter is configured to receive the input signal and generate a converted signal of the second signal type.

[0181] Determining the difference between the value of the input signal and the target value includes determining the difference between the value of the converted signal and the target value.

[0182] Aspect 31. The data converter system according to aspect 30, wherein the first data converter is an analog-to-digital converter (ADC).

[0183] Aspect 32. The data converter system according to any one of Aspects 27 to 31, wherein the data converter is a digital-to-analog converter (DAC).

[0184] Aspect 33. A control system comprising a data converter system according to any one of aspects 27 to 32, wherein the control system further comprises:

[0185] The circuitry outside the data converter system is configured to provide the input signal to the data converter system and receive the actuation signal from the output of the data converter system.

[0186] Aspect 34. A method of operating a data converter system, the method comprising:

[0187] The data converter system receives digital input signals.

[0188] The difference between the value of the digital input signal and the target value is determined by the controller of the data converter system;

[0189] The difference is transmitted from the controller to the digital-to-analog converter (DAC) of the data converter system.

[0190] The DAC generates an analog actuation signal based on the difference;

[0191] The actuation signal is output to control the circuitry outside the data converter system.

Claims

1. A method for operating a data converter system, the method comprising: The input signal is received at the data converter system; The difference between the input signal value and the target value is determined by the controller of the data converter system; The difference is transmitted from the controller to the data converter of the data converter system; The data converter generates an actuation signal based on the difference; The actuation signal is output to control the circuitry outside the data converter system.

2. The method according to claim 1, further comprising: An incremental signal representing the change in the desired value of the actuation signal is generated to reduce the difference between the value of the input signal and the target value.

3. The method of claim 2, wherein the incremental signal is generated using the controller.

4. The method of claim 2, wherein the incremental signal is generated using the data converter.

5. The method according to claim 1, wherein the input signal, target value, and actuation signal include signals of a first signal type and a second signal type.

6. The method of claim 5, further comprising generating an incremental signal representing a change in a desired value of the actuation signal to reduce the difference between the value of the input signal and the target value, and wherein generating the actuation signal comprises converting the incremental signal from the second signal type to the first signal type.

7. The method of claim 5, wherein the input signal is a second signal type and the actuation signal is a first signal type.

8. The method of claim 5, wherein the input signal is the first signal type, and the actuation signal is the first signal type, and wherein the method further comprises: The input signal is converted from the first signal type to the second signal type by a first data converter to generate a converted signal, and Determining the difference between the level of the input signal and the target value includes determining the difference between the level of the converted signal and the target value.

9. The method of claim 5, wherein the first signal type is an analog signal, and wherein the second signal type is a digital signal.

10. The method of claim 5, wherein the first signal type is a digital signal, and wherein the second signal type is an analog signal.

11. The method of claim 1, wherein the data converter is a DAC.

12. The method of claim 1, wherein the difference signal comprises Huffman code.

13. The method of claim 2, further comprising: Generate a second incremental signal; The incremental signal, the second incremental signal, and the corresponding input signal are compared to generate a model representing the change between the incremental signal and the second incremental signal.

14. The method of claim 13, further comprising: The third incremental signal is generated based on the model.

15. The method of claim 13, wherein the model comprises a machine learning model.

16. A data converter system configured to receive an input signal and output an actuation signal, wherein the data converter system comprises: A controller configured to receive the input signal and determine the difference between the value of the input signal and a target value; A data converter configured to receive the difference from the controller and generate an actuation signal based on the difference, the data converter being configured to output the actuation signal to control circuitry outside the data converter system.

17. The data converter system of claim 16, wherein the data converter is further configured to generate an incremental signal representing a change in a desired value of the actuation signal to reduce the difference between the value of the input signal and the target value.

18. The data converter system of claim 16, wherein the input signal is a first signal type, and wherein the system further comprises: A first data converter is configured to receive the input signal and generate a converted signal of a second signal type. Determining the difference between the value of the input signal and the target value includes determining the difference between the value of the converted signal and the target value.

19. A control system comprising the data converter system of claim 16, wherein the control system further comprises: The circuitry outside the data converter system is configured to provide the input signal to the data converter system and receive the actuation signal from the output of the data converter system.

20. A method of operating a data converter system, the method comprising: The data converter system receives digital input signals. The difference between the value of the digital input signal and the target value is determined by the controller of the data converter system; The difference is transmitted from the controller to the digital-to-analog converter (DAC) of the data converter system. The DAC generates an analog actuation signal based on the difference; The actuation signal is output to control the circuitry outside the data converter system.

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