A multi-modal optical communication module with cyber defense capabilities

Abstract

The application discloses a kind of multi-modal optical communication modules with network defense capability, it is related to transmission technical field, solve optical communication module defense capability is insufficient, modal adaptability is poor, transmission is unstable and so on.The module is composed of shell, optical communication signal transceiver component, multi-modal transmission component, network defense component, total controller, adopts layered installation, double mode drive, multi-modal multiplexing, uses photoelectric double-layer monitoring, national encryption algorithm, three-level defense linkage security protection means, improves transmission performance by dynamic routing switching and error code compensation, realizes whole module cooperation by modal routing collaborative scheduling, with the characteristics of iP65 protection and EMC compatibility, improve transmission rate, anti-interference ability and network security, transmission and defense collaborative optimization.

Description

A multimodal optical communication module with network defense capabilities Technical Field

[0001] This invention relates to the field of transmission technology, and more specifically to a multimodal optical communication module with network defense capabilities. Background Technology

[0002] With the development of modern communication technology, the demands for high-speed data transmission and network security protection are constantly increasing. Optical communication modules are the transmission carriers in communication systems, and their performance and security directly affect the overall performance of the communication system. Traditional optical communication modules typically use a single transmission mode, with NRZ or PAM4 modulation modes applied separately. This results in poor mode adaptation flexibility, and traditional module interfaces have poor compatibility, failing to meet the multiplexing requirements of LC, SC, and MPO multi-interface scenarios. Transmission rate and link stability are limited by the single multiplexing method and cannot be adjusted under actual conditions.

[0003] In terms of network security, most modules use single-layer encryption or optical signal detection, lacking a hybrid optoelectronic intrusion identification mechanism. Their defense capabilities are too low to identify abnormal intrusions. Most encryption algorithms are general standards and do not meet the requirements of domestic security compliance. The module structure is unsystematic, mostly integrated, resulting in significant signal interference, poor heat dissipation, low electromagnetic compatibility and protection level, making them unsuitable for complex environments.

[0004] Furthermore, traditional optical communication modules rely solely on electrical layer FEC coding for bit error compensation, without dynamically adjusting optical layer parameters, resulting in poor bit error suppression. Routing switching lacks coordination with mode priority and link status, suffers from high switching latency, and each functional component operates independently, lacking a global collaborative optimization mechanism. This compromises both transmission and defense performance, failing to meet the high-speed, high-security, and high-stability requirements of high-end communication. Therefore, a multi-modal transmission, multi-layered defense, and fully collaborative optical communication module is crucial to overcoming these bottlenecks. Summary of the Invention

[0005] To address the problems of mode mismatch, low security protection level, non-integrated structure, and lack of global coordination in existing optical communication modules, this invention discloses a multi-mode optical communication module with network defense capabilities. Based on a layered aluminum-magnesium alloy shell, the module comprises four modules: optical communication signal transceiver, multi-mode transmission, network defense, and a central controller. It uses dual-mode driving and multi-mode multiplexing methods to achieve dynamic matching of transmission modes, employs optoelectronic feature fusion recognition and national cryptographic algorithms to construct a multi-level defense system, improves transmission performance through dynamic routing switching and optoelectronic dual-layer error compensation, and achieves full module functional linkage through mode routing collaborative scheduling. This results in flexible transmission performance, strong anti-interference capability, and high security protection level, meeting iP65 protection and EMC compatibility requirements, and satisfying the comprehensive communication needs of high speed, high security, and high stability in complex application scenarios.

[0006] To achieve the above-mentioned technical effects, the present invention adopts the following technical solution:

[0007] A multimode optical communication module with network defense capabilities includes a housing and optical communication signal transceiver components, a multimode transmission component, a network defense component, and a main controller installed inside the housing;

[0008] The optical communication signal transceiver component includes a dual-mode driven integrated optical transmitting component, a spectrum monitoring optical receiving component, a transimpedance amplifier, a limiting amplifier, and a transceiver coordinated dynamic error compensation circuit.

[0009] The multimodal transmission component includes a silicon-based photonic integrated chip, a multi-interface compatible adapter, a mode priority storage chip, and a dynamic routing switching control chip;

[0010] The network defense component includes an optical signal parameter monitor, a national cryptographic algorithm encryption chip, an optoelectronic feature fusion recognition chip, a three-level defense linkage controller, and a defense core control interface.

[0011] The main controller includes a dual-mode switching logic circuit, a mode routing collaborative scheduling chip, a defense strategy algorithm storage chip, and a multi-bus communication interface;

[0012] The internal structure of the housing adopts a layered mounting structure: the optical communication signal transceiver component is vertically fixed to the upper mounting area of ​​the housing by positioning studs; the optical signal input and output terminals and the multimode optical communication module are aligned with the LC, SC, and MPO multi-interface adapter holes on the front panel of the housing; the power supply pins on the back are soldered to the upper power board socket for power supply; the high-frequency signal output terminal is connected to the signal input terminal of the middle-layer multimode transmission component via a shielded coaxial cable; the multimode transmission component is embedded in the middle-layer motherboard area of ​​the housing and is double-fixed by the motherboard slot and positioning pins; the silicon-based photonic integrated chip and the multi-interface compatible adapter are directly connected via onboard traces. The heart signal output terminal is unidirectionally connected to the lower-layer network defense component via the motherboard shielded copper foil circuit, while the status feedback pin establishes communication with the main controller through a bidirectional data bus. The network defense component and the main controller are fixed side by side in the lower mounting cavity of the housing, and the two are connected by a high-speed serial bus. The power interface of the network defense component is connected to the lower-layer regulated power supply. The main controller is fastened to the threaded hole on the side wall of the housing through the PCB board bracket. The control signal output terminal extends upward through a flat control cable and is soldered to the control input terminals of the upper-layer optical communication signal transceiver component and the middle-layer multimode transmission component, respectively, to achieve full-module collaborative control.

[0013] The outer shell adopts an integrated aluminum-magnesium alloy structure. The inner wall of the outer shell is coated with an electromagnetic shielding coating. The front panel is equipped with a multi-port sealed dust cover. The rear panel is equipped with a heat dissipation grid and an internal cooling fan to form a convection heat dissipation channel. The inner shell has three independent mounting cavities. Each cavity edge is equipped with a sealing ring. The upper cavity has a reserved optical signal transmission channel hole. The middle layer is equipped with a motherboard mounting boss. The lower layer is equipped with a partition between the power module and the control module. The side wall of the outer shell is equipped with a grounding terminal and mounting ear. The whole structure meets the IP65 protection level and EMC electromagnetic compatibility standards.

[0014] The dual-mode driven integrated optical emission component includes an NRZ signal driving circuit, a PAM4 signal driving circuit, a VCSEL laser emitter, a modulation mode monitoring circuit, and an emission power stabilization circuit. The NRZ signal driving circuit and the PAM4 signal driving circuit are integrated in parallel on the same chip carrier, and their outputs are connected to the VCSEL laser emitter via an electronic switching switch. The modulation mode monitoring circuit collects the operating status and output signal parameters of the driving circuit in real time and feeds them back to the electronic switching switch to achieve closed-loop control of mode switching. The emission power stabilization circuit dynamically compensates for the power drift of the VCSEL laser emitter.

[0015] The spectral monitoring type optical receiver component includes an APD photodiode, a fiber optic spectrometer, a fiber optic splitter, a signal noise suppression circuit, and a receiver sensitivity adjustment circuit. The fiber optic splitter receives external optical signals at its input end, and its two output ends are connected to the APD photodiode and the fiber optic spectrometer, respectively. The signal noise suppression circuit filters out interference signals introduced by the transmission link. The receiver sensitivity adjustment circuit dynamically adjusts the receiving threshold according to the optical signal intensity to adapt to signal attenuation scenarios at different transmission distances. The transimpedance amplifier adopts a broadband design, the limiting amplifier has gain adjustment levels, and the transceiver collaborative dynamic error compensation circuit integrates an FEC encoding chip. All components are connected via traces on a PCB board. The dual-mode driven integrated optical transmitter component and the spectral monitoring type optical receiver component are arranged side by side. The transimpedance amplifier, the limiting amplifier, and the transceiver collaborative dynamic error compensation circuit are sequentially soldered to the rear end of the component, forming an integrated layout for signal transmission and processing.

[0016] The silicon-based photonic integrated chip integrates an arrayed waveguide grating, a multi-core fiber coupler, a polarization beamsplitter, a mode conversion interface, and an optical power equalizer. The arrayed waveguide grating, multi-core fiber coupler, and polarization beamsplitter are connected to a common port through an internal optical waveguide channel. The mode conversion interface smoothly switches between different multiplexed modes, compatible with the cross-transmission of wavelength division multiplexing, space division multiplexing, and polarization multiplexed signals. The optical power equalizer dynamically adjusts the optical power distribution of each channel.

[0017] The dynamic routing switching control chip includes a link state detection circuit, a routing switching drive circuit, a link quality evaluation circuit, and a switching conflict arbitration circuit; the link state detection circuit and the routing switching drive circuit communicate bidirectionally via a data bus; the link quality evaluation circuit constructs a link quality scoring model based on parameters such as bit error rate, latency, and packet loss rate; and the switching conflict arbitration circuit rationally allocates resources during simultaneous multimodal switching.

[0018] The multi-interface compatible adapter has built-in LC, SC and MPO interface conversion contacts, and the modal priority memory chip is a non-volatile memory chip; the silicon-based photonic integrated chip is soldered to the center of the middle layer motherboard, and the multi-interface compatible adapter is connected to the common port of the silicon-based photonic integrated chip through a flexible cable. The modal priority memory chip and the dynamic routing switching control chip are symmetrically arranged on both sides of the silicon-based photonic integrated chip, and signal interaction is achieved through onboard circuitry.

[0019] The optoelectronic feature fusion recognition chip includes an optical signal feature extraction circuit, an electrical signal feature acquisition circuit, a feature fusion processing chip, an abnormal feature storage circuit, and an adaptive recognition threshold circuit. The optical signal feature extraction circuit receives parameter signals output by the optical signal parameter monitor, and the electrical signal feature acquisition circuit acquires data packet features; both circuits have their outputs connected to the feature fusion processing chip. The abnormal feature storage circuit records historical intrusion feature samples to form a feature library that supports incremental learning. The adaptive recognition threshold circuit dynamically adjusts the intrusion recognition threshold according to the link environment to balance recognition accuracy and false alarm rate.

[0020] The three-level defense linkage controller includes a link connection / disconnection control switch, an encryption strength adjustment circuit, a route switching control switch, a defense strategy selection circuit, and an emergency isolation triggering circuit; the link connection / disconnection control switch, the encryption strength adjustment circuit, and the route switching control switch are integrated into the same control unit; the defense strategy selection circuit matches the optimal defense scheme based on the intrusion type and level; the emergency isolation triggering circuit quickly disconnects the dangerous link when a high-risk intrusion is detected.

[0021] The optical signal parameter monitor is equipped with power and wavelength monitoring thresholds. The national cryptographic algorithm encryption chip uses the SM4 algorithm. The defense core control interface is the core control interface. All components are connected through a high-speed serial bus. The optical signal parameter monitor and the national cryptographic algorithm encryption chip are arranged adjacent to each other. The photoelectric feature fusion identification chip and the three-level defense linkage controller are stacked one on top of the other. The defense core control interface is welded to the edge of the component.

[0022] The modal routing collaborative scheduling chip includes a modal status acquisition circuit, a routing scheduling control circuit, a scheduling strategy optimization circuit, and a status feedback adjustment circuit. The modal status acquisition circuit receives the status signals of the multimodal transmission components and outputs scheduling instructions to the routing scheduling control circuit. The scheduling strategy optimization circuit optimizes the scheduling algorithm based on real-time link status and historical scheduling data. The status feedback adjustment circuit dynamically corrects the scheduling instructions based on the execution results of each component to improve the coordination accuracy.

[0023] The dual-mode switching logic circuit is an integrated logic gate module, the defense strategy algorithm storage chip is a flash memory chip, and the multi-bus communication interface includes SPI and I2C bus interfaces. All components are integrated into the same MCU chip package. The dual-mode switching logic circuit and the multi-bus communication interface are located in the pin areas on both sides of the chip, respectively. The mode routing coordination scheduling chip and the defense strategy algorithm storage chip are located in the core area of ​​the chip and interact with each other through an internal bus. The chip is fixed by a PCB board bracket, and the pins are soldered to the motherboard pads for conduction.

[0024] The operation method of the multimodal optical communication module includes the following steps:

[0025] S1. Multimodal signal adaptation and transmission:

[0026] The dual-mode switching logic circuit controls the dual-mode driven integrated optical emitting component to switch between NRZ or PAM4 modulation modes according to transmission requirements. The VCSEL laser emitter outputs a corresponding optical signal, which is then selected by the silicon-based photonic integrated chip to achieve wavelength division, space division, or polarization multiplexing mode. The signal is then adapted and transmitted through the multi-interface compatible adapter.

[0027] S2, photoelectric dual-layer monitoring:

[0028] The optical fiber splitter splits the received optical signal, the APD photodiode converts the optical signal into an electrical signal, the optical fiber spectrometer collects the optical signal characteristic parameters and feeds them back to the optical signal parameter monitor, and at the same time, the electrical layer data characteristics are collected by the electrical signal characteristic acquisition circuit.

[0029] S3, Intrusion Detection and Defense Linkage:

[0030] The photoelectric feature fusion identification chip integrates photoelectric features to determine intrusion. If an abnormality is detected, the three-level defense linkage controller triggers link blocking, encryption upgrade, or route switching, and the national cryptographic algorithm encryption chip encrypts the data.

[0031] S4. Dynamic Routing and Error Compensation:

[0032] The dynamic routing switching control chip adjusts the transmission route based on the preset parameters of the mode priority storage chip and the link status. The transmit-receive coordinated dynamic error compensation circuit achieves dual-layer error compensation through FEC coding and optical layer parameter adjustment.

[0033] S5, Full-Module Collaborative Optimization:

[0034] The modal routing collaborative scheduling chip receives real-time status feedback from each component and issues control commands through the multi-bus communication interface to dynamically adjust the modulation mode, multiplexing method, and defense strategy, forming a transmission defense collaborative optimization closed loop.

[0035] In S1, the multimodal transmission component uses a multimodal transmission rate defense adaptation fusion function to calculate the comprehensive value of the transmission rate defense adaptation of the multimodal optical communication module. The multimodal transmission rate defense adaptation fusion function is as follows: In formula (1), The transmission rate-defense adaptation combined value output by the multimodal transmission component, where trans is the abbreviation for transmission and sec is the abbreviation for security; The summation symbol is m, which is the mode number, with values ​​of 1, 2, and 3 corresponding to the three multiplexed modes: wavelength division, space division, and polarization, respectively. Here, m represents the mode selection coefficient of the multimode transmission component, and m is the mode number. This represents the theoretical maximum rate of the corresponding mode of the multimodal transmission component; This refers to the transmission efficiency coefficient of the corresponding mode of the multimode transmission component; The link stability coefficient for the mode corresponding to the multimode transmission component; The interference attenuation coefficient for the corresponding mode of the multimode transmission component is 0-1; The real-time link security level provided for the network defense component, with a value of 1-5, is used to correlate the adaptability of transmission rate and defense strength. The service quality weight coefficient issued by the central controller has a value of 0-1.2.

[0036] In S3, the working steps of the photoelectric feature fusion recognition chip (43) are as follows:

[0037] S31. Photoelectric Feature Acquisition and Preprocessing:

[0038] The optical signal power and wavelength characteristic parameters are acquired by an optical signal parameter monitor, and the data packet transmission rate and frame structure electrical signal characteristic parameters are acquired by an electrical signal characteristic acquisition circuit. The acquired optical and electrical signal characteristic parameters are then normalized to obtain the normalized values ​​of the optical signal feature vector. and the normalized value of the eigenvector of the electrical signal Eliminate the influence of dimensional differences on the identification results;

[0039] S32. Intrusion Detection Confidence Calculation:

[0040] Based on the preprocessed photoelectric feature parameters, the intrusion identification confidence level is calculated using the photoelectric-defense strategy fusion intrusion identification function formula in the photoelectric feature fusion identification chip. The photoelectric defense strategy fusion intrusion identification function formula used by the photoelectric feature fusion identification chip calculates the photoelectric defense collaborative intrusion identification confidence level. The photoelectric defense strategy fusion intrusion identification function formula is as follows: In formula (2), The photoelectric feature fusion recognition chip outputs the photoelectric-defense collaborative intrusion recognition confidence level, where "detect" is the abbreviation for recognition and "sync" is the abbreviation for collaborative. This is the Sigmoid activation function, and it is a general function symbol. , , The optical features, electrical features, and defense strategy weights configured for the network defense component are respectively, and the subscripts 1, 2, and 3 are the sequence numbers of the corresponding features. The normalized value of the optical signal feature vector collected by the optical communication signal transceiver component; opt is an abbreviation for optics. The optical feature confidence coefficient calculated for the network defense component takes a value between 0 and 1. The normalized value of the electrical signal feature vector collected by the optical communication signal transceiver component is elec, which is an abbreviation for electrical. The electrical signature confidence coefficient calculated for the network defense component takes a value between 0 and 1; The value is a quantification of the defense strategy level currently enabled by the network defense component, ranging from 0 to 1; The adaptation coefficient for the defense strategy of the network defense component is 0-1; These are the bias parameters dynamically issued by the overall controller. The transmit / receive coordinated dynamic error compensation circuit in S4 uses the error-routing-defense coordinated compensation function formula to calculate the total error-routing-defense coordinated compensation amount. The error-routing-defense coordinated compensation function formula is: In formula (3), The total error-routing-defense collaborative compensation amount output by the transmit-receive collaborative dynamic error compensation circuit is called "comp" (compensation) and "sync" (collaboration). , , These are the bit error rate, optical power, and FEC gain weighting coefficient configured for the optical communication signal transceiver component, respectively, with subscripts 1, 2, and 3 being the sequence numbers of the corresponding parameters; The routing adaptation weight coefficient configured for the main controller; BER is the difference between the real-time bit error rate detected by the optical communication signal transceiver component and the target bit error rate. BER is an abbreviation for bit error rate. The bit error rate defense correlation correction coefficient provided for the network defense component has a value of 0-2; The optical power gradient of the optical communication signal transceiver component is adjusted; opt is an abbreviation for optics. The optical power transmission adaptation coefficient provided for the multimodal transmission component has a value of 0-2; The forward error correction coding gain value of the optical communication signal transceiver component is FEC, which is an abbreviation for forward error correction, and gain is the English word for gain. The FEC coding defense adaptation coefficient provided for the network defense component has a value of 0-2; The value is a quantized value of the transmission efficiency of the current route of the multimodal transmission component, ranging from 0 to 1; The routing compensation weight coefficient provided to the overall controller has a value of 0-2; the dynamic routing switching control chip (34) in S4 uses the routing switching-defense verification collaborative delay function formula to calculate the total routing switching-defense verification collaborative delay, and the routing switching-defense verification collaborative delay function formula is as follows: In formula (4), The total delay for route switching-defense verification coordination output by the dynamic route switching control chip is called "switch" (short for switching) and "sec" (short for security). The link state detection time of the multimodal transmission component is denoted by 'detect', which is an abbreviation for detection. The optimal route selection time for the multimodal transmission component; "select" is an abbreviation for "selection". The synchronization time between modules coordinated by the central controller; sync is an abbreviation for synchronization. The total routing hop delay of the multimodal transmission component is denoted as n, where n is the hop number, k is the total routing hop of the multimodal transmission component, and hop is the English word for hop count. This refers to the link security verification time after the routing switch of the network defense component; "verify" is an abbreviation for verification. The encryption initialization time of the network defense component on the new route is denoted as enc, which is the abbreviation for encryption. The modal routing collaborative scheduling chip in S5 uses the transmission defense resource collaborative scheduling priority function formula to calculate the transmission defense resource collaborative scheduling priority. The transmission defense resource collaborative scheduling priority function formula is as follows: In formula (5), The transmission defense resource collaborative scheduling priority output by the modal routing collaborative scheduling chip, where schedule is an abbreviation for scheduling and sync is an abbreviation for collaborative scheduling. , , , These are the service quality, security, transmission efficiency, and resource consumption weighting coefficients configured for the main controller, with subscripts 1, 2, 3, and 4 being the sequence numbers of the corresponding parameters. The service quality score fed back by the multimodal transmission component has a value ranging from 0 to 100. An abbreviation for service quality; The link security level is fed back by the network defense component, with a value ranging from 1 to 5, and sec is an abbreviation for security. The transmission efficiency coefficient fed back by the multimodal transmission component has a value of 0-1, and trans is an abbreviation for transmission. The module hardware resource utilization rate detected by the main controller has a value of 0-1; The resource adaptation coefficient configured for the main controller takes a value between 0 and 1. The positive and beneficial technical effects of this invention are as follows:

[0041] This invention discloses a multimodal optical communication module capable of network defense. By integrating optical communication signal transceiver components, multimodal transmission components, network defense components, and a central controller into a layered, integrated optical communication module, it employs technologies such as dual-mode driven modulation, silicon-based photonic multimodal multiplexing, optoelectronic feature fusion recognition, national cryptographic algorithm encryption, and three-level defense linkage. This enables transmission mode switching, real-time optoelectronic dual-layer monitoring, intelligent intrusion identification, and adaptive matching and coordinated operation of defense strategies. It solves the problems of traditional optical communication modules, such as single mode, weak defense capabilities, and poor transmission and security adaptability. It effectively improves the transmission rate adaptability, link stability, and anti-intrusion capabilities of optical communication links. Through transmit-receive collaborative dynamic error compensation and routing-defense collaborative scheduling optimization, it achieves improved transmission efficiency, data security, and service quality while meeting IP65 protection level and EMC electromagnetic compatibility requirements, providing technical support for applications with high security requirements. Attached Figure Description

[0042] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort, wherein:

[0043] Figure 1 is a structural diagram of the present invention;

[0044] Figure 2 is a schematic diagram of the outer casing of the present invention;

[0045] Figure 3 is a schematic diagram of the optical communication signal transceiver component of the present invention;

[0046] Figure 4 is a schematic diagram of the multimodal transmission component of the present invention;

[0047] Figure 5 is a schematic diagram of the network defense component of the present invention;

[0048] Figure 6 is a schematic diagram of the overall controller of the present invention;

[0049] Figure 7 is a flowchart of the multimodal transmission and defense adaptation process of the present invention;

[0050] Figure 8 is a flowchart of the photoelectric intrusion identification and defense linkage of the present invention;

[0051] In the diagram: 1. Outer shell; 2. Optical communication signal transceiver component; 3. Multimode transmission component; 4. Network defense component; 5. Main controller; 6. Dual-mode driven integrated optical transmitter component; 7. Spectrum monitoring optical receiver component; 8. Transimpedance amplifier; 9. Limiting amplifier; 10. Transceiver coordinated dynamic error compensation circuit; 11. Silicon-based photonic integrated chip; 12. Multi-interface compatible adapter; 23. Mode priority storage chip; 24. Dynamic routing switching control chip; 35. Optical signal parameter monitor; 46. National cryptographic algorithm encryption chip; 47. Optical-electric feature fusion recognition chip; 48. Three-level defense linkage controller; 49. Defense core control interface; 20. Dual-mode switching logic circuit; 20. Mode routing coordinated scheduling chip; 21. Defense strategy algorithm storage chip; 22. Multi-bus communication interface; 33. NRZ signal driving circuit; 44. PAM4 signal driving circuit; 55. VCSEL laser transmitter; 66. Modulation mode monitoring circuit; 77. Transmit power stabilization circuit; 88. APD. 221 photodiode, 222 fiber optic spectrometer, 223 fiber optic splitter, 224 signal noise suppression circuit, 225 receiver sensitivity adjustment circuit, 311 arrayed waveguide grating, 312 multi-core fiber coupler, 313 polarization beam splitter, 314 mode conversion interface, 315 optical power equalizer, 341 link status detection circuit, 342 route switching drive circuit, 343 link quality assessment circuit, 344 switching conflict arbitration circuit, 431 optical signal feature extraction circuit, 432 electrical signal feature acquisition circuit, 433 feature fusion processing chip, 434 abnormal feature storage circuit, 435 identification threshold adaptive circuit, 441 link on / off control switch, 442 encryption strength adjustment circuit, 443 route switching control switch, 444 defense strategy selection circuit, 445 emergency isolation trigger circuit, 521 mode status acquisition circuit, 522 route scheduling control circuit, 523 scheduling strategy optimization circuit, 524 state feedback adjustment circuit. Detailed Implementation

[0052] As shown in Figures 1-8, preferred embodiments of the present invention will be described below with reference to the accompanying drawings. It should be understood that the embodiments described herein are for illustration and explanation only and are not intended to limit the present invention; Embodiment 1:

[0053] A multimode optical communication module with network defense capabilities includes a housing 1 and an optical communication signal transceiver component 2, a multimode transmission component 3, a network defense component 4, and a main controller 5 installed inside the housing 1.

[0054] The optical communication signal transceiver component 2 includes a dual-mode driven integrated optical transmitting component 21, a spectrum monitoring type optical receiving component 22, a transimpedance amplifier 23, a limiting amplifier 24, and a transceiver coordinated dynamic error compensation circuit 25.

[0055] The multimodal transmission component 3 includes a silicon-based photonic integrated chip 31, a multi-interface compatible adapter 32, a mode priority storage chip 33, and a dynamic routing switching control chip 34;

[0056] The network defense component 4 includes an optical signal parameter monitor 41, a national cryptographic algorithm encryption chip 42, an optoelectronic feature fusion recognition chip 43, a three-level defense linkage controller 44, and a defense core control interface 45.

[0057] The main controller 5 includes a dual-mode switching logic circuit 51, a mode routing collaborative scheduling chip 52, a defense strategy algorithm storage chip 53, and a multi-bus communication interface 54.

[0058] The housing 1 employs a layered mounting structure: the optical communication signal transceiver component 2 is vertically fixed to the upper mounting area of ​​the housing 1 via positioning studs. The optical signal input and output terminals and the multimode optical communication module are aligned with the LC, SC, and MPO multi-interface adapter holes on the front panel of the housing 1. The rear power supply pins are soldered to the upper power board socket for power supply. The high-frequency signal output terminal is connected to the signal input terminal of the middle-layer multimode transmission component 3 via a shielded coaxial cable. The multimode transmission component 3 is embedded in the middle-layer motherboard area of ​​the housing 1 and is double-fixed by a motherboard slot and positioning pins. The silicon-based photonic integrated chip 31 and the multi-interface compatible adapter 32 are directly connected via onboard traces. The core signal output terminal is unidirectionally connected to the lower-layer network defense component 4 via the motherboard's shielded copper foil circuitry. Simultaneously, the status feedback pin communicates with the main controller 5 via a bidirectional data bus. The network defense component 4 and the main controller 5 are fixed side-by-side in the lower mounting cavity of the housing 1, connected via a high-speed serial bus. The power interface of the network defense component 4 is connected to the lower-layer regulated power supply. The main controller 5 is secured to the threaded holes on the side wall of the housing 1 via a PCB board bracket. The control signal output terminal extends upwards via a flat control cable, soldering to the control input terminals of the upper-layer optical communication signal transceiver component 2 and the middle-layer multimodal transmission component 3, respectively, achieving full-module collaborative control. Example 2:

[0059] The outer shell 1 adopts an integrated aluminum-magnesium alloy structure. The inner wall of the outer shell is coated with an electromagnetic shielding coating. The front panel is equipped with a multi-port sealed dust cover. The rear panel is equipped with a heat dissipation grid and an internal heat dissipation fan to form a convection heat dissipation channel. The outer shell 1 has three independent mounting cavities inside. Each cavity has a sealing ring on its edge. The upper cavity has a reserved optical signal transmission channel hole. The middle cavity has a motherboard fixing boss. The lower cavity has a partition between the power module and the control module. The side wall of the outer shell 1 is equipped with a grounding terminal and mounting ear. The whole structure meets the IP65 protection level and EMC electromagnetic compatibility standards.

[0060] To ensure the protective and compatibility performance of the housing 1, the module was placed in an IP65-rated test chamber under outdoor dust and electromagnetic interference conditions, and the electromagnetic interference generator was turned on. The unibody aluminum-magnesium alloy housing 1 serves as the module's protection and mounting carrier. The electromagnetic shielding coating on the inner wall of the module uses electromagnetic induction to isolate interference. A three-layer cavity and sealing ring prevent dust from entering. The heat dissipation grid and built-in cooling fan provide convection cooling. The grounding terminal and mounting bracket are grounded and conductive. Example 3:

[0061] The dual-mode driven integrated optical emitting component 21 includes an NRZ signal driving circuit 211, a PAM4 signal driving circuit 212, a VCSEL laser emitter 213, a modulation mode monitoring circuit 214, and an emission power stabilization circuit 215. The NRZ signal driving circuit 211 and the PAM4 signal driving circuit 212 are integrated in parallel on the same chip carrier, and their output terminals are connected to the VCSEL laser emitter 213 via an electronic switching switch. The modulation mode monitoring circuit 214 collects the operating status and output signal parameters of the driving circuit in real time and feeds them back to the electronic switching switch to achieve closed-loop control of mode switching. The emission power stabilization circuit 215 dynamically compensates for the power drift of the VCSEL laser emitter 213.

[0062] The spectral monitoring type optical receiver component 22 includes an APD photodiode 221, a fiber optic spectrometer 222, a fiber optic splitter 223, a signal noise suppression circuit 224, and a receiver sensitivity adjustment circuit 225. The fiber optic splitter 223 receives external optical signals at its input end, and its two output ends are respectively connected to the APD photodiode 221 and the fiber optic spectrometer 222. The signal noise suppression circuit 224 filters out interference signals introduced by the transmission link. The receiver sensitivity adjustment circuit 225 dynamically adjusts the receiving threshold according to the optical signal intensity to adapt to signal attenuation scenarios at different transmission distances. The transimpedance amplifier 23 adopts a broadband design, the limiting amplifier 24 has gain adjustment levels, and the transceiver collaborative dynamic error compensation circuit 25 integrates an FEC encoding chip. All components are connected via traces on a PCB board. The dual-mode driven integrated optical transmitter component 21 and the spectral monitoring type optical receiver component 22 are arranged side by side. The transimpedance amplifier 23, the limiting amplifier 24, and the transceiver collaborative dynamic error compensation circuit 25 are sequentially soldered to the rear end of the component, forming an integrated layout for signal transmission and processing.

[0063] To test the transmission and compensation performance of the optical communication signal transceiver component 2, signal attenuation and noise interference were simulated in a 10km optical fiber. The component is a functional unit for optical signal transmission and compensation, including a transmitting section, a receiving section, and a signal processing section. The transmitting section includes: an NRZ signal driving circuit 211, which is a binary encoded signal driving circuit that outputs signals based on binary encoding principles; a PAM4 signal driving circuit 212, which is a four-level pulse amplitude modulation signal driving circuit that outputs signals based on four-level pulse amplitude modulation principles, driving the VCSEL laser transmitter 213 to convert electrical signals into optical signals; a modulation mode monitoring circuit 214 (mode state monitoring unit) that uses a sampling principle to achieve closed-loop control of mode switching; and a transmit power stabilization circuit 215 (power compensation unit) that uses a power feedback principle to compensate for power drift. The receiving section includes: an optical fiber splitter 223 (optical signal splitting section). The optical signal is split into an optical signal by a photodiode 221 (photoelectric conversion device); the optical signal is converted into an electrical signal by an APD photodiode 221; the optical fiber spectrometer 222 (optical feature acquisition device) collects the optical signal features; the signal noise suppression circuit 224 (interference filtering unit) filters out interference; the receiver sensitivity adjustment circuit 225 (receiver threshold adjustment unit) adaptively adjusts the threshold; the transimpedance amplifier 23 and the limiting amplifier 24 amplify the amplitude of weak signals and stable signals, respectively; the transmit-receive coordinated dynamic error compensation circuit 25 (error correction unit) corrects errors using the FEC coding principle. The test results of the transmit-receive and compensation performance of the optical communication signal transceiver components are shown in Table 1.

[0064] Table 1 Test results of optical communication signal transceiver component's transceiver and compensation performance

[0065]

[0066] Table 1 shows that PAM4 mode has a lower bit error rate and NRZ mode has better receiver sensitivity. Both modes can meet the requirements of long-distance high-reliability transmission.

[0067] Table 1: Bit error rate of PAM4 modulation mode (8.5×) Less than NRZ mode (1.2×) The transmission is reliable; the NRZ mode receiver sensitivity (-28dBm) is greater than that of PAM4 (-26dBm), making it suitable for long-distance weak signal transmission, and the component's transmit and receive compensation is good. Example 4:

[0068] The silicon-based photonic integrated chip 31 integrates an arrayed waveguide grating 311, a multi-core fiber coupler 312, a polarization beamsplitter 313, a mode conversion interface 314, and an optical power equalizer 315. The arrayed waveguide grating 311, the multi-core fiber coupler 312, and the polarization beamsplitter 313 are connected to a common port through internal optical waveguide channels. The mode conversion interface 314 smoothly switches between different multiplexed modes, compatible with the cross-transmission of wavelength division multiplexing, space division multiplexing, and polarization multiplexed signals. The optical power equalizer 315 dynamically adjusts the optical power distribution of each channel.

[0069] The dynamic routing switching control chip 34 includes a link state detection circuit 341, a routing switching drive circuit 342, a link quality evaluation circuit 343, and a switching conflict arbitration circuit 344. The link state detection circuit 341 and the routing switching drive circuit 342 communicate bidirectionally via a data bus. The link quality evaluation circuit 343 constructs a link quality scoring model based on parameters such as bit error rate, latency, and packet loss rate. The switching conflict arbitration circuit 344 rationally allocates resources during simultaneous multimodal switching.

[0070] The multi-interface compatible adapter 32 has built-in LC, SC and MPO interface conversion contacts, and the modal priority storage chip 33 is a non-volatile storage chip. The silicon-based photonic integrated chip 31 is soldered to the center of the middle layer motherboard. The multi-interface compatible adapter 32 is connected to the common port of the silicon-based photonic integrated chip 31 through a flexible cable. The modal priority storage chip 33 and the dynamic routing switching control chip 34 are symmetrically arranged on both sides of the silicon-based photonic integrated chip 31, and signal interaction is achieved through onboard circuitry.

[0071] To verify the mode switching and routing adaptation performance of the multimode transmission component 3, link congestion and faults were simulated in a complex multi-link network environment. The silicon-based photonic integrated chip 31 is the core of the multimode signal processing; its internal arrayed waveguide grating 311 is a wavelength division multiplexing device that separates optical signals of different wavelengths based on the wavelength division principle; the multi-core fiber coupler 312 is an optical signal coupling device that realizes signal transmission between multi-core fibers according to the optical signal coupling principle; the polarization beam splitter 313 is a polarization state separation device that separates optical signals of different polarization states based on the polarization separation principle; the mode conversion interface 314 is a mode adaptation component that uses the mode adaptation principle to achieve smooth switching between wavelength division, space division, and polarization multiplexing modes; and the optical power equalizer 315 is a power adjustment device that dynamically adjusts the optical power distribution of each channel according to the power allocation principle. The multi-interface compatible adapter 32 is an interface conversion component that adapts to multiple interface types such as LC, SC, and MPO through contact conversion principles. The dynamic routing switching control chip 34 is the core of routing scheduling. Its internal link status detection circuit 341 is a link status monitoring unit, acquiring real-time link status based on signal monitoring principles. The routing switching drive circuit 342 is a switching execution unit, executing routing switching commands according to drive control principles. The link quality assessment circuit 343 is a quality scoring unit, constructing a link quality scoring model based on multi-parameter modeling principles of bit error rate, latency, and packet loss rate. The switching conflict arbitration circuit 344 is a resource allocation unit, rationally allocating system resources during simultaneous multi-modal switching using resource scheduling principles. The mode priority storage chip 33 is a parameter storage device, storing preset mode priority parameters using non-volatile storage principles. The switching delays for all three multiplexed modes are less than 3.5ms, and the transmission efficiency exceeds 98%. The performance test results of the multi-modal transmission component's mode switching and routing adaptation are shown in Table 2.

[0072] Table 2. Test results of mode switching and routing adaptation performance of multimodal transmission components

[0073]

[0074] Table 2 shows that the spatial multiplexing mode has the shortest switching delay and the highest transmission efficiency, and all three modes have fast switching and high-efficiency transmission capabilities.

[0075] Table 2 illustrates that the spatial division multiplexing mode has the best performance with a switching delay of 2.8ms and a transmission efficiency of 99.1%; the wavelength division and polarization multiplexing modes have stable performance, and the components can quickly adapt to different link states, meeting the requirements of multimodal transmission. Example 5: The optoelectronic feature fusion identification chip 43 includes an optical signal feature extraction circuit 431, an electrical signal feature acquisition circuit 432, a feature fusion processing chip 433, an abnormal feature storage circuit 434, and an adaptive identification threshold circuit 435; the optical signal feature extraction circuit 431 receives the parameter signal output by the optical signal parameter monitor 41, and the electrical signal feature acquisition circuit 432 acquires data packet features; both outputs are connected to the feature fusion processing chip 433; the abnormal feature storage circuit 434 records historical intrusion feature samples to form a feature library to support incremental learning; the adaptive identification threshold circuit 435 dynamically adjusts the intrusion identification threshold according to the link environment, balancing the identification accuracy and false alarm rate;

[0076] The three-level defense linkage controller 44 includes a link connection / disconnection control switch 441, an encryption strength adjustment circuit 442, a route switching control switch 443, a defense strategy selection circuit 444, and an emergency isolation trigger circuit 445. The link connection / disconnection control switch 441, the encryption strength adjustment circuit 442, and the route switching control switch 443 are integrated into the same control unit. The defense strategy selection circuit 444 matches the optimal defense scheme based on the intrusion type and level. The emergency isolation trigger circuit 445 quickly disconnects the dangerous link when a high-risk intrusion is detected.

[0077] The optical signal parameter monitor 41 is equipped with power and wavelength monitoring thresholds. The national cryptographic algorithm encryption chip 42 uses the SM4 algorithm. The defense core control interface 45 is the core control interface. All components are connected through a high-speed serial bus. The optical signal parameter monitor 41 and the national cryptographic algorithm encryption chip 42 are arranged adjacent to each other. The photoelectric feature fusion identification chip 43 and the three-level defense linkage controller 44 are stacked one on top of the other. The defense core control interface 45 is welded to the edge of the component.

[0078] The intrusion detection and defense capabilities of network defense component 4 were tested using abnormal optical signals and malicious data packets in a simulated network attack. This included monitoring, identification, defense, and interface components: Optical signal parameter monitor 41 is an optical parameter detector that detects the power and wavelength characteristics of optical signals based on parameter principles; National cryptographic algorithm encryption chip 42 is a data encryption device that encrypts transmitted data based on the SM4 symmetric encryption principle; Optical-electrical feature fusion identification chip 43 is an intrusion detection component; optical signal feature extraction circuit 431 is an optical feature extraction unit that extracts intrusion features from optical signals; electrical signal feature acquisition circuit 432 is an electrical feature acquisition unit that acquires electrical signal features from data packets; feature fusion processing chip 433 is a feature analysis unit that fuses features to determine intrusion; and abnormal feature storage circuit 434 is an abnormal feature storage circuit. The system includes a common feature library storage unit for storing historical intrusion features and incremental learning; an adaptive threshold circuit 435 for adjusting the identification threshold; a three-level defense linkage controller 44 for defense execution; a link on / off control switch 441 for controlling link on / off; an encryption strength adjustment circuit 442 for enhancing encryption strength; a route switching control switch 44 for switching transmission paths; a defense strategy selection circuit 444 for matching defense strategies; and an emergency isolation trigger circuit 445 for cutting off dangerous links after detecting high-risk intrusions. The defense core control interface 45 is a signal channel for exchanging instructions between the component and the outside world. The accuracy rate for identifying two attack types reaches over 99%, and the defense response time is less than 1.6ms. The test results of the network defense component's intrusion identification and defense performance are shown in Table 3.

[0079] Table 3. Intrusion detection and defense performance test results of network defense components

[0080]

[0081] Table 3 shows that the component achieves a 99.3% accuracy rate in identifying abnormal optical signal attacks and a 1.5ms response time, and a 99.5% accuracy rate in identifying malicious data packet attacks and a 1.2ms response time. Both intrusion identification accuracy and defense timeliness meet security standards. Example 6: The modal routing collaborative scheduling chip 52 includes a modal state acquisition circuit 521, a routing scheduling control circuit 522, a scheduling strategy optimization circuit 523, and a state feedback adjustment circuit 524. The modal state acquisition circuit 521 receives the state signals from the multimodal transmission component 3 and outputs scheduling instructions to the routing scheduling control circuit 522. The scheduling strategy optimization circuit 523 optimizes the scheduling algorithm based on real-time link status and historical scheduling data. The state feedback adjustment circuit 524 dynamically corrects the scheduling instructions based on the execution results of each component, improving collaborative accuracy.

[0082] The dual-mode switching logic circuit 51 is a logic gate circuit integrated module, the defense strategy algorithm storage chip 53 is a flash memory chip, and the multi-bus communication interface 54 includes SPI and I2C bus interfaces. All components are integrated into the same MCU chip package. The dual-mode switching logic circuit 51 and the multi-bus communication interface 54 are located in the pin areas on both sides of the chip, respectively. The modal routing coordination scheduling chip 52 and the defense strategy algorithm storage chip 53 are located in the core area of ​​the chip and achieve data interaction through the internal bus. The chip is fixed by the PCB board bracket, and the pins are soldered to the motherboard pads for conduction.

[0083] To test the collaborative scheduling performance of the main controller 5, load changes were simulated in a multi-component collaborative working scenario. The modal routing collaborative scheduling chip 52 serves as the collaborative scheduling unit, and its internal modal state acquisition circuit 521 serves as the state acquisition unit, receiving state signals from the multi-modal transmission component 3 based on signal acquisition principles. The routing scheduling control circuit 522 serves as the instruction issuing unit, outputting scheduling instructions according to the scheduling algorithm. The scheduling strategy optimization circuit 523 serves as the algorithm optimization unit, using real-time link status and historical scheduling data mining principles to implement the scheduling algorithm. The state feedback adjustment circuit 524 serves as the instruction correction unit, dynamically correcting scheduling instructions based on the execution results of each component according to closed-loop control principles. The dual-mode switching logic circuit 51 serves as the modulation mode control unit, controlling the modulation mode switching of the dual-mode driven integrated optical transmitter component 21 based on logic gate circuit principles. The defense strategy algorithm storage chip 53 serves as the algorithm storage device, storing the defense strategy algorithm based on flash memory storage principles. The multi-bus communication interface 54 serves as the multi-channel data interaction unit, controlling the data interaction between the main controller and each component based on SPI and I2C bus communication principles. The scheduling response time is less than 1.2ms in both low-load and high-load scenarios, and the collaborative control accuracy is 99%. This indicates that the scheduling response is faster and more accurate in low-load scenarios, and there is no significant performance degradation under high load, demonstrating excellent stability of the overall controller's collaborative scheduling. Example 7:

[0084] The operation method of the multimodal optical communication module includes the following steps:

[0085] S1. Multimodal signal adaptation and transmission:

[0086] According to the transmission requirements, the dual-mode switching logic circuit 51 controls the dual-mode driving integrated optical emitting component 21 to switch between NRZ or PAM4 modulation modes. The VCSEL laser emitter 213 outputs a corresponding optical signal, which is then selected by the silicon-based photonic integrated chip 31 to use wavelength division, space division or polarization multiplexing mode. The signal adaptation and transmission are achieved through the multi-interface compatible adapter 32.

[0087] S2, photoelectric dual-layer monitoring:

[0088] The optical fiber splitter 223 splits the received optical signal, the APD photodiode 221 converts the optical signal into an electrical signal, the optical fiber spectrometer 222 collects the optical signal characteristic parameters and feeds them back to the optical signal parameter monitor 41, and at the same time, the electrical layer data characteristics are collected by the electrical signal characteristic acquisition circuit 432.

[0089] S3, Intrusion Detection and Defense Linkage:

[0090] The photoelectric feature fusion identification chip 43 fuses photoelectric features to determine intrusion. If an abnormality is identified, the three-level defense linkage controller 44 triggers link shielding, encryption upgrade or route switching, and the national cryptographic algorithm encryption chip 42 encrypts the data.

[0091] S4. Dynamic Routing and Error Compensation:

[0092] The dynamic routing switching control chip 34 adjusts the transmission route according to the preset parameters of the mode priority storage chip 33 and the link status. The transmit-receive coordinated dynamic error compensation circuit 25 achieves dual-layer error compensation through FEC coding and optical layer parameter adjustment.

[0093] S5, Full-Module Collaborative Optimization:

[0094] The modal routing collaborative scheduling chip 52 receives real-time status feedback from each component and issues control commands through the multi-bus communication interface 54 to dynamically adjust the modulation mode, multiplexing method, and defense strategy, forming a transmission defense collaborative optimization closed loop.

[0095] Example 8: In S1, the multimodal transmission component 3 uses a multimodal transmission rate defense adaptation fusion function to calculate the comprehensive value of the transmission rate defense adaptation of the multimodal optical communication module. The multimodal transmission rate defense adaptation fusion function is: In formula (1), The transmission rate-defense adaptation combined value output by the multimodal transmission component 3, where trans is the abbreviation for transmission and sec is the abbreviation for security; The summation symbol is m, which is the mode number, with values ​​of 1, 2, and 3 corresponding to the three multiplexed modes: wavelength division, space division, and polarization, respectively. , where m is the mode selection coefficient of the multimodal transmission component 3; This represents the theoretical maximum rate of the mode corresponding to the multimodal transmission component 3; The transmission efficiency coefficient of the corresponding mode of the multimode transmission component 3; The link stability coefficient for the mode corresponding to the multimode transmission component 3 is 0-1; The interference attenuation coefficient for the corresponding mode of the multimode transmission component 3 is 0-1; The real-time link security level provided for the network defense component 4 has a value of 1-5, which is used to correlate the adaptability of transmission rate and defense strength. The service quality weight coefficient issued by the main controller 5 has a value of 0-1.2.

[0096] In S3, the working steps of the photoelectric feature fusion recognition chip (43) are as follows:

[0097] S31. Photoelectric Feature Acquisition and Preprocessing:

[0098] The optical signal power and wavelength characteristic parameters are acquired by the optical signal parameter monitor 41, and the data packet transmission rate and frame structure electrical signal characteristic parameters are acquired by the electrical signal characteristic acquisition circuit 432. The acquired optical signal characteristic parameters and electrical signal characteristic parameters are normalized to obtain the normalized values ​​of the optical signal feature vector. and the normalized value of the eigenvector of the electrical signal Eliminate the influence of dimensional differences on the identification results;

[0099] S32. Intrusion Detection Confidence Calculation:

[0100] Based on the preprocessed photoelectric feature parameters, the intrusion identification confidence level is calculated using the photoelectric-defense strategy fusion intrusion identification function formula in the photoelectric feature fusion identification chip 43. The photoelectric defense strategy fusion intrusion identification function formula used by the photoelectric feature fusion identification chip 43 calculates the photoelectric defense collaborative intrusion identification confidence level. The photoelectric defense strategy fusion intrusion identification function formula is as follows: In formula (2), The photoelectric feature fusion recognition chip 43 outputs the photoelectric-defense collaborative intrusion recognition confidence level, where "detect" is the abbreviation for recognition and "sync" is the abbreviation for collaboration. This is the Sigmoid activation function, and it is a general function symbol. , , The optical features, electrical features, and defense strategy weights configured for the network defense component 4 are respectively, and the subscripts 1, 2, and 3 are the sequence numbers of the corresponding features. The normalized value of the optical signal feature vector collected by the optical communication signal transceiver component 2; opt is an abbreviation for optical. The optical feature confidence coefficient calculated for the network defense component 4 has a value of 0-1; The normalized value of the electrical signal feature vector collected by the optical communication signal transceiver component 2 is elec, which is an abbreviation for electrical engineering. The electrical signature confidence coefficient calculated for the network defense component 4 has a value of 0-1; The value is the quantification value of the defense strategy level currently enabled by the network defense component 4, and the value ranges from 0 to 1; The adaptation coefficient for the defense strategy of the network defense component 4 is 0-1; The bias parameters are dynamically issued by the main controller 5. To verify the multimodal transmission adaptation and photoelectric defense collaborative identification, the experiment adopts wavelength division, space division, and polarization multiplexing modes. The outer shell 1 is IP65 protected and EMC electromagnetic compatibility environment. The internal optical communication signal transceiver component 2, multimodal transmission component 3, network defense component 4, and main controller 5 are installed in layers. The working environment temperature is 25±2℃ and the humidity is 40%-60%. The heat dissipation grid of the outer shell 1 and the heat dissipation flow path of the built-in heat dissipation fan form a convection channel. Different types of attack signals are injected through the intrusion simulation generator to cover the transmission adaptation and intrusion identification scenarios. Formula (1) is derived from the coupling relationship between the multimodal transmission component 3 and the network defense component 4. The transmission parameters of the silicon-based photonic integrated chip 31 and the dynamic routing switching control chip 34, and the defense level collaborative relationship of the three-level defense linkage controller 44 are obtained by fitting the measured data. It is obtained by linear mapping of transmission rate and defense adaptability. Formula (2) is derived from the synergistic relationship between the photoelectric feature fusion recognition principle and the defense strategy. It is obtained by mapping the photoelectric features of the optical communication signal transceiver component 2 and the influence weights of the defense strategy of the network defense component 4 through the Sigmoid function and training with intrusion samples. It is based on the nonlinear mapping between relevant parameters and intrusion recognition confidence. Before the experiment, the modal priority storage chip 33 was configured with three basic modal parameters, and the abnormal feature storage circuit 434 was loaded with historical intrusion samples; the multimodal transmission component 3 was configured with an interference attenuation coefficient. Network defense component 4: setting security level Defense strategy level quantification value The overall controller 5 issues service quality weighting coefficients. With bias parameters The optical communication signal transceiver component 2 and the network defense component 4 collect and transmit efficiency coefficients. Link stability coefficient Data preprocessing , Then, substitute the data into the formula and test the actual transmission rate and intrusion identification results to verify the correctness of the formula.

[0101] The researchers first calibrated the optical communication signal transceiver component 2, multimode transmission component 3, and network defense component 4 according to the following steps: mode priority storage chip 33 recorded initial mode parameters, and abnormal feature storage circuit 434 initialized the intrusion feature database. Five sets of experiments were conducted: in each set, the interference attenuation coefficient was adjusted using an external interference source. (0.1-0.5), Level 3 defense linkage controller 44 switches security levels. (Levels 1-5) and Quantitative Values ​​of Defense Strategy Levels (0.3-0.9), the service quality weighting coefficient is issued by the main controller 5. (0.8-1.2) and bias parameters (0.05), 30 minutes per group. The spectral monitoring type optical receiver component 22 collects optical signal parameters, and the electrical signal feature acquisition circuit 432 collects electrical signal parameters. After preprocessing by the photoelectric feature fusion recognition chip 43 and adjusting the recognition threshold, the parameters are substituted into the formula for calculation. The calculation is repeated 3 times and the average value is taken. The experimental data of multimodal transmission rate defense adaptability and photoelectric defense collaborative intrusion recognition are shown in Table 4.

[0102] Table 4. Experimental data on multimodal transmission rate defense adaptability and photoelectric defense collaborative intrusion identification.

[0103]

[0104] Table 4 shows that the relative error between the calculated value of formula (1) and the actual transmission rate is within 1.5%, and the calculated value of formula (2) is higher than 0.7. Both formulas accurately identify intrusions, verifying the reliability of the two formulas and the synergistic effect of each component.

[0105] Experimental results show that formula (1) can reflect the relationship between multimodal transmission rate and defense adaptation, and formula (2) can measure the confidence level of photoelectric defense collaborative intrusion identification. The derivation premise meets the requirements. The optical communication signal transceiver component 2, multimodal transmission component 3, network defense component 4, and main controller 5 all have certain functions. Formula (1) can reflect the transmission rate and defense adaptation, and formula (2) can provide a confidence level reference for intrusion identification. Example 9:

[0106] The transmit / receive coordinated dynamic error compensation circuit 25 in S4 uses the error-routing-defense coordinated compensation function formula to calculate the total error-routing-defense coordinated compensation amount. The error-routing-defense coordinated compensation function formula is as follows: In formula (3), The total error-routing-defense collaborative compensation amount output by the transmit-receive collaborative dynamic error compensation circuit 25 is called the error-routing-defense collaborative compensation amount. "comp" is the abbreviation for compensation, and "sync" is the abbreviation for collaboration. , , The bit error rate, optical power, and FEC gain weighting coefficient are configured for the optical communication signal transceiver component 2, respectively, with subscripts 1, 2, and 3 being the sequence numbers of the corresponding parameters; The routing adaptation weight coefficient configured for the main controller 5; BER is the difference between the real-time bit error rate detected by the optical communication signal transceiver component 2 and the target bit error rate. BER is an abbreviation for bit error rate. The bit error rate defense correlation correction coefficient provided for the network defense component 4 has a value of 0-2; The optical power gradient of the optical communication signal transceiver component 2 is adjusted; opt is an abbreviation for optics. The optical power transmission adaptation coefficient provided for the multimodal transmission component 3 has a value of 0-2; The forward error correction coding gain value of the optical communication signal transceiver component 2 is given by FEC, which is an abbreviation for forward error correction and gain. The FEC coding defense adaptation coefficient provided for the network defense component 4 has a value of 0-2; The value is the quantized value of the transmission efficiency of the current route of the multimodal transmission component 3, and the value ranges from 0 to 1; The routing compensation weight coefficient provided to the overall controller 5 has a value between 0 and 2; the dynamic routing switching control chip 34 in S4 uses the routing switching-defense verification collaborative delay function formula to calculate the total routing switching-defense verification collaborative delay, and the routing switching-defense verification collaborative delay function formula is as follows: In formula (4), The total delay of the route switching-defense verification collaboration output by the dynamic route switching control chip 34 is referred to as "switch" (short for switching) and "sec" (short for security). The link status detection time of the multimodal transmission component 3 is denoted by 'detect', which is an abbreviation for detection. The optimal route selection time for the multimodal transmission component 3, where "select" is an abbreviation for selection; The synchronization time between modules coordinated by the main controller 5; sync is an abbreviation for synchronization. The total routing hop delay of the multimodal transmission component 3 is denoted by n, where n is the hop number, k is the total routing hop of the multimodal transmission component 3, and hop is the English word for hop count. This refers to the link security verification time after the route switch of the network defense component 4; "verify" is an abbreviation for verification. The encryption initialization time of the network defense component 4 on the new route is 'enc', where 'enc' is the abbreviation for encryption. To verify the synergy between error compensation and route switching defense, an optical communication error and route switching test platform was constructed. The optical communication signal transceiver component 2, multimode transmission component 3, network defense component 4, and main controller 5 in the housing 1 were fixed in layers to simulate signal attenuation scenarios at different distances (10-50km). The regulated power supply inside the housing 1 ensured stable power supply to each component (220V±5V). The transmission link used standard single-mode optical fiber. Different route hop counts were set through a route simulator. During the experiment, the error rate, route status, and defense parameters were controllable.

[0107] Formula (3) derives the synergistic effect of error compensation, route adaptation, and defense mechanism. It is based on the influence of the bit error rate, optical power, and FEC gain of optical communication signal transceiver component 2, the routing transmission efficiency of multimode transmission component 3, and the defense adaptation coefficient of network defense component 4 on the compensation amount through multivariate linear regression. The basis for its validity is that each parameter has a linear correlation with the compensation amount and a large number of experimental verifications. Formula (4) derives the time superposition mechanism of route switching process and defense verification process. It is based on the time loss of link detection, route selection, hop count delay, synchronization time of total controller 5 of multimode transmission component 3, and security verification and encryption initialization of network defense component 4 through multivariate linear regression analysis. The basis for its validity is that the time consumption of each link is independent and superimposed.

[0108] The experimenters adjusted the bit error rate and optical power of the optical communication signal transceiver component 2 by changing the transmission distance; the dynamic routing switching control chip 34 of the multimode transmission component 3 switched different routes of 1-3 hops to change the transmission efficiency and hop count; the national cryptographic algorithm encryption chip 42 of the network defense component 4 adjusted the encryption strength to change the defense adaptation coefficient; and the transceiver coordination dynamic bit error compensation circuit 25 of the optical communication signal transceiver component 2 collected data. , , The dynamic routing switching control chip 34 of the multimodal transmission component 3 acquires... And the time parameters of each stage, the national cryptographic algorithm encryption chip 42 of network defense component 4 provides , The modal routing and collaborative scheduling chip 52 of the main controller 5 issues the following: Substitute the relevant parameters into formula (3) to calculate. Substitute into formula (4) to calculate Simultaneously, the bit error rate after compensation was tested using a bit error rate tester, and the total delay of actual route switching-defense verification was recorded using a time counter to compare and verify the accuracy of the two formulas. The experimenters first calibrated the transimpedance amplifier 23, limiting amplifier 24, and bit error rate detection module of the optical communication signal transceiver component 2, the dynamic route switching control chip 34 of the multimode transmission component 3, and the optical signal parameter monitor 41 of the network defense component 4, and other core components. The initial operating conditions were set as a transmission distance of 10km and an initial hop count of 1. Then, the experiment was divided into 6 groups: each group adjusted the transmission distance (10-50km), the route type of the multimode transmission component 3 (1-3 hops), and the encryption strength of the network defense component 4 in turn. The experiment lasted for 20 minutes.

[0109] Optical communication signal transceiver component 2 detects real-time bit error rate and obtains Calculation of collected optical power FEC encoding chip output Multimodal transmission component 3 records link detection time. Calculate routing transmission efficiency Routing selection time Statistical route hop count and total latency The main controller 5 records the synchronization time. Network defense component 4 records security verification time. Encryption time Provide , The main controller 5 issued The experimenters substituted the parameters into formulas (3) and (4) to calculate, and at the same time detected the bit error rate after compensation and recorded the actual total delay. Each group was repeated 3 times and the average value was taken. The experimental data of bit error rate-routing-defense collaborative compensation and routing switching-defense verification collaborative delay are shown in Table 5.

[0110] Table 5 Experimental data on error-routing-defense collaborative compensation and route switching-defense verification collaborative delay.

[0111]

[0112] Table 5 shows that the calculated value of formula (3) matches the actual compensation effect well, and the calculated value of formula (4) deviates from the actual total delay by less than 2ms, which verifies the accuracy of the two formulas and the synergistic adjustment effect of each component.

[0113] Experimental results show that the total collaborative compensation calculated by formula (3) is significantly disproportionate to the actual compensated bit error rate, and the total collaborative delay calculated by formula (4) deviates little from the actual total delay. The optical communication signal transceiver component 2, the multimodal transmission component 3, the network defense component 4, and the main controller 5 all work collaboratively. Example 10:

[0114] In S5, the modal routing cooperative scheduling chip 52 calculates the transmission defense resource cooperative scheduling priority using the transmission defense resource cooperative scheduling priority function formula. The transmission defense resource cooperative scheduling priority function formula is as follows: In formula (5), The transmission defense resource collaborative scheduling priority output by the modal routing collaborative scheduling chip 52 is 'schedule', which is an abbreviation for scheduling, and 'sync' is an abbreviation for collaborative. , , , The service quality, security, transmission efficiency and resource consumption weight coefficients configured for the main controller 5 are respectively, and the subscripts 1, 2, 3 and 4 are the sequence numbers of the corresponding parameters. The quality of service score fed back by the multimodal transmission component 3 has a value ranging from 0 to 100. An abbreviation for service quality; The link security level fed back by the network defense component 4 has a value of 1-5, and sec is an abbreviation for security. The transmission efficiency coefficient fed back by the multimodal transmission component 3 has a value of 0-1, and trans is an abbreviation for transmission. The module hardware resource utilization rate detected by the main controller 5 has a value of 0-1; The resource adaptation coefficient configured for the main controller 5 takes a value between 0 and 1. To test the priority of collaborative scheduling of transmission defense resources, the optical communication signal transceiver component 2, multimodal transmission component 3, network defense component 4, and main controller 5 within the outer casing 1 are combined to form a multimodal optical communication scheduling test. Light, medium, and heavy service loads are simulated respectively. Through a multi-service optical communication network, the main controller 5 tests the hardware resource utilization rate, the multimodal transmission component 3 controls the quality of service and transmission rate, and the network defense component 4 provides link level and collects security data.

[0115] Formula (5) is derived from the multi-objective optimization requirements of transmission defense resource scheduling. Based on the service quality and transmission efficiency of the multimodal transmission component 3, the security level of the network defense component 4, the resource occupancy priority weight of the central controller 5, and scheduling constraints, its validity is based on the linear weighted relationship between each indicator and scheduling priority, and the results of scheduling experiments. Experimenters changed the resource occupancy rate of the central controller 5 by adjusting the service load. Multimodal transmission component 3 compute service quality With transmission efficiency Network defense component 4 calculates security level The main controller 5 is configured with parameters weight and resource adaptation coefficient. Substitute into the formula to calculate the scheduling priority. The correctness of the formula is verified by comparing it with the scheduling results.

[0116] The experimenters initialized the system, set up four business load scenarios: light, medium, heavy, and super heavy. After calibrating the core modules, they conducted experiments in five groups: each group adjusted its service quality score sequentially. (60-95 points), safety level (Levels 1-5), Transmission Efficiency Coefficient (0.6-0.95), resource utilization rate (0.3-0.8), each group lasts 25 minutes. Multimodal transmission component 3, network defense component 4, and main controller 5 each collect and calculate corresponding parameters. The main controller 5 is configured with fixed weights and resource adaptation coefficients. (0.5-0.9), substitute into the formula to calculate the scheduling priority, record the actual scheduling order to evaluate consistency, repeat each working condition 4 times, and the experimental data of the coordinated scheduling priority of transmission defense resources are shown in Table 6.

[0117] Table 6 Experimental data on the priority scheduling of transmission defense resources

[0118]

[0119] Table 6 shows that the priority calculated by the formula is highly consistent with the actual scheduling order, with a consistency of over 85%. Only the scheduling order of the 5th group is slightly different due to its lower safety level, which verifies the rationality of formula (5).

[0120] Experimental results show that the priority of transmission defense resource collaborative scheduling calculated by formula (5) is consistent with the scheduling order. The weight of a single index is small in some working conditions. Therefore, formula (5) can meet the requirements of resource scheduling priority ranking. The optical communication signal transceiver component 2, multimodal transmission component 3, network defense component 4, and main controller 5 can work together to execute the transmission defense resource collaborative scheduling decision, improve module resource utilization and service quality.

[0121] While specific embodiments of the present invention have been described above, those skilled in the art should understand that these specific embodiments are merely illustrative. Those skilled in the art can omit, substitute, and modify the details of the above methods and systems in various ways without departing from the principles and essence of the present invention. For example, combining the above method steps to perform substantially the same function in substantially the same way to achieve substantially the same result falls within the scope of the present invention. Therefore, the scope of the present invention is defined only by the appended claims.

Claims

1. A multimodal optical communication module with network defense capabilities, characterized in that, The system includes a housing (1) and an optical communication signal transceiver assembly (2), a multimode transmission assembly (3), a network defense assembly (4), and a main controller (5) installed inside the housing (1). The optical communication signal transceiver assembly (2) includes a dual-mode driven integrated optical transmitter assembly (21), a spectral monitoring optical receiver assembly (22), a transimpedance amplifier (23), a limiting amplifier (24), and a transmit / receive coordinated dynamic error compensation circuit (25). The multimode transmission assembly (3) includes a silicon-based photonic integrated chip (31), a multi-interface compatible adapter (32), a mode priority storage chip (33), and a dynamic routing switching control chip (34). The network defense component (4) includes an optical signal parameter monitor (41), a national cryptographic algorithm encryption chip (42), an optoelectronic feature fusion recognition chip (43), a three-level defense linkage controller (44), and a defense core control interface (45); the main controller (5) includes a dual-mode switching logic circuit (51), a mode routing collaborative scheduling chip (52), a defense strategy algorithm storage chip (53), and a multi-bus communication interface (54); wherein the multi-mode transmission component (3) uses a multi-mode transmission rate defense adaptation fusion function to calculate the transmission rate defense adaptation comprehensive value of the multi-mode optical communication module, and the multi-mode transmission rate defense adaptation fusion function is: In formula (1), The transmission rate-defense adaptation combined value output by the multimodal transmission component (3) is the English abbreviation for transmission and the English abbreviation for security. The summation symbol is m, which is the mode number, with values ​​of 1, 2, and 3 corresponding to the three multiplexed modes: wavelength division, space division, and polarization, respectively. is the mode selection coefficient of the multimode transmission component (3), and m is the mode number; This is the theoretical maximum rate of the mode corresponding to the multimodal transmission component (3); The transmission efficiency coefficient of the mode corresponding to the multimode transmission component (3); The link stability coefficient of the mode corresponding to the multimode transmission component (3); The real-time link security level provided for the network defense component (4) is set to level 1-5, which is used to correlate the adaptability of transmission rate and defense strength. The service quality weight coefficient issued by the main controller (5) has a value of 0-1.2; The interference attenuation coefficient for the corresponding mode of the multimode transmission component (3) is 0-1.

2. A multimodal optical communication module with network defense capabilities according to claim 1, characterized in that, The outer shell (1) adopts an integrated aluminum-magnesium alloy structure. The inner wall of the outer shell is coated with an electromagnetic shielding coating. The front panel is equipped with a multi-interface sealed dust cover. The rear panel is equipped with a heat dissipation grid and an internal heat dissipation fan to form a convection heat dissipation channel. The outer shell (1) has three independent installation cavities inside. Each cavity edge is equipped with a sealing ring. The upper cavity is reserved with a hole for optical signal transmission channel. The middle layer is equipped with a motherboard fixing boss. The lower layer is equipped with a partition between the power module and the control module. The side wall of the outer shell (1) is equipped with a grounding terminal and a mounting ear. The whole structure meets the IP65 protection level and EMC electromagnetic compatibility standard. The outer shell (1) adopts a layered installation structure: the optical communication signal transceiver component (2) is vertically fixed to the upper installation area of ​​the outer shell (1) by positioning studs. The optical signal input and output terminals and the multi-mode optical communication module are aligned with the LC, SC and MPO multi-interface adapter holes opened on the front panel of the outer shell (1). The power supply pins on the back are soldered to the upper power board socket for power supply. The high-frequency signal output terminal is connected to the multi-mode transmission in the middle layer via a shielded coaxial cable. The component (3) is connected to the signal input terminal; the multimodal transmission component (3) is embedded in the middle motherboard area of ​​the shell (1) and is fixed by the motherboard slot and positioning pin. The silicon-based photonic integrated chip (31) and the multi-interface compatible adapter (32) are directly connected by onboard traces. The core signal output terminal is connected to the lower network defense component (4) through the shielded copper foil line of the motherboard. At the same time, the status feedback pin communicates with the main controller (5) through the bidirectional data bus. The network defense component (4) and the main controller (5) are fixed side by side in the lower mounting cavity of the shell (1). The two are connected by a high-speed serial bus. The power interface of the network defense component (4) is connected to the lower voltage regulator. The main controller (5) is fastened to the threaded hole on the side wall of the shell (1) through the PCB board bracket. The control signal output terminal extends upward through the flat control cable and is welded to the control input terminal of the upper optical communication signal transceiver component (2) and the middle multimodal transmission component (3) respectively to realize the full module collaborative control.

3. A multimodal optical communication module with network defense capabilities according to claim 2, characterized in that, The dual-mode driven integrated optical emitting component (21) includes an NRZ signal driving circuit (211), a PAM4 signal driving circuit (212), a VCSEL laser emitter (213), a modulation mode monitoring circuit (214), and an emission power stabilization circuit (215); the spectral monitoring type optical receiving component (22) includes an APD photodiode (221), a fiber optic spectrometer (222), a fiber optic splitter (223), a signal noise suppression circuit (224), and a receiver sensitivity adjustment circuit (225); the NRZ signal driving circuit (211) and the PAM4 signal driving circuit (212) are integrated in parallel on the same chip carrier, and the output end is connected to the VCSEL laser emitter (213) through an electronic switching switch; the modulation mode monitoring circuit (214) collects the working status and output signal parameters of the driving circuit in real time and feeds them back to the electronic switching switch to realize closed-loop control of mode switching; the emission power stabilization circuit (215) dynamically compensates the VCSEL laser emitter (213). The power drift of the EL laser emitter (213); the input end of the fiber optic splitter (223) receives external optical signals, and the two output ends are respectively connected to the APD photodiode (221) and the fiber optic spectrometer (222); the signal noise suppression circuit (224) filters out interference signals introduced by the transmission link; the receiving sensitivity adjustment circuit (225) dynamically adjusts the receiving threshold according to the light signal intensity to adapt to signal attenuation scenarios at different transmission distances; the transimpedance amplifier (23) adopts a broadband design, the limiting amplifier (24) has a gain adjustment range, the transmit / receive coordinated dynamic error compensation circuit (25) integrates an FEC encoding chip, and each component is connected by traces on the PCB board; the dual-mode driven integrated optical emitting component (21) and the spectral monitoring type optical receiving component (22) are arranged side by side, and the transimpedance amplifier (23) and the limiting amplifier (24) and the transmit / receive coordinated dynamic error compensation circuit (25) are sequentially soldered to the rear end of the component to form an integrated layout for signal transmission and reception processing.

4. A multimodal optical communication module with network defense capabilities according to claim 3, characterized in that, The silicon-based photonic integrated chip (31) integrates an arrayed waveguide grating (311), a multi-core fiber coupler (312), a polarization beam splitter (313), a mode conversion interface (314), and an optical power equalizer (315); the arrayed waveguide grating (311), the multi-core fiber coupler (312), and the polarization beam splitter (313) are connected to a common port through an internal optical waveguide channel; the mode conversion interface (314) smoothly switches between different multiplexed modes, compatible with cross-transmission of wavelength division, space division, and polarization multiplexed signals; the optical power equalizer (315) dynamically adjusts the optical power distribution of each channel; the dynamic routing switching control chip (34) includes a link status detection circuit (341), a routing switching drive circuit (342), a link quality evaluation circuit (343), and a switching conflict arbitration circuit (344); the link status detection circuit (34 ... 41) The routing switching drive circuit (342) communicates bidirectionally with the routing switching drive circuit (342) via a data bus; the link quality assessment circuit (343) constructs a link quality scoring model based on bit error rate, latency and packet loss rate parameters; the switching conflict arbitration circuit (344) reasonably allocates resources when multiple modes switch simultaneously; the multi-interface compatible adapter (32) has built-in LC, SC and MPO interface conversion contacts, and the modal priority storage chip (33) is a non-volatile storage chip; the silicon-based photonic integrated chip (31) is soldered to the center of the middle layer motherboard, the multi-interface compatible adapter (32) is connected to the common port of the silicon-based photonic integrated chip (31) via a flexible cable, and the modal priority storage chip (33) and the dynamic routing switching control chip (34) are symmetrically arranged on both sides of the silicon-based photonic integrated chip (31) and achieve signal interaction through onboard circuits.

5. A multimodal optical communication module with network defense capabilities according to claim 4, characterized in that, The photoelectric feature fusion identification chip (43) includes an optical signal feature extraction circuit (431), an electrical signal feature acquisition circuit (432), a feature fusion processing chip (433), an abnormal feature storage circuit (434), and an identification threshold adaptive circuit (435). The optical signal feature extraction circuit (431) receives the parameter signal output by the optical signal parameter monitor (41), and the electrical signal feature acquisition circuit (432) acquires data packet features. The outputs of both are connected to the feature fusion processing chip (433). The abnormal feature storage circuit (434) records historical intrusion feature samples to form a feature library to support incremental learning. The identification threshold adaptive circuit (435) dynamically adjusts the intrusion identification threshold according to the link environment to balance the identification accuracy and false alarm rate. The three-level defense linkage controller (44) includes a link connection / disconnection control switch (441), an encryption strength adjustment circuit (442), and a route switching control switch (443). The system includes a defense strategy selection circuit (444) and an emergency isolation trigger circuit (445); the link connection control switch (441), encryption strength adjustment circuit (442), and route switching control switch (443) are integrated in the same control unit; the defense strategy selection circuit (444) is based on the optimal defense scheme matching the intrusion type and level; the emergency isolation trigger circuit (445) quickly cuts off dangerous links when high-risk intrusions are detected; the optical signal parameter monitor (41) is equipped with power and wavelength monitoring thresholds; the national cryptographic algorithm encryption chip (42) uses the SM4 algorithm; and the defense core control interface (45) is the core control interface; each component is connected through a high-speed serial bus; the optical signal parameter monitor (41) and the national cryptographic algorithm encryption chip (42) are arranged adjacent to each other; the photoelectric feature fusion identification chip (43) and the three-level defense linkage controller (44) are stacked on top of each other; and the defense core control interface (45) is welded to the edge of the component.

6. A multimodal optical communication module with network defense capabilities according to claim 1, characterized in that, The modal routing collaborative scheduling chip (52) includes a modal state acquisition circuit (521), a routing scheduling control circuit (522), a scheduling strategy optimization circuit (523), and a state feedback adjustment circuit (524). The modal state acquisition circuit (521) receives the state signals of the multimodal transmission component (3) and outputs scheduling instructions to the routing scheduling control circuit (522). The scheduling strategy optimization circuit (523) optimizes the scheduling algorithm based on real-time link status and historical scheduling data. The state feedback adjustment circuit (524) dynamically corrects the scheduling instructions according to the execution results of each component to improve the coordination accuracy. The dual-mode switching logic circuit (51) is a logic gate circuit integrated module, the defense strategy algorithm storage chip (53) is a flash memory chip, and the multi-bus communication interface (54) includes SPI and I2C bus interfaces. Each component is integrated into the same MCU chip package. The dual-mode switching logic circuit (51) and the multi-bus communication interface (54) are located in the pin areas on both sides of the chip, respectively. The modal routing collaborative scheduling chip (52) and the defense strategy algorithm storage chip (53) are located in the core area of ​​the chip and achieve data interaction through the internal bus. The chip is fixed by the PCB board bracket, and the pins are soldered to the motherboard pads for conduction.

7. A multimodal optical communication module with network defense capabilities according to claim 5, characterized in that, The working method of the multimodal optical communication module includes the following steps: S1, multimodal signal adaptation and transmission: the dual-mode switching logic circuit (51) controls the dual-mode driven integrated optical transmitter component (21) to switch NRZ or PAM4 modulation mode according to the transmission requirements, the VCSEL laser transmitter (213) outputs the corresponding optical signal, and the silicon-based photonic integrated chip (31) selects wavelength division, space division or polarization multiplexing mode, and the signal adaptation and transmission is realized through the multi-interface compatible adapter (32); S2, optoelectronic dual-layer monitoring: the optical fiber splitter (223) splits the received optical signal, the APD photodiode (221) converts the optical signal into an electrical signal, the optical fiber spectrometer (222) collects the optical signal characteristic parameters and feeds them back to the optical signal parameter monitor (41), and at the same time the electrical layer data characteristics are collected by the electrical signal characteristic acquisition circuit (432); S3, input Intrusion identification and defense linkage: The photoelectric feature fusion identification chip (43) integrates photoelectric features to make intrusion judgment. If the identification is abnormal, the three-level defense linkage controller (44) triggers link shielding, encryption upgrade or route switching. The national cryptographic algorithm encryption chip (42) encrypts the data. S4, Dynamic routing and error compensation: The dynamic routing switching control chip (34) adjusts the transmission route according to the preset parameters of the modal priority storage chip (33) and the link status. The transmit and receive collaborative dynamic error compensation circuit (25) realizes double-layer error compensation through FEC encoding and optical layer parameter adjustment. S5, Full module collaborative optimization: The modal routing collaborative scheduling chip (52) receives the status feedback of each component in real time and issues control commands through the multi-bus communication interface (54) to dynamically adjust the modulation mode, multiplexing mode and defense strategy to form a transmission defense collaborative optimization closed loop.

8. A multimodal optical communication module with network defense capabilities according to claim 7, characterized in that: In S3, the working steps of the photoelectric feature fusion recognition chip (43) are as follows: S31, photoelectric feature acquisition and preprocessing: the power and wavelength feature parameters of the optical signal are acquired through the optical signal parameter monitor (41), and the transmission rate and frame structure electrical signal feature parameters of the data packet are acquired through the electrical signal feature acquisition circuit (432); the acquired optical signal feature parameters and electrical signal feature parameters are normalized to obtain the normalized value of the optical signal feature vector. and the normalized value of the eigenvector of the electrical signal To eliminate the influence of dimensional differences on the identification results; S32, Intrusion identification confidence calculation: Based on the preprocessed photoelectric feature parameters, the intrusion identification confidence is calculated using the photoelectric-defense strategy fusion intrusion identification function formula in the photoelectric feature fusion identification chip (43); The photoelectric defense strategy fusion intrusion identification function formula used by the photoelectric feature fusion identification chip (43) calculates the photoelectric defense collaborative intrusion identification confidence, and the photoelectric defense strategy fusion intrusion identification function formula is: In formula (2), The photoelectric feature fusion recognition chip (43) outputs the photoelectric-defense collaborative intrusion recognition confidence level, where detect is the abbreviation for recognition and sync is the abbreviation for collaboration. This is the Sigmoid activation function, and it is a general function symbol. The optical features, electrical features, and defense strategy weights configured for the network defense component (4) are respectively, and the subscripts 1, 2, and 3 are the sequence numbers of the corresponding features. The normalized value of the optical signal feature vector collected by the optical communication signal transceiver component (2), where opt is an abbreviation for optical; The optical feature confidence coefficient calculated for the network defense component (4) has a value of 0-1; The normalized value of the electrical signal feature vector collected by the optical communication signal transceiver component (2) is elec, which is an abbreviation for electrical. The electrical signature confidence coefficient calculated for the network defense component (4) has a value of 0-1; The value is the quantification value of the defense strategy level currently enabled by the network defense component (4), which takes the value of 0-1; The adaptation coefficient for the defense strategy of the network defense component (4) is 0-1; The bias parameters are dynamically issued by the total controller (5).

9. A multimodal optical communication module with network defense capabilities according to claim 7, characterized in that, The transmit-receive coordinated dynamic error compensation circuit (25) in S4 calculates the total error-routing-defense coordinated compensation amount using the error-routing-defense coordinated compensation function formula, which is: ； In formula (3), The total error-routing-defense collaborative compensation amount output by the transmit-receive collaborative dynamic error compensation circuit (25) is called the error-routing-defense collaborative compensation amount. "comp" is the abbreviation for compensation, and "sync" is the abbreviation for collaboration. The bit error rate, optical power, and FEC gain weighting coefficient are respectively configured for the optical communication signal transceiver component (2), and the subscripts 1, 2, and 3 are the sequence numbers of the corresponding parameters. The routing adaptation weight coefficient configured for the total controller (5); BER is the difference between the real-time bit error rate detected by the optical communication signal transceiver component (2) and the target bit error rate. The bit error rate defense correlation correction coefficient provided for the network defense component (4) has a value of 0-2; The optical power gradient of the optical communication signal transceiver component (2) is adjusted, where opt is an abbreviation for optics; The optical power transmission adaptation coefficient provided for the multimodal transmission component (3) has a value of 0-2; The forward error correction coding gain value of the optical communication signal transceiver component (2) is FEC, which is an abbreviation for forward error correction, and gain is the English word for gain. The FEC coding defense adaptation coefficient provided for the network defense component (4) has a value of 0-2; The transmission efficiency quantization value of the current route of the multimodal transmission component (3) is 0-1; The routing compensation weight coefficient provided to the total controller (5) has a value of 0-2; the dynamic routing switching control chip (34) in S4 uses the routing switching-defense verification collaborative delay function formula to calculate the total routing switching-defense verification collaborative delay, and the routing switching-defense verification collaborative delay function formula is as follows: ； In formula (4), The total delay of the route switching-defense verification collaboration output by the dynamic route switching control chip (34) is the total delay of the route switching-defense verification collaboration. "switch" is an abbreviation for switching, and "sec" is an abbreviation for security. The link state detection time of the multimodal transmission component (3) is denoted by 'detect', which is an abbreviation for detection. The optimal route selection time for the multimodal transmission component (3) is given by "select" (abbreviation for selection). The synchronization time between modules coordinated by the main controller (5), where sync is an abbreviation for synchronization; The total hop count delay of the multimodal transmission component (3) is hop number, k is the total hop count of the multimodal transmission component (3), and hop is the English word for hop count. This refers to the link security verification time after the route switch of the network defense component (4), where "verify" is an abbreviation for verification. The encryption initialization time of the network defense component (4) on the new route, where enc is the English abbreviation for encryption.

10. A multimodal optical communication module with network defense capabilities according to claim 7, characterized in that, The modal routing cooperative scheduling chip (52) in S5 uses the transmission defense resource cooperative scheduling priority function formula to calculate the transmission defense resource cooperative scheduling priority. The transmission defense resource cooperative scheduling priority function formula is as follows: In formula (5), The transmission defense resource collaborative scheduling priority output by the modal routing collaborative scheduling chip (52) is schedule, which is an abbreviation for scheduling and sync, which is an abbreviation for collaboration. The service quality, security, transmission efficiency and resource consumption weight coefficients configured for the main controller (5) are respectively, and the subscripts 1, 2, 3 and 4 are the sequence numbers of the corresponding parameters. The quality of service score fed back by the multimodal transmission component (3) has a value of 0-100. An abbreviation for service quality; The real-time link security level provided for the network defense component (4) is 1-5, and sec is an abbreviation for security; The transmission efficiency coefficient fed back by the multimodal transmission component (3) has a value of 0-1, and trans is an abbreviation for transmission; The module hardware resource utilization rate detected by the total controller (5) is 0-1; The resource adaptation coefficient configured for the main controller (5) has a value of 0-1.

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