Integrated manufacturing method of deep X-shaped hole filling and leveling of IC carrier plate and MSAP fine circuit

Abstract

The invention relates to a deep X-shaped hole filling and leveling and MSAP fine circuit integrated manufacturing method of an IC carrier plate. The method comprises the following steps: step S1, deep hole filling; step S2, copper reduction; s3, a dry film covers the filling area of the deep hole, and other areas are completely exposed; s4, etching to completely remove the surface copper plating layer of the exposed area and the original ultrathin copper foil below the exposed area, and exposing the original resin surface of the substrate; s5, removing the dry film, and grinding the copper columns protruding out of the surface to enable the copper columns to be coplanar with the original resin interface of the substrate; s6, re-depositing a seed layer on the surface of the substrate; and S7, forming a fine circuit pattern on the seed layer. According to the method, void-free filling of the blind hole with the depth larger than or equal to 150 microns and high-precision manufacturing of the line with the line width smaller than or equal to 30 microns are successfully achieved, a manufacturing solution with excellent performance and mass production feasibility is provided for high-density and three-dimensional advanced packaging, and the product competitiveness and the industrial practical value are remarkably improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of circuit board processing, and particularly relates to an integrated manufacturing method for deep X-shaped hole filling and MSAP fine line of an IC carrier plate. BACKGROUND

[0002] With the development of integrated circuits towards higher performance and smaller size, the packaging substrate needs to carry more complex interconnection structures. When the substrate line requires to reach the ultra-fine level of 15-30 mu m (15 mu m <= T <= 30 mu m), the industry generally adopts the semi-additive process (MSAP) for manufacturing. However, when such structures contain blind holes with a depth greater than or equal to 150 mu m (such as X-shaped holes), the traditional MSAP process faces an insurmountable technical bottleneck: since MSAP adopts pattern plating, its plating capacity is limited by the thickness and geometry of the dry film window. For deep blind holes, the plating solution exchange and additive supply are severely insufficient, resulting in a huge cavity (usually more than 30% of the hole volume) and a deep recess (> 10 mu m) in the hole, which cannot meet the industry reliability standards (cavity rate <= 30%, recess <= 10 mu m, and cavity does not contact the hole wall), such as Figure 3

[0003] Although special hole filling techniques such as vertical continuous plating or pulse plating can perfectly fill deep blind holes, this kind of hole filling processing method will damage or remove the continuous conductive seed layer necessary for subsequent fine line pattern manufacturing in the subsequent process, resulting in the incompatibility of hole filling (hole depth >= 150 um) and fine line manufacturing.

[0004] Therefore, the prior art has a significant defect: it cannot economically and reliably realize the high-quality filling of blind holes with a depth >= 150 mu m and the manufacturing of fine lines with a line width <= 30 mu m on the same substrate. This seriously restricts the development of high-end packaging products towards higher integration and more complex three-dimensional interconnection structures. SUMMARY

[0005] Therefore, the purpose of the present application is to provide an integrated manufacturing method for deep X-shaped hole filling and MSAP fine line of an IC carrier plate to solve the problems in the background art.

[0006] To achieve the above-mentioned purpose, the present application mainly adopts the following technical solutions:

[0007] An integrated manufacturing method for deep X-shaped hole filling and MSAP fine line of an IC carrier plate, comprising the following steps:

[0008] ​Step S1, deep hole filling; providing a substrate, the outer surface of the substrate is laminated with an ultra-thin copper foil, the interface between the ultra-thin copper foil and the substrate has a low-profile micro-roughness structure; forming a deep hole with a depth of ≥150um on the substrate; then, using a special hole-filling electroplating process without a pattern mask to fill the deep hole until it is filled;

[0009] Step S2, copper reduction on the surface of the substrate after electroplating;

[0010] Step S3, dry film on the outer surface of the thinned substrate, through the exposure and development process, the dry film only covers the filled area of the deep hole, and the other areas are completely exposed;

[0011] Step S4, etching the surface area not protected by the dry film until the surface copper plating layer and the original ultra-thin copper foil below in the area are completely removed, exposing the original resin surface of the substrate;

[0012] Step S5, after removing the dry film, the surface is composed of two parts: the original resin surface of the intact substrate and the solid copper column protruding from the plane; grinding the solid copper column to make it coplanar with the original resin interface of the substrate;

[0013] Step S6, chemical copper deposition on the surface of the substrate to re-deposit a conductive layer as a new seed layer;

[0014] Step S7, patterned electroplating on the seed layer to form the fine line pattern as required.

[0015] Further, in step S1, the special hole-filling electroplating process is vertical continuous plating or pulse electroplating.

[0016] Further, in step S1, a laser is used to accurately window on the ultra-thin copper foil to form a window through the ultra-thin copper foil layer, exposing the substrate; then, laser drilling is performed on the exposed resin substrate through the window to form a deep hole with a depth of ≥150um.

[0017] Further, in step S6, the deposition method of the seed layer is chemical deposition or physical vapor deposition.

[0018] Further, when the seed layer is formed by physical vapor deposition of titanium copper layer, before step S7, it also includes the step of removing the titanium layer outside the line pattern area.

[0019] Further, in step S6, to reinforce the seed layer, an additional primer electroplating layer is added, which is 2-3um.

[0020] Further, in step S4, the etching is wet chemical etching, and the etching endpoint is the original resin interface of the substrate.

[0021] Further, in S7, first, a dry film is attached outside the primer plating layer, and an image exposure and development are performed to form a circuit pattern; then, pattern plating is performed to thicken the copper in the circuit area; then, the film is removed, and the primer plating layer and the chemical copper seed layer that are not protected by the pattern plating are quickly removed by flash etching to form the required fine circuit.

[0022] In summary, the application breaks through the technical barrier that the traditional MSAP process cannot fill a deep blind hole with high quality due to the limitation of the dry film by using a special hole-filling plating process without a pattern mask; then, the low-profile interface characteristics of the substrate are utilized to rebuild the seed layer through selective etching, so that a conductive substrate with a bonding force and uniformity comparable to the original material is constructed, and the subsequent fine circuit manufacturing can be reliably implemented. The method successfully realizes the non-cavity filling of a deep hole with a depth of ≥150 μm and the high-precision manufacturing of a line width of ≤30 μm, and the product reliability is comparable to that of the traditional high-end process. The method provides a manufacturing solution with excellent performance and mass production feasibility for high-density and three-dimensional advanced packaging, significantly improves the product competitiveness and industrial practical value, has strong practicality, and has strong popularization significance. BRIEF DESCRIPTION OF DRAWINGS

[0023] Figure 1 FIG. 1 is a flowchart of a hole-filling part of an integrated manufacturing method of deep X-shaped hole filling and MSAP fine circuit of an IC carrier plate according to the application;

[0024] Figure 2 FIG. 2 is a flowchart of a pattern manufacturing part of the integrated manufacturing method of deep X-shaped hole filling and MSAP fine circuit of the IC carrier plate according to the application;

[0025] Figure 3 FIG. 3 is one of the adverse effects of the traditional MSAP process filling a deep hole. DETAILED DESCRIPTION

[0026] In order to make the purpose, technical scheme and advantages of the application more clear, the application is further described in detail below with reference to the drawings and examples.

[0027] As shown in Figure 1 and Figure 2 The application provides an integrated manufacturing method of deep X-shaped hole filling and MSAP fine circuit of an IC carrier plate, which is used to realize the MSAP filling of a deep hole with a depth of ≥150 um and the fine circuit manufacturing with a line width of ≤30 μm on the IC carrier plate, breaks through the technical barrier of the prior art, and improves the product competitiveness.

[0028] The integrated manufacturing method of deep X-shaped hole filling and MSAP fine circuit of the IC carrier plate specifically includes the following steps:

[0029] Step S1, X-shaped hole filling; providing a substrate 10, the outer surface of which is laminated with an ultra-thin copper foil 20, the interface between the ultra-thin copper foil 20 and the substrate 10 having a low-profile micro-roughness structure; forming an X-shaped hole 11 on the substrate 20; then, using a special hole-filling electroplating process without a pattern mask to fill the X-shaped hole 11 until it is filled.

[0030] Specifically, in this embodiment, the thickness of the ultra-thin copper foil 20 is 1-5 μm, preferably 3 μm. The substrate 10 is a resin plate, and the interface between the ultra-thin copper foil 20 and the substrate 10 has a low-profile micro-roughness structure, so that after the ultra-thin copper foil 20 is removed later, the exposed resin surface of the substrate 10 is suitable for depositing a conductive seed layer with required bonding force. More specifically, the substrate 10 is a special substrate required for the MSAP process, and only the copper foil 20 is thinner than the conventional structure.

[0031] In this embodiment, a laser is used to accurately window on the ultra-thin copper foil 20 to form a window 21 penetrating through the ultra-thin copper foil 20 layer, exposing the substrate 10. Then, the exposed resin substrate 10 is laser-drilled through the window 21 to form an X-shaped hole 11 with a depth ≥ 150 um.

[0032] In this embodiment, the special hole-filling electroplating process without a pattern mask is VCP (vertical continuous plating) electroplating or pulse electroplating. Specifically, when the depth of the deep hole 11 is 150-350 um, VCP hole-filling electroplating is used, and 3-5 um of VCP priming electroplating needs to be added to improve the conductivity and reduce the hole-filling depression and cavities. When the depth of the deep hole 11 is 350-500 um, the additive diffusion rate limitation caused by the hole depth becomes the main factor affecting the filling quality, so pulse electroplating process is needed. The pulse electroplating breaks through the depth limitation and realizes super-filling without cavities by periodically turning on and off the current and effectively restoring the additive concentration in the hole during the off period.

[0033] Step S2, copper thinning on the surface of the electroplated substrate. After the hole-filling treatment is completed, the copper on the surface of the substrate 10 will be thick, so the surface copper needs to be thinned. In this embodiment, the overall surface copper thickness needs to be uniformly reduced to 5-10 um.

[0034] Step S3, dry film 30 on the outer surface of the thinned substrate 10; through the exposure and development process, the dry film 30 only covers the filling area of the X-shaped hole 11, and the other areas are completely exposed.

[0035] Step S4, etching the surface area not protected by the dry film 30 until the surface copper plating layer and the original ultra-thin copper foil 20 below in this area are completely removed, exposing the original resin surface of the substrate 10.

[0036] Specifically, in this embodiment, an acidic copper chloride etching solution is used to etch the exposed area until the copper layer in the exposed area (including the thinned thick copper and the original 3μm copper foil) is completely dissolved, and the etching automatically stops at the original rough interface of the substrate 10.

[0037] Step S5: After removing the dry film, the surface now consists of two parts: the intact original resin surface of the substrate 10, and the solid copper pillar 12 protruding from the plane. The solid copper pillar 12 is ground to make it coplanar with the original resin interface of the substrate 10.

[0038] In this embodiment, the solid copper pillar 12 filling the hole is removed by grinding, which can make the hole depression close to zero, so that the copper hole and the substrate are on the same surface, but without excessively damaging the surface of the substrate. This has an absolute advantage for existing chip flip-chip and large die (chip bare die) mounting.

[0039] Step S6: Perform chemical copper deposition on the surface of the substrate 10 to redeposit a conductive layer as a new seed layer 40. The method for redepositing the seed layer 40 can be selected according to the required adhesion between the conductive layer and the resin substrate 10: when the adhesion requirement is ≥0.5N / mm, a chemical deposition process is used; if the adhesion requirement is ≥0.9N / mm, a physical vapor deposition process is used, depositing a titanium layer and a copper layer sequentially; when using physical vapor deposition of a titanium-copper layer, after the patterning electroplating step and before the etching seed layer step, a step of removing the titanium layer outside the circuit pattern area is also included. In addition, to reinforce the seed layer, a base electroplating layer 50 can be added. In this embodiment, the base electroplating layer 50 is specifically 2-3µm.

[0040] Step S7: On the new seed layer, perform patterned electroplating to form the fine circuit pattern required by the design. The line width of the fine circuit is 15μm to 30μm.

[0041] In this embodiment, the fine circuitry 70 is fabricated using the MSAP process. Specifically, a dry film 60 is first applied to the outside of the base plating layer 50, and imaging exposure and development are used to form the circuit pattern. Then, pattern plating is performed to thicken the copper in the circuit area. Next, the film is removed, and the base plating layer 50 and the chemical copper seed layer 40, which are not protected by the pattern plating, are quickly removed by flash etching to form the required fine circuitry 70. Finally, on the substrate 10, there are both fully filled, coplanar deep X-shaped blind vias and independent, precise copper circuitry. Testing showed that the X-shaped blind vias fabricated in this embodiment have no voids, and the recess is ≤2μm, fully meeting the requirements of high-end packaging. The linewidth accuracy, side etching angle, and peel strength between the circuitry and the substrate of the fine circuitry all meet and exceed the standards of traditional MSAP process products.

[0042] In summary, this invention overcomes the technical barrier of traditional MSAP processes, which are limited by dry film, by employing a dedicated via-filling electroplating process without pattern masks. Furthermore, by utilizing the low-profile interface characteristics of the substrate, selective etching and seed layer 40 reshaping are used to construct a conductive substrate with bonding strength and uniformity comparable to the original material, enabling reliable subsequent fine-line fabrication. This method successfully achieves void-free filling of blind vias with a depth ≥150μm and high-precision fabrication of lines with a linewidth ≤30μm. Its product reliability is comparable to traditional high-end processes, providing a manufacturing solution for high-density, three-dimensional advanced packaging that combines excellent performance with mass production feasibility. This significantly enhances product competitiveness and industrial practical value; it is highly practical and has significant potential for widespread application.

[0043] The above description is merely a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A method for integrating deep X-hole filling and MSAP fine circuitry on an IC substrate, characterized in that: The method comprises the following steps: Step S1, filling deep hole; providing a substrate, the outer surface of the substrate is laminated with an ultra-thin copper foil, the interface between the ultra-thin copper foil and the substrate has a low-profile micro-roughness structure; forming a deep hole with a depth of ≥150um on the substrate; Then, using a special hole-filling electroplating process without a pattern mask to fill the deep hole until it is filled; Step S2, reducing copper on the surface of the substrate after electroplating; Step S3, laminating a dry film on the outer surface of the thinned substrate, using an exposure and development process to make the dry film only cover the filled area of the deep hole, and other areas are completely exposed; Step S4, etching the surface area not protected by the dry film until the surface copper plating layer and the original ultra-thin copper foil below in the area are completely removed, exposing the original resin surface of the substrate; Step S5, after removing the dry film, the surface is composed of two parts: the original resin surface of the intact substrate and the solid copper column protruding from the plane; grinding the solid copper column to make it coplanar with the original resin interface of the substrate; Step S6, chemical copper deposition on the surface of the substrate to re-deposit a conductive layer as a new seed layer; Step S7, performing patterned electroplating on the seed layer to form the desired fine line pattern.

2. The method for integrating deep X-hole filling and MSAP fine circuitry on an IC substrate as described in claim 1, characterized in that: In step S1, the special hole-filling electroplating process is vertical continuous plating or pulse electroplating.

3. The method for integrating deep X-hole filling and MSAP fine circuitry on an IC substrate as described in claim 1, characterized in that: In step S1, a laser is used to accurately open a window on the ultra-thin copper foil to expose the substrate; then the exposed resin substrate is laser drilled through the window to form a deep hole with a depth of ≥150um.

4. The method for integrating deep X-hole filling and MSAP fine circuitry on an IC substrate as described in claim 1, characterized in that: In step S6, the deposition method of the seed layer is chemical deposition or physical vapor deposition.

5. The method for integrating deep X-hole filling and MSAP fine circuitry on an IC substrate as described in claim 1, characterized in that: When the seed layer is formed by physical vapor deposition of a titanium copper layer, before step S7, there is also a step of removing the titanium layer outside the line pattern area.

6. The method of claim 1, wherein the method further comprises: 5 filling the deep X-shaped hole with a conductive material to form a conductive via; and removing the conductive material from the MSAP fine line to form a fine line. 10 In step S6, to reinforce the seed layer, an additional 2-3um of primer plating layer is added.

7. The method for integrating deep X-hole filling and MSAP fine circuitry on an IC substrate as described in claim 1, characterized in that: In step S4, the etching is wet chemical etching, and the etching endpoint is the original resin interface of the substrate.

8. The method for integrating deep X-hole filling and MSAP fine circuitry on an IC substrate as described in claim 1, characterized in that: In S7, MSAP process is used to form the desired fine line pattern.

9. The method of claim 8, wherein the method further comprises: forming a photoresist layer on the substrate; and forming a photoresist mask on the photoresist layer, wherein the photoresist mask exposes the substrate at the first and second locations. First, cover the dry film on the outside of the primer plating layer, use imaging exposure and development to form the line pattern; Then, perform pattern electroplating to thicken the copper in the line area; Then, remove the film, and quickly remove the primer plating layer and chemical copper seed layer not protected by the pattern electroplating through flash etching to form the desired fine line.

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