Current sensing circuit

Abstract

The invention relates to a current sensing circuit. The circuit senses a first output current of the switched mode power supply. The circuit includes a sample and hold component configured to store an image of the first output current during a non-conducting phase of a high voltage switch of the switched mode power supply.

Description

[0001] Cross-references to related applications

[0002] This application claims priority to French patent application number FR2409737, filed on September 13, 2024, the entire contents of which are incorporated herein by reference to the full extent permitted by law. Technical Field

[0003] This disclosure generally relates to electronic systems and circuits, and more particularly to electronic systems and circuits configured as output power supplies. More specifically, this disclosure relates to switch-mode power supplies and circuits capable of transmitting the output current of the switch-mode power supply. Background Technology

[0004] There are various types of power supply circuits that can deliver current / voltage pairs to electronic circuits, devices, systems, or loads more broadly. Linear power supplies and switching-mode power supplies are examples of power supply circuits.

[0005] A switch-mode power supply is a power supply circuit configured to deliver DC voltage from an input voltage. Switch-mode power supplies are typically DC / DC converters that take DC voltage as input; however, some switch-mode power supplies may include a rectifier stage that enables them to take AC voltage (e.g., AC mains power) as input.

[0006] Switch-mode power supplies are typically equipped with one or more circuits that measure the current and / or voltage they carry, for purposes such as checking the proper operation of the switch-mode power supply.

[0007] It is desirable to improve, at least in part, certain aspects of existing switch-mode power supplies, and in particular certain aspects of the circuitry used to sense the current of the switch-mode power supply.

[0008] There is a demand for higher performance switching mode power supplies.

[0009] There is a need for switch-mode power supplies that include higher-performance current sensing circuitry.

[0010] It is necessary to overcome all or some of the shortcomings of existing switch-mode power supplies.

[0011] It is necessary to overcome all or part of the shortcomings of existing circuits used for sensing current in switch-mode power supplies. Summary of the Invention

[0012] One embodiment provides a current sensing circuit configured to measure the output current of a switch-mode power supply.

[0013] One embodiment provides a current sensing circuit that includes a sampling circuit.

[0014] One embodiment provides a circuit for sensing a first output current of a switch-mode power supply, the circuit including a sampling and holding component configured to store a mirror image of the first output current during the non-conducting phase of a high-voltage switch of the switch-mode power supply.

[0015] Another embodiment provides a current sensing method that uses circuitry for sensing a first output current of a switch-mode power supply, the circuitry including a sample-and-hold component configured to store a mirror image of the first output current during the non-conducting phase of a high-voltage switch of the switch-mode power supply.

[0016] According to one embodiment, the mirror image is a mirror image of the current flowing in the high-voltage switch.

[0017] According to one embodiment, the result provided by the sampling and holding component is compared with a threshold to provide information about exceeding the threshold.

[0018] According to one embodiment, the threshold is provided by a reference current supplied via a digital-to-analog converter.

[0019] According to one embodiment, the sampling and holding component includes a switch and a capacitor.

[0020] According to one embodiment, the sampling and holding components are controlled by a sampling signal.

[0021] According to one embodiment, the sampling signal triggers the storage of a mirror image of the first current with a time delay.

[0022] According to one embodiment, the sampling and holding component is configured to directly receive the first current.

[0023] According to one embodiment, the circuit includes: a control loop configured to receive a first current to be sensed; a first transistor and a second transistor connected as a current mirror, the first transistor being configured to receive the output of the control loop, and the second transistor being configured to transmit a mirror image of the first current; wherein a sampling and holding component is disposed between control terminals of the first transistor and control terminals of the second transistor.

[0024] According to one embodiment, the control loop includes a current comparator configured to receive a mirror image of a first current.

[0025] According to one embodiment, the second transistor is also configured to receive a reference current.

[0026] According to one embodiment, the reference current is provided by a digital-to-analog converter.

[0027] Another embodiment provides a switch-mode power supply including the aforementioned current sensing circuit.

[0028] According to one embodiment, the switch-mode power supply is a buck switch-mode power supply, a boost switch-mode power supply, or a buck-boost switch-mode power supply.

[0029] Another embodiment provides a device including the aforementioned switch-mode power supply.

[0030] According to one embodiment, the device is a microcontroller. Attached Figure Description

[0031] The foregoing features and advantages, as well as others, will be described in detail in the remaining disclosure of specific embodiments given by way of illustration and not limitation, with reference to the accompanying drawings, wherein:

[0032] Figure 1 A portion of a switch-mode power supply including current sensing circuitry is shown.

[0033] Figure 2 An embodiment of a current detection circuit is shown;

[0034] Figure 3 Explanation is shown Figure 2 A graph illustrating the operation of an embodiment;

[0035] Figure 4 Explanation is shown Figure 2 Other graphs showing the operation of the embodiments;

[0036] Figure 5 Showing more details Figure 1 Part of the embodiments;

[0037] Figure 6 Showing more details Figure 1 Part of the embodiments;

[0038] Figure 7 Showing more details Figure 2 Part of the embodiments;

[0039] Figure 8 Showing more details Figure 2 Part of the embodiments;

[0040] Figure 9 Showing more details Figure 2 Part of the embodiments;

[0041] Figure 10 Showing more details Figure 2 Part of the embodiments; and

[0042] Figure 11 An application of the described embodiment is shown. Detailed Implementation

[0043] Similar features are designated by the same reference numerals in the various figures. In particular, common structural and / or functional features in various embodiments may have the same reference numerals and may have the same structure, dimensions, and material properties.

[0044] For clarity, only those steps and elements that help to understand the embodiments are shown and described in detail.

[0045] Unless otherwise stated, when referring to two elements being connected together, it means that there is no direct connection of any intermediate element other than a conductor, and when referring to two elements being coupled together, it means that the two elements may be connected via one or more other elements or that they may be coupled.

[0046] In the following description, when absolute positional qualifiers such as "front," "back," "up," "down," "left," and "right," or relative positional qualifiers such as "top," "bottom," "up," and "down," or directional qualifiers such as "horizontal" and "vertical," the direction of the attached figure shall be indicated unless otherwise specified.

[0047] Unless otherwise stated, the expressions “about,” “approximately,” “substantially,” and “about” indicate a plus or minus 10%, preferably a plus or minus 5%.

[0048] The embodiments described below relate to the implementation of a switch-mode power supply, and more specifically, to the implementation of sensing the output current of the switch-mode power supply via a current sensing circuit. In some cases, sensing that the output current of the switch-mode power supply exceeds a threshold current may be delayed. This disclosure provides a solution to overcome this problem by adding a sample-and-hold component (SnH) to the current sensing circuit. This solution combines... Figures 1 to 10 To be described.

[0049] Furthermore, the embodiments described below are particularly applicable to general-purpose microcontrollers in small or large home appliances, electronic cigarettes, computer peripherals, mobile phones, etc. The application of these embodiments is combined with... Figure 11 It is described in more detail.

[0050] Furthermore, the embodiments described above are specifically designed for any type of industrial market requiring switch-mode power supplies. More specifically, the switch-mode power supply can be used in: the automotive industry, such as vehicle electrification or advanced driver assistance systems (ADAS); industrial sectors, such as green energy, infrastructure electrification, the Internet of Things (IoT), and smart homes, where power, energy consumption, and data exchange are key elements; the personal electronics industry, such as mobile phones, IoT, and high-speed interfaces; and the communications equipment, computer, and peripherals industry, such as infrastructure and data center sectors, and low Earth orbit (LEO) satellite sectors.

[0051] Switch-mode power supplies (or switching converters) typically include two switches for switching the DC voltage to be converted. These switches are connected in series between the two terminals where the voltage to be converted is applied. The midpoint between these two switches is connected to the terminal providing the DC voltage via an inductor (coil or other), and this DC voltage is smoothed by a capacitor between the power supply terminal and a voltage reference terminal (e.g., the reference terminal for the voltage to be converted). The switch that connects the terminal with the higher potential (the voltage to be converted) to the midpoint of the inductor is typically called the high-side switch, while the switch that connects its midpoint to the lower potential (the reference terminal) is called the low-side switch. The high-side switch is controlled by a switching signal. The low-side switch can be a controllable switch (with control terminals) or an automatic switch (diode type). The semiconductor switch is typically a power MOS transistor with a P-channel high side and an N-channel low side. In some converters, the low-side switch is a diode (called a freewheeling diode).

[0052] Figure 1 A portion of a switch-mode power supply 100 including a current sensing circuit 150 according to an embodiment is shown.

[0053] Part 100 also includes a high-voltage switch M101, which is configured to receive a voltage Vin100 to be converted at one of its conducting terminals (this terminal is coupled to a first terminal at a high potential to which the voltage is applied), and to supply the converted voltage to the output of the switching power supply via a coil L101. A second terminal of switch M101 is coupled, preferably connected, to node A100, which is coupled to coil L101. The control terminal of switch M101 is configured to receive a control voltage from the switching mode power supply.

[0054] Switch M101 is the switch on the high side of the switch-mode power supply. Node A100 is therefore coupled to another terminal of the applied voltage Vin100 via a switch on the low side (not shown).

[0055] According to one embodiment, the high-voltage switch M101 is a metal-oxide-semiconductor field-effect transistor (MOSFET). Alternatively, switch M101 can be a P-channel MOS transistor, a P-type MOS transistor, or a PMOS transistor.

[0056] Similarly, switch-mode power supplies typically also include low-side switches ( Figure 1 (not shown), that is, a switch configured to couple node A100 to a second terminal to which voltage Vin100 is applied, for example, reference voltage GND100, for example, ground.

[0057] The operation of a switch-mode power supply is based on an alternating on and off phase of a series of high-side switches (on the high-potential side) and low-side switches (on the low-potential side). This operation is conventional and within the capabilities of those skilled in the art.

[0058] Part 100 also includes two switches, M102 and M103, which are arranged in series with each other and form a component connected in parallel with switch M101. According to one example, switches M102 and M103 are both switches of the same type as switch M101, i.e., in... Figure 1 In the case shown, a PMOS transistor is used. Therefore, the first conducting terminal of switch M102 is coupled, preferably connected, to the node transmitting the voltage Vin100 to be converted, and the second conducting terminal of switch M102 is coupled, preferably connected, to the first conducting terminal of switch M103 and node B100. The second conducting terminal of switch M103 is coupled, preferably connected, to node A100. The control terminals of switches M102 and M103 are configured to receive the same control voltage as the control voltage received by the control terminal of switch M101.

[0059] Node B100 is a node that transmits a mirror current of the output current of the switch-mode power supply, which is a mirror of the current proposed for evaluation by the current sensing circuit 150.

[0060] According to one example, an inductor circuit (coil L101) and a filter capacitive element form a filter circuit. Then, part 100 also includes an LC-type filter circuit comprising coil L101 and capacitor C101. This filter circuit is arranged between node A100 and the node transmitting the reference voltage GND100. More specifically, the first terminal of coil L101 is coupled, preferably connected, to node A100, and the second terminal of coil L101 is coupled, preferably connected, to the first terminal of capacitor C101 (labeled node OUT100). The second terminal of capacitor C101 is coupled, preferably connected, to the node transmitting the reference voltage GND100. Node OUT100 is the output node of the switch-mode power supply and is capable of transmitting the output voltage of the switch-mode power supply.

[0061] As previously described, part 100 is equipped with a current sensing circuit 150 configured to sense and evaluate the output current of the switch-mode power supply, and more specifically, the mirror current of the output current is transmitted by node B100.

[0062] According to one example, circuit 150 includes a control loop configured to receive a current to be measured, Isense 101. This control loop includes, for example, a comparator circuit Comp 151, two transistors M151 and M152, and a resistor R151. The non-inverting input (+) of comparator circuit Comp 151, or comparator Comp 151, is configured to receive the current to be measured, Isense 101, for example, via resistor R101 of portion 100. The inverting input (-) of comparator circuit Comp 151 is coupled, preferably connected, to a first terminal of resistor R151. A second terminal of resistor R151 is coupled, preferably connected, to node C100. Transistors M151 and M152 are, for example, PMOS transistors. A first conducting terminal of transistor M151 is coupled, preferably connected, to a node providing voltage Vin 100, and a second conducting terminal of transistor M151 is coupled, preferably connected, to node C100. The control terminal of transistor M151 is configured to receive a control voltage. The first conducting terminal of transistor M152 is coupled, preferably connected, to node C100, and the second conducting terminal of transistor M151 is coupled, preferably connected, to node D100. The control terminal of transistor M152 is coupled, preferably connected, to the output terminal of comparator circuit Comp151.

[0063] According to one example, circuit 150 also includes a current mirror assembly, also known as a current mirror circuit, or simply a current mirror. This assembly includes two transistors, M153 and M154, which are, for example, N-channel MOS transistors, or N-type MOS transistors, or NMOS transistors. The first on-terminal of transistor M153 is coupled, preferably connected, to node D100, and the second on-terminal of transistor M153 is coupled, preferably connected, to the node transmitting the reference voltage GND100. The first on-terminal of transistor M154 is coupled, preferably connected, to the output node OUT150 of circuit 150, and the second on-terminal of transistor M154 is coupled, preferably connected, to the node transmitting the reference voltage GND100. The control terminals of transistors M153 and M154 are coupled to each other.

[0064] According to one example, circuit 150 also includes a current source CS151, which is configured to deliver a temperature-independent current. The current source CS151 is configured to, for example, supply a reference current Iref150 to output node OUT150. According to one example, the current source CS151 is powered by a voltage Vin100. According to one example, the current source may be implemented in part by a digital-to-analog converter.

[0065] According to one embodiment, circuit 150 further includes a sample-and-hold (SnH) circuit. This circuit enables the storage of the value of current Isense 101 measured by circuit 150 during the non-conducting phase of switch M101. Specifically, circuit 150 is positioned at the output of switch M101 and is only capable of measuring current Isense 101 during the conducting phases of switches M101, M102, and M103. An example of a sample-and-hold circuit is provided. Figure 2 It is described in detail. The two possible locations of the sample-and-hold circuit are... Figure 1 It is shown in the middle.

[0066] According to Figure 1 The sample-and-hold circuit SnH151 shown in the first embodiment is arranged at the input of circuit 150. More specifically, circuit SnH151 is arranged at the input of the control loop, i.e., for example, at the input of comparator circuit Comp151. According to one example, the input terminal of circuit SnH151 is coupled, preferably to the connection terminal of node B100 or resistor R101, and the output terminal of circuit SnH151 is coupled, preferably to the inverting input terminal of comparator circuit Comp151.

[0067] According to Figure 1The sample-and-hold circuit SnH152 shown in the second embodiment is arranged within a current mirror assembly. More specifically, SnH152 is positioned between the control terminals of transistors M153 and M154. According to one example, the input of SnH152 is coupled, preferably, to the control terminal of transistor M153, and the output terminal of SnH151 is coupled, preferably, to the control terminal of transistor M154.

[0068] according to Figure 1 In the third embodiment not shown, the sample and hold circuit can be located upstream of the current mirror circuit. For example, the sample and hold circuit can be located within another current mirror circuit assembly arranged upstream of the current mirror circuit formed by transistors M153 and M154.

[0069] According to one embodiment, the method of using circuit 150 is as follows. The sample-and-hold circuit is enabled at the beginning of the non-conducting phase of switch M101 to store the value of the current to be measured. According to one example, the sample-and-hold circuit is enabled by a sampling signal (also called a control signal). According to one example, the sample-and-hold circuit may not be directly enabled at the beginning of the non-conducting phase, but a delay may be allowed to allow the current to stabilize.

[0070] In the disclosed embodiment, the current only needs to be measured on the high side of the converter. Therefore, circuit 150 does not need to be replicated on the low side (on the low-side transistor side).

[0071] Furthermore, the use of a sampling circuit allows for maintaining an image of the converter current even during periods when the high transistor M101 is off. This allows for accurate comparison between the reference current Iref150 and the converter's measured current (the current in transistor M154) without requiring high speed (a response in the microsecond range is sufficient). The comparator can then have a simple structure. Typically, the comparator can consist of two current mirrors, resulting in low power consumption and a small silicon area, which helps reduce the manufacturing cost of circuit integration in the converter. Without a sampling circuit, a fast comparator would be needed (for switching frequencies in the range of several hundred kHz / MHz, 100 ns) to obtain a comparison during periods when the high transistor is on.

[0072] Figure 2 The combination is shown Figure 1 The described circuit 150 is similar to the current sensing circuit 200. More specifically, Figure 2 The combination is shown Figure 1 Examples of implementation methods for the first embodiment described.

[0073] Circuit 200 includes the same components as circuit 150. In other words, circuit 200 includes a control loop and a current mirror circuit, wherein the control loop includes comparator circuit Comp151, resistor R151, transistor M151 and transistor M152, and the current mirror circuit includes transistor M153 and transistor M154.

[0074] According to one embodiment, circuit 200 further includes a sample and hold circuit SnH201, which is arranged to combine with Figure 1 The described circuit SnH152 is similar. According to one embodiment, circuit SnH201 includes a switch I201 and a capacitor C201. A first conducting terminal of switch I201 is coupled, preferably connected, to a first conducting terminal of transistor M153 and a control terminal of the same transistor; and a second conducting terminal of switch I201 is coupled, preferably connected, to a control terminal of transistor M154. The control terminal of switch I201 is configured to receive a control voltage. This control voltage is combined with… Figure 3 and Figure 4 The following is described in detail. The first terminal of capacitor C201 is coupled, preferably connected, to the control terminal of transistor M154, and the second terminal of capacitor C201 is coupled, preferably connected, to the node through which the reference voltage GND100 is transmitted.

[0075] According to one example, circuit 200 also includes an inverter circuit INV201 and a buffer circuit B201. According to one example, the input terminal of the inverter circuit INV201 is coupled, preferably connected, to node OUT150, and the output terminal of the inverter circuit INV201 is coupled, preferably connected, to the input terminal of the buffer circuit B201. The output terminal of the buffer circuit B201 forms the output terminal of circuit 200.

[0076] Figure 3 as well as Figure 4 To show the set Figure 2 A graph depicting the operation of the described circuit 200.

[0077] Figure 3The following curves are included: Curve 301 represents the change in output current of the open-mode power supply; Curve 302 represents the change in output voltage of circuit 200 at node OUT150; Curve 303 represents the change in output voltage of circuit 200 at node OUT150; Curve 304 represents the change in output voltage of circuit 200 at buffer circuit B201; Curve 305 represents the change in gate-source voltage of transistor M153, which is a mirror image of the current to be measured; Curve 306 represents the change in output voltage of circuit 200, but without sampling and holding circuitry at node OUT150; Curve 307 represents the change in output voltage of circuit 200, but without sampling and holding circuitry at the output of buffer circuit B201; and Curve 308 represents the change in current mirror image of the control terminal of transistor M154 of circuit 200.

[0078] Figure 4 The following curves are included: Curve 401 represents the change in output current of the switch-mode power supply; Curve 402 represents the change in output voltage of circuit 200 at node OUT150; Curve 403 represents the change in output voltage of circuit 200 at buffer circuit B201; Curve 404 represents the change in drain-source current of transistor M154; Curve 405 represents the change in output voltage of circuit 200, but does not include sample-and-hold circuitry at node OUT150; Curve 406 represents the change in output voltage of circuit 200, but does not include sample-and-hold circuitry at the output of buffer circuit B201; and Curve 407 represents the change in drain-source current of transistor M154 of circuit 200, but does not include sample-and-hold circuitry.

[0079] These curves allow us to demonstrate how the use of the sampler circuit enables rapid detection of output current exceeding a threshold in switch-mode power supplies.

[0080] Figure 5 The combination is shown Figure 1 A practical example of an embodiment of a portion of the described section 100. More specifically, Figure 5 The combination is shown Figure 1 The actual example of the described switch M101 is switch 500.

[0081] According to one example, switch 500 includes two transistors M501 and M502 (e.g., PMOS type transistors) arranged in parallel.

[0082] More specifically, according to one example, the source terminal of transistor M501 is coupled, preferably connected, to a terminal that transmits voltage Vin100, and the drain terminal of transistor M501 is coupled, preferably connected, to a terminal that transmits reference voltage GND100. According to one example, the source terminal of transistor M502 is coupled, preferably connected, to a terminal that transmits voltage Vin100, and the drain terminal of transistor M502 is coupled, preferably connected, to a terminal that transmits reference voltage GND100. The gate terminals of transistors M501 and M502 are coupled to each other and to a node that transmits a control voltage, which defines the conduction and non-conduction phases of transistors M501 and M502.

[0083] Figure 6 The combination is shown Figure 1 A real-world example of a portion of the described section 100. More specifically, Figure 6 The combination is shown Figure 1 Practical example 600 of the described switches M102 and M103.

[0084] According to one example, circuit 600 includes two transistors M601 and M602 (e.g., PMOS transistors) arranged in series.

[0085] More specifically, according to one example, the source of transistor M601 is coupled, preferably connected, to a terminal that carries voltage Vin100, and the drain terminal of transistor M601 is coupled, preferably connected, to the source terminal of transistor M602, and the drain terminal of transistor M601 carries current Isense101. According to one example, the drain terminal of transistor M602 is coupled, preferably connected, to a node that carries reference voltage GND100.

[0086] Figure 7 The combination is shown Figure 1 A practical example of a portion of the described circuit 150. More specifically, Figure 7 The combination is shown Figure 1 A practical example 700 of an embodiment of the described transistor M151.

[0087] According to one example, circuit 700 includes four bridge-connected transistors (e.g., PMOS transistors) M701, M702, M703, and M704. Resistor R151 is also present. Figure 7 As shown in the image.

[0088] More specifically, in one example, the source of transistor M701 is coupled, preferably connected, to the terminal providing voltage Vin100, and the drain of transistor M701 is coupled, preferably connected, to the source of transistor M702. According to one example, the drain of transistor M702 is coupled, preferably connected, to node C100 and the first terminal of resistor R151. According to one example, the source of transistor M703 is coupled, preferably connected, to the terminal transmitting voltage Vin100, and the drain of transistor M703 is coupled, preferably connected, to the source of transistor M704. According to one example, the drain of transistor M704 is coupled, preferably connected, to node C100 and the first terminal of resistor R151. All gate terminals of transistors M701, M702, M703, and M704 are connected to each other and to the node transmitting the control voltage.

[0089] Figure 8 The combination is shown Figure 1 A practical example of an embodiment of a portion of the described circuit 150. More specifically, Figure 8 The combination is shown Figure 1 A practical example 800 describes the comparator Comp151, the current mirror circuit, the sample and hold circuit SnH152, and the current source CS151.

[0090] According to one example, circuit 800 includes a comparator Comp801 and a current source, which is a practical example of comparator Comp151.

[0091] According to one example, the comparator Comp801 includes seven transistors: M801, M802, M803, M804, M805, M806, and M808. Transistors M801, M802, and M808 are, for example, PMOS transistors. Transistors M803 and M807 are, for example, NMOS transistors.

[0092] Transistors M801 and M802 are connected as current mirrors. According to one example, the source terminal of transistor M801 forms the inverting terminal of comparator Comp801, and the drain terminal of transistor M801 is coupled, preferably connected, to the terminal forming the output terminal of comparator Comp801, and thus coupled, preferably connected, to the gate terminal of transistor M152. According to one example, the source terminal of transistor M802 forms the non-inverting terminal of comparator Comp801, and the drain terminal of transistor M802 is coupled, preferably connected, to the terminal forming the output terminal of comparator Comp801, and thus coupled, preferably connected, to the gate terminal of transistor M152. The gate terminals of transistors M801 and M802 are coupled to each other and to the drain terminal of transistor M802.

[0093] According to one example, transistors M803, M804, M805, and M806 are bridged together. More specifically, according to one example, the drain terminal of transistor M803 is coupled, preferably connected, to the source terminal of transistor M801, and the source terminal of transistor M803 is coupled, preferably connected, to the drain terminal of transistor M805. According to one example, the source terminal of transistor M805 is coupled, preferably connected, to the node that carries the reference voltage GND100. According to one example, the drain terminal of transistor M804 is coupled, preferably connected, to the source terminal of transistor M802, and the source terminal of transistor M804 is coupled, preferably connected, to the drain terminal of transistor M806. According to one example, the source terminal of transistor M808 is coupled, preferably connected, to the terminal that carries the reference voltage GND100. According to one example, the gate terminals of transistors M803 and M804 are coupled to each other and to a node through which the control voltage is delivered. Transistors M803 and M804 are connected in a cascode configuration to limit the drain voltage of transistors M805 and M806. According to one example, the gate terminals of transistors M805 and M806 are coupled to each other and to a node through which the control voltage is delivered. Transistors M805 and M806 act as current sources and bias the structure formed by circuit 800.

[0094] According to one example, the source of transistor M808 is coupled, preferably connected, to a terminal receiving voltage Vin100, and the drain of transistor M808 is coupled, preferably connected, to the drain of transistor M801.

[0095] Figure 8 Transistors M153 and M154, and their combination are also shown. Figure 2The sample-and-hold circuit NH201 is described.

[0096] According to one example, the current source includes a digital-to-analog converter (DAC800) comprising a plurality of PMOS transistors arranged in an array according to combinations known to those skilled in the art. In the illustrated example, the converter DAC800 has four identical branches (4-bit converter) connected in parallel between the application node (high node) of voltage Vin100 and the drain of transistor M811 (node ​​A800), transistor M811 being, for example, an NMOS type, connected via a common-source, common-gate connection with transistor M154. According to one example, the source terminal of transistor M811 is coupled, preferably connected, to the node receiving the reference voltage GND100. The gate terminal of transistor M812 is coupled, preferably connected, to the source terminal of transistor M811. Transistor M812 is biased by being coupled to two PMOS transistors at the high potential of the application node of voltage Vin100, the two PMOS transistors being connected as current mirrors to the transistors forming the current source of the digital-to-analog converter.

[0097] Node A800 provides the digital-to-analog conversion result from the digital setpoint (4-bit setpoint in this example) to generate the reference current Iref150. This node A800 corresponds to, for example, Figure 1 The node is OUT150.

[0098] The comparison between the reference current and the SMPS converter current (where the current flowing through transistor M154 is a mirror image) is performed by a stage comprising transistors M813, M814, and M815, which provides digital information about whether the reference current is lower or higher than the converter current at node OUT800. According to one example, transistor M813 is NMOS type. According to one example, the source terminal of transistor M813 is coupled, preferably connected, to the node receiving the reference voltage GND100, and the drain terminal of transistor M813 is coupled, preferably connected, to the output node OUT800. The gate terminal of transistor M813 is coupled, preferably connected, to node A800.

[0099] According to one example, transistor M814 is a PMOS type. According to one example, the source terminal of transistor M814 is coupled, preferably connected, to the node delivering voltage Vin100 (high potential), and the drain terminal of transistor M814 is coupled, preferably connected, to the output node OUT800. The gate terminal of transistor M814 is coupled, preferably connected, to node A800.

[0100] According to one example, transistor M815 is of PMOS type. According to one example, the source terminal of transistor M815 is coupled, preferably connected, to the node transmitting voltage Vin100, and the drain terminal of transistor M814 is coupled, preferably connected, to node A800. When circuit 800 is off, transistor M815 prevents node A800 from being floating.

[0101] The use of a digital-to-analog converter helps to adjust the reference current, thereby adjusting the detection threshold.

[0102] Figure 9 The combination is shown Figure 2 A practical example of an embodiment of a portion of the described circuit 200. More specifically, Figure 9 The combination is shown Figure 2 A practical example 900 of an embodiment of the described switch I201.

[0103] According to one example, circuit 900 includes bridge-connected transistors M901, M902, M903, M904, M905, M906, M907, and M908, two inverters, and a NOR logic gate. Resistor R151 is also... Figure 7 As shown. Transistors M901, M902, M904, M906, and LM908 are NMOS type. Transistors M903, M905, and LM907 are PMOS type.

[0104] According to one example, the drain terminal of transistor M901 is coupled, preferably connected, to the input terminal (labeled A900) of circuit 900, and the source terminal of transistor M901 is coupled, preferably connected, to the node receiving reference voltage GND100.

[0105] According to one example, the source terminal of transistor M902 is coupled, preferably connected, to its drain terminal and node A900. The gate terminal of transistor M902 receives a control voltage. According to one example, the source terminal of transistor M904 is coupled, preferably connected, to its drain terminal. The gate terminal of transistor M904 receives a control voltage. According to one example, the source terminal of transistor M906 is coupled, preferably connected, to its drain terminal and the output terminal (labeled B900) of circuit 900. The gate terminal of transistor M906 receives a control voltage.

[0106] According to one example, the source terminal of transistor M903 is coupled, preferably connected, to its drain terminal and node A900. The gate terminal of transistor M903 receives a control voltage. According to one example, the source terminal of transistor M905 is coupled, preferably connected, to its drain terminal. The gate terminal of transistor M905 receives a control voltage. According to one example, the source terminal of transistor M907 is coupled, preferably connected, to its drain terminal and the output terminal of circuit 900 (marked node B900). The gate terminal of transistor M907 receives a control voltage.

[0107] According to one example, the drain terminal of transistor M908 is coupled, preferably connected, to node B900, and the source terminal of transistor M908 is coupled, preferably connected, to the node receiving reference voltage GND100.

[0108] The input terminal of inverter INV902 receives the control voltage, and the output terminal of inverter INV902 is coupled, preferably connected, to the gate terminal of transistor M904.

[0109] The input terminal of the NOR901 gate receives the control voltage. The output terminal of the NOR901 gate is coupled, preferably connected, to the input terminal of the inverter INV902. The output terminal of the inverter INV902 is coupled, preferably connected, to the gate terminal of the transistor M905.

[0110] Figure 9 Capacitor C201 is also shown.

[0111] Figure 10 An example of a delay circuit 1000 is shown, which is capable of applying a delay to enable the sample and hold circuit.

[0112] This circuit allows the current to be measured time to stabilize before its value is stored in the sampling and holding circuit.

[0113] According to one example, circuit 1000 includes multiple inverter circuits INV1001, INV1002, INV1003, INV1004, INV1005, INV1006, transistors M1001, M1002, M1003, M1004, M1005, and M1006, and capacitor C1001. Transistors M1001, M1002, M1003, and M1005 are PMOS type, while transistors M1004 and M1006 are NMOS type.

[0114] According to one example, the input terminal of inverter INV1001 is coupled, preferably connected, to the node that transmits the enable signal EN1000. The output terminal of inverter INV1001 is connected to the input terminals of inverters INV1002 and INV1003. The output terminal of inverter INV1002 is coupled, preferably connected, to the node that transmits the enable signal. The output terminal of inverter INV1003 is coupled, preferably connected, to the gate terminal of transistor M1003 and the gate terminal of transistor M1004.

[0115] According to one example, the source terminal of transistor M1001 is coupled, preferably connected, to the node that transmits the power supply voltage, and the drain terminal of transistor M1001 is coupled, preferably connected, to the source terminal of transistor M1002. The drain terminal of transistor M1002 is coupled, preferably connected, to the source terminal of transistor M1003. The drain terminal of transistor M1003 is coupled, preferably connected, to the drain terminal of transistor M1004. The drain terminal of transistor M1004 is coupled, preferably connected, to the node that transmits the reference voltage.

[0116] According to one example, the first terminal of capacitor C1001 is coupled, preferably connected, to the junction of transistors M1003 and M1004. The second terminal of capacitor C1001 is coupled, preferably connected, to the node receiving the reference voltage.

[0117] According to one example, the source terminal of transistor M1005 is coupled, preferably connected, to a node that transmits the power supply voltage, and the drain terminal of transistor M1005 is coupled, preferably connected, to the drain terminal of transistor M1006. The source terminal of transistor M1006 is coupled, preferably connected, to a node that receives a reference voltage. The gate terminals of transistors M1005 and M1006 are coupled, preferably connected, to the junction of transistors M1003 and M1004.

[0118] According to one example, the input terminal of inverter INV1005 is coupled, preferably connected, to the junction of transistors M1005 and M1006. The output terminal of inverter INV1005 is coupled to the input terminal of inverter INV1006. The output terminal of inverter INV1006 is configured to transmit a delayed signal.

[0119] Figure 11 Electronic device 1100 (CPU) is shown schematically in block form.

[0120] As an example, electronic device 1100 is a controller, microcontroller, processor, or microprocessor.

[0121] The device 1100 includes, for example, a digital core 1101 (D.Core) configured to receive an input voltage Vcore.

[0122] The device 1100 includes, for example, a power management unit 1102 (PMU) including a switch-mode power supply 1103. The switch-mode power supply 1103 includes high-level transistors M1101 (NMOS) and M1102 (PMOS). The switch-mode power supply 1103 includes a current sensing circuit according to an embodiment. The device 1100 can supplement the switch-mode power supply with an external coil L1101 and an external capacitor C1101. According to one example, the switch-mode power supply is a buck converter, a boost converter, or a buck-boost converter.

[0123] Various embodiments and variations have been described. Those skilled in the art will understand that certain features of these different embodiments and variations can be combined, and other variations will occur to those skilled in the art.

[0124] Finally, based on the functional indications given above, the actual implementation of the described embodiments and variations is within the capabilities of those skilled in the art.

Claims

1. A circuit for sensing a first output current of a switch-mode power supply, comprising: A sample and hold component is configured to store a mirror image of the first output current during the non-conducting phase of the high-voltage switch of the switch-mode power supply.

2. The circuit of claim 1, wherein the sampling and holding component comprises a switch and a capacitor.

3. The circuit according to claim 1, wherein the mirror image is a mirror image of the current flowing in the high-voltage switch.

4. The circuit of claim 1, wherein the result provided by the sampling and holding components is compared with a threshold to provide information about exceeding the threshold.

5. The circuit of claim 1, wherein the threshold is provided by a reference current supplied by a digital-to-analog converter.

6. The circuit of claim 1, wherein the sampling and holding component is controlled by a sampling signal.

7. The circuit of claim 6, wherein the sampling signal triggers the storage of the mirror image of the first current with a time delay.

8. The circuit of claim 1, wherein the sample and hold component is configured to directly receive the first current and further includes a control loop having an input coupled to the output of the sample and hold component.

9. The circuit according to claim 1, further comprising: The control loop is configured to receive the first current to be sensed. A first transistor and a second transistor are connected as a current mirror, the first transistor being configured to receive the output of the control loop, and the second transistor being configured to transmit the mirror image of the first current; The sampling and holding assembly is arranged between the control terminals of the first transistor and the control terminals of the second transistor.

10. The circuit of claim 9, wherein the control loop includes a current comparator configured to receive the first current.

11. The circuit of claim 9, wherein the second transistor is configured to also receive a second reference current.

12. The circuit of claim 11, wherein the second reference current is transmitted by a digital-to-analog converter.

13. A switch-mode power supply, comprising the sensing circuitry of claim 1.

14. The power supply of claim 13, wherein the power supply is configured as one of a buck switch-mode power supply, a boost switch-mode power supply, or a buck-boost switch-mode power supply.

15. An apparatus comprising a switch-mode power supply according to claim 13.

16. The device of claim 15, configured as a microcontroller.

Images