Probe coating method and probe

Abstract

The invention relates to the technical field of semiconductor testing, in particular to a probe coating method and a probe. The invention provides a probe coating method. The probe coating method comprises the following steps that the surface of a probe base material is pretreated; depositing an insulating coating on the surface of the pretreated base material through a chemical vapor deposition process; and selectively removing the insulating coating formed by the chemical vapor deposition process through a local film removing process so as to form a preset insulating region and a preset conductive region on the probe included in the probe base material. According to the method, the binding force is enhanced through pretreatment, the uniform insulating coating is formed through chemical vapor deposition, high-precision patterning is achieved through local film removal, finally, the local insulating coating which is firm in combination and accurate in pattern is prepared on the probe base material, and the performance reliability and long-term stability of the probe on the insulating area and the conductive area are effectively ensured.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of semiconductor testing, and more particularly, to a probe coating method and a probe. BACKGROUND

[0002] The probe is a key element for connecting the test machine and the chip pins in the semiconductor wafer test, and its performance directly determines the accuracy, efficiency and cost of the test. By conducting electrical tests before wafer cutting and packaging, the probe can screen out defective chips to avoid defective products from flowing into the subsequent expensive packaging link and provide key data for process improvement. With the increasing complexity of integrated circuits, higher requirements are placed on the precision, reliability and durability of the probe. In the testing process, in order to prevent short circuits between adjacent conductive parts on the probe, a coating with excellent insulation and high-temperature resistance is usually applied to a specific area of the probe, such as the middle part of the needle rod.

[0003] In the prior art, the probe coating is usually prepared by ultrasonic spraying coating process. This process uses ultrasonic energy to atomize liquid insulating materials (such as three-proof paint) into fine particles, which are then sprayed onto the surface of the substrate by a carrier gas, and a coating is formed after solidification. However, since this technology is essentially a film-forming method based on the accumulation and solidification of liquid particles on the surface, and it is carried out in an atmospheric environment, the adhesion of the coating to the metal substrate mainly depends on weak mechanical anchoring and physical adsorption, making it difficult to avoid the presence of a weak boundary layer, resulting in generally poor adhesion of the coating, which is prone to fall off under the action of subsequent high-temperature testing or mechanical stress. More seriously, the falling-off coating particles can block the micro-holes of the substrate carrying the probe, directly causing electrical short circuits, seriously affecting the test yield and equipment maintenance cost.

[0004] With the development of coating technology, Parylene vacuum vapor deposition process has been gradually applied in the field of coating preparation. Parylene is a poly-p-xylylene polymer thin film prepared by chemical vapor deposition (CVD), which sublimates solid dimers into active monomers in a vacuum environment, and then performs gas phase polymerization on the surface of the substrate. This method can form a dense film with no pinholes, uniform thickness, stable chemical properties and high insulation, and the adhesion to the substrate is much better than that of traditional sprayed coatings, which is theoretically more suitable for the coating needs of the probe.

[0005] However, the existing Parylene vacuum vapor deposition process still has a key problem in the preparation of probe coating, i.e., it is difficult to effectively realize the local deposition of the coating, which cannot meet the needs of the probe that only the middle part needs to be insulated and the two ends need to be conductive without coating coverage.

[0006] Therefore, there is an urgent need for a probe coating method that can effectively solve the above problems to ensure the testing performance of the probe. SUMMARY

[0007] The purpose of this invention is to provide a probe coating method and a probe, which solves the problems of poor coating adhesion and inability to achieve local insulation in existing probe coating technologies.

[0008] To achieve the above objectives, the present invention provides a probe coating method, comprising the following steps: Pre-treatment of the probe substrate surface; An insulating coating is deposited on the surface of the pretreated substrate using a chemical vapor deposition process. By using a localized film removal process, the insulating coating formed by the chemical vapor deposition process is selectively removed to form a predetermined insulating region and a conductive region on the probe substrate.

[0009] In some embodiments, the pretreatment of the probe substrate surface includes at least one of the following operations: The surface of the substrate is cleaned and activated. The surface of the substrate is subjected to chemical etching treatment; The surface of the substrate is coated with a silane coupling agent.

[0010] In some embodiments, the cleaning and activation treatment of the substrate surface includes: Plasma cleaning is used to remove oxides and organic contaminants from the surface of the substrate.

[0011] In some embodiments, the chemical etching treatment of the substrate surface includes: The substrate surface is treated using a wet chemical etching process to form active sites and geometric structures on the substrate surface.

[0012] In some embodiments, the coating of the substrate surface with a silane coupling agent includes: A silane coupling agent solution is applied to the surface of a substrate and dried to form a chemical bond bridging layer on the surface of the substrate. The silane coupling agent is selected from γ-aminopropyltriethoxysilane or γ-methacryloyloxypropyltrimethoxysilane.

[0013] In some embodiments, the chemical vapor deposition process is a phenelzine vacuum coating process, the insulating coating is a phenelzine coating, and the phenelzine vacuum coating process includes a sublimation step, a pyrolysis step, and a deposition step. By controlling the sublimation temperature of the sublimation step, the pyrolysis temperature of the pyrolysis step, the deposition temperature of the deposition step, and the pressure in the deposition chamber within a preset range, the thickness of the Parylene coating can be adjusted and controlled.

[0014] In some embodiments, the sublimation temperature in the sublimation step is 150±5℃; In the pyrolysis step, the pyrolysis temperature is 680±5℃; In the deposition step, the pressure in the deposition chamber is 0.1-0.5 Torr, and the deposition temperature is 15-30℃.

[0015] In some embodiments, the deposition step further includes: The target thickness of the Piriton coating can be controlled by either quantitative feeding or real-time monitoring. The quantitative feeding method adjusts the thickness of the Parylene coating by controlling the initial amount of raw materials. The real-time monitoring method adjusts the thickness of the phenelzine coating by measuring the thickness of the phenelzine coating in real time and dynamically adjusting the process parameters of the deposition step based on the measurement results. The preset target thickness ranges from 0.1 μm to 100 μm.

[0016] In some embodiments, the localized film removal process includes a film lamination step, an exposure step, a development step, a plasma etching step, and a mask removal step: The lamination step includes covering the area where the coating to be removed with a dry solder resist film and laminating it under preset lamination process conditions; The exposure step includes exposing the substrate covered with the solder resist dry film to cure the solder resist dry film according to a preset pattern. The developing step includes placing the exposed substrate in a developing solution to remove the uncured solder resist dry film and form a patterned mask. The plasma etching step includes using the patterned mask as a shield and performing plasma etching under preset plasma etching process conditions to remove the insulating coating in the area not covered by the mask. The mask removal step includes removing the patterned mask.

[0017] In some embodiments, the preset molding process conditions in the molding step include molding temperature, vacuuming time, pressure, and pressing time. The film pressing temperature is 55-65℃, the vacuuming time is 25-35s, the pressure is 0.08-0.12MPa, and the pressing time is 35-45s.

[0018] In some embodiments, the exposure step uses ultraviolet light of a preset wavelength for exposure; The preset wavelength is 400-410nm.

[0019] In some embodiments, the developing step involves using a specific developing solution and immersion under preset developing process conditions; The developing solution is a sodium carbonate solution with a concentration of 0.8%-1.2%, and the preset developing process conditions include developing temperature and soaking time. The developing temperature is 29-30℃, and the soaking time is 4-5 minutes.

[0020] In some embodiments, the plasma etching step uses a specific mixed gas and is performed under preset plasma etching process conditions; The specific mixed gas is a mixture of carbon tetrafluoride and oxygen in a volume ratio of 1:1.5 to 1:2.5. The preset plasma etching process conditions include etching power and chamber pressure, wherein the etching power is 450-550W and the chamber pressure is 90-110mtorr.

[0021] In some embodiments, the mask removal step involves using a specific stripping agent and immersion treatment under preset stripping process conditions; The specific stripping agent is a green paint stripping agent solution, and the preset stripping process conditions include stripping temperature and soaking time. The stripping temperature is 85-95℃, and the soaking time is at least 5 minutes.

[0022] To achieve the above objectives, the present invention provides a probe, which is manufactured using the probe coating method described above.

[0023] The present invention provides a probe coating method and a probe, which enhances the bonding force through pretreatment, forms a uniform insulating coating through chemical vapor deposition, and achieves high-precision patterning through local film removal. Finally, a locally insulating coating with strong bonding and accurate pattern is prepared on the probe substrate, which effectively ensures the performance reliability and long-term stability of the probe in the insulating and conductive areas. Attached Figure Description

[0024] The above and other features, properties and advantages of the present invention will become more apparent from the following description taken in conjunction with the accompanying drawings and embodiments, in which the same reference numerals always denote the same features, wherein: Figure 1 A step diagram of a probe coating method according to an embodiment of the present invention is disclosed; Figure 2 A flowchart illustrating the steps of a pretreatment process according to an embodiment of the present invention is disclosed; Figure 3 A step diagram of a wet chemical etching process according to an embodiment of the present invention is disclosed; Figure 4 A schematic diagram of the principle of a Parelin vacuum coating apparatus according to an embodiment of the present invention is disclosed; Figure 5 A step diagram of a Pyrelin vacuum coating process according to an embodiment of the present invention is disclosed; Figure 6 A step diagram of a localized film removal process according to an embodiment of the present invention is disclosed; Figure 7 A schematic diagram of the lamination step in a partial film removal process according to an embodiment of the present invention is disclosed; Figure 8 A schematic diagram illustrating the exposure steps of a localized film removal process according to an embodiment of the present invention is provided. Figure 9 A schematic diagram of the developing step in a localized film removal process according to an embodiment of the present invention is shown; Figure 10 A schematic diagram of a plasma etching step in a local film removal process according to an embodiment of the present invention is disclosed; Figure 11 A schematic diagram of the mask removal step in a localized mask removal process according to an embodiment of the present invention is disclosed.

[0025] The meanings of the reference numerals in the accompanying drawings are as follows: 400 substrate; 401 heating furnace; 402 pyrolysis furnace; 403 sedimentation chamber. Detailed Implementation

[0026] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are for illustrative purposes only and are not intended to limit the invention.

[0027] In semiconductor manufacturing, probe cards are core components for testing the electrical performance of chips on wafers. They establish electrical connections with the chips on the wafer via probes, enabling the testing of the electrical performance of each chip. To prevent current leakage or short circuits due to the extremely small spacing between probe probes when testing high-density, low-voltage circuits, an insulating coating is typically applied to the middle section of the probes. This coating effectively isolates adjacent conductive parts, ensuring the integrity and accuracy of the test signal, thereby reliably identifying good products and improving the overall yield.

[0028] To address the problems of poor coating adhesion and insufficient pattern accuracy in existing probe insulating film preparation processes, this invention proposes a probe coating method and a probe made using this method, achieving a synergistic improvement in high adhesion of the insulating coating, high-precision patterning, and long-term reliability.

[0029] Figure 1A step diagram of a probe coating method according to an embodiment of the present invention is disclosed, as follows: Figure 1 As shown, the probe coating method proposed in this invention includes the following steps: Step S1: Pre-treat the surface of the probe substrate.

[0030] Pretreatment operations optimize the surface condition of the probe substrate to improve the adhesion between the subsequent insulating coating and the substrate, high-temperature resistance, and long-term insulation reliability. Step S2: An insulating coating is deposited on the pretreated substrate surface using a chemical vapor deposition process.

[0031] Optionally, the preferred chemical vapor deposition process is the Parylene vacuum coating process, which can effectively solve the current technical problem of poor adhesion of probe coatings.

[0032] Step S3 involves selectively removing the insulating coating formed by the chemical vapor deposition process through a localized film removal process, thereby forming a predetermined insulating region and a conductive region on the probe substrate.

[0033] Preferably, this localized film removal process employs a combination of solder resist dry film photolithography and plasma etching, which can achieve high-precision localized selective removal of the insulating coating.

[0034] In this embodiment, the probe substrate refers to an integral substrate containing multiple probe units arranged in an array (such as...). Figure 4 and Figure 7 (As shown in the figure). The probe coating method is implemented uniformly on the entire substrate, ultimately producing high-performance probes in batches.

[0035] The probe coating method proposed in this invention effectively solves the problems of easy detachment of local insulating coatings and insufficient pattern accuracy in traditional probes through the synergistic effect of three core steps: substrate surface pretreatment, chemical vapor deposition to form an insulating coating, and local selective removal of the insulating coating. This method precisely defines the insulating and conductive areas on the probe surface. Ultimately, this method achieves a firmly bonded, clearly defined, and precisely patterned local insulating coating on the probe substrate, meeting the requirements of high-reliability and high-precision semiconductor testing.

[0036] These steps will be described in detail below. It should be understood that, within the scope of this invention, the above-described technical features of this invention and the technical features specifically described below (such as in the embodiments) can be combined and related to each other to form preferred technical solutions.

[0037] Figure 2 A flowchart illustrating the steps of a pretreatment process according to an embodiment of the present invention is disclosed, as follows: Figure 2As shown, the preprocessing in step S1 may include at least one of the following steps S11-S13: Step S11: Clean and activate the surface of the substrate.

[0038] Step S12: Perform chemical etching on the surface of the substrate.

[0039] Step S13: Coat the surface of the substrate with a silane coupling agent.

[0040] It should be noted that the pretreatment operations in steps S11-S13 above can be performed individually or in combination according to the characteristics and performance requirements of the substrate.

[0041] Furthermore, in step S11, plasma cleaning is used to remove oxides and organic contaminants from the surface of the substrate. For example, argon (Ar) or hydrogen (...) can be used. Plasma treatment can effectively remove oxides and organic contaminants from the substrate surface, while activating the surface and increasing its surface strength by more than 30%, thereby significantly enhancing the surface's adsorption capacity for subsequent deposited coatings.

[0042] Surface energy is the extra energy possessed by molecules on the surface of a material due to the imbalance of forces. Increasing surface energy is essentially about activating the surface of a material, giving it higher chemical and physical activity, thereby enabling precise control over behaviors such as wetting, adhesion, reaction, and biological interactions.

[0043] Furthermore, in step S12, a wet chemical etching process is used to treat the substrate surface to form active sites and geometric structures. The active sites provide a strong "attraction" through their unique electronic structure, while the geometric structures provide suitable "gripping points." The wet chemical etching process significantly reduces the activation energy required for chemisorption while enhancing the strength of the adsorption bonds, greatly improving the material's chemisorption capacity. This not only optimizes the surface properties of the material but also further enhances the chemisorption capacity between the active monomers and the substrate surface during the subsequent monomer pyrolysis and optimized deposition process.

[0044] The wet chemical etching process includes sequential steps of pretreatment, primary water washing, etching, secondary water washing, and drying. The following is a combination of these steps... Figure 3 The specific embodiments of the wet chemical etching process are described in detail below.

[0045] Figure 3 A step diagram of a wet chemical etching process according to an embodiment of the present invention is disclosed, such as... Figure 3 As shown, the wet chemical etching process can be performed according to the following steps: Step S121, preprocessing.

[0046] The substrate surface is treated using a combination of alkaline cleaning agent and acid pickling. More specifically, firstly, the substrate is ultrasonically cleaned for 9-10 minutes at a temperature of 60-70℃ using an alkaline cleaning agent to remove surface oil stains; then, it is acid-washed with a dilute sulfuric acid solution of about 5% to remove the natural oxide layer on the probe surface.

[0047] Step S122, one water wash.

[0048] The pretreated substrate is cleaned with deionized water to thoroughly remove any residual alkaline and acidic chemicals from step S121.

[0049] Step S123, etching.

[0050] The substrate is immersed in an etching solution of a preset concentration and chemically etched under specific temperature and time conditions. Specifically, a sodium persulfate solution of approximately 10% is prepared as the etching solution, and the cleaned substrate is immersed in this solution for treatment. During the treatment, the solution temperature is controlled at 30-40℃, and the treatment time is controlled at 60-80 seconds to form the desired active sites and microstructures on the substrate surface.

[0051] Step S124, second water wash.

[0052] After the etching process is completed, the substrate is quickly removed from the etching solution and thoroughly cleaned with deionized water to immediately terminate the etching reaction and remove any residual etching solution.

[0053] Step S125: Drying.

[0054] The washed substrate is placed in a low-temperature baking oven and dried at 60-70℃ to remove surface moisture, thus completing the entire wet chemical etching process.

[0055] Furthermore, in step S13, a silane coupling agent solution is applied to the substrate surface and dried to form a chemically bonded bridging layer on the substrate surface, further enhancing the coating adhesion. This bridging layer introduces a bifunctional intermediate layer capable of forming covalent bonds between the "inert" phenelzine and the "inert" substrate, upgrading the bonding mode from weak, unstable physical adsorption to a strong, durable synergistic effect of chemical bonding and physical interlocking, thereby significantly enhancing the adhesion between the subsequently formed phenelzine film and the substrate.

[0056] For example, γ-aminopropyltriethoxysilane (APTES, also known as A-174) or γ-methacryloyloxypropyltrimethoxysilane (KH-570) can be selected as silane coupling agents. Preferably, a 0.5-2% diluted solution can be prepared (for example, to prepare 1000ml of 1% APTES solution: mix 10ml of APTES, 891ml of ethanol, 99ml of deionized water, and 0.5-1ml of glacial acetic acid). The solution is applied to the substrate surface by spin coating or dip coating, and then dried at 100-120°C for 10-15 minutes to form a stable chemical bond bridging layer, which greatly improves the adhesion between the pyrene coating and the substrate.

[0057] It should be noted that the combined use of the above pretreatment steps can significantly improve the coating's adhesion, high-temperature resistance, and insulation performance. During the probe energization test, the coating exhibited excellent adhesion and was not easily detached. Even under high-temperature testing conditions, it maintained stable adhesion and insulation effects. This is precisely due to the cleaning and activation, chemical etching, and coupling agent coating treatments employed in the pretreatment stage, which effectively enhanced the adsorption force between the Piriton membrane and the substrate.

[0058] An insulating coating is deposited on the pretreated substrate surface using a chemical vapor deposition process. In some embodiments, the chemical vapor deposition process used is a phenelzine vacuum deposition process, and the insulating coating is a phenelzine coating. The phenelzine vacuum deposition process mainly includes three core steps: sublimation, pyrolysis, and deposition.

[0059] Figure 4 A schematic diagram of a Parylene vacuum coating apparatus according to an embodiment of the present invention is disclosed, as follows: Figure 4 As shown, heating furnace 401 is used to perform the sublimation step, pyrolysis furnace 402 is used to perform the pyrolysis step, and deposition chamber 403 is used to perform the deposition step. The substrate 400 to be coated is transferred sequentially between heating furnace 401, pyrolysis furnace 402 and deposition chamber 403 to complete the entire coating process.

[0060] In a typical Perylene vacuum coating process, one possible specific steps are as follows: First, a solid dimer (such as DPX-N) is sublimated into a gaseous state at a temperature of 150~180°C; second, the gaseous substance is decomposed into active monomers (p-xylene radicals) at a high temperature of 650~700°C; finally, the monomers are polymerized on the substrate surface at room temperature (about 30°C) to form a nanoscale film with a thickness of 0.1~50μm.

[0061] Figure 5 A step diagram of a Parylene vacuum coating process according to an embodiment of the present invention is disclosed, as follows: Figure 5The illustrated Perylene vacuum coating process includes a sublimation step, a pyrolysis step, and a deposition step: The sublimation step (step S21) includes: sublimating the solid pyrene dimer into a gaseous dimer under vacuum conditions; The pyrolysis step (step S22) includes: pyrolyzing the gaseous dimer at high temperature to generate active monomers; The deposition step (step S23) includes: polymerizing and depositing the active monomer on the substrate surface to form a pyrelin coating.

[0062] In this embodiment, step S21 selects Parylene C dimer as the coating material, which has good acid and alkali resistance, insulation and high temperature resistance.

[0063] The present invention has systematically optimized and coordinated the process parameters of steps S21 to S23 above. For example, by precisely controlling the core parameters such as sublimation temperature, pyrolysis temperature, deposition chamber pressure (system vacuum degree) and deposition temperature within a specific range, a high-quality Pirilin insulating coating with uniform thickness, strong adhesion and low internal stress is finally obtained.

[0064] More specifically, by controlling the sublimation temperature of the sublimation step, the pyrolysis temperature of the pyrolysis step, the deposition temperature of the deposition step, and the pressure (system vacuum) of the deposition chamber within preset ranges, the thickness of the Piriton coating can be adjusted and controlled, ensuring that the entire coating process is carried out in a stable and repeatable physicochemical state, thereby obtaining an insulating coating with excellent performance.

[0065] Specifically, the effects of the aforementioned core process parameters on the coating effect of the Parylene coating are as follows: Increasing the sublimation temperature may lead to a decrease in coating quality, and excessively rapid deposition may increase the internal stress of the coating; decreasing the sublimation temperature may result in some material residue, and the coating thickness may not meet the requirements. Increasing the pyrolysis temperature will cause the coating film to yellow, become brittle, and develop carbonized spots, resulting in decreased adhesion. Decreasing the pyrolysis temperature will lead to insufficient pyrolysis, producing a large number of unpyrolyzed or partially pyrolyzed intermediates, causing the coating film to become powdery, loose, and opaque, with extremely poor mechanical and barrier properties. Increasing the vacuum level (decreasing the pressure) will reduce the deposition rate. When the pressure is too low, the number of monomer molecules per unit volume decreases, the molecular flux reaching the substrate decreases, and the deposition rate slows down. Decreasing the vacuum level (increasing the pressure) will lead to a decrease in film uniformity and a rough surface is more likely to be produced.

[0066] In this embodiment, in step S21, the sublimation temperature is controlled at 150±5℃. By precisely controlling the sublimation temperature, the solid dimer is ensured to sublimate stably at the optimal rate, which not only provides sufficient reaction precursors but also avoids a sudden increase in vapor pressure or local overheating of raw materials due to excessively fast rates, thereby ensuring the controllability of coating thickness and uniformity.

[0067] In step S22, the pyrolysis temperature is controlled at 680±5℃. By precisely controlling the pyrolysis temperature, it is ensured that the dimer is completely pyrolyzed into active monomers, thus avoiding the impact of incompletely pyrolyzed intermediates on the coating quality.

[0068] In the deposition step of step S23, the active monomer enters a deposition chamber at a lower temperature and undergoes a polymerization reaction on the substrate surface, depositing a uniform pyrene coating. In some embodiments, the deposition chamber pressure (vacuum) is controlled at 0.1-0.5 Torr to avoid turbulence causing uneven coating; the deposition temperature (substrate temperature) is controlled at 15-30°C (close to room temperature) to reduce stress caused by mismatch in thermal expansion coefficients, allowing the active monomer to polymerize uniformly in the vacuum deposition chamber and form a high-quality uniform film.

[0069] As a high-molecular polymer, Pyrelin has a relatively high coefficient of thermal expansion (CTE) and is quite sensitive to temperature changes. It expands more when the temperature rises and contracts more when the temperature drops. In contrast, the probe substrate typically has a very low coefficient of thermal expansion, meaning its thermal expansion and contraction are much less than that of Pyrelin. If the substrate temperature is too high, the Pyrelin film will experience a significant difference in thermal expansion and contraction after cooling. Since the Pyrelin film is firmly attached to the substrate, the strong "binding" of the substrate prevents the Pyrelin film from contracting freely, generating huge tensile stress inside the Pyrelin film. The substrate, on the other hand, is subjected to compressive stress, affecting the coating adhesion stability.

[0070] Furthermore, the target thickness of the Piriton coating can be controlled to be achieved by quantitative feeding or real-time monitoring. The quantitative feeding method adjusts the thickness of the Parylene coating by controlling the initial amount of raw material entering. The real-time monitoring method adjusts the thickness of the phenelzine coating by measuring the thickness of the coating in real time and dynamically adjusting the process parameters of the deposition process based on the measurement results.

[0071] Specifically, the quantitative feeding method indirectly but stably controls the final coating thickness of Piriton by precisely controlling the initial amount of raw material entering the heating furnace 401 under fixed process parameters. This method is simple to operate and suitable for standardized coating requirements in mass production.

[0072] The real-time monitoring method measures the thickness of the phenelzine coating or parameters related to the thickness of the phenelzine coating in real time during the coating process, and dynamically adjusts process parameters (such as sublimation rate) or directly controls the deposition endpoint based on the measured values ​​to achieve the preset target thickness. This method has higher accuracy and is suitable for high-precision probe preparation scenarios with strict requirements for coating thickness.

[0073] In this embodiment, the preset target thickness ranges from 0.1 μm to 100 μm, and can be selected according to the specific electrical performance requirements of the probe.

[0074] To form specific conductive and insulating regions on the probe, the insulating coating formed in step S2 needs to be selectively removed locally. The insulating region refers to the area where the pyrene coating remains, used for electrical isolation; the conductive region refers to the exposed substrate surface after the coating is removed, used for establishing electrical connections.

[0075] Figure 6 A step diagram of a localized film removal process according to an embodiment of the present invention is disclosed, such as... Figure 6 As shown, the localized mask removal process mainly includes the following steps: lamination, exposure, development, plasma etching, and mask removal. The lamination step (step S31) includes: covering the area where the coating to be removed with a dry solder resist film and laminating it under specific lamination process conditions to make it tightly adhere to the substrate surface; The exposure step (step S32) includes: exposing the substrate covered with solder resist dry film to cure the solder resist dry film according to a preset pattern; The development step (step S33) includes: placing the exposed substrate in a developing solution to remove the uncured solder resist dry film and form a patterned mask; The plasma etching step (step S34) includes: using the patterned mask as a shield, performing plasma etching under preset plasma etching process conditions to remove the insulating coating in the area not covered by the mask; The mask removal step (step S35) includes: removing the patterned mask.

[0076] In the localized film removal process of this embodiment, a solder resist dry film is used for localized masking, and the phenelzine coating in the target area is removed by plasma etching.

[0077] The main components of the solder resist dry film include: modified epoxy acrylate resin, free radical photoinitiator, multifunctional acrylate, carbon black, barium sulfate, silica, dispersant, leveling agent, defoamer, PET (polyethylene terephthalate) film, PE (polyethylene) film, etc., which can form a stable masking effect during the etching process.

[0078] Figure 7 A schematic diagram illustrating the lamination step of a partial film removal process according to an embodiment of the present invention is shown, as follows: Figure 7 The lamination steps shown, from left to right, include: first, cutting the black solder resist dry film to a predetermined size (e.g., 40×30mm); second, pre-applying the cut solder resist dry film to the surface of the substrate, specifically covering the front and back of the probe; and finally, laminating the solder resist dry film tightly to the surface of the substrate in a laminating machine under preset lamination process conditions.

[0079] More specifically, the preset lamination process conditions include lamination temperature, vacuuming time, pressure, and lamination time. The parameter settings of these lamination process conditions have a critical impact on lamination quality, and each parameter must be controlled within an appropriate range. If the lamination temperature is set too high, the properties of the solder resist dry film will change, affecting the subsequent exposure effect; if the lamination temperature is set too low, the adhesion of the solder resist dry film will be insufficient, making it easy to fall off. If the vacuuming time is too long, it will reduce production efficiency; if the vacuuming time is too short, it will cause air bubbles to appear between the solder resist dry film and the substrate, affecting the masking accuracy. If the pressure is too high, it will cause uneven distribution of the dry film; if the pressure is too low, it may cause problems such as insufficient adhesion or wrinkles. If the lamination time is too long, it may cause resin run-out or pre-crosslinking, increasing process risks and affecting efficiency; if the lamination time is too short, insufficient heat transfer will prevent the dry film from softening sufficiently, which may cause false adhesion and lead to detachment during subsequent development or etching steps.

[0080] In this embodiment, the film-pressing temperature is 55-65℃, the vacuuming time is 25-35s, the pressure is 0.08-0.12MPa, and the pressing time is 35-45s. Preferably, the following optimized parameter combination can be used: film-pressing temperature 60℃, vacuuming time 30s, pressure 0.1MPa, and pressing time 40s. This set of parameters can ensure the mask adhesion quality and pattern accuracy while taking into account process efficiency and reliability.

[0081] Figure 8 A schematic diagram illustrating the exposure steps of a localized film removal process according to an embodiment of the present invention is shown, as follows: Figure 8 As shown, after the solder resist dry film is applied, an exposure operation is required. More specifically, after the solder resist dry film is applied to the surface of the probe substrate, a corresponding control program is written according to the required pattern. Ultraviolet light of a preset wavelength is used to selectively irradiate the probe substrate with the solder resist dry film, causing the dry film in the exposed area to cure according to the preset pattern, thereby forming a latent image corresponding to the preset pattern. This step lays the foundation for subsequent differentiation between cured and uncured areas, enabling the development step.

[0082] In this embodiment, the preset wavelength of the ultraviolet light is 400-410 nm. Preferably, the preset wavelength of the ultraviolet light is 405 nm (corresponding to the h-line).

[0083] Figure 9 A schematic diagram illustrating the developing step of a localized film removal process according to an embodiment of the present invention is shown, as follows: Figure 9 The development steps shown include, from left to right: First, a sodium carbonate solution of a specific concentration is prepared as the developing solution and its developing temperature is controlled within a preset range; second, the exposed probe substrate is immersed in the solution and kept for a specified immersion time; finally, after immersion, the substrate is removed, and the unexposed and cured solder resist dry film is removed, thereby forming a patterned mask corresponding to the preset pattern on the substrate surface.

[0084] In this embodiment, a specific developing solution is used and immersion is performed under preset developing process conditions.

[0085] The developing solution is a sodium carbonate solution with a concentration of 0.8%-1.2%. The preset developing process conditions include a developing temperature of 29-30°C and an immersion time of 4-5 minutes. Preferably, the concentration of the sodium carbonate solution is 1%. This combination of parameters effectively dissolves the uncured dry film while avoiding excessive erosion of the cured areas or substrate, thus ensuring the accuracy and edge sharpness of the pattern transfer.

[0086] Figure 10 A schematic diagram of a plasma etching step in a localized film removal process according to an embodiment of the present invention is shown, as follows: Figure 10 In the plasma etching step shown, a specific mixed gas is used and plasma etching is performed under preset plasma etching process conditions to selectively remove the Parylene coating in areas not covered by the patterned mask.

[0087] In some embodiments, the specific mixed gas is a mixture of carbon tetrafluoride (CF4) and oxygen (O2) in a predetermined volume ratio, and the preset plasma etching process conditions include etching power and chamber pressure.

[0088] In this embodiment, the specific mixed gas is a mixture of carbon tetrafluoride and oxygen at a volume ratio of 1:1.5 to 1:2.5, the etching power is 450-550W, and the chamber pressure is 90-110 mtorr. Preferably, the mixing ratio of the gas is C. : The ratio was 1:2, the etching power was set to 500W, and the chamber pressure was set to 100 mtorr. Under these parameters, the generated plasma could efficiently etch the exposed pyrene coating while exhibiting high selectivity for the substrate material. This effectively avoided damage to the probe structure caused by over-etching while achieving precise pattern transfer, thus meeting the process requirements for high-precision probe fabrication.

[0089] After plasma etching is completed, a mask removal step is required to remove the residual solder resist film that serves as the mask, so as to obtain the final probe with a preset insulating area and conductive area on the surface.

[0090] In this embodiment, during the mask removal step, a specific stripping agent is used, and the mask is immersed under preset stripping process conditions. The specific stripping agent is a green paint stripping solution (e.g., JY-168).

[0091] Figure 11 A schematic diagram illustrating the mask removal step of a localized mask removal process according to an embodiment of the present invention is shown, as follows: Figure 11 The mask removal steps shown, from left to right, include: first, heating the green paint stripper solution to a preset stripping temperature; second, immersing the etched probe substrate in the solution for a specified soaking time to allow the black solder resist film on the surface to soften and fall off; and finally, removing the substrate to complete the mask removal and obtain a probe with a preset insulating and conductive area.

[0092] like Figure 11 In the illustrated embodiment, the preset stripping process conditions include stripping temperature and soaking time. The stripping temperature is 85-95°C, and the soaking time is at least 5 minutes. Preferably, the stripping temperature is controlled at 90°C, and the soaking time is 5 minutes. These parameters effectively dissolve and peel off the cured solder resist dry film without damaging the formed Pyrelin coating or the exposed substrate surface, thereby ensuring a clear interface between the probe insulation and conductive areas and reliable function.

[0093] In summary, the local coating process in step S3 of this invention uses a patterned solder resist film as a mask. Through a series of steps including lamination, exposure, development, plasma etching, and mask removal, it can precisely protect the areas of insulation coating that need to be retained and completely remove the coating from non-target areas. This local coating process has advantages such as high pattern resolution, neat edges, excellent selectivity, and good process stability, and can meet the requirements of mass production and consistent manufacturing of high-precision probes.

[0094] The present invention also provides a probe, which is manufactured using the probe coating method described in any of the above embodiments. Due to the optimized coating process described above, the resulting probe has a localized coating with strong adhesion, reliable insulation performance, and excellent high-temperature resistance at key locations. It can maintain stable electrical isolation and mechanical properties under long-term power-on testing and complex operating conditions, making it suitable for demanding fields such as semiconductor wafer testing, precision electronic measurement, and biomedical sensing.

[0095] The present invention provides a probe coating method and a probe, which have the following beneficial effects: 1) Through pretreatment process, combined with optimized Parylene vapor deposition process, the interfacial bonding force between the insulating coating and the probe substrate is significantly enhanced, effectively solving the problem of easy coating peeling off under high temperature or stress, and improving the long-term reliability of the probe in harsh testing environment. 2) A localized film removal process combining solder resist dry film photolithography and plasma etching is adopted to accurately divide the insulating and conductive areas on the probe, resulting in good edge control and ensuring that the probe has accurate and stable electrical performance from the process level. 3) By combining the Piriton deposition process with a standardized and graphical local film removal process, the entire process is highly standardized, and the parameters of each step are controllable and repeatable. This not only meets the manufacturing requirements of high-precision probes, but also adapts to industrial mass production, significantly improving production efficiency and batch consistency.

[0096] Although the methods described above are illustrated and depicted as a series of actions for the sake of simplicity, it should be understood and appreciated that these methods are not limited by the order of the actions, as some actions may occur in a different order and / or concurrently with other actions from the illustrations and descriptions herein or not illustrated and described herein but which may be understood by those skilled in the art, according to one or more embodiments.

[0097] As indicated in this application and claims, unless the context clearly indicates otherwise, the words "a," "an," "an," and / or "the" are not specifically singular and may include plural forms. Generally speaking, the terms "comprising" and "including" only indicate the inclusion of explicitly identified steps and elements, which do not constitute an exclusive list, and the method or apparatus may also include other steps or elements.

[0098] The above embodiments are provided for those skilled in the art to implement or use the present invention. Those skilled in the art can make various modifications or changes to the above embodiments without departing from the inventive concept of the present invention. Therefore, the protection scope of the present invention is not limited to the above embodiments, but should be the maximum scope that conforms to the innovative features mentioned in the claims.

Claims

1. A probe coating method, characterized in that, Includes the following steps: Pre-treatment of the probe substrate surface; An insulating coating is deposited on the surface of the pretreated substrate using a chemical vapor deposition process. By using a localized film removal process, the insulating coating formed by the chemical vapor deposition process is selectively removed to form a predetermined insulating region and a conductive region on the probe substrate.

2. The probe coating method according to claim 1, characterized in that, The pretreatment of the probe substrate surface includes at least one of the following operations: The surface of the substrate is cleaned and activated. The surface of the substrate is subjected to chemical etching treatment; The surface of the substrate is coated with a silane coupling agent.

3. The probe coating method according to claim 2, characterized in that, The cleaning and activation treatment of the substrate surface includes: Plasma cleaning is used to remove oxides and organic contaminants from the surface of the substrate.

4. The probe coating method according to claim 2, characterized in that, The chemical etching treatment of the substrate surface includes: The substrate surface is treated using a wet chemical etching process to form active sites and geometric structures on the substrate surface.

5. The probe coating method according to claim 2, characterized in that, The process of coating the substrate surface with a silane coupling agent includes: A silane coupling agent solution is applied to the surface of a substrate and dried to form a chemical bond bridging layer on the surface of the substrate. The silane coupling agent is selected from γ-aminopropyltriethoxysilane or γ-methacryloyloxypropyltrimethoxysilane.

6. The probe coating method according to claim 1, characterized in that, The chemical vapor deposition process is a Pyrelin vacuum coating process, and the insulating coating is a Pyrelin coating. The Pyrelin vacuum coating process includes a sublimation step, a pyrolysis step, and a deposition step. By controlling the sublimation temperature of the sublimation step, the pyrolysis temperature of the pyrolysis step, the deposition temperature of the deposition step, and the pressure in the deposition chamber within a preset range, the thickness of the Parylene coating can be adjusted and controlled.

7. The probe coating method according to claim 6, characterized in that: In the sublimation step, the sublimation temperature is 150±5℃; In the pyrolysis step, the pyrolysis temperature is 680±5℃; In the deposition step, the pressure in the deposition chamber is 0.1-0.5 Torr, and the deposition temperature is 15-30℃.

8. The probe coating method according to claim 6, characterized in that, The deposition step further includes: The target thickness of the Piriton coating can be controlled by either quantitative feeding or real-time monitoring. The quantitative feeding method adjusts the thickness of the Parylene coating by controlling the initial amount of raw materials. The real-time monitoring method adjusts the thickness of the phenelzine coating by measuring the thickness of the phenelzine coating in real time and dynamically adjusting the process parameters of the deposition step based on the measurement results. The preset target thickness ranges from 0.1 μm to 100 μm.

9. The probe coating method according to claim 1, characterized in that, The localized film removal process includes a lamination step, an exposure step, a development step, a plasma etching step, and a mask removal step: The lamination step includes covering the area where the coating to be removed with a dry solder resist film and laminating it under preset lamination process conditions; The exposure step includes exposing the substrate covered with the solder resist dry film to cure the solder resist dry film according to a preset pattern. The developing step includes placing the exposed substrate in a developing solution to remove the uncured solder resist dry film and form a patterned mask. The plasma etching step includes using the patterned mask as a shield and performing plasma etching under preset plasma etching process conditions to remove the insulating coating in the area not covered by the mask. The mask removal step includes removing the patterned mask.

10. The probe coating method according to claim 9, characterized in that, In the pressing step, the preset pressing process conditions include pressing temperature, vacuuming time, pressure, and pressing time. The film pressing temperature is 55-65℃, the vacuuming time is 25-35s, the pressure is 0.08-0.12MPa, and the pressing time is 35-45s.

11. The probe coating method according to claim 9, characterized in that, In the exposure step, ultraviolet light of a preset wavelength is used for exposure; The preset wavelength is 400-410nm.

12. The probe coating method according to claim 9, characterized in that, In the developing step, a specific developing solution is used and the mixture is immersed under preset developing process conditions; The developing solution is a sodium carbonate solution with a concentration of 0.8%-1.2%, and the preset developing process conditions include developing temperature and soaking time. The developing temperature is 29-30℃, and the soaking time is 4-5 minutes.

13. The probe coating method according to claim 9, characterized in that, In the plasma etching step, a specific mixed gas is used and plasma etching is performed under preset plasma etching process conditions. The specific mixed gas is a mixture of carbon tetrafluoride and oxygen in a volume ratio of 1:1.5 to 1:2.

5. The preset plasma etching process conditions include etching power and chamber pressure, wherein the etching power is 450-550W and the chamber pressure is 90-110mtorr.

14. The probe coating method according to claim 9, characterized in that, In the mask removal step, a specific stripping agent is used and the mask is immersed under preset stripping process conditions. The specific stripping agent is a green paint stripping agent solution, and the preset stripping process conditions include stripping temperature and soaking time. The stripping temperature is 85-95℃, and the soaking time is at least 5 minutes.

15. A probe, characterized in that, The probe is manufactured using the probe coating method as described in any one of claims 1 to 14.

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