Photoresistance structure, semiconductor element comprising same and manufacturing method thereof

Abstract

The invention provides a photoresist structure, a semiconductor element comprising the photoresist structure, and a preparation method of the semiconductor element comprising the photoresist structure. The photoresist structure comprises a lower photoresist layer; and an upper photoresist layer disposed on the lower photoresist layer. A thermal expansion coefficient of the upper photoresist layer is greater than a thermal expansion coefficient of the lower photoresist layer.

Description

Technical Field

[0001] This application claims priority to U.S. Patent Application No. 18 / 899,096 (i.e., priority date "September 27, 2024"), the contents of which are incorporated herein by reference in their entirety.

[0002] This disclosure relates to a photoresist structure, a semiconductor device including the photoresist structure, and a method for fabricating the semiconductor device including the photoresist structure. Background Technology

[0003] Semiconductor components are used in various electronic applications, such as personal computers, mobile phones, digital cameras, and other electronic devices. The size of semiconductor components is gradually shrinking to meet the ever-increasing demands for computing power. However, this shrinking process introduces new and growing problems. Therefore, challenges continue to emerge in improving quality, yield, performance, and reliability, while reducing complexity.

[0004] The above description of "prior art" provides background information only and does not acknowledge that the above description of "prior art" discloses the subject matter of this disclosure. It does not constitute prior art to this disclosure, and no description of the above "prior art" should be considered part of this case. Summary of the Invention

[0005] One embodiment of this disclosure provides a photoresist structure, including a lower photoresist layer and an upper photoresist layer disposed on the lower photoresist layer. The coefficient of thermal expansion of the upper photoresist layer is greater than that of the lower photoresist layer.

[0006] Another embodiment of this disclosure provides a semiconductor device including a substrate; a lower layer; a lower photoresist layer disposed on the lower layer; an upper photoresist layer disposed on the lower photoresist layer; a recess penetrating the upper photoresist layer and the lower photoresist layer and exposing the lower layer; and a spacer disposed within the recess and on each sidewall of the lower photoresist layer and the upper photoresist layer. The spacer includes a rectangular cross-sectional profile.

[0007] Another embodiment of this disclosure provides a method for fabricating a semiconductor device, comprising: providing a substrate; forming a lower layer on the substrate and forming a lower photoresist layer on the lower layer; forming an upper photoresist layer on the lower photoresist layer, wherein a coefficient of thermal expansion of the upper photoresist layer is greater than a coefficient of thermal expansion of the lower photoresist layer; performing an exposure process to form unexposed and exposed portions of the lower and upper photoresist layers; performing a post-exposure baking process on the lower and upper photoresist layers; performing a development process to remove the exposed portions of the lower and upper photoresist layers and form a recess exposing the lower layer; conformally forming a spacer material on each sidewall of the upper and lower photoresist layers, on an upper surface of the upper photoresist layer, and on an upper surface of the lower layer; performing a heat treatment to expand the upper photoresist layer; and performing an etching process to partially remove the spacer material and form a spacer on each sidewall of the upper and lower photoresist layers.

[0008] The semiconductor device design described in this disclosure can improve the profile of the spacers by employing an upper photoresist layer with a higher coefficient of thermal expansion (CTE). Therefore, the profile of the underlying layer patterned using the spacers as a mask in subsequent processes can also be enhanced, thereby reducing defects during semiconductor device fabrication.

[0009] The foregoing has provided a fairly broad overview of the technical features and advantages of this disclosure, enabling a better understanding of the detailed description that follows. Other technical features and advantages constituting the subject matter of the claims will be described below. Those skilled in the art to which this disclosure pertains will understand that the concepts and specific embodiments disclosed below can be readily utilized to achieve the same purpose as this disclosure by modifying or designing other structures or processes. Those skilled in the art will also understand that such equivalent constructions cannot depart from the spirit and scope of this disclosure as defined by the appended claims. Attached Figure Description

[0010] When with attachment Figure 1 When reading this document, the best understanding of all aspects of this disclosure can be obtained from the following detailed description. It should be understood that, according to industry standard practice, the various features are not drawn to scale. In fact, the dimensions of the various features can be increased or decreased arbitrarily for clarity of discussion.

[0011] Figure 1 This is a flowchart illustrating a method for fabricating a semiconductor element according to an embodiment of the present disclosure.

[0012] Figure 2 This is a cross-sectional schematic diagram illustrating an intermediate semiconductor element according to an embodiment of the present disclosure.

[0013] Figure 3 This is a schematic diagram illustrating a component of the lower photoresist layer according to an embodiment of the present disclosure.

[0014] Figure 4 This is a schematic diagram illustrating the polymer structure of the core polymer of an embodiment of the present disclosure.

[0015] Figure 5 This is a schematic diagram illustrating the blocking structure of a blocking group according to an embodiment of the present disclosure.

[0016] Figure 6 and Figure 7 This is a schematic diagram illustrating various properties of a sensitizer according to an embodiment of the present disclosure.

[0017] Figure 8 and Figure 9 This is a schematic diagram illustrating the chemical structure of a photoacid generator according to an embodiment of the present disclosure.

[0018] Figure 10 This is a cross-sectional schematic diagram illustrating an intermediate semiconductor element according to an embodiment of the present disclosure.

[0019] Figure 11 This is a schematic diagram illustrating an assembly of an upper photoresist layer according to an embodiment of the present disclosure.

[0020] Figures 12 to 17 This is a cross-sectional schematic diagram illustrating a part of the process for manufacturing a semiconductor device according to an embodiment of the present disclosure.

[0021] The reference numerals in the attached figures are explained as follows:

[0022] 1: Semiconductor components

[0023] 10: Preparation method

[0024] 101: Base

[0025] 103: Lower level

[0026] 103TS: Top surface

[0027] 200: Photoresist structure

[0028] 210: Lower photoresist layer

[0029] 210S: Sidewall

[0030] 211: Unexposed parts

[0031] 213: Exposed parts

[0032] 220: Upper photoresist layer

[0033] 220S: Sidewall

[0034] 220TS: Top surface

[0035] 221: Unexposed parts

[0036] 223: Exposed parts

[0037] 302: R

[0038] 306: Nitrogen atom

[0039] 310: Spacer

[0040] 311: Lower horizontal part

[0041] 311S: Sidewall

[0042] 313: Upper horizontal part

[0043] 313S: Sidewall

[0044] 401: Core Polymer

[0045] 403: Adjusting the polymer

[0046] 405: Barrier group

[0047] 407: Sensitizer

[0048] 409: Photoacid Generator

[0049] 411: Solvent

[0050] 500: PHS chemical structure

[0051] 501: End

[0052] 503: End

[0053] 505: Hydroxyl

[0054] 58: Photoresist layer

[0055] 600: tert-butoxycarboxyl group

[0056] 710: Spacer Material

[0057] 711: Lower horizontal section

[0058] 713: Upper horizontal part

[0059] 801: Mask

[0060] EX1: Exposure Area

[0061] EX3: Unexposed area

[0062] RC1: Depression

[0063] R1~R7: Heterocyclic structure

[0064] T1: Thickness

[0065] T2: Thickness

[0066] W1: Width

[0067] W2: Width

[0068] α: Angle Detailed Implementation

[0069] The following describes specific examples of components and configurations to simplify embodiments of this disclosure. Of course, these embodiments are merely illustrative and are not intended to limit the scope of this disclosure. For example, in the description, a first component is formed on top of a second component, which may include embodiments where the first and second components are in direct contact, or embodiments where an additional component is formed between the first and second components such that the first and second components do not directly contact each other. Furthermore, reference numerals and / or letters may be repeated in many examples of embodiments of this disclosure. These repetitions are for simplicity and clarity and, unless specifically stated herein, do not in themselves represent a specific relationship between the various embodiments and / or the configurations discussed.

[0070] Furthermore, for ease of explanation, spatial relative terms such as "beneath," "below," "lower," "above," and "upper" may be used herein to describe the relationship between one element or feature shown in the figures and another element or feature. These spatial relative terms are intended to encompass not only the orientations shown in the figures but also different orientations of the elements during use or operation. The device may have other orientations (rotated 90 degrees or in other orientations), and the spatial relative descriptions used herein can be interpreted accordingly.

[0071] It should be understood that when a component is formed on, connected to, and / or coupled to another component, it may include embodiments in which these components are in direct contact, and may also include embodiments in which additional components are formed between these components so that these components are not in direct contact.

[0072] It should be understood that although the terms first, second, third, etc., may be used herein to describe various elements, components, regions, layers, or sections, these elements, components, regions, layers, or sections are not limited by these terms. Rather, these terms are used only to distinguish one element, component, region, layer, or section from another region, layer, or section. Therefore, without departing from the teachings of the inventive concept of the present invention, the first element, component, region, layer, or section discussed below may be referred to as a second element, component, region, layer, or section.

[0073] Unless otherwise specified herein, when referring to orientation, layout, location, shapes, sizes, amounts, or other measures, terms such as “same,” “equal,” “planar,” or “coplanar” as used herein do not necessarily mean an exact identical orientation, layout, location, shape, size, amount, or other measurement, but rather mean, within acceptable differences, substantially identical orientation, layout, location, shape, size, amount, or other measurement, for example, that may occur due to manufacturing processes. The term “substantially” may be used herein to convey this meaning. For example, "substantially the same," "substantially equal," or "substantially planar" can mean exactly the same, equal, or planar, or it can be the same, equal, or planar within an acceptable range of differences, for example, which may occur due to the manufacturing process.

[0074] In this disclosure, a semiconductor device generally means a device that can operate by utilizing semiconductor characteristics, and an electro-optic device, a light-emitting display device, a semiconductor circuit, and an electronic device are all included in the scope of semiconductor devices.

[0075] It should be understood that in the description of this disclosure, "above" corresponds to the direction of the Z-direction arrow, while "below" corresponds to the opposite direction of the Z-direction arrow.

[0076] Figure 1 This is a flowchart illustrating a method 10 for fabricating a semiconductor element 1 according to an embodiment of the present disclosure. Figure 2 This is a cross-sectional schematic diagram illustrating an intermediate semiconductor element according to an embodiment of the present disclosure. Figure 3This is a schematic diagram illustrating the components of the lower photoresist layer 210 according to an embodiment of the present disclosure. Figure 4 This is a schematic diagram illustrating the polymer structure of the core polymer 401 in an embodiment of the present disclosure. Figure 5 This is a schematic diagram illustrating the barrier structure of the barrier base 405 according to an embodiment of the present disclosure. Figure 6 and Figure 7 This is a schematic diagram illustrating various characteristics of a sensitizer 407 according to an embodiment of the present disclosure. Figure 8 and Figure 9 This is a schematic diagram illustrating the chemical structure of a photoacid generator 409 according to an embodiment of the present disclosure.

[0077] Please refer to Figures 1 to 9 In step S11, a substrate 101 can be provided, a lower layer 103 can be formed on the substrate 101, a lower photoresist layer 210 can be formed on the lower layer 103, and a first soft baking process can be performed on the lower photoresist layer 210.

[0078] Please refer to Figure 2 In some embodiments, substrate 101 may be a silicon substrate (e.g., a p-type substrate) doped with a p-type dopant (e.g., boron). In some embodiments, substrate 101 may be another suitable semiconductor material. For example, substrate 101 may be a silicon substrate (e.g., an n-type substrate) doped with an n-type dopant (e.g., phosphorus or arsenic). In some embodiments, substrate 101 may include other elemental semiconductors, such as germanium and diamond. In some embodiments, substrate 101 may optionally include compound semiconductors and / or alloy semiconductors. In some embodiments, substrate 101 may include an epilayer that can be strained to enhance performance and may include a silicon-on-insulator (SOI) structure.

[0079] In some embodiments, the substrate 101 may be substantially conductive or semiconductive. The resistance may be less than about 10 ohms. 3 Ohm-meter. In some embodiments, substrate 101 may comprise a metal, a metal alloy, or a metal nitride / sulfide / selenide / oxide / silicide with the molecular formula MXa, where M is a metal, X is N, S, Se, O, or Si, and a value of a ranges from approximately 0.4 to 2.5. For example, substrate 101 may comprise Ti, Al, Co, Ru, TiN, WN2, or TaN.

[0080] In some embodiments, substrate 101 may comprise a dielectric material with a dielectric constant ranging from about 1 to about 40. Substrate 101 may comprise Si, a metal oxide, or a metal nitride, wherein the molecular formula is MXb, where M is a metal or Si, X is N or O, and b is in the range of about 0.4 to 2.5. For example, substrate 101 may comprise silicon oxide, silicon nitride, aluminum oxide, hafnium oxide, or lanthanum oxide.

[0081] Please refer to Figure 2 The lower layer 103 may be formed on the substrate 101. In some embodiments, the lower layer 103 may be a layer that needs to be patterned in subsequent processes. In some embodiments, the lower layer 103 may include a material such as silicon oxide, silicon nitride, silicon oxynitride, or other suitable materials or compositions. In some embodiments, the lower layer 103 may be an antireflective coating such as a nitrogen-free antireflective coating, such as silicon oxide, silicon carbide, or plasma-enhanced chemical vapor deposition silicon oxide. In some embodiments, the lower layer 103 may include a high-k dielectric layer, a gate layer, a hard mask layer, an interface layer, a capping layer, a diffusion / barrier layer, a dielectric layer, a conductive layer, other suitable layers, and / or combinations thereof. In some embodiments, the fabrication technology of the lower layer 103 may include a deposition process, such as chemical vapor deposition, plasma-enhanced chemical vapor deposition, physical vapor deposition, evaporation, electroplating, electroless coating, or spin coating.

[0082] In some embodiments, the lower photoresist layer 210 may be formed on the lower layer 103. In some embodiments, the lower photoresist layer 210 may be a chemically amplified photoresist. In some embodiments, the lower photoresist layer 210 may be positive or negative. In some embodiments, the fabrication technique of the lower photoresist layer 210 includes a spin-coating process. In some embodiments, the lower photoresist layer 210 may be sensitive to radiation, such as I-line light, deep ultraviolet (DUV) light (e.g., 248 nm radiation from a krypton fluoride (KrF) excimer laser or 193 nm radiation from an argon fluoride (ArF) excimer laser), extreme ultraviolet (EUV) light (e.g., 135 nm light), electron beams, and ion beams.

[0083] Please refer to Figure 3 In some embodiments, the lower photoresist layer 210 may include a core polymer 401, a barrier group 405 chemically bonded to the polymer 401, a sensitizer 407, a photoacid generator (PAG) 409, and a solvent 411.

[0084] In some embodiments, the core polymer 401 provides resistance to etching (or implantation). In some embodiments, the core polymer 401 may comprise a poly(norbornene)-co-malaicanhydride (COMA) polymer, a polyhydroxystyrene (PHS) polymer, or an acrylate-based polymer. For example, acrylate polymers include polymethyl methacrylate (PMMA) polymers. PHS polymers include a number of polymers such as… Figure 4The PHS chemical structure 500 is shown, where n is an integer greater than 2. The PHS chemical structure 500 includes two ends 501 and 503, which are ends that can be chemically linked to other PHS chemical structures. PHS is sensitive to EUV and can act as a sensitizer during the exposure process. Therefore, multiple PHS chemical structures 500 are chemically bonded together (via the two ends 501 and 503), thereby forming a PHS polymer backbone. The core polymer 401 may also include multiple lateral sites that can be chemically bonded to other chemical groups. For example, the PHS polymer includes multiple hydroxyl (OH) 505 chemically bonded to the lateral sites.

[0085] In some examples, the blocking group 405 may be an acid-indestructible group (ALG) or a dissolution inhibitor that reacts with acids. In some embodiments, the blocking group 405 may be a chemical group that is deprotected by a photoacid generator in the exposed region of the lower photoresist layer 210. Therefore, the exposed lower photoresist layer 210 will change its polarity and solubility. For example, the solubility of the exposed lower photoresist layer 210 in the developer may increase (for positive lower photoresist layers 210) or decrease (for negative lower photoresist layers 210). When the exposure dose of the lithography process reaches a dose threshold, the exposed lower photoresist layer 210 will dissolve in the developer, or the exposed lower photoresist layer 210 will not dissolve in the developer. In some embodiments, the blocking group 405 may include... Figure 5 The t-butoxy-carbonyl group shown is 600.

[0086] In some embodiments, sensitizer 407 can increase the sensitivity and efficiency of the lower photoresist layer 210. In some embodiments, sensitizer 407 can be designed to increase the sensitivity of the lower photoresist layer 210. By incorporating into the lower photoresist layer 210, the lower photoresist layer 210 can have enhanced sensitivity to the first radiation. Specifically, sensitizer 407 can be sensitive to the first radiation and can generate second radiation in response to the first radiation. In this embodiment, the first radiation is EUV radiation, and the second radiation is electrons. Sensitizer 407 absorbs EUV radiation and generates secondary electrons. In addition, photoacid generator 409 can be sensitive to secondary electrons, absorb secondary electrons, and generate acid.

[0087] In some embodiments, sensitizer 407 may be mixed with core polymer 401 and photoacid generator 409 in solvent 411. In some embodiments, sensitizer 407 may alternatively or additionally be incorporated into core polymer 401 or photoacid generator 409. In some embodiments, sensitizer 407 may be a monomer additive, oligomer, or polymer type in the lower photoresist layer 210.

[0088] In some embodiments, sensitizer 407 may include a heterocyclic ring containing at least one nitrogen atom and at least one double bond. In some embodiments, sensitizer 407 may have a recombination energy in the range of about 165 to 170 kcal / mol. Figure 6 and Figure 7 The double bond 304 between nitrogen atom 306 and R 302 can be a C4–C30 resonance ring, an aromatic ring, or a heterocyclic aromatic ring. R 302 can also contain a polar group, such as —OH, —NH2, —COOH, —CONH2. This structure provides sensitizer 407 with a lower ionization energy and a higher recombination energy. Figure 6 Here is an example of a nitrogen atom bonded to a resonance ring. Figure 7 An example is shown where two nitrogen atoms are bonded to a resonance ring.

[0089] In some embodiments, photoacid generator 409 (also known as an acid-generating compound, AGC) can absorb radiant energy and generate acid. In some embodiments, photoacid generator 409 may include a benzene ring. For example, photoacid generator 409 may include a sulfonium cation, such as a triphenylsulfonium (TPS) group; and an anion, such as a triflate anion. The cation of photoacid generator 409 may have a chemical bond with sulfur and additional chemical bonds, thereby increasing the sensitivity (or absorption) of photoacid generator 409 to electrons or other types of secondary radiation.

[0090] In some embodiments, the photoacid generator 409 may be chemically designed to effectively absorb EUV radiation. For example, the photoacid generator 409 may include fluorine, saturated alkyl groups, aromatic compounds, heterocyclic groups, or combinations thereof to enhance EUV absorption. In some examples, the sensitizer 407 may be chemically combined with the photoacid generator 409.

[0091] In some embodiments, the photoacid generator 409 may be designed to have a specific chemical structure in order to better absorb electrons generated by the sensitizer 407. In some embodiments, the photoacid generator 409 may contain at least one heterocycle having at least one nitrogen or oxygen atom in addition to several carbon atoms. In some embodiments, the photoacid generator 409 may also have at least one double bond within the heterocycle. Figure 8 and Figure 9 Examples of photoacid generator 409 are shown.

[0092] Figure 8Example photoacid generator 409 has an M+ structure surrounded by a number of heterocyclic structures. Such heterocyclic structures are represented by R1, R2, R3, R4, R5, R6, and R7. R1, R2, R3, R4, R5, R6, and R7 can include at least one of C1-C20 heterocyclic aromatic derivatives (e.g., furan, pyridine, pyrazine, imidazole, thiophene) and fluoroalkyl groups. In some examples, M can be a cation and A can be an anion. In some examples, M or A can be one of sulfur, carbon, or iodine.

[0093] Figure 9 An example is a photoacid generator 409 having a structure surrounded by multiple rings. In this embodiment, the structure is a monothiocation. As shown, each structure has at least one heterocycle with at least one double bond. In some examples, at least two double bonds are present. In some examples, three double bonds are present.

[0094] After the lower photoresist layer 210 is formed, a first soft baking process can be performed on the lower photoresist layer 210 to reduce the solvent in the lower photoresist layer 210. For example, the solvent 411 may be partially evaporated due to the first baking process.

[0095] Figure 10 This is a cross-sectional schematic diagram illustrating an intermediate semiconductor element according to an embodiment of the present disclosure. Figure 11 This is a schematic diagram illustrating the components of the upper photoresist layer 220 according to an embodiment of the present disclosure.

[0096] Please refer to Figure 1 , Figure 10 and Figure 11 In step S13, an upper photoresist layer 220 may be formed on the lower photoresist layer 210, and a second soft baking process may be performed on the upper photoresist layer 220.

[0097] Please refer to Figure 10 The upper photoresist layer 220 can be formed on the lower photoresist layer 210 by a spin coating process. The upper photoresist layer 220 and the lower photoresist layer 210 can together constitute a photoresist structure 200. In some embodiments, the upper photoresist layer 220 can be a chemically amplified photoresist. In some embodiments, the upper photoresist layer 220 can be positive or negative. It should be understood that the lower photoresist layer 210 and the upper photoresist layer 220 are of the same type. That is, both the lower photoresist layer 210 and the upper photoresist layer 220 can be positive or both can be negative.

[0098] In some embodiments, the upper photoresist layer 220 may be sensitive to radiation, such as I-line light, DUV light (e.g., 248 nm radiation from a KrF excimer laser or 193 nm radiation from an ArF excimer laser), EUV light (e.g., 135 nm light), electron beams, and ion beams.

[0099] In some embodiments, the upper photoresist layer 220 and the lower photoresist layer 210 may have different coefficients of thermal expansion (CTE). In some embodiments, the CTE of the upper photoresist layer 220 may be greater than the CTE of the lower photoresist layer 210. In some embodiments, the ratio of the CTE of the upper photoresist layer 220 to the CTE of the lower photoresist layer 210 may be between about 2.0 and about 1.1, between about 1.5 and about 1.1, or between about 1.3 and about 1.1.

[0100] The CTE difference between the upper photoresist layer 220 and the lower photoresist layer 210 can be attributed to several factors related to differences in their composition and structure. In some embodiments, the CTE difference may be caused by different chemical chain lengths or different structures of the polymers in the photoresist layers. In some embodiments, the CTE difference may be caused by different compositions of the polymers in the photoresist layers. In some embodiments, the CTE difference may be caused by different thicknesses of the photoresist layers.

[0101] In some embodiments, the upper photoresist layer 220 may comprise a polymer with longer and more flexible chemical chains compared to the lower photoresist layer 210. The increased flexibility of the chemical chains allows for greater molecular movement under thermal expansion, thereby generating a higher CTE. In contrast, the lower photoresist layer 210 may have a more rigid polymer backbone chemical chain, thereby restricting chemical chain movement and exhibiting a lower CTE.

[0102] The strength of intermolecular forces between polymer chains can significantly affect CTE. In some embodiments, the upper photoresist layer 220 may have weaker intermolecular interactions, such as van der Waals forces, thereby allowing easier chemical chain movement during thermal expansion. On the other hand, the lower photoresist layer 210 may exhibit stronger intermolecular forces, such as hydrogen bonds, thereby restricting chemical chain mobility and resulting in a lower CTE. In some embodiments, the upper photoresist layer 220 may comprise a polymer having ester and / or ether groups, which can reduce chemical chain stiffness. Therefore, the strength of intermolecular forces between polymer chains may be reduced.

[0103] The presence of thermally expandable functional groups in the polymer structure of the photoresist layer leads to a higher CTE. In some embodiments, the upper photoresist layer 220 may contain functional groups that undergo significant volume expansion upon heating, thereby amplifying the overall CTE of the material. The lower photoresist layer 210, lacking such chemical groups, may exhibit a lower CTE. In some embodiments, the upper photoresist layer 220 may include thermally functional groups, such as benzene rings, polycyclic aromatic hydrocarbons (e.g., naphthalene), heterocycles, cyclohexane, long alkyl chains, branched alkyl chains, or combinations thereof.

[0104] In some embodiments, the composition of the upper photoresist layer 220 may be the same as that of the lower photoresist layer 210. That is, the upper photoresist layer 220 may include a core polymer 401, a barrier group 405 chemically bonded to the polymer 401, a sensitizer 407, a photoacid generator 409, and a solvent 411, which will not be described in detail here. In some embodiments, the thickness T2 of the upper photoresist layer 220 may be greater than the thickness T1 of the lower photoresist layer 210. In some embodiments, the chemical chain length of the core polymer 401 of the upper photoresist layer 220 may be greater than the chemical chain length of the core polymer 401 of the lower photoresist layer 210.

[0105] In some embodiments, the core polymer 401 of the upper photoresist layer 220 may contain more thermally expandable functional groups than the core polymer 401 of the lower photoresist layer 210.

[0106] In some embodiments, the core polymer 401 of the upper photoresist layer 220 may contain more ester groups and / or ether groups than the core polymer 401 of the lower photoresist layer 210.

[0107] In some embodiments, the composition of the upper photoresist layer 220 and the lower photoresist layer 210 may be different. In some embodiments, the upper photoresist layer 220 may further include a regulating polymer 403. The regulating polymer 403 may be a polymer with high thermal expansion, which can increase the CTE of the upper photoresist layer 220. In some embodiments, the regulating polymer 403 may include, for example, elastomers (e.g., polybutadiene, polyisoprene, and styrene-butadiene rubber), thermoplastic elastomers (e.g., styrene-ethylene-butadiene-styrene and thermoplastic polyurethane), and / or liquid crystal polymers. In some embodiments, the weight ratio of the regulating polymer 403 to the core polymer 401 of the upper photoresist layer 220 may be about 20% to about 0.1%, about 15% to about 0.1%, about 10% to about 0.1%, about 5.0% to about 0.1%, about 3.0% to about 0.1%, or about 1% to about 0.1%.

[0108] After the upper photoresist layer 220 is formed, a second baking process can be performed on the upper photoresist layer 220 to reduce the solvent in the upper photoresist layer 220. For example, the solvent 411 may be partially evaporated due to the second baking process.

[0109] Figures 12 to 17 This is a cross-sectional schematic diagram illustrating a part of the process for manufacturing a semiconductor device 1 according to an embodiment of the present disclosure.

[0110] Please refer to Figure 1 and Figure 12 In step S15, an exposure process can be performed on the upper photoresist layer 220 and the lower photoresist layer 210 to form unexposed portions 211 and 221 and exposed portions 213 and 223 of the lower photoresist layer 210 and the upper photoresist layer 220.

[0111] Please refer to Figure 12 An exposure process can be performed to expose the photoresist layer 58 via a mask 801 using radiation, such that the lower photoresist layer 210 has an exposed portion 213 (located below the exposed area EX1) and an unexposed portion 211 (located below the unexposed area EX3), and the upper photoresist layer 220 may have an exposed portion 223 (located below the exposed area EX1) and an unexposed portion 221 (located below the unexposed area EX3). The mask 801 has multiple transparent areas through which radiation is transmitted to the upper photoresist layer 220 and the lower photoresist layer 210. In some embodiments, when the upper photoresist layer 220 and the lower photoresist layer 210 are irradiated, the photoacid generator 409 in the upper photoresist layer 220 and the lower photoresist layer 210 may generate acid, thereby releasing protons (H). + The released protons react with the hydrophobic acid unstable groups of the upper photoresist layer 220 and the lower photoresist layer 210, converting the hydrophobic acid unstable groups into hydrophilic groups.

[0112] In some embodiments, the radiation may be EUV radiation (e.g., 13.5 nm). In some embodiments, the radiation may be I-line (365 nm), DUV radiation (e.g., KrF excimer laser (248 nm)), ArF excimer laser (193 nm), EUV radiation, X-rays, electron beams, ion beams, and / or other suitable radiation. In some embodiments, the exposure process may be performed in air, in a liquid (immersion lithography), or in a vacuum (e.g., for EUV lithography and electron beam lithography).

[0113] In some embodiments, various resolution enhancement techniques, such as phase shifting, off-axis illumination (OAI), and / or optical proximity correction (OPC), can be implemented via mask 801 or the exposure process. For example, OPC features can be incorporated into the circuit pattern. In another example, mask 801 can be a phase shift mask, such as an alternating phase shift mask, an attenuated phase shift mask, or a chromium-free phase shift mask. In yet another example, the exposure process can be implemented in an off-axis illumination mode.

[0114] In some other embodiments, the radiation beam can be modulated directly in a predefined pattern (e.g., IC layout) without the use of a mask (e.g., using a digital pattern generator or a direct write pattern, not shown).

[0115] In this embodiment, the radiation beam is EUV radiation, and the exposure process is performed in an EUV lithography system, such as an EUV lithography system. In some embodiments, the exposure threshold values ​​for the upper photoresist layer 220 and the lower photoresist layer 210 can be below 20 mJ / cm². 2 Therefore, it can be achieved at a speed of less than 20 mJ / cm. 2 The dosage is used to implement the exposure process.

[0116] Please refer to Figure 1 and Figure 13 In step S17, an exposure and baking process can be performed on the upper photoresist layer 220 and the lower photoresist layer 210.

[0117] Please refer to Figure 13 It can perform post-exposure baking (PEB) processes to assist in the removal of EUV radiation (such as...) during the exposure process. Figure 12 The acid produced is generated, dispersed, and reacted on the photoacid generator 409 of the upper photoresist layer 220 and the lower photoresist layer 210. This aid helps to generate or enhance the chemical reaction, thereby creating chemical differences between the exposed portions 213, 223 and the unexposed portions 211, 221. These chemical differences also lead to differences in solubility between the exposed portions 213, 223 and the unexposed portions 211, 221. In some embodiments, post-exposure baking can be performed in a hot chamber at a temperature ranging from about 120°C to about 160°C.

[0118] Due to acid diffusion and / or reflow during the post-exposure baking process, the profile of the unexposed portion 221 of the upper photoresist layer 220 may become worse. In other words, the sidewalls 220S of the unexposed portion 221 may be tilted. The tilted profile may affect the profile of the underlying layer to be patterned in subsequent processes. For example, at this stage, the angle α between the tilted sidewalls 220S of the unexposed portion 221 and the upper surface 220TS of the upper photoresist layer 220 may be greater than 90 degrees, greater than 95 degrees, or greater than 100 degrees.

[0119] Please refer to Figure 1 and Figure 14 In step S19, a developing process can be performed to remove the exposed portions 213 and 223 of the lower photoresist layer 210 and the upper photoresist layer 220 to form a recess RC1 that exposes the lower layer 103.

[0120] Please refer to Figure 14 A developing process can be performed on the upper photoresist layer 220 and the lower photoresist layer 210 using a developer to remove exposed portions 213, 223. In some embodiments, the developer may contain tetramethylammonium hydroxide (TMAH). Exposed portions 213, 223 are soluble in the developer and can therefore be removed during the developing process. Unexposed portions 211, 221 can remain intact after the developing process. Thus, a recess RC1 can be formed in the area previously occupied by exposed portions 213, 223.

[0121] Please refer to Figure 1 , Figure 15 and Figure 16In step S21, a spacer material 710 may be conformally formed on the upper photoresist layer 220, the lower photoresist layer 210, the lower layer 103 and in the recess RC1, and a heat treatment may be performed to extend the upper photoresist layer 220.

[0122] Please refer to Figure 15 The interstitial material 710 can be formed within the recess RC1 and conformally covers the upper surface 220TS of the upper photoresist layer 220, each sidewall 220S of the upper photoresist layer 220, each sidewall 210S of the lower photoresist layer 210, and the upper surface 103TS of the lower layer 103. At this stage, the lower transverse portion 711 of the interstitial material 710 disposed on each sidewall 210S of the lower photoresist layer 210 can be vertical (relative to the upper surface 103TS of the lower layer 103). The upper transverse portion 713 of the interstitial material 710 disposed on each sidewall 220S of the upper photoresist layer 220 can be inclined.

[0123] In some embodiments, for example, the spacer material 710 may be a material that has etch selectivity for the lower photoresist layer 210, the upper photoresist layer 220, and / or the lower layer 103. In some embodiments, for example, the spacer material 710 may be silicon oxide, silicon nitride, silicon oxynitride, silicon oxynitride, or other suitable materials. In some embodiments, for example, the fabrication technique of the spacer material 710 may include atomic layer deposition, chemical vapor deposition, physical vapor deposition, or other suitable deposition processes.

[0124] Please refer to Figure 16 Heat treatment can be performed to cause expansion of the upper photoresist layer 220. Since the CTE of the upper photoresist layer 220 is large, the size (or width) of the upper photoresist layer 220 can be increased to compensate for the inclined sidewalls 220S of the upper photoresist layer 220. That is, each sidewall 220S of the upper photoresist layer 220 can become vertical after heat treatment. Therefore, the upper transverse portion 713 provided on each sidewall 220S of the upper photoresist layer 220 can become vertical. In some embodiments, the angle α between the vertical sidewall 220S of the upper photoresist layer 220 and the upper surface 220TS of the upper photoresist layer 220 can be 90 degrees.

[0125] Please refer to Figure 1 and Figure 17 In step S23, an etching process can be performed to transform the interstitial material 710 into a plurality of interstitials 310.

[0126] Please refer to Figure 17An etching process can be performed to remove the spacer material 710 formed on the upper surface 220TS of the upper photoresist layer 220 and on the lower layer 103. The remaining spacer material 710 may be referred to as a plurality of spacers 310. In some embodiments, the etching process may be an anisotropic etching process, such as an anisotropic dry etching process.

[0127] For the sake of brevity, clarity, and convenience, only one spacer 310 is described. The spacer 310 may include a lower transverse portion 311 and an upper transverse portion 313. The lower transverse portion 311 may be disposed on the lower layer 103 and abut against the lower photoresist layer 210. The upper transverse portion 313 may be disposed on the lower transverse portion 311. In some embodiments, the spacer 310 may have a rectangular cross-sectional profile. Both the lower transverse portion 311 and the upper transverse portion 313 have a rectangular cross-sectional profile. In some embodiments, the thickness T2 of the upper transverse portion 313 may be greater than the thickness T1 of the lower transverse portion 311. In some embodiments, the sidewall 313S of the upper transverse portion 313 may be vertical. In some embodiments, the sidewall 311S of the lower transverse portion 311 may be vertical.

[0128] In some embodiments, the width ratio of the recess RC1 width W1 to the spacer 310 width W2 may be between about 1.5 and about 0.5, between about 1.3 and about 0.8, or between about 1.1 and about 0.9.

[0129] One embodiment of this disclosure provides a photoresist structure, including a lower photoresist layer and an upper photoresist layer disposed on the lower photoresist layer. The coefficient of thermal expansion of the upper photoresist layer is greater than that of the lower photoresist layer.

[0130] Another embodiment of this disclosure provides a semiconductor device including a substrate; a lower layer; a lower photoresist layer disposed on the lower layer; an upper photoresist layer disposed on the lower photoresist layer; a recess penetrating the upper photoresist layer and the lower photoresist layer and exposing the lower layer; and a spacer disposed within the recess and on each sidewall of the lower photoresist layer and the upper photoresist layer. The spacer includes a rectangular cross-sectional profile.

[0131] Another embodiment of this disclosure provides a method for fabricating a semiconductor device, comprising: providing a substrate; forming a lower layer on the substrate and forming a lower photoresist layer on the lower layer; forming an upper photoresist layer on the lower photoresist layer, wherein a coefficient of thermal expansion of the upper photoresist layer is greater than a coefficient of thermal expansion of the lower photoresist layer; performing an exposure process to form unexposed and exposed portions of the lower and upper photoresist layers; performing a post-exposure baking process on the lower and upper photoresist layers; performing a development process to remove the exposed portions of the lower and upper photoresist layers and form a recess exposing the lower layer; conformally forming a spacer material on each sidewall of the upper and lower photoresist layers, on an upper surface of the upper photoresist layer, and on an upper surface of the lower layer; performing a heat treatment to expand the upper photoresist layer; and performing an etching process to partially remove the spacer material and form a spacer on each sidewall of the upper and lower photoresist layers.

[0132] The semiconductor device design described in this disclosure improves the profile of the plurality of spacers 310 by employing an upper photoresist layer 220 with a higher coefficient of thermal expansion (CTE). Therefore, the profile of the lower layer 103, patterned using the plurality of spacers 310 as a mask in subsequent processes, can also be enhanced, thereby reducing defects during the fabrication of the semiconductor device 1.

[0133] While this disclosure and its advantages have been described in detail, it should be understood that various changes, substitutions, and alternatives may be made without departing from the spirit and scope of this disclosure as defined in the claims. For example, many of the processes described above may be implemented using different methods, and other processes or combinations thereof may be substituted for many of the processes described above.

[0134] Furthermore, the scope of this application is not limited to the specific embodiments of the processes, machinery, manufacturing, material composition, means, methods, and steps described in the specification. Those skilled in the art will understand from the disclosure of this publication that existing or future processes, machinery, manufacturing, material composition, means, methods, or steps that have the same function or achieve substantially the same results as the corresponding embodiments described herein can be used based on this disclosure. Therefore, such processes, machinery, manufacturing, material composition, means, methods, or steps are included within the scope of the claims of this application.

Claims

1. A photoresist structure, comprising: a lower photoresist layer; and an upper photoresist layer disposed on the lower photoresist layer, wherein a coefficient of thermal expansion of the upper photoresist layer is greater than a coefficient of thermal expansion of the lower photoresist layer.

2. The photoresist structure of claim 1, wherein a ratio of the coefficient of thermal expansion of the upper photoresist layer to the coefficient of thermal expansion of the lower photoresist layer is between about 2.0 and about 1.

1.

3. The photoresist structure of claim 1, wherein a thickness of the upper photoresist layer is greater than a thickness of the lower photoresist layer.

4. The photoresist structure of claim 3, wherein the upper photoresist layer and the lower photoresist layer comprise the same composition.

5. The photoresist structure of claim 1, wherein the lower photoresist layer comprises a core polymer, a blocking group, and a photoacid generator.

6. The photoresist structure of claim 5, wherein the core polymer comprises a poly(norbornene)-co-maleic anhydride polymer, a polyhydroxystyrene polymer, or an acrylate polymer.

7. The photoresist structure of claim 5, wherein the blocking group comprises a tert-butoxy carboxyl group.

8. The photoresist structure of claim 5, wherein the photoacid generator comprises a sylphonyl cation and an anion.

9. The photoresist structure of claim 5, wherein the lower photoresist layer further comprises a sensitizer.

10. The photoresist structure of claim 9, wherein the sensitizer is mixed with the core polymer and the photoacid generator.

11. The photoresist structure of claim 9, wherein the sensitizer is bound to the core polymer or the photoacid generator.

12. The photoresist structure of claim 9, wherein the sensitizer comprises a heterocycle, wherein the heterocycle contains at least one nitrogen atom and at least one double bond.

13. A semiconductor device, comprising: a substrate; a lower layer; a lower photoresist layer disposed on the lower layer; an upper photoresist layer disposed on the lower photoresist layer; a recess penetrating the upper photoresist layer and the lower photoresist layer and exposing the lower layer; and a spacer disposed in the recess and on sidewalls of the lower photoresist layer and the upper photoresist layer, wherein the spacer has a rectangular cross-sectional profile.

14. The semiconductor device of claim 13, wherein a coefficient of thermal expansion of the upper photoresist layer is greater than a coefficient of thermal expansion of the lower photoresist layer.

15. The semiconductor device of claim 14, wherein an included angle between an upper surface of the upper photoresist layer and the sidewalls of the upper photoresist layer is 90 degrees.

16. The semiconductor device of claim 14, wherein a thickness of the upper photoresist layer is greater than a thickness of the lower photoresist layer.

17. The semiconductor device of claim 14, wherein a ratio of the coefficient of thermal expansion of the upper photoresist layer to the coefficient of thermal expansion of the lower photoresist layer is between about 2.0 and about 1.

1.

18. The semiconductor device of claim 14, wherein the upper photoresist layer and the lower photoresist layer comprise the same composition.

19. The semiconductor device of claim 14, wherein a width ratio of a width of the recess to a width of the spacer is between about 1.5 and about 0.

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