Feeder terminal analog quantity verification method based on inter-core shared memory communication

Abstract

The invention discloses a feeder terminal analog quantity verification method based on inter-core shared memory communication, which relates to the field of power equipment test and calibration, and comprises the following steps: establishing communication connection and analog quantity signal connection between a test board body and a feeder terminal; the test board body sends a null drift calibration command, and the feeder terminal cooperates with the real-time core and the management core through the inter-core shared memory to complete acquisition, calculation, verification and storage of null drift parameters; the test bench body sends a precision calibration command, and the feeder terminal cooperates with the real-time core and the management core through the inter-core shared memory to complete acquisition, calculation, verification and storage of an analog quantity calibration coefficient; and the feeder terminal uses the stored null drift parameter and the calibration coefficient to carry out subsequent analog quantity measurement. According to the scheme, the full-process closed-loop control of the analog quantity verification of the feeder terminal from instruction issuing, parameter calculation verification to storage calling is realized, and the verification efficiency and accuracy are improved.

Description

Technical Field

[0001] This invention relates to the field of power equipment testing and calibration, and more specifically to a method for verifying analog quantities of feeder terminals based on inter-core shared memory communication. Background Technology

[0002] In distribution network automation systems, feeder terminals are key equipment responsible for monitoring line status and performing protection and control functions. In the terminal manufacturing process, accurate analog parameter verification of each device is a necessary step to ensure that its factory performance meets the standards and the requirements of power grid operation.

[0003] Currently, the verification methods commonly used in the industry still heavily rely on manual operation. Technicians need to connect each feeder terminal to a standard signal source, manually set different test points, such as zero input and rated input, and record the terminal's sampling response data through host computer software or manually. This process is time-consuming, and the verification of a single device often takes several hours. Moreover, in mass production scenarios, repetitive manual wiring, setting, and recording are prone to operational errors or reading deviations due to fatigue, making it difficult to guarantee the accuracy and consistency of the verification results. This has become a bottleneck for large-scale production efficiency and product quality control.

[0004] Even with the introduction of partially automated test benches, existing technical solutions still have significant shortcomings in the parameter processing logic within the feeder terminal. Common single-core processor architectures struggle to balance high real-time analog sampling calculations with complex communication protocol processing, easily leading to sample loss or response delays due to task scheduling conflicts. More importantly, key data such as zero-drift bias parameters and accuracy calibration coefficients calculated during the verification process often lack effective automatic verification mechanisms and reliable storage management. Parameters are usually calculated by the test software and directly written to the terminal. If accidental interference causes parameter calculation errors, it will directly affect the accuracy of all subsequent measurement results of the terminal, and such errors are difficult to detect before leaving the factory.

[0005] Furthermore, existing methods lack efficient collaboration mechanisms at the system architecture level. The issuance of test commands, the collection of sampled data, the calculation and verification of parameters, and the final storage are often completed through loose serial communication or simple data interfaces. The process is fragmented and cannot form a tight closed-loop control, resulting in low reliability of the verification process. It is difficult to diagnose and interrupt anomalies in real time, and it is not conducive to building standardized automated verification processes, thus limiting the evolution of production testing capabilities towards greater intelligence.

[0006] Therefore, how to design a feeder terminal analog quantity verification method based on inter-core shared memory communication to replace the traditional manual mode in feeder terminal analog quantity verification and achieve a comprehensive improvement in verification efficiency, accuracy and reliability is a problem that urgently needs to be solved by those skilled in the art. Summary of the Invention

[0007] In view of this, the present invention provides a method for verifying analog quantities of feeder terminals based on inter-core shared memory communication, which aims to solve the problems of low efficiency and poor consistency in the traditional manual verification of analog parameters of feeder terminals. Through automated verification based on remote control of the test bench and dual-core collaboration within the terminal, the method can automatically calculate, verify, save and apply zero drift bias and measurement accuracy coefficients, thereby ensuring the standardization of the production verification process of feeder terminals and the high reliability of the results.

[0008] To achieve the above objectives, the present invention adopts the following technical solution: A method for verifying analog signals in a feeder terminal based on inter-core shared memory communication includes the following steps: S1. Establish communication and analog signal connections between the test bench and the feeder terminal; S2. The test bench sends a zero-drift calibration command. The feeder terminal coordinates with the real-time core and management core through inter-core shared memory to complete the acquisition, calculation, verification and storage of zero-drift parameters. S3. The test bench sends a precision calibration command. The feeder terminal coordinates with the real-time core and management core through inter-core shared memory to complete the acquisition, calculation, verification and storage of analog calibration coefficients. S4. The feeder terminal uses the stored zero-drift parameters and calibration coefficients for subsequent analog measurements.

[0009] Preferably, in S1, the communication connection is Ethernet communication, and the analog signal connection includes an aviation plug interface for line voltage, line current, zero-sequence voltage, and zero-sequence current.

[0010] Preferably, S2 includes: S21. The test bench sets its analog output to zero and sends a zero-drift calibration command to the management core of the feeder terminal. S22. The management core forwards the zero-drift calibration command to the real-time core. The real-time core collects the analog quantity sampling sequence under zero input state and calculates its statistical characteristic value and reports it to the management core. S23. The management core determines the zero drift bias parameter based on the statistical characteristic value and sends it to the real-time core for application verification. S24. After confirming that the verification is successful, the management core stores the zero-drift bias parameter in non-volatile memory.

[0011] Preferably, in step S23, the application verification includes: The real-time kernel corrects a new set of zero-input sampled values ​​using the zero-drift bias parameter b, obtaining the corrected value. ; Calculate the average value of the corrected sequence If it is true, then the verification is considered successful. This is the allowable error threshold for zero drift verification. Preferably, S3 includes: S31. The test bench sets its analog output to the standard rated value. And send a precision calibration command to the management core of the feeder terminal; S32. The management core forwards the accuracy calibration command to the real-time core. The real-time core acquires the analog input sampling sequence under rated input and calculates its effective value. Report to management for approval; S33, Management based on valid values Compared with standard rating Calculate the analog calibration coefficient k and send it to the real-time kernel for application verification; S34. After confirming that the verification is successful, the management core stores the calibration coefficient k in non-volatile memory.

[0012] Preferably, in step S33, the application verification includes: The real-time kernel uses the issued calibration coefficient k to calculate the effective value of a new set of rated input samples. And obtain the calibrated value. ; Calculate relative error ;like If the result is valid, the verification is considered successful. The allowable relative error threshold for accuracy verification.

[0013] Preferably, the inter-core shared memory is a data exchange area defined in the common address space of the real-time core and the management core, and the real-time core and the management core achieve bidirectional communication by reading and writing specified variables or data structures in the data exchange area.

[0014] Preferably, the zero-drift parameters and analog calibration coefficients are saved in the form of independent configuration files and called in real time during the subsequent operation of the feeder terminal.

[0015] As can be seen from the above technical solution, compared with the prior art, the technical solution of the present invention has the following beneficial effects: 1. This method replaces the traditional manual point-by-point operation, recording and calculation mode by remotely sending commands from the test bench, the management core-real-time core collaborative processing based on inter-core shared memory inside the feeder terminal, and the automated parameter calculation, verification and storage process. This reduces the number of manual intervention links and makes the entire verification process coherent, automatic and controllable.

[0016] 2. By utilizing shared memory between cores for real-time data exchange between the core and the management core, low-latency and high-efficiency inter-core communication is achieved. The sampling calculation task with high real-time requirements and the communication control task are separated into different cores for processing, which optimizes the allocation of system resources and ensures the real-time performance of data processing and the stability of system operation during the verification process.

[0017] 3. The automatically calculated and verified zero-drift bias parameters and analog calibration coefficients are stored in the terminal's non-volatile memory in the form of an independent configuration file. This design allows the verification results to be automatically read and loaded when the terminal is powered on and running again, ensuring continuous measurement accuracy and solving the problem of parameters being easily lost or inconsistent. Attached Figure Description

[0018] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.

[0019] Figure 1 A flowchart of a feeder terminal analog quantity verification method based on inter-core shared memory communication provided in an embodiment of the present invention; Figure 2 This is a system framework diagram corresponding to the analog quantity verification method for feeder terminals provided in the embodiments of the present invention; Figure 3 This is a flowchart of zero-drift parameter calibration provided in an embodiment of the present invention; Figure 4 A flowchart for accuracy coefficient calibration provided in an embodiment of the present invention. Detailed Implementation

[0020] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0021] like Figure 1 As shown, this embodiment provides a method for verifying analog signals of a feeder terminal based on inter-core shared memory communication, including the following steps: S1. Establish communication and analog signal connections between the test bench and the feeder terminal; S2. The test bench sends a zero-drift calibration command. The feeder terminal coordinates with the real-time core and management core through inter-core shared memory to complete the acquisition, calculation, verification and storage of zero-drift parameters. S3. The test bench sends a precision calibration command. The feeder terminal coordinates with the real-time core and management core through inter-core shared memory to complete the acquisition, calculation, verification and storage of analog calibration coefficients. S4. The feeder terminal uses the stored zero-drift parameters and calibration coefficients for subsequent analog measurements.

[0022] like Figure 2 As shown, the specific system framework constitutes the hardware and communication foundation of the automated verification method in this embodiment. Its core is a feeder terminal employing a multi-core heterogeneous architecture. This terminal includes a real-time core responsible for high-speed ADC sampling and real-time calculation, and a management core responsible for process control, external communication, and data management. The two cores interact efficiently and with low latency through shared memory. The test bench acts as the control center, applying high-precision standard test signals to the feeder terminal via analog channels. Simultaneously, it establishes a communication connection with the feeder terminal's management core via Ethernet, issuing verification commands and receiving status and result feedback.

[0023] It achieves fully automated closed-loop control of the analog quantity zero drift and accuracy verification process through remote command driving of the test bench and real-time collaborative processing of the core and management core based on inter-core shared memory within the feeder terminal. It effectively improves the efficiency and reliability of data interaction and task processing between cores, and ensures that the verification parameters can be automatically verified, persistently stored, and consistently invoked in the future, thereby improving the overall automation level and accuracy of the verification process.

[0024] In this embodiment, S1, a communication connection and analog signal connection are established between the test bench and the feeder terminal; The communication connection is Ethernet communication, and the analog signal connection includes the connectors for line voltage, line current, zero-sequence voltage, and zero-sequence current.

[0025] In embodiment S2, the test bench sends a zero-drift calibration command, and the feeder terminal, through inter-core shared memory, coordinates with the real-time core and management core to complete the acquisition, calculation, verification, and storage of zero-drift parameters; such as Figure 3 As shown, it specifically includes: S21. The test bench sets its analog output to zero and sends a zero-drift calibration command to the management core of the feeder terminal. S22. The management core forwards the zero-drift calibration command to the real-time core. The real-time core collects the analog sample sequence under zero-input conditions and calculates its statistical characteristic value, which is then reported to the management core. The statistical characteristic value is the arithmetic mean. :

[0026] in, Let N be the value of the i-th sampling point, and N be the preset number of sampling points. S23. The management core determines the zero-drift bias parameter based on the statistical characteristic value and sends it to the real-time core for application verification; zero-drift bias parameter That is, the zero drift bias parameter is the negative of the statistical characteristic value; S24. After confirming that the verification is successful, the management core stores the zero-drift bias parameter in non-volatile memory.

[0027] Furthermore, application verification in S23 includes: The real-time kernel corrects a new set of zero-input sampled values ​​using the zero-drift bias parameter b, obtaining the corrected value. ; Calculate the average value of the corrected sequence If it is true, then the verification is considered successful. This is the allowable error threshold for zero drift verification. Through the zero-drift parameter calibration process, the inherent offset of the feeder terminal under zero input conditions can be accurately measured, verified, and stored. This eliminates the influence of hardware DC bias on the measurement basis, provides a reliable benchmark for subsequent high-precision proportional calibration, and ensures the accuracy of the measurement system near zero.

[0028] In embodiment S3, the test bench sends a precision calibration command, and the feeder terminal, through inter-core shared memory, coordinates with the real-time core and management core to complete the acquisition, calculation, verification, and storage of analog calibration coefficients; such as Figure 4 As shown, it specifically includes: S31. The test bench sets its analog output to the standard rated value. And send a precision calibration command to the management core of the feeder terminal; S32. The management core forwards the accuracy calibration command to the real-time core. The real-time core acquires the analog input sampling sequence under rated input and calculates its effective value. Report to management for approval; S33, Management based on valid values Compared with standard rating Calculate the analog calibration coefficient k and send it to the real-time kernel for application verification; the calibration coefficient k is expressed as:

[0029] S34. After confirming that the verification is successful, the management core stores the calibration coefficient k in non-volatile memory.

[0030] Furthermore, application verification in S33 includes: The real-time kernel uses the issued calibration coefficient k to calculate the effective value of a new set of rated input samples. And obtain the calibrated value. ; Calculate relative error ;like If the result is valid, the verification is considered successful. The allowable relative error threshold for accuracy verification.

[0031] Through the above-mentioned accuracy coefficient calibration process, the proportional coefficient of the feeder terminal measurement channel is accurately calibrated and verified. Combined with the stored zero drift parameters, the terminal establishes a conversion model between the original sampled value and the engineering physical value, thereby ensuring that the ADC sampled value can be accurately restored to the real physical quantities such as voltage and current in actual operation, and achieving the final calibration goal of analog quantity measurement accuracy.

[0032] Furthermore, when S2 or S3 verification fails, the management core sends a verification failure signal to the test bench via a communication connection; records an error log containing the failure time, failure parameter category, and error value in non-volatile memory or a dedicated log area; and aborts the current zero drift parameter calibration process or accuracy coefficient calibration process, causing the system to wait for new instructions from the test bench.

[0033] When the core parameter verification fails, the system does not remain silent or enter an uncertain state. Instead, the management core actively reports a failure signal, ensuring that the test bench can be notified and intervene in a timely manner. Recording structured error logs facilitates later tracing of the root cause of the problem, pinpointing whether it is hardware drift, signal interference, or algorithm anomaly. The suspension of the process prevents the misuse of parameters without verification, ensuring the rigor of the verification process and the reliability of the results. This mechanism improves the completeness of the verification method and its applicability in actual industrial production environments.

[0034] Furthermore, in this implementation, the terminal non-volatile memory refers to a storage medium accessible to the feeder terminal management core that can persistently retain data after power failure, and can be implemented using FLASH memory. During the zero drift or accuracy verification process, key parameters calculated by the management core and verified by the real-time core are securely written into a specific address area of ​​this memory in the form of a structured independent configuration file. When the feeder terminal is put into operation later, these parameter files can be automatically read from this memory during the power-on initialization phase and loaded into the computing unit of the real-time core for use, thereby ensuring the consistency of measurement accuracy throughout the entire lifecycle from production verification to field application.

[0035] Furthermore, the inter-core shared memory is a data exchange area defined within the common address space of the real-time core and the management core. The real-time core and the management core achieve bidirectional communication by reading and writing specified variables or data structures within the data exchange area.

[0036] Furthermore, zero-drift parameters and analog calibration coefficients are saved in the form of independent configuration files and called in real time during subsequent feeder terminal operation; specifically, the storage of zero-drift parameters and analog calibration coefficients adopts structured files, including JSON or XML formats, and the files contain channel identifiers, parameter values, calculation timestamps and verification result flags.

[0037] In this embodiment, S4, the feeder terminal uses the stored zero-drift parameters and calibration coefficients to perform subsequent analog quantity measurements; Specifically, the process of using the stored zero-drift parameters and calibration coefficients of the feeder terminal for subsequent analog measurements, combined with the actual operation scenario of the feeder terminal in the field power distribution line, is as follows: 1) System initialization and parameter loading; When the feeder terminal is powered on and started in the field, its management core reads the independent configuration file generated and saved by the previous automated verification process from its own non-volatile memory. The file contains the zero drift bias parameter b and calibration coefficient k of each analog channel that has been verified. 2) Sampling initiation and raw data acquisition; After the terminal initialization is complete, the real-time core starts the ADC sampling chip to continuously and periodically sample the analog signal from the connected line, obtaining the original digital sample value sequence. , where n represents the sampling point number; 3) Real-time calibration calculation; For each sampling point The real-time core synchronously executes two-stage cascaded computations in memory: first, zero drift correction is performed, and then the computation is performed. This eliminates the inherent DC bias of the hardware; then, proportional calibration is performed to calculate the final engineering value. This converts numerical values ​​back into quantities with clear physical meaning. 4) Calibration result output and application; Engineering values ​​calculated in real time The functional modules that are output to the terminal in real time are used for local protection algorithm judgment and fault recording data generation. On the other hand, the management core packages the processed data according to standard protocols through the communication interface and sends it to the distribution automation master station system for remote monitoring, data analysis and power grid dispatch. This process is executed continuously and automatically throughout the entire operating cycle of the terminal, ensuring the durability and reliability of measurement accuracy in field applications.

[0038] In summary, the analog signal verification method for feeder terminals based on inter-core shared memory communication in this embodiment, through technical means such as constructing test bench instruction control, dual-core collaboration within the terminal, and automatic parameter verification and solidification, not only replaces the traditional inefficient and error-prone manual operation with a specific hardware architecture and clear software process, but also improves the efficiency of the verification process, the accuracy of the results, and the overall reliability of the system through core designs such as efficient inter-core communication, dual parameter verification, and reliable memory access.

[0039] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on its differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. For the systems disclosed in the embodiments, since they correspond to the methods disclosed in the embodiments, the descriptions are relatively simple; relevant parts can be referred to the method section.

[0040] The above description of the disclosed embodiments enables those skilled in the art to make or use the invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the invention. Therefore, the invention is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A method for verifying analog signals in a feeder terminal based on inter-core shared memory communication, characterized in that, Includes the following steps: S1. Establish communication and analog signal connections between the test bench and the feeder terminal; S2. The test bench sends a zero-drift calibration command. The feeder terminal coordinates with the real-time core and management core through inter-core shared memory to complete the acquisition, calculation, verification and storage of zero-drift parameters. S3. The test bench sends a precision calibration command. The feeder terminal coordinates with the real-time core and management core through inter-core shared memory to complete the acquisition, calculation, verification and storage of analog calibration coefficients. S4. The feeder terminal uses the stored zero-drift parameters and calibration coefficients for subsequent analog measurements.

2. The method for verifying analog signals in a feeder terminal based on inter-core shared memory communication according to claim 1, characterized in that, In S1, the communication connection is Ethernet communication, and the analog signal connection includes the connectors for line voltage, line current, zero-sequence voltage, and zero-sequence current.

3. The method for verifying analog signals of a feeder terminal based on inter-core shared memory communication according to claim 1, characterized in that, S2 includes: S21. The test bench sets its analog output to zero and sends a zero-drift calibration command to the management core of the feeder terminal. S22. The management core forwards the zero-drift calibration command to the real-time core. The real-time core collects the analog quantity sampling sequence under zero input state and calculates its statistical characteristic value and reports it to the management core. S23. The management core determines the zero drift bias parameter based on the statistical characteristic value and sends it to the real-time core for application verification. S24. After confirming that the verification is successful, the management core stores the zero-drift bias parameter in non-volatile memory.

4. The method for verifying analog signals in a feeder terminal based on inter-core shared memory communication according to claim 1, characterized in that, In step S23, application verification includes: The real-time kernel corrects a new set of zero-input sampled values ​​using the zero-drift bias parameter b, obtaining the corrected value. ; Calculate the average value of the corrected sequence If it is true, then the verification is considered successful. This is the allowable error threshold for zero drift verification.

5. The method for verifying analog signals in a feeder terminal based on inter-core shared memory communication according to claim 1, characterized in that, S3 includes: S31. The test bench sets its analog output to the standard rated value. And send a precision calibration command to the management core of the feeder terminal; S32. The management core forwards the accuracy calibration command to the real-time core. The real-time core acquires the analog input sampling sequence under rated input and calculates its effective value. Report to management for approval; S33, Management based on valid values Compared with standard rating Calculate the analog calibration coefficient k and send it to the real-time kernel for application verification; S34. After confirming that the verification is successful, the management core stores the calibration coefficient k in non-volatile memory.

6. The method for verifying analog signals in a feeder terminal based on inter-core shared memory communication according to claim 1, characterized in that, In step S33, application verification includes: The real-time kernel uses the issued calibration coefficient k to calculate the effective value of a new set of rated input samples. And obtain the calibrated value. ; Calculate relative error ;like If the result is valid, the verification is considered successful. The allowable relative error threshold for accuracy verification.

7. The method for verifying analog signals in a feeder terminal based on inter-core shared memory communication according to claim 1, characterized in that, The inter-core shared memory is a data exchange area defined within the common address space of the real-time core and the management core. The real-time core and the management core achieve bidirectional communication by reading and writing specified variables or data structures within the data exchange area.

8. The method for verifying analog signals of a feeder terminal based on inter-core shared memory communication according to claim 1, characterized in that, The zero-drift parameters and analog calibration coefficients are all saved in the form of independent configuration files and are called in real time during the subsequent operation of the feeder terminal.

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