Multispectral TDICCD preparation method for improving spectral response consistency

Abstract

The invention relates to a multispectral TDICCD preparation method for improving spectral response consistency, and belongs to the field of multispectral TDICCDs. The method comprises the following steps: sequentially forming a potential well and a gate oxide layer on a silicon epitaxial substrate; depositing a first layer of polycrystalline silicon on the surface of the gate oxide layer, performing large-dose ion implantation, and then performing nitrogen treatment annealing; forming an electrode pattern on the first layer of polycrystalline silicon, and then forming a first interlayer insulating layer through a silicon dioxide and silicon nitride deposition process; depositing to form a second layer of polycrystalline silicon, performing large-dose ion implantation, and then performing nitrogen treatment annealing; forming an electrode pattern on the second layer of polycrystalline silicon, and then forming a second interlayer insulating layer through a silicon dioxide and silicon nitride deposition process; a layer of BPSG is deposited on the surface of a currently formed device, then high-temperature backflow treatment is performed, and then low-temperature silicon dioxide deposition and CMP processes are performed to flatten the surface. The method is high in process stability and operability, and spectral response consistency can be improved.

Description

Technical Field

[0001] This invention belongs to the field of orthophoto multispectral time-delay integrated charge-coupled devices (TDICCDs) and relates to a method for fabricating orthophoto multispectral TDICCDs that improves the consistency of spectral response between chips. Background Technology

[0002] Multispectral TDICCD is a core component of remote sensing camera payloads. Camera payloads typically employ multiple large-area multispectral TDICCD devices stitched together to achieve wide-swath imaging. TDICCDs integrating bandpass filters for different bands such as blue, green, red, and near-infrared can accurately detect the spectral information of ground features, enabling multispectral color imaging. They are widely used in Earth observation imaging in agriculture, meteorology, and the environment. Good spectral consistency among the stitched devices is crucial to ensuring the accuracy and consistency of target identification in different areas within the same swath.

[0003] Taking a 9-band TDICCD as an example, it employs an orthophoto imaging mode. The vertical structure includes a silicon substrate, a silicon epitaxial layer, a buried trench injection layer, a gate dielectric layer, a polycrystalline silicon electrode layer, borosilicate glass (BPSG), and metal wiring. Horizontally, the nine spectral CCDs are arranged side-by-side, paired with bandpass filters to acquire red, green, and blue spectral information separately. Typical vertical and horizontal structure distribution diagrams of a multispectral TDICCD are shown below. Figure 1 As shown, the distribution of TDICCD chips on a 6-inch wafer and the typical process flow are as follows: Figure 2 and Figure 3 As shown.

[0004] Spectral response refers to the sensitivity of a TDICCD to light of different wavelengths. Spectral response consistency refers to the degree of consistency in the response characteristics of multiple TDICCDs used to detect the same wavelength band within the same imaging system. Specifically, it requires that the peak responsivity and spectral response shape be as similar as possible between different TDICCDs. Peak responsivity is a prerequisite for generating seamless, uniform images. If inconsistent, detector areas with high responsivity will appear bright, and areas with low responsivity will appear dark. Even when photographing targets with perfectly uniform physical properties (such as clouds or deserts), alternating bright and dark stripes will appear in the image. The core of remote sensing is to identify the type of ground objects (such as vegetation, water bodies, and rocks) through their spectral characteristics. Consistent spectral response shape is crucial for accurate classification and identification. If different detectors measure different spectral curves for the same ground object, it will lead to differences in the integration results of complex spectra, causing automatic classification algorithms to fail and affecting high-precision spectral reconstruction, potentially misclassifying the same ground object as two different types.

[0005] The photoresponsivity R is calculated as follows:

[0006] in, For charge, 1.602 × 10 -19 C, Let λ be the incident light wavelength, QE be the quantum efficiency, and h be Planck's constant. The speed of light is considered. Quantum efficiency is affected by surface reflection loss, transmission loss, intrinsic absorption efficiency, and carrier collection efficiency. For a forward-illuminated TDICCD, incident photons must pass through multiple layers of the CCD structure (such as polysilicon gate electrodes, insulating silicon dioxide layers, etc.) to reach the photosensitive area. These materials absorb and reflect photons, affecting the photon absorption efficiency.

[0007] Current multispectral TDICCDs are front-illuminated devices. Incident light reaching the absorption layer undergoes refraction and reflection through layers of silicon nitride, silicon dioxide, polysilicon, overlapping regions, and BPSG on the photosensitive surface. Simulation results show that the uniformity of the polysilicon electrode thickness is a key factor affecting the device's response consistency. At a typical wavelength of 650 nm, a polysilicon thickness deviation of ±10% results in a spectral response difference exceeding 30%. The fabrication of polysilicon electrodes involves polysilicon thin film deposition, doping, photolithography, etching, and oxidation. Saturated doping of polysilicon enables conductivity, while oxidation provides interlayer isolation. Controlling the uniformity of polysilicon diffusion doping is challenging, leading to poor final thickness uniformity after oxidation, which fails to meet the spectral consistency requirements of multi-chip optical stitching in ultra-wide-format cameras. Summary of the Invention

[0008] In view of this, the purpose of this invention is to provide a method for preparing a multispectral TDICCD that improves the consistency of its spectral response. This method optimizes the traditional multispectral TDICCD manufacturing process to improve the consistency of its spectral response.

[0009] To achieve the above objectives, the present invention provides the following technical solution: A method for preparing a multispectral TDICCD to improve spectral response consistency, the method comprising: A potential well and a composite gate oxide layer are sequentially formed on a silicon epitaxial substrate; A first layer of polysilicon is deposited on the surface of the composite gate oxide layer, a large dose of ion implantation is performed on the first layer of polysilicon, and then nitrogen treatment annealing is performed. A first polycrystalline silicon electrode pattern is formed on the first layer of polycrystalline silicon, and then a first interlayer insulating layer is formed by a silicon dioxide and silicon nitride deposition process. A second layer of polysilicon is deposited on the surface of the composite gate oxide layer, a large dose of ion implantation is performed on the second layer of polysilicon, and then nitrogen treatment annealing is performed. A second polysilicon electrode pattern is formed on the second polysilicon layer, and then a second interlayer insulating layer is formed by a silicon dioxide and silicon nitride deposition process. Specifically, the first and second polysilicon layers form alternating polysilicon electrodes on the surface of the composite gate oxide layer. On the surface of the currently formed device, a layer of BPSG is deposited and then subjected to high-temperature reflow treatment. Then, a low-temperature silicon dioxide deposition and chemical mechanical polishing process is performed to planarize the device surface.

[0010] Furthermore, the high-dose ion implantation in the first layer of polycrystalline silicon includes implanting impurities of P. 31 + The injection energy was 40 keV - 70 keV, and the injection dose was 1.0 × 10⁻⁶. 16 ~ 2.5×10 16 Atoms / cm².

[0011] After the first layer of polycrystalline silicon is implanted with ions, nitrogen annealing is performed, with the nitrogen treatment temperature and time being 800℃-950℃ and 80 min-120 min, respectively.

[0012] Furthermore, high-dose ion implantation is performed in the second layer of polycrystalline silicon, including implanting impurities of P. 31 + The injection energy was 40 keV - 70 keV, and the injection dose was 1.0 × 10⁻⁶. 16 ~ 2.5×10 16 Atoms / cm².

[0013] After the second layer of polycrystalline silicon is implanted with ions, nitrogen annealing is performed. The nitrogen treatment temperature and time are 800℃-950℃ and 80 min-120 min, respectively.

[0014] Furthermore, the low-temperature silica deposition and chemical mechanical polishing process includes first depositing low-temperature silica on the BPSG surface, depositing a silica layer of a certain thickness, and then thinning the silica layer through a chemical mechanical polishing process to improve surface smoothness and reduce incident light reflectivity.

[0015] Furthermore, after performing low-temperature silicon dioxide deposition and chemical mechanical polishing processes, contact holes are formed on the silicon dioxide layer; through aluminum deposition, photolithography, and etching, aluminum wiring and lead-out pads are performed to complete chip fabrication.

[0016] The beneficial effects of this invention are as follows: Based on the original process flow, this invention improves upon it by analyzing the factors affecting photoresponse non-uniformity and optimizing the polysilicon doping and oxidation processes, as well as the surface planarization process. Specifically, thermal diffusion doping is improved to ion implantation doping, achieving high-precision, high-dose ion implantation, avoiding the impact of inconsistent doping between different batches of polysilicon and improving the consistency of the polysilicon doping process. Polysilicon oxidation is improved to a silicon dioxide / silicon nitride composite dielectric layer deposition process, ensuring insulation between polysilicon electrodes while avoiding non-uniform polysilicon thickness caused by inconsistent polysilicon oxidation. Based on the original BPSG deposition and reflow, low-temperature silicon dioxide deposition and CMP processes are added, improving surface flatness and the consistency of the light incident angle.

[0017] After improvements, the present invention has strong process stability and operability, a large process window, compatibility with existing processes, and is suitable for the fabrication of multispectral TDICCDs, while greatly improving the consistency of spectral response.

[0018] Other advantages, objectives, and features of the invention will be set forth in part in the description which follows, and in part will be apparent to those skilled in the art from the following examination, or may be learned from practice of the invention. The objectives and other advantages of the invention can be realized and obtained through the following description. Attached Figure Description

[0019] To make the objectives, technical solutions, and advantages of the present invention clearer, the preferred embodiments of the present invention will be described in detail below with reference to the accompanying drawings, wherein: Figure 1 This is a typical multispectral TDICCD longitudinal and transverse planar structure distribution diagram; Figure 2 This is a distribution diagram of the multispectral TDICCD chip on a 6-inch wafer. Figure 3 This refers to the main process flow of a traditional typical multispectral TDICCD. Figure 4 This is a flowchart of a method for preparing a high-spectral-response-consistent multispectral TDICCD according to an embodiment of the present invention; Figure 5 This is a schematic diagram of the surface undulation morphology after BPSG planarization; Figure 6 A schematic diagram illustrating the spectral consistency of the first 9 spectral bands in TDICCD. Figure 7 This is a schematic diagram of the spectral consistency of the optimized 9-band TDICCD. Detailed Implementation

[0020] The following specific examples illustrate the implementation of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention. It should be noted that the illustrations provided in the following embodiments are only schematic representations of the basic concept of the present invention. Unless otherwise specified, the following embodiments and features can be combined with each other.

[0021] The accompanying drawings are for illustrative purposes only and are schematic diagrams, not actual pictures. They should not be construed as limiting the invention. To better illustrate the embodiments of the invention, some parts in the drawings may be omitted, enlarged, or reduced, and do not represent the actual product dimensions. It is understandable to those skilled in the art that some well-known structures and their descriptions may be omitted in the drawings.

[0022] In the accompanying drawings of the embodiments of the present invention, the same or similar reference numerals correspond to the same or similar components. In the description of the present invention, it should be understood that if terms such as "upper," "lower," "left," "right," "front," and "rear" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, they are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, the terms used to describe positional relationships in the drawings are only for illustrative purposes and should not be construed as limiting the present invention. For those skilled in the art, the specific meaning of the above terms can be understood according to the specific circumstances.

[0023] To address the problem in current multispectral TDICCD manufacturing processes where controlling the uniformity of polycrystalline silicon diffusion doping is difficult, leading to poor uniformity in the final thickness of polycrystalline silicon after oxidation, and consequently, poor spectral response consistency in multispectral TDICCDs, this invention improves the manufacturing process based on existing procedures. The main improvements are as follows: First, the polysilicon doping diffusion process is changed to a polysilicon implantation and annealing process to avoid the problem of difficult process non-uniformity control introduced by thermal diffusion doping. Secondly, the polysilicon oxidation process was changed to an interlayer silicon dioxide / silicon nitride composite dielectric deposition process to avoid the problem of uneven polysilicon thickness caused by inconsistent oxidation. Finally, after borosilicate glass (BPSG) deposition and reflow, a process step involving low-temperature silica deposition and chemical mechanical polishing (CMP) is added to improve surface planarization and reduce incident light reflectivity.

[0024] like Figure 4As shown, this is an embodiment of the present invention providing a method for preparing a multispectral TDICCD to improve spectral response consistency. The method includes: 1. Prepare the silicon epitaxial wafer and clean it to remove surface contaminants and oxide layers. The silicon substrate serves as the ground loop and support layer; the epitaxial layer, as the functional layer, has its thickness, resistivity, and other properties customized according to the device parameter requirements.

[0025] 2. Forming potential wells in the epitaxial layer. By selectively implanting dopant through photolithography, potential wells and barriers are formed, enabling optical signal collection, transmission channels, and signal output.

[0026] 4. A composite gate oxide layer is grown on the surface of the epitaxial layer. A high-quality, high-transmittance silicon dioxide and silicon nitride composite gate oxide layer is grown on the epitaxial layer through oxidation and deposition processes to support signal charge collection and transfer.

[0027] 5. A first layer of polycrystalline silicon is deposited on the gate oxide layer, which has high transmittance and high uniformity. It is then doped to conduct electricity and etched into a transparent electrode.

[0028] 6. After depositing the first layer of polycrystalline silicon, compared to the traditional diffusion doping process, this embodiment achieves high-precision saturation doping of impurities by implanting a large dose of ions into the first layer of polycrystalline silicon. The implanted impurity is P. 31 + The injection energy was 40-70 keV, and the injection dose was 1.0×10⁻⁶. 16 ~2.5×10 16 Atoms / cm², and then subjected to nitrogen annealing in furnace tubes. The nitrogen treatment temperature and time are the same as the diffusion process (time 80 min-120 min / temperature 800℃-950℃), which activates impurities while balancing the thermal budget.

[0029] 7. Perform photolithography and etching on the first layer of polysilicon to form the first polysilicon electrode pattern.

[0030] 8. After photolithography and etching of the first polysilicon layer, compared to the traditional polysilicon oxidation process, this embodiment uses a silicon dioxide and silicon nitride deposition process to create a uniform first interlayer insulating layer, avoiding the impact of unevenness in the polysilicon oxidation process on the final polysilicon thickness uniformity. Specifically, LPCVD is used to deposit a uniform silicon dioxide layer of 100 nm-140 nm thickness and a uniform silicon nitride layer of 80 nm-120 nm thickness on the first polysilicon layer to ensure interlayer insulation.

[0031] 9. Deposition to form a second layer of polysilicon. The second layer of polysilicon and the first layer of polysilicon are combined horizontally to form alternating electrodes, enabling signal charge collection and transfer under clock voltage. The first layer of polysilicon and the second layer of polysilicon are isolated from each other by interlayer silicon dioxide and silicon nitride.

[0032] 10. After depositing the second layer of polycrystalline silicon, high-precision saturation doping of impurities is achieved through high-dose ion implantation. The implanted impurity is P. 31 + The injection energy was 40-70 keV, and the injection dose was 1.0 × 10⁻⁶. 16 ~2.5×10 16 Atoms / cm², and annealed by nitrogen treatment in furnace tubes, with nitrogen treatment temperature and time the same as the diffusion process (time 80 min-120 min / temperature 800℃-950℃), to activate impurities while balancing the thermal budget.

[0033] 11. Perform photolithography and etching on the second layer of polysilicon to form a second polysilicon electrode pattern.

[0034] 12. After the second layer of polysilicon photolithography and etching, a uniform second interlayer insulating layer is similarly fabricated using silicon dioxide and silicon nitride deposition processes. This avoids the impact of uneven polysilicon oxidation processes on the final polysilicon thickness uniformity. The silicon dioxide and silicon nitride deposition process is the same as in step 8 and will not be described again here.

[0035] 13. Deposit a layer of BPSG on the surface of the currently formed device, and then perform high-temperature reflow treatment to initially planarize the surface.

[0036] 14. In traditional manufacturing processes, after BPSG deposition and reflow, contact hole formation and aluminum wiring are performed directly. However, in this embodiment, a low-temperature silicon dioxide deposition and CMP process is added after BPSG deposition and reflow.

[0037] Specifically, a low-temperature silica deposition process is first performed on the BPSG surface, with a deposition thickness of 2μm-3μm. Then, a CMP process is performed on the deposited silica layer to remove approximately 1.5 μm of silica, thereby improving surface smoothness and reducing incident light reflectivity. For example... Figure 5 As shown, the flatness of the device surface is improved after low-temperature silicon dioxide deposition and CMP process.

[0038] 15. Contact holes are formed on silicon dioxide through photolithography etching; aluminum wiring and lead-out pads are created through aluminum deposition, photolithography, and etching to complete chip fabrication. The wafer is then diced, and the chips are packaged into packages to form the device.

[0039] like Figure 6 As shown, the spectral response consistency of the multispectral TDICCD (9-band TDICCD) fabricated using traditional processes is poor, with a spectral response deviation (i.e., (maximum value - minimum value) / 2) of 17.4%, which fails to meet the spectral consistency requirements for multi-chip optical stitching in ultra-wide-angle cameras. The spectral response consistency of the multispectral TDICCD (9-band TDICCD) fabricated using this embodiment is as follows: Figure 7 As shown in the figure, the spectral response consistency of the ortho-illuminated multispectral TDICCD prepared in this embodiment is significantly improved, with a spectral consistency deviation of ≤6%.

[0040] In summary, this invention improves upon existing processes by analyzing factors affecting photoresponse inhomogeneity and optimizing polysilicon doping and oxidation processes, as well as surface planarization processes. Specifically, thermal diffusion doping is replaced with ion implantation doping, achieving high-precision, high-dose ion implantation and avoiding inconsistencies in polysilicon doping across different batches, thus improving the consistency of the polysilicon doping process. Polysilicon oxidation is improved to a silicon dioxide / silicon nitride composite dielectric layer deposition process, ensuring insulation between polysilicon electrodes while avoiding uneven polysilicon thickness caused by inconsistent oxidation. Based on the original BPSG deposition and reflow, low-temperature silicon dioxide deposition and CMP processes are added, improving surface flatness and the consistency of light incident angle. After these improvements, the invention exhibits strong process stability and operability, a large process window, compatibility with existing processes, and suitability for high-spectral-response multispectral TDICCD fabrication, significantly improving spectral response consistency.

[0041] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit it. Although the present invention has been described in detail with reference to preferred embodiments, those skilled in the art should understand that modifications or equivalent substitutions can be made to the technical solutions of the present invention without departing from the spirit and scope of the present invention, and all such modifications or substitutions should be covered within the scope of the claims of the present invention.

Claims

1. A method for preparing a multispectral TDICCD to improve spectral response consistency, characterized in that, A potential well and a composite gate oxide layer are sequentially formed on a silicon epitaxial substrate; A first layer of polysilicon is deposited on the surface of the composite gate oxide layer, a large dose of ion implantation is performed on the first layer of polysilicon, and then nitrogen treatment annealing is performed. A first polycrystalline silicon electrode pattern is formed on the first layer of polycrystalline silicon, and then a first interlayer insulating layer is formed by a silicon dioxide and silicon nitride deposition process. A second layer of polysilicon is deposited on the surface of the composite gate oxide layer, a large dose of ion implantation is performed on the second layer of polysilicon, and then nitrogen treatment annealing is performed. A second polysilicon electrode pattern is formed on the second polysilicon layer, and then a second interlayer insulating layer is formed by silicon dioxide and silicon nitride deposition process; wherein, the first polysilicon layer and the second polysilicon layer form alternating polysilicon electrodes on the surface of the composite gate oxide layer; On the surface of the currently formed device, a layer of BPSG is deposited and then subjected to high-temperature reflow treatment. Then, a low-temperature silicon dioxide deposition and chemical mechanical polishing process is performed to planarize the device surface.

2. The preparation method according to claim 1, characterized in that, High-dose ion implantation in the first layer of polysilicon includes implanting impurities of P. 31 + The injection energy was 40 keV - 70 keV, and the injection dose was 1.0 × 10⁻⁶. 16 ~ 2.5×10 16 Atoms / cm².

3. The preparation method according to claim 2, characterized in that, After the first layer of polycrystalline silicon is implanted with ions, nitrogen annealing is performed, with the nitrogen treatment temperature and time being 800℃-950℃ and 80 min-120 min, respectively.

4. The preparation method according to claim 1, characterized in that, High-dose ion implantation in the second layer of polysilicon includes implanting impurities of P. 31 + The injection energy was 40 keV - 70 keV, and the injection dose was 1.0 × 10⁻⁶. 16 ~ 2.5×10 16 Atoms / cm².

5. The preparation method according to claim 4, characterized in that, After the second layer of polycrystalline silicon is implanted with ions, nitrogen annealing is performed. The nitrogen treatment temperature and time are 800℃-950℃ and 80 min-120 min, respectively.

6. The preparation method according to claim 1, characterized in that, The low-temperature silica deposition and chemical mechanical polishing process involves first depositing silica at a low temperature on the BPSG surface. After depositing a silica layer of a certain thickness, the silica layer is thinned through a chemical mechanical polishing process to improve surface smoothness and reduce incident light reflectivity.

7. The preparation method according to claim 6, characterized in that, The method also includes forming contact holes on the silicon dioxide layer after performing low-temperature silicon dioxide deposition and chemical mechanical polishing processes; and performing aluminum wiring and lead-out pads through aluminum deposition, photolithography, and etching to complete chip fabrication.

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