Positive and negative charge detection circuit of pulse ionization chamber

Abstract

The invention provides a positive and negative charge detection circuit of a pulse ionization chamber, which comprises a current-voltage conversion circuit, a voltage follower, a charge sensitive amplifier, an in-phase / anti-phase proportional amplification circuit, a charge identification circuit and a polarity matching circuit, the current-voltage conversion circuit is used for converting charges or current signals generated by the pulse ionization chamber into voltage signals; the voltage follower provides high input impedance, the charge sensitive amplifier amplifies signals, the in-phase / anti-phase proportional amplification circuit further amplifies the signals and outputs signals with the same amplitude and the phase difference of 180 degrees, and the charge identification circuit detects the positive and negative of a high-voltage electrode and outputs low-level or high-level signals. The polarity matching circuit controls the output of input signals through low-level or high-level signals of the charge identification circuit, and the output signals are positive signals. Positive and negative charges of the circuit can be detected, and polarity conversion of output signals can be automatically carried out according to high voltage types.

Description

Technical Field

[0001] This invention relates to the field of pulse ionization chamber technology, and more specifically to a positive and negative charge detection circuit for a pulse ionization chamber. Background Technology

[0002] A pulsed ionization chamber is a gas detector used to detect ionizing radiation (such as alpha particles, beta particles, and gamma rays). Its working principle is as follows: an electric field (typically 100-1000 V / cm) is applied to the two poles of the ionization chamber. When a charged particle passes through the gas medium inside the ionization chamber, it collides with gas molecules, generating electron-ion pairs (ionization effect). The electrons and ions drift towards the anode and cathode respectively under the influence of the electric field, forming a measurable pulsed current or voltage signal. The signal amplitude generated by a single incident particle is proportional to the initial ionization charge. Therefore, by collecting the electrical signal of the ionization charge generated by radiation in the gas, the type and energy of radiation can be distinguished (e.g., alpha particles have a high ionization density and a large signal amplitude).

[0003] Pulse ionization chambers can be classified according to charge type into positive high-voltage pulse ionization chambers for detecting positive charges and negative high-voltage electron pulse ionization chambers for detecting electrons. Different types of pulse ionization chambers are suitable for different application scenarios and radiation detection needs. For example, for positive charge detection, the captured positive ion pulses have a slow velocity, but the amplitude is unaffected, and they are generally used in energy statistics applications. For electron detection, however, electrons migrate about 1000 times faster than positive ions (at standard temperature and pressure, the electron drift velocity is about 1000 times that of positive ions), so the electron collection time is extremely short (on the order of microseconds or even nanoseconds), making them suitable for applications requiring high count rates and precise time measurements, such as precision energy spectroscopy measurements, time coincidence measurements, and fast neutron detection.

[0004] Existing negative charge detection circuits in pulse ionization chambers mainly include voltage-sensitive preamplifiers and charge-sensitive preamplifiers. These preamplifiers all have one thing in common: the resistance between the source and gate of the junction field-effect transistor (N-JFET) is generally required to be ≥10 Ω. 9 At this point, the input impedance is very high, making it easy to collect negative charges. However, the resistance between the source and the gate is only about tens of megohms, which is not conducive to the collection of positive charges. When the application scenario and radiation detection requirements change, and the high-voltage electrode of the pulse ionization chamber is changed from negative high voltage to positive high voltage to detect positive ions, the problem arises that charges cannot accumulate on the gate, and the low input impedance is not conducive to the collection of positive charges, resulting in no signal or an extremely weak signal. In addition, these detection circuits have high requirements for the performance of N-JFETs, increasing the cost of components. Summary of the Invention

[0005] This invention provides a positive and negative charge detection circuit for a pulse ionization chamber. This circuit can provide high input impedance, improve charge collection efficiency, detect both positive and negative charges, and automatically switch the polarity of the output signal according to the high voltage type. At the same time, it also reduces the performance requirements and cost of N-JFET.

[0006] To solve the above-mentioned technical problems, the technical solution of the present invention is as follows:

[0007] A positive and negative charge detection circuit for a pulse ionization chamber, comprising:

[0008] A current-to-voltage conversion circuit is connected to the signal output terminal of the pulse ionization chamber to convert the charge or current signal generated by the pulse ionization chamber into a voltage signal.

[0009] A voltage follower, which is connected to a current-to-voltage conversion circuit;

[0010] The charge-sensitive amplifier includes an N-JFET transistor Q1 and an operational amplifier U3. The gate of Q1 is connected to the output of a voltage follower. The drain of Q1 is connected to +A5V through a resistor R70. The source of Q1 is grounded through a resistor R69. The source of Q1 is connected to the inverting input of U3 through a capacitor C45. The non-inverting input of U3 is grounded through a resistor R18. A feedback resistor R22 and a feedback capacitor C33 are connected between the inverting input and the output of U3. R22 and C33 are connected in parallel.

[0011] The in-phase / out-of-phase amplifier circuit has its input terminal connected to the output terminal of U3. It receives the output signal of the charge-sensitive amplifier and amplifies the signal in-phase / out-of-phase, outputting a signal with the same amplitude but a 180° phase difference.

[0012] The charge identification circuit is connected to the high-voltage electrode of the pulse ionization chamber, detects the positive or negative of the high-voltage electrode and outputs a low-level or high-level signal;

[0013] The polarity matching circuit includes a single-pole double-throw analog switch U9. Signals with the same amplitude and a 180° phase difference output from the in-phase / inverting proportional amplifier circuit are respectively connected to the two signal input pins of U9. The control pin of U9 is connected to the output terminal of the charge identification circuit. The low-level or high-level signal of the charge identification circuit controls the output of the input signal, and the output signals are all positive signals.

[0014] The power management circuit supplies power to all parts of the circuit.

[0015] The current-to-voltage conversion circuit includes a resistor R16, one end of which is connected to the signal output terminal of the pulse ionization chamber, and the other end of which is grounded.

[0016] The voltage follower includes an operational amplifier U2 connected in parallel with resistor R16. The non-inverting input of U2 is connected to the signal output of the pulse ionization chamber, the inverting input of U2 is connected to its output, and the output of U2 is connected to a charge-sensitive amplifier.

[0017] The non-inverting / inverting proportional amplifier circuit includes operational amplifier U4.1 and operational amplifier U4.2. The non-inverting input terminal of U4.1 is connected to the output terminal of U3 via resistor R19, and the inverting input terminal of U4.1 is grounded via resistor R10. The inverting input terminal of U4.1 is also connected to the output terminal of U4.1 via resistor R11. The non-inverting input terminal of U4.2 is grounded via resistor R48, and the inverting input terminal of U4.2 is connected to the output terminal of U4.1 via resistor R46. The inverting input terminal of U4.2 is also connected to the output terminal of U4.2 via resistor R47. The output terminals of U4.1 and U4.2 respectively output signals with the same amplitude and a phase difference of 180°.

[0018] The charge identification circuit includes voltage divider resistors R61, R62, and R63, and comparators U11.1 and U12.1. The input terminal of voltage divider resistor R61 is connected to the high voltage electrode. The output terminal of R61 is connected to the inverting input terminal of U11.1 via resistor R65. The input terminal of voltage divider resistor R63 is connected to the output terminal of R61. The output terminal of R63 is connected to the non-inverting input terminal of U11.1 via resistor R66. The input terminal of voltage divider resistor R62 is connected to the output terminal of voltage divider resistor R63. The output terminal of R62 is grounded. The non-inverting input terminal of U11.1 is grounded via resistor R67. The inverting input terminal of U11.1 is connected to the output terminal of U11.1 via resistor R64. The output terminal of U11.1 is connected to the non-inverting input terminal of U12.1. The inverting input terminal of U12.1 is grounded. The output terminal of U12.1 outputs a low-level or high-level signal.

[0019] The output of the polarity matching circuit is also connected to a second-order low-pass filter to filter high-frequency signals.

[0020] A capacitor C30 is connected between the gate of the N-JFET transistor Q1 and the output of the voltage follower. C30 is used to filter out DC signals.

[0021] The output terminal of the operational amplifier U3 is connected to a capacitor C40. The output terminal of the capacitor C40 is connected to the non-inverting / inverting proportional amplifier circuit. The output terminal of the capacitor C40 is also connected to a resistor R38, which is grounded.

[0022] The feedback resistor R22 is a metal film resistor with a resistance value of 10~100MΩ; the feedback capacitor C33 is a 1pF capacitor.

[0023] The power management circuit uses a combination of a charge pump and an LDO.

[0024] Compared with existing technologies, the advantages of this invention are as follows: This invention provides a positive and negative charge detection circuit design for a pulse ionization chamber. A voltage follower provides high input impedance to collect particles, which are then further suppressed by a follower composed of N-JFET transistors, improving thermal stability and anti-interference capability, and achieving efficient charge amplification. This is further amplified by a non-inverting / inverting amplifier circuit, and combined with a charge identification circuit and a polarity matching circuit, polarity matching is performed according to the charge type, ensuring that the signal is converted into a positive signal output regardless of whether a positive or negative charge is detected. Finally, a second-order low-pass filter serves as the final output stage to filter out high-frequency noise and improve the signal-to-noise ratio. This circuit is suitable for detecting positive and negative charges under high voltage, and can automatically perform polarity matching and conversion of the output signal according to the high voltage type (charge type). Simultaneously, it reduces the performance requirements and cost of N-JFET transistors. Attached Figure Description

[0025] Figure 1 This is a structural block diagram of the positive and negative charge detection circuit of the pulse ionization chamber provided in this invention;

[0026] Figure 2 This is a functional block diagram of the positive and negative charge detection circuit of the pulse ionization chamber provided in this invention;

[0027] Figure 3 This is a circuit diagram of the current-to-voltage conversion circuit, voltage follower, and charge-sensitive amplifier in this invention;

[0028] Figure 4 This is a circuit diagram of the non-inverting / inverting amplifier circuit in this invention;

[0029] Figure 5 This is a circuit diagram of the charge identification circuit and polarity matching circuit in this invention;

[0030] Figure 6 This is a circuit diagram of the second-order low-pass filter in this invention;

[0031] Figure 7 This is a circuit diagram of the power management circuit in this invention. Detailed Implementation

[0032] The present invention will be further described below with reference to the accompanying drawings and embodiments.

[0033] The positive and negative charge detection circuit of the pulse ionization chamber provided in this embodiment includes a current-to-voltage conversion circuit, a voltage follower, a charge-sensitive amplifier, a non-inverting / inverting proportional amplifier circuit, a charge identification circuit, a polarity matching circuit, a second-order low-pass filter, and a power management circuit. Partial structural connections and functional block diagrams are shown below. Figure 1 and Figure 2 As shown.

[0034] The current-to-voltage conversion circuit is connected to the signal output terminal of the pulse ionization chamber. The positive and negative charges generated within the pulse ionization chamber are guided by a high-voltage electric field and collected onto a metal probe, generating a weak current pulse signal. The current-to-voltage conversion circuit and the pulse ionization chamber convert the charge or current signal generated by the pulse ionization chamber into a voltage signal. In this embodiment, resistor R16 is used to convert the charge or current signal into a voltage signal. Specifically, one end of R16 is connected to the signal output terminal of the pulse ionization chamber, and the other end of R16 is grounded. Figure 3 As shown.

[0035] The voltage follower is connected to the current-to-voltage conversion circuit to achieve the output impedance of the pulse ionization chamber (greater than 10). 14 (Ω) matching. Specifically, the voltage follower includes an operational amplifier U2 connected in parallel with resistor R16. The non-inverting input of U2 is connected to the signal output of the pulse ionization chamber, the inverting input of U2 is connected to the output of U2, and the output of U2 is connected to the charge-sensitive amplifier. See [link to documentation]. Figure 3 .

[0036] The charge-sensitive amplifier includes an N-JFET transistor Q1 and an operational amplifier U3. The gate of Q1 is connected to the output of a voltage follower. Specifically, a capacitor C30 is connected between the gate of Q1 and the output of U3, filtering out DC signals through C30. The drain of Q1 is connected to +A5V through a resistor R70, and the source of Q1 is grounded through a resistor R69. The source of Q1 is connected to the inverting input of U3 through a capacitor C45. The non-inverting input of U3 is grounded through a resistor R18. A feedback resistor R22 and a feedback capacitor C33 are connected between the inverting input and output of U3. R22 and C33 are connected in parallel. See [link to documentation]. Figure 3 The output of U3 is connected to a non-inverting / inverting proportional amplifier circuit. The N-JFET transistor Q1 and operational amplifier U3 form a follower, further suppressing noise and improving thermal stability and anti-interference capability. Specifically, the feedback resistor R22 is a metal film resistor with a resistance of 10~100MΩ, further reducing noise and increasing the count rate. Specifically, the feedback capacitor C33 is a 1pF capacitor with good temperature stability, which can improve the signal output amplitude and reduce noise. The N-JFET transistor Q1 is model 2SK3557, which is much cheaper than the high input impedance transistors such as 3DJ6, 3DJ7, and 3DJ9 used in existing technology. The charge-sensitive amplifier amplifies the charge and converts it into a voltage signal, which is only tens of millivolts at this point.

[0037] The input of the non-inverting / inverting amplifier circuit is connected to the output of U3, receiving the output signal from the charge-sensitive amplifier and amplifying the signal using a non-inverting / inverting amplifier, outputting signals with the same amplitude but a 180° phase difference. Specifically, a capacitor C40 is connected to the output of operational amplifier U3, and the output of capacitor C40 is connected to the non-inverting / inverting amplifier circuit. A resistor R38 is also connected to the output of capacitor C40, and R38 is grounded. C40 and R38 form a high-pass filter to filter out DC signals.

[0038] In this embodiment, the non-inverting / inverting proportional amplifier circuit includes operational amplifier U4.1 and operational amplifier U4.2. The non-inverting input terminal of U4.1 is connected to the output terminal of U4.1 via resistor R19, and the inverting input terminal of U4.1 is grounded via resistor R10. The inverting input terminal of U4.1 is also connected to the output terminal of U4.1 via resistor R11. The non-inverting input terminal of U4.2 is grounded via resistor R48, and the inverting input terminal of U4.2 is connected to the output terminal of U4.1 via resistor R46. The inverting input terminal of U4.2 is also connected to the output terminal of U4.2 via resistor R47. Figure 4 As shown, the output terminals of U4.1 and U4.2 output signals with the same amplitude but a phase difference of 180°. When R10 = 1kΩ and R11 = 5.1kΩ, the gain of this stage is 14dB, and the gain of the inverter is 1dB. The signal is amplified by a non-inverting / inverting proportional amplifier circuit, and the polarity of the output signal is matched to adapt to the positive and negative high voltage detection of positive and negative charges in the pulse ionization chamber.

[0039] The charge identification circuit is connected to the high-voltage electrode of the pulse ionization chamber, detects the positive or negative of the high-voltage electrode and outputs a low-level or high-level signal. In this embodiment, the charge identification circuit includes voltage divider resistors R61, R62, and R63, and comparators U11.1 and U12.1. The input terminal of voltage divider resistor R61 is connected to the high-voltage electrode. The output terminal of R61 is connected to the inverting input terminal of U11.1 via resistor R65. The input terminal of voltage divider resistor R63 is connected to the output terminal of R61. The output terminal of R63 is connected to the non-inverting input terminal of U11.1 via resistor R66. The input terminal of voltage divider resistor R62 is connected to the output terminal of voltage divider resistor R63. The output terminal of R62 is grounded. The non-inverting input terminal of U11.1 is grounded via resistor R67. The inverting input terminal of U11.1 is connected to the output terminal of U11.1 via resistor R64. The output terminal of U11.1 is connected to the non-inverting input terminal of U12.1. The inverting input terminal of U12.1 is grounded. The output terminal of U12.1 outputs a low-level or high-level signal, such as... Figure 5As shown in the diagram. This design uses a high-voltage electrode to detect positive and negative charges. The positive and negative high voltages are +1000V and -1000V, respectively. When detecting positive charges, the voltage at point A is +502.5V and the voltage at point B is +497.5V, obtained through voltage divider circuits R61, R63, and R62. Therefore, the voltage at point C is -5V, and the comparator U12.1 outputs a low-level signal. When detecting negative charges, the voltage at point A is +497.5V and the voltage at point B is +502.5V, obtained through voltage divider circuits R61, R63, and R62. Therefore, the voltage at point C is +5V, and the comparator U12.1 outputs a high-level signal.

[0040] The polarity matching circuit includes a single-pole double-throw analog switch U9. Signals with the same amplitude but a 180° phase difference output from the inverting / outverting amplifier circuits are respectively connected to the two signal input pins AX and AY of U9. The control pin of U9 is connected to the output of the charge identification circuit. (See...) Figure 5 The input signal output is controlled by a low-level or high-level signal from the charge recognition circuit, and the output signal is always a positive signal. Specifically, when detecting a positive charge, the charge recognition circuit outputs a low-level signal to control the AX channel of U9 to open. At this time, S outputs an inverted signal, i.e., a positive signal. When detecting a negative charge, the charge recognition circuit outputs a high-level signal to control the AY channel of U9 to open. At this time, S outputs a non-inverted signal, i.e., a positive signal. Through this scheme, the circuit can automatically perform polarity matching and conversion, ensuring that the signal is converted into a positive signal output regardless of whether a positive or negative charge is detected.

[0041] A second-order low-pass filter is connected to the output of a polarity-matched circuit to filter high-frequency signals. Specifically, this circuit uses a Butterworth second-order low-pass filter, such as... Figure 6 As shown, the second-order low-pass filter includes operational amplifier U7.2. The non-inverting input of U7.2 is grounded via capacitor C32. The non-inverting input of U7.2 is connected to the output of the polarity matching circuit via resistors R15 and R20 connected in series. The non-inverting input of U7.2 is connected to the inverting input via resistor R15 and capacitor C27 connected in series with R15. The inverting input of U7.2 is connected to the output of U7.2, further improving the signal-to-noise ratio of the output signal. In this design, R20 and R15 are 1.5kΩ, C32 is 10nF, and C27 is 20nF. The cutoff frequency is... The setting is relatively high to ensure it won't affect the signal.

[0042] The power management circuit supplies power to all parts of the circuit. In this embodiment, the power management circuit uses a combination of a charge pump and an LDO, see [link to documentation]. Figure 7Operating on +5V, it outputs ±5V via an internal charge pump and LDO, providing ultra-low noise positive and negative outputs. Output current reaches up to ±250mA, with an operating current of only 390µA and a typical shutdown current of 0.5µA. This device boasts a small solution size, requiring few external components. The negative voltage is generated by a regulated inverting charge pump connected to a low-noise, negative voltage LDO. The inverting charge pump operates at a typical switching frequency of 2MHz, reducing output impedance and voltage ripple. The positive voltage is generated from the input of a low-noise positive voltage LDO.

Claims

1. A positive and negative charge detection circuit for a pulse ionization chamber, characterized in that... include: A current-to-voltage conversion circuit is connected to the signal output terminal of the pulse ionization chamber to convert the charge or current signal generated by the pulse ionization chamber into a voltage signal. A voltage follower, which is connected to a current-to-voltage conversion circuit; The charge-sensitive amplifier includes an N-JFET transistor Q1 and an operational amplifier U3. The gate of Q1 is connected to the output of a voltage follower. The drain of Q1 is connected to +A5V through a resistor R70. The source of Q1 is grounded through a resistor R69. The source of Q1 is connected to the inverting input of U3 through a capacitor C45. The non-inverting input of U3 is grounded through a resistor R18. A feedback resistor R22 and a feedback capacitor C33 are connected between the inverting input and the output of U3. R22 and C33 are connected in parallel. The in-phase / out-of-phase amplifier circuit has its input terminal connected to the output terminal of U3. It receives the output signal of the charge-sensitive amplifier and amplifies the signal in-phase / out-of-phase, outputting a signal with the same amplitude but a 180° phase difference. The charge identification circuit is connected to the high-voltage electrode of the pulse ionization chamber, detects the positive or negative of the high-voltage electrode and outputs a low-level or high-level signal; The polarity matching circuit includes a single-pole double-throw analog switch U9. Signals with the same amplitude and a 180° phase difference output from the in-phase / inverting proportional amplifier circuit are respectively connected to the two signal input pins of U9. The control pin of U9 is connected to the output terminal of the charge identification circuit. The low-level or high-level signal of the charge identification circuit controls the output of the input signal, and the output signals are all positive signals. The power management circuit supplies power to all parts of the circuit.

2. The positive and negative charge detection circuit of the pulse ionization chamber according to claim 1, characterized in that: The current-to-voltage conversion circuit includes a resistor R16, one end of which is connected to the signal output terminal of the pulse ionization chamber, and the other end of which is grounded.

3. The positive and negative charge detection circuit of the pulse ionization chamber according to claim 2, characterized in that: The voltage follower includes an operational amplifier U2 connected in parallel with resistor R16. The non-inverting input of U2 is connected to the signal output of the pulse ionization chamber, the inverting input of U2 is connected to its output, and the output of U2 is connected to a charge-sensitive amplifier.

4. The positive and negative charge detection circuit of the pulse ionization chamber according to claim 1, characterized in that: The non-inverting / inverting proportional amplifier circuit includes operational amplifier U4.1 and operational amplifier U4.

2. The non-inverting input terminal of U4.1 is connected to the output terminal of U3 via resistor R19, the inverting input terminal of U4.1 is grounded via resistor R10, and the inverting input terminal of U4.1 is connected to the output terminal of U4.1 via resistor R11. The non-inverting input of U4.2 is grounded via resistor R48, the inverting input of U4.2 is connected to the output of U4.1 via resistor R46, and the inverting input of U4.2 is connected to the output of U4.2 via resistor R47. The outputs of U4.1 and U4.2 output signals with the same amplitude but a phase difference of 180°.

5. The positive and negative charge detection circuit of the pulse ionization chamber according to claim 1, characterized in that: The charge identification circuit includes voltage divider resistors R61, R62, and R63, and comparators U11.1 and U12.

1. The input terminal of voltage divider resistor R61 is connected to the high voltage electrode. The output terminal of R61 is connected to the inverting input terminal of U11.1 via resistor R65. The input terminal of voltage divider resistor R63 is connected to the output terminal of R61. The output terminal of R63 is connected to the non-inverting input terminal of U11.1 via resistor R66. The input terminal of voltage divider resistor R62 is connected to the output terminal of voltage divider resistor R63. The output terminal of R62 is grounded. The non-inverting input terminal of U11.1 is grounded via resistor R67. The inverting input terminal of U11.1 is connected to the output terminal of U11.1 via resistor R64. The output terminal of U11.1 is connected to the non-inverting input terminal of U12.

1. The inverting input terminal of U12.1 is grounded. The output terminal of U12.1 outputs a low-level or high-level signal.

6. The positive and negative charge detection circuit of the pulse ionization chamber according to claim 1, characterized in that: The output of the polarity matching circuit is also connected to a second-order low-pass filter to filter high-frequency signals.

7. The positive and negative charge detection circuit of the pulse ionization chamber according to claim 1, characterized in that: A capacitor C30 is connected between the gate of the N-JFET transistor Q1 and the output of the voltage follower. C30 is used to filter out DC signals.

8. The positive and negative charge detection circuit of the pulse ionization chamber according to claim 1, characterized in that: The output terminal of the operational amplifier U3 is connected to a capacitor C40. The output terminal of the capacitor C40 is connected to the non-inverting / inverting proportional amplifier circuit. The output terminal of the capacitor C40 is also connected to a resistor R38, which is grounded.

9. The positive and negative charge detection circuit of the pulse ionization chamber according to claim 1, characterized in that: The feedback resistor R22 is a metal film resistor with a resistance value of 10~100MΩ; the feedback capacitor C33 is a 1pF capacitor.

10. The positive and negative charge detection circuit of the pulse ionization chamber according to claim 1, characterized in that: The power management circuit uses a combination of a charge pump and an LDO.

Images