Multi-level rapid fault isolation method and device based on impedance spectrum online identification

Abstract

The invention discloses a multi-level rapid fault isolation method and device based on impedance spectrum online identification, and relates to the technical field of fault isolation, and the method specifically comprises the steps: numbering each circuit branch of a router, injecting a set frequency disturbance signal to each numbered circuit branch according to a set period frequency band, and carrying out the frequency disturbance of each circuit branch; obtaining the impedance spectrum characteristics of each circuit branch, carrying out vectorization, and inputting a trained preset fault recognition model to obtain the fault confidence of the circuit branch; performing branch equivalent parameter estimation on each circuit branch based on an extended Kalman filtering model to obtain an estimated residual value of the circuit branch; respectively comparing the fault confidence coefficient of the circuit branch and the estimated residual value of the circuit branch with a preset fault confidence coefficient threshold value of the circuit branch with a corresponding serial number and a preset estimated residual value threshold value of the circuit branch with the corresponding serial number so as to output a fault signal; positioning a fault point based on a virtual fault current and voltage method to generate a protection signal; and starting a three-level protection mechanism to realize rapid fault isolation.

Description

Technical Field

[0001] This invention relates to the field of fault isolation technology, specifically a multi-level rapid fault isolation method and apparatus based on online impedance spectrum identification. Background Technology

[0002] With the rapid development of power, transportation, communication, and manufacturing industries, the scale and complexity of systems are constantly increasing. In these systems, faults may not only affect individual devices but often trigger chain reactions, impacting the stability of the entire system. For example, in power systems, if a fault in a certain device or link is not isolated in time, it may lead to widespread power outages or even more serious equipment damage. How to accurately detect and isolate faults in multi-layered complex systems in real time has become a current research hotspot.

[0003] Existing technologies suffer from the following problems: Traditional fault detection and isolation for multi-branch series-parallel energy routers typically rely on a single threshold for fault assessment, resulting in low identification accuracy and difficulty in distinguishing fault types. Furthermore, the lack of efficient fault nature determination and precise fault location methods based on virtual fault current and voltage, as well as post-fault protection mechanisms, leads to slow fault isolation response and insufficient targeting, making it difficult to achieve accurate and rapid fault isolation and ensure system stability. Therefore, there is an urgent need for a multi-level rapid fault isolation method and device based on online impedance spectrum identification to address the problems existing in current technologies. Summary of the Invention

[0004] To address the aforementioned technical problems, the present invention aims to provide a multi-level rapid fault isolation method based on online impedance spectrum identification, which includes the following steps: Step 1: Number each circuit branch of the multi-branch series-parallel energy router by preset numbering labels, and inject a set frequency disturbance signal into each numbered circuit branch according to the set periodic frequency band to obtain the impedance spectrum characteristics of each circuit branch. Step 2: Vectorize the impedance spectrum characteristics of each circuit branch after numbering and input them into the pre-trained fault identification model to obtain the fault confidence of the corresponding numbered circuit branch. Step 3: Estimate the equivalent parameters of each numbered circuit branch based on the extended Kalman filter model to obtain the estimated residual values ​​of the corresponding numbered circuit branches; Step 4: Compare the fault confidence level of the corresponding numbered circuit branch with the preset fault confidence level threshold of the corresponding numbered circuit branch, and simultaneously compare the estimated residual value of the corresponding numbered circuit branch with the preset estimated residual value threshold of the corresponding numbered circuit branch, and output the fault signal. Step 5: Receive the fault signal, determine the nature of the fault and locate the fault point based on the virtual fault current and voltage method, and issue a protection signal; Step 6: Receive the protection signal and activate the three-level protection mechanism to achieve rapid isolation of the fault.

[0005] In a preferred embodiment, the specific process of injecting a set frequency disturbance signal into each numbered circuit branch according to a set periodic frequency band to obtain the impedance spectrum characteristics of each circuit branch includes: Based on the topology of each circuit branch of the multi-branch series-parallel energy router, a preset number label is used to number each circuit branch of the multi-branch series-parallel energy router. The programmable waveform generator built into the FPGA is configured with a periodic frequency band and a set frequency disturbance signal. The programmable waveform generator then injects the set frequency disturbance signal into each numbered circuit branch using the set periodic frequency band. By using the digital phase-locked loop and synchronous detection technology built into the FPGA, the impedance amplitude and impedance phase difference of the voltage and current response at each frequency point of each circuit branch are extracted to construct the impedance spectrum and obtain the impedance spectrum characteristics of each circuit branch.

[0006] In a preferred embodiment, the impedance spectrum characteristics of each circuit branch specifically include: the impedance amplitude and impedance phase difference of the voltage and current of each circuit branch; The set frequency disturbance signal specifically includes a sweep frequency signal that varies continuously in the range of 20kHz to 200kHz.

[0007] In a preferred embodiment, the specific process of training the preset fault identification model includes: The impedance spectrum characteristics of each circuit branch after obtaining the historical number and the fault confidence of the corresponding numbered circuit branch are used as training data. The training data is divided into training samples, test samples, and validation samples, and a training classifier is constructed. The impedance spectrum features of each circuit branch after historical numbering in the training samples are vectorized to obtain the impedance spectrum feature vector of each circuit branch, and then input into the training classifier. The fault confidence of the corresponding numbered circuit branch in the training samples is used as the output data of the training classifier. The training classifier is trained, and the training classifier extracts the fault type features of the corresponding numbered circuit branches through a convolutional layer; The trained classifier is tested and validated based on test samples and validation samples, and the trained classifier that meets the preset accuracy is output as the preset fault recognition model after training is completed. The impedance spectrum characteristics of each circuit branch after numbering are vectorized and input into the pre-trained fault identification model to obtain the fault confidence of the corresponding numbered circuit branch.

[0008] In a preferred embodiment, the training classifier specifically includes one or more of the following: convolutional neural network, support vector machine, and Naive Bayes.

[0009] In a preferred embodiment, the specific process of obtaining the estimated residual value of the corresponding numbered circuit branch includes: An equivalent circuit model is constructed based on the topology of each circuit branch of a multi-branch series-parallel energy router. Obtain the equivalent parameters from the equivalent circuit model and use the equivalent parameters as state variables; An extended Kalman filter model is constructed, and the real-time current and voltage values ​​of the corresponding numbered circuit branches are acquired by sensors as observation data. An augmented state vector is constructed by augmenting the state variables with the observed data, and a nonlinear state-space equation is constructed based on the augmented state vector. The nonlinear state-space equations are input into the extended Kalman filter model for recursive calculation, and the equivalent parameter estimates of the corresponding numbered circuit branches are output. Substitute the estimated equivalent parameters of the corresponding numbered circuit branches into the equivalent circuit model to calculate the predicted voltage and current values. Calculate the deviations between the real-time current and voltage values ​​and the predicted current and voltage values ​​to obtain the estimated residual values ​​for the corresponding numbered circuit branches.

[0010] In a preferred embodiment, the equivalent parameters include: equivalent resistance, equivalent inductance, and equivalent capacitance.

[0011] In a preferred embodiment, the specific process of outputting a fault signal includes: The fault confidence threshold and the estimated residual value threshold of the corresponding numbered circuit branch are preset. Compare the fault confidence level of the corresponding numbered circuit branch with the preset fault confidence level threshold of the corresponding numbered circuit branch; The estimated residual value of the corresponding numbered circuit branch is compared with the preset estimated residual value threshold of the corresponding numbered circuit branch. A fault signal is output if and only if the fault confidence level of the corresponding numbered circuit branch is greater than the preset fault confidence level threshold of the corresponding numbered circuit branch and the estimated residual value of the corresponding numbered circuit branch is greater than the preset estimated residual value threshold of the corresponding numbered circuit branch.

[0012] In a preferred embodiment, the specific process of determining the nature of a fault and locating the fault point based on the virtual fault current-voltage method includes: Preset virtual fault conditions and add the virtual fault conditions to the equivalent circuit model of the corresponding numbered circuit branch; Calculate the virtual fault current and virtual fault voltage values ​​for each numbered circuit branch under multiple virtual fault conditions; The ranges of virtual fault current values ​​and virtual fault voltage values ​​for each numbered circuit branch under virtual fault conditions are obtained. If the real-time current and voltage values ​​of the corresponding numbered circuit branches acquired by the sensor fall within the virtual fault current and virtual fault voltage ranges corresponding to each numbered circuit branch under the virtual fault condition. The corresponding numbered circuit branch is then marked as the faulty circuit branch, and the fault nature and fault location of the faulty circuit branch are located according to the virtual fault conditions.

[0013] In a preferred embodiment, the virtual fault conditions specifically include: branch short-circuit fault conditions, branch open-circuit fault conditions, ground short-circuit fault conditions, common-mode fault conditions, and differential-mode fault conditions.

[0014] In a preferred embodiment, the three-tier protection mechanism specifically includes: The first level involves soft shutdown operations performed by the SiC power device drive circuits local to each circuit branch. The second level involves disconnecting the solid-state circuit breakers corresponding to each circuit branch within a preset operation time, which is a few microseconds, to achieve a rapid response. The third level performs power reconfiguration adjustments on the remaining fault-free circuit branches within a preset operating time to ensure that the bus voltage or load power remains stable.

[0015] In a preferred embodiment, the specific process of the SiC power device drive circuit performing a soft turn-off operation includes: The soft shutdown operation involves two stages of gate voltage control; The first stage reduces the gate voltage from the drive voltage of 15V to the intermediate level of 5V and maintains it for a preset time to limit the rate of rise of fault current and overvoltage. The second stage further reduces the gate voltage to the turn-off level of 0V to achieve complete turn-off.

[0016] In a preferred embodiment, the process of the solid-state circuit breaker performing the disconnection operation includes: By employing a forced zero-crossing strategy, a reverse current is generated by activating a parallel LC oscillation branch to counteract the main circuit current, thereby enabling the solid-state switch to turn off at the moment the current crosses zero, thus achieving arc-free interruption.

[0017] In a preferred embodiment, the specific process of power reconfiguration adjustment for the remaining fault-free circuit branches includes: Obtain the remaining fault-free circuit branches and adjust the PWM duty cycle of the remaining fault-free circuit branches; Introducing virtual impedance control, the form is as follows: The virtual impedance is superimposed on the PWM reference signal to suppress bus voltage fluctuations and dampen system oscillations; Adjusting the virtual impedance component in the PWM reference signal, i.e. and Partially, to obtain the virtual impedance compensation amount; The PWM duty cycle of the remaining fault-free circuit branches is reallocated by the MCU and virtual impedance compensation is injected. To achieve voltage restoration and output power balance of the remaining fault-free circuit branch busbars; in, Indicates the virtual impedance compensation amount; This represents the resistance of the resistor to the current. Indicates the inductor part; This represents the Laplace transform variable in the complex frequency domain, indicating the frequency characteristics.

[0018] In another aspect, the present invention discloses a multi-level rapid fault isolation device based on online impedance spectrum identification. The device includes the following modules: feature acquisition module, fault confidence generation module, residual generation module, comparison analysis module, fault location module, and safety protection module. Feature acquisition module: Preset numbering labels are used to number each circuit branch of the multi-branch series-parallel energy router. According to the set periodic frequency band, a set frequency disturbance signal is injected into each numbered circuit branch to obtain the impedance spectrum characteristics of each circuit branch. Fault confidence generation module: Vectorizes the impedance spectrum features of each numbered circuit branch and inputs them into the trained preset fault identification model to obtain the fault confidence of the corresponding numbered circuit branch. Residual generation module: Based on the extended Kalman filter model, the equivalent parameters of each numbered circuit branch are estimated to obtain the estimated residual value of the corresponding numbered circuit branch; The comparison and analysis module compares the fault confidence level of the corresponding numbered circuit branch with the preset fault confidence level threshold of the corresponding numbered circuit branch, and simultaneously compares the estimated residual value of the corresponding numbered circuit branch with the preset estimated residual value threshold of the corresponding numbered circuit branch, and outputs the fault signal. Fault location module: Receives fault signals, determines the nature of the fault and locates the fault point based on the virtual fault current and voltage method, and issues a protection signal; Safety protection module: Receives protection signals and activates a three-level protection mechanism to achieve rapid isolation of faults.

[0019] Compared with the prior art, the beneficial effects of the present invention are as follows: The present invention numbers each circuit branch of a multi-branch series-parallel energy router using preset numbering labels, injects a set frequency disturbance signal into each numbered circuit branch according to a set periodic frequency band, and obtains the impedance spectrum characteristics of each circuit branch; the impedance spectrum characteristics of each numbered circuit branch are vectorized and input into a preset fault identification model that has been trained to obtain the fault confidence of the corresponding numbered circuit branch; the equivalent parameters of each numbered circuit branch are estimated based on an extended Kalman filter model to obtain the estimated residual value of the corresponding numbered circuit branch; the fault confidence of the corresponding numbered circuit branch is compared with the preset fault confidence threshold of the corresponding numbered circuit branch, and the estimated residual value of the corresponding numbered circuit branch is simultaneously compared with the preset estimated residual value threshold of the corresponding numbered circuit branch, and a fault signal is output; the fault signal is received, the nature of the fault and the fault point are determined based on the virtual fault current-voltage method, and a protection signal is issued; the protection signal is received, and a three-level protection mechanism is activated to achieve rapid isolation of the fault. Attached Figure Description

[0020] Figure 1 This is a schematic flowchart illustrating the steps of a multi-level rapid fault isolation method based on online impedance spectrum identification according to an embodiment of this application.

[0021] Figure 2 This is a schematic diagram showing the connection of various modules of a multi-level rapid fault isolation device based on online impedance spectrum identification according to an embodiment of this application. Detailed Implementation

[0022] The subject matter described herein will now be discussed with reference to exemplary embodiments. It should be understood that these embodiments are discussed only to enable those skilled in the art to better understand and implement the subject matter described herein, and changes may be made to the function and arrangement of the elements discussed without departing from the scope of this specification. Various processes or components may be omitted, substituted, or added as needed in the examples. Furthermore, features described in some examples may be combined in other examples.

[0023] It should be noted that, unless otherwise defined, the technical or scientific terms used in one or more embodiments of the present invention should have the ordinary meaning understood by one of ordinary skill in the art to which this invention pertains. The terms "first," "second," and similar terms used in one or more embodiments of the present invention do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Terms such as "comprising" or "including" mean that the element or object preceding the word encompasses the elements or objects listed after the word and their equivalents, without excluding other elements or objects. Terms such as "connected" or "linked" are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. Terms such as "upper," "lower," "left," and "right" are used only to indicate relative positional relationships; when the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0024] Example 1 Please see Figure 1 As shown in the figure, this application provides a multi-level fast fault isolation method based on online impedance spectrum identification, which includes the following steps: Step 1: Number each circuit branch of the multi-branch series-parallel energy router by preset numbering labels, and inject a set frequency disturbance signal into each numbered circuit branch according to the set periodic frequency band to obtain the impedance spectrum characteristics of each circuit branch. Based on the above embodiments, the specific process of injecting a set frequency disturbance signal into each numbered circuit branch according to a set periodic frequency band to obtain the impedance spectrum characteristics of each circuit branch includes: Based on the topology of each circuit branch of the multi-branch series-parallel energy router, a preset number label is used to number each circuit branch of the multi-branch series-parallel energy router. The programmable waveform generator built into the FPGA is configured with a periodic frequency band and a set frequency disturbance signal. The programmable waveform generator then injects the set frequency disturbance signal into each numbered circuit branch using the set periodic frequency band. By using the digital phase-locked loop (PLL) and synchronous detection technology built into the FPGA, the impedance amplitude and impedance phase difference of the voltage and current response at each frequency point of each circuit branch are extracted to construct the impedance spectrum and obtain the impedance spectrum characteristics of each circuit branch. It should be noted that the perturbation signal generated by the programmable waveform generator at the set frequency is a small-amplitude sine wave, which allows the perturbation signal to be applied to the circuit without affecting the normal operation of each circuit branch. Based on the PLL (Phase-Locked Loop) algorithm integrated within the FPGA, the fundamental frequency (i.e., the main frequency component of the power grid or power system) is extracted from the voltage and current signals of each numbered circuit branch; a phase reference is provided for the injected set frequency disturbance signal; this phase reference ensures that the phase of the injected set frequency disturbance signal and the response of each circuit branch are synchronized. The PLL synchronously detects the impedance amplitude and impedance phase difference of the voltage and current of each circuit branch after the set frequency disturbance signal is injected and numbered, and uses this as the impedance spectrum characteristic of each circuit branch. Specifically, the set frequency disturbance signal includes a sweep frequency signal that varies continuously in the range of 20kHz to 200kHz; Specifically, FPGA (Field-Programmable Gate Array) is an integrated circuit that can be programmed and configured by the user in the field. It includes modules such as programmable waveform generators and PLL (phase-locked loop) algorithms. Specifically, impedance spectrum characteristics refer to the impedance response of a circuit or power grid system at different frequencies, including impedance amplitude and impedance phase difference; where impedance amplitude represents the magnitude of the current-to-voltage ratio at a certain frequency; and impedance phase difference represents the phase difference between voltage and current. Setting a periodic frequency band means sending a perturbation signal at a set frequency band, such as 1s, 1ms, etc. The set frequency is usually in the range of tens of kHz to hundreds of kHz (e.g., 20kHz to 200kHz). The specific frequency is determined by the fault detection requirements and the operating characteristics of the circuit, and no specific limit is given again. Step 2: Vectorize the impedance spectrum characteristics of each circuit branch after numbering and input them into the pre-trained fault identification model to obtain the fault confidence of the corresponding numbered circuit branch. Based on the above embodiments, the specific process of training the preset fault identification model includes: The impedance spectrum characteristics of each circuit branch after obtaining the historical number and the fault confidence of the corresponding numbered circuit branch are used as training data. The training data is divided into training samples, test samples, and validation samples, and a training classifier is constructed. The impedance spectrum features of each circuit branch after historical numbering in the training samples are vectorized to obtain the impedance spectrum feature vector of each circuit branch, and then input into the training classifier. The fault confidence of the corresponding numbered circuit branch in the training samples is used as the output data of the training classifier. The training classifier is trained, and the training classifier extracts the fault type features of the corresponding numbered circuit branches through a convolutional layer; The trained classifier is tested and validated based on test samples and validation samples, and the trained classifier that meets the preset accuracy is output as the preset fault recognition model after training is completed. The impedance spectrum characteristics of each circuit branch after numbering are vectorized and input into the pre-trained fault identification model to obtain the fault confidence of the corresponding numbered circuit branch. Specifically, constructing the training classifier includes one or more of the following: Convolutional Neural Network (CNN), Support Vector Machine, Naive Bayes, etc. The impedance spectrum characteristics of each circuit branch after historical numbering and the fault confidence of the corresponding numbered circuit branch are obtained from the power system database. Specifically, the fault type features of the corresponding numbered circuit branches include: (such as short circuit, open circuit, device degradation), etc.; the convolutional layer extracts the fault type features of the corresponding numbered circuit branches to determine whether each branch is abnormal and the possible fault type in the current state, so that the classifier can be trained to accurately output the fault confidence of each branch. Specifically, in this embodiment, the training classifier can be constructed using a Convolutional Neural Network (CNN). A CNN model consists of multiple convolutional layers, pooling layers, and fully connected layers connected in series. For example, three one-dimensional convolutional layers can be used, with each layer having a kernel size of 3 or 5, and the number of kernels increasing layer by layer (e.g., 16→32→64). The activation function is ReLU, followed by 2×2 max pooling to reduce the feature length. Finally, one or two fully connected layers map the extracted features to fault category probabilities, and the output layer uses Softmax normalization to provide the confidence score for each fault category. For binary classification (normal / fault) problems, a Sigmoid output can be used; for multi-class fault recognition, Softmax is used to correspond to multiple fault types. During model training, the loss function is cross-entropy to measure the deviation between the predicted probability distribution and the true label. Step 3: Estimate the equivalent parameters of each numbered circuit branch based on the extended Kalman filter model to obtain the estimated residual values ​​of the corresponding numbered circuit branches; Based on the above embodiments, the specific process of obtaining the estimated residual value of the corresponding numbered circuit branch includes: An equivalent circuit model is constructed based on the topology of each circuit branch of a multi-branch series-parallel energy router. Obtain the equivalent parameters in the equivalent circuit model, including equivalent resistance, equivalent inductance, and equivalent capacitance, and use the equivalent parameters as state variables; These equivalent parameters can reflect the actual operating status of the circuit branches, providing a basis for subsequent fault identification. An extended Kalman filter (EKF) model is constructed, and the real-time current and voltage values ​​of the corresponding numbered circuit branches are acquired by sensors as observation data. An augmented state vector is constructed by augmenting the state variables with the observed data, and a nonlinear state-space equation is constructed based on the augmented state vector. The nonlinear state-space equations are input into the extended Kalman filter model for recursive calculation, and the equivalent parameter estimates of the corresponding numbered circuit branches are output. Substitute the estimated equivalent parameters of the corresponding numbered circuit branches into the equivalent circuit model to calculate the predicted voltage and current values. Calculate the deviations between real-time current and voltage values ​​and predicted current and voltage values ​​to obtain the estimated residual values ​​for the corresponding numbered circuit branches; The residual value reflects the degree of deviation between the actual operating state of the circuit branch and the equivalent circuit model, providing a quantitative basis for subsequent fault isolation. Specifically, the Extended Kalman Filter (EKF) is a nonlinear system state estimation algorithm that extends the Kalman filter to nonlinear systems. It is suitable for parameter estimation of nonlinear dynamic systems such as power circuits. When a branch fault occurs, the equivalent parameter estimates output by the EKF will show abnormal deviations (e.g., a sudden drop in equivalent resistance or a sudden change in equivalent inductance). By analyzing the residuals between the predicted voltage and current values ​​and the real-time current and voltage values, the fault characteristics can be reflected, enabling real-time detection and early identification of branch faults. Specifically, taking the Buck circuit as an example, the nonlinear state-space equation can be expressed as: , ,in, Indicates inductor current, Indicates the PWM duty cycle, Indicates capacitor voltage, Indicates input voltage, Indicates load current, Indicates capacitance, Indicates the inductor part; The nonlinear state-space equation, after discretization and first-order Taylor approximation linearization, is input into the Extended Kalman Filter (EKF) model for recursion, and the discrete state equation is established as follows: The measurement equation is ;in, Indicates at time State variables, Indicates in Control input vector at time, Indicates in Time process noise, Indicates in Output observations at all times Indicates in Measurement noise at any given time; generally, process noise can be set to a small value to trust the model prediction, while measurement noise is selected within the range of 0.1% to 1% of the sensor error. The Extended Kalman Filter (EKF) model iterates through prediction and updates in real time during operation. Estimate the residual values, where, Indicates in The estimated residual value at time, Indicates in Time-state variables After mapping function The predicted value obtained; Step 4: Compare the fault confidence level of the corresponding numbered circuit branch with the preset fault confidence level threshold of the corresponding numbered circuit branch, and simultaneously compare the estimated residual value of the corresponding numbered circuit branch with the preset estimated residual value threshold of the corresponding numbered circuit branch, and output the fault signal. Based on the above embodiments, the specific process of outputting a fault signal includes: The fault confidence threshold and the estimated residual value threshold of the corresponding numbered circuit branch are preset. Compare the fault confidence level of the corresponding numbered circuit branch with the preset fault confidence level threshold of the corresponding numbered circuit branch; The estimated residual value of the corresponding numbered circuit branch is compared with the preset estimated residual value threshold of the corresponding numbered circuit branch. A fault signal is output if and only if the fault confidence of the corresponding numbered circuit branch is greater than the preset fault confidence threshold of the corresponding numbered circuit branch and the estimated residual value of the corresponding numbered circuit branch is greater than the preset estimated residual value threshold of the corresponding numbered circuit branch. It should be noted that the dual-threshold collaborative judgment mechanism effectively reduces the probability of misjudgment by a single indicator, achieves high confidence and high reliability detection of branch faults, improves the reliability of the judgment criteria, and avoids possible misjudgment by a single method. Step 5: Receive the fault signal, determine the nature of the fault and locate the fault point based on the virtual fault current and voltage method, and issue a protection signal; Based on the above embodiments, the specific process of determining the nature of a fault and locating the fault point based on the virtual fault current-voltage method includes: Preset virtual fault conditions and add the virtual fault conditions to the equivalent circuit model of the corresponding numbered circuit branch; The virtual fault conditions specifically include: branch short-circuit fault conditions, branch open-circuit fault conditions, ground short-circuit fault conditions, common-mode fault conditions, differential-mode fault conditions, etc. Calculate the virtual fault current and virtual fault voltage values ​​for each numbered circuit branch under multiple virtual fault conditions; The ranges of virtual fault current values ​​and virtual fault voltage values ​​for each numbered circuit branch under virtual fault conditions are obtained. If the real-time current and voltage values ​​of the corresponding numbered circuit branches acquired by the sensor fall within the virtual fault current and virtual fault voltage ranges corresponding to each numbered circuit branch under the virtual fault condition. The corresponding numbered circuit branch is then marked as the faulty circuit branch. Based on the virtual fault conditions, the faulty circuit branch's fault nature and fault location are determined, thereby achieving high-precision fault nature identification and rapid fault location. Specifically, the common-mode fault condition represents the common-mode failure scenario in the equivalent circuit model, assuming a short circuit or ground fault occurs in the bus or common node, and simulating the simultaneous impact of multiple branches. Differential fault condition representation assumes that only a single branch experiences an electrical abnormality (such as branch inductor saturation or switching device failure) in the equivalent circuit model, simulating a local branch fault. Specifically, the virtual fault current-voltage method for determining fault nature and locating fault points overcomes the limitation of the traditional current threshold method in distinguishing fault types, and significantly improves fault nature identification and rapid fault point location in multi-branch energy routing systems. Step 6: Receive the protection signal and activate the three-level protection mechanism to achieve rapid isolation of the fault; Based on the above embodiments, the three-level protection mechanism specifically includes: The first level involves soft shutdown operations performed by the SiC power device drive circuits local to each circuit branch. The second level involves disconnecting the solid-state circuit breakers corresponding to each circuit branch by a preset operation time, which is a few microseconds, to achieve a rapid response. The third level performs power reconfiguration adjustments on the remaining fault-free circuit branches within a preset operating time to ensure that the bus voltage or load power remains stable.

[0025] Specifically, the process of the SiC power device drive circuit performing a soft shutdown operation includes: The soft shutdown operation involves two stages of gate voltage control; The first stage reduces the gate voltage from the drive voltage of 15V to the intermediate level of 5V and maintains it for a preset time to limit the rate of rise of fault current and overvoltage. The second stage further reduces the gate voltage to the turn-off level of 0V to achieve complete turn-off, while limiting the specific threshold range of DESAT (desaturation) detection (7V-10V). It should be noted that after a circuit fault is detected, the gate voltage is not directly reduced to 0V. Instead, the gate voltage is controlled to decrease at a specific slope or step. This is done in order to solve the problems of poor short-circuit withstand capability and high turn-off overvoltage of SiC devices. Specifically, the process of a solid-state circuit breaker performing a disconnection operation includes: By adopting a forced zero-crossing strategy, a reverse current is generated by connecting a parallel LC oscillation branch to cancel the main circuit current, so that the solid-state switch turns off at the moment of current zero crossing, thereby achieving arc-free interruption. Specifically, solid-state circuit breakers consist of anti-parallel thyristors (suitable for AC circuits) or thyristor series chains (for DC circuits). When a fault is confirmed and soft shutdown has been initiated, the main controller issues a circuit breaker operation command. For AC systems, the control strategy is to stop triggering the thyristor gate at the appropriate phase, allowing it to turn off naturally at the zero-crossing point of the AC current. Specifically, after the thyristor is turned on, it needs to be continuously supplied with trigger pulses during each positive half-cycle to maintain conduction. When a fault is detected and disconnection is required, the control logic pauses the provision of triggers, so that the thyristor only conducts until the end of the current AC half-cycle. When the AC current drops and crosses zero, the thyristor automatically turns off, and the line current is opened, thereby isolating the fault. Since the turn-off occurs at the moment the current crosses zero, there is no overvoltage or arc caused by current interruption, which greatly reduces the breaking stress. The control unit monitors the zero-crossing moment of the current in each phase through current sensors to synchronously stop the gate drive, ensuring that all faulty phases are disconnected within one power frequency cycle. For DC systems, since there is no natural zero crossing, a hybrid circuit breaking strategy with forced zero crossing is adopted: an oscillating circuit in the parallel branch generates a current in the opposite direction to the main branch current at the moment of disconnection; for example, an LC oscillating branch and a fast overvoltage detection circuit are connected in parallel across the thyristor circuit breaker. When a fault occurs, the LC branch is quickly switched on, and the pre-charge on the capacitor generates a reverse current through the inductor to offset the main circuit current, causing the thyristor current to drop to zero and turn off. This process occurs within milliseconds. Afterwards, a mechanical switch or other isolation means completely isolate the thyristor from the faulty branch to prevent recurrent restoration. The solid-state circuit breaker design also considers... Reclosing strategy: After fault isolation, the controller can attempt to reclose the thyristor after a waiting period, but the trigger synchronization must follow the zero-crossing principle. In AC mode, a thyristor trigger pulse is sent at the zero-crossing moment to reclose the circuit, avoiding inrush current and grid disturbance. In DC mode, triggering is ensured only under no-current conditions (e.g., waiting for no current in the system or using a pre-charge current-limiting method). Reclosing can only successfully restore power supply when the fault is cleared or the transient fault condition disappears; otherwise, if an abnormality is detected again, the circuit remains disconnected. The entire process is fast and avoids overvoltage and arcing, significantly improving the safety and reliability of circuit fault handling. Specifically, the process of power reconfiguration adjustment for the remaining fault-free circuit branches includes: Obtain the remaining fault-free circuit branches and adjust the PWM duty cycle of the remaining fault-free circuit branches; Introducing virtual impedance control, the form is as follows: The virtual impedance is superimposed on the PWM reference signal to suppress bus voltage fluctuations and dampen system oscillations; Adjusting the virtual impedance component in the PWM reference signal, i.e. and Partially, to obtain the virtual impedance compensation amount; The PWM duty cycle of the remaining fault-free circuit branches is reallocated by the main controller (MCU) and virtual impedance compensation is injected. This enables the restoration of bus voltage and output power balance for the remaining fault-free circuit branches.

[0026] in, Indicates the virtual impedance compensation amount; This represents the resistance of the resistor to the current. Indicates the inductor part; This represents the Laplace transform variable in the complex frequency domain, indicating the frequency response. Specifically, PWM (Pulse Width Modulation) is a technique that adjusts output power by controlling the duty cycle of a signal; It's important to understand that the FPGA is responsible for executing real-time tasks, such as high-frequency sweep signal injection, feature extraction, and synchronous phase-locked loop measurement. It rapidly acquires and processes sensor data such as current and voltage through parallel computing, generating frequency domain features and transmitting them to the MCU. The MCU, on the other hand, is responsible for running the Extended Kalman Filter (EKF) algorithm and joint criterion logic (CNN+EKF) to analyze the feature data transmitted by the FPGA, estimate the system state in real time, and determine if a fault has occurred. When the MCU confirms a fault, it instructs the FPGA to perform a soft shutdown via control signals, triggering the solid-state circuit breaker to disconnect the faulty branch. Simultaneously, the FPGA generates precise control signals based on the MCU's commands, ensuring rapid response and accurate execution. This collaborative mode enables the system to locate faults and take protective measures within microseconds, ensuring stable system operation.

[0027] Example 2 Please see Figure 2 As shown, in another embodiment of the present invention, the present invention also discloses a multi-level fast fault isolation device based on online impedance spectrum identification. The device includes the following modules: feature acquisition module, fault confidence generation module, residual generation module, comparison analysis module, fault location module, and safety protection module. The modules described above are connected via wired and / or wireless means to enable data transmission between them. The feature acquisition module pre-numbers each circuit branch of the multi-branch series-parallel energy router with a preset number label. According to the set periodic frequency band, a set frequency disturbance signal is injected into each numbered circuit branch to obtain the impedance spectrum characteristics of each circuit branch. The fault confidence generation module vectorizes the impedance spectrum characteristics of each numbered circuit branch and inputs them into the trained preset fault identification model to obtain the fault confidence of the corresponding numbered circuit branch. The residual generation module estimates the equivalent parameters of each numbered circuit branch based on the extended Kalman filter model to obtain the estimated residual values ​​of the corresponding numbered circuit branches. The comparison and analysis module compares the fault confidence level of the corresponding numbered circuit branch with the preset fault confidence level threshold of the corresponding numbered circuit branch, and simultaneously compares the estimated residual value of the corresponding numbered circuit branch with the preset estimated residual value threshold of the corresponding numbered circuit branch, and outputs the fault signal. The fault location module receives fault signals, determines the nature of the fault and locates the fault point based on the virtual fault current and voltage method, and issues a protection signal. The safety protection module receives protection signals and activates a three-level protection mechanism to achieve rapid isolation of faults.

[0028] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

[0029] In conclusion, the above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A multi-level fast fault isolation method based on online impedance spectrum identification, characterized in that, The method includes the following steps: Step 1: Number each circuit branch of the multi-branch series-parallel energy router by preset numbering labels, and inject a set frequency disturbance signal into each numbered circuit branch according to the set periodic frequency band to obtain the impedance spectrum characteristics of each circuit branch. Step 2: Vectorize the impedance spectrum characteristics of each circuit branch after numbering and input them into the pre-trained fault identification model to obtain the fault confidence of the corresponding numbered circuit branch. Step 3: Estimate the equivalent parameters of each numbered circuit branch based on the extended Kalman filter model to obtain the estimated residual values ​​of the corresponding numbered circuit branches; Step 4: Compare the fault confidence level of the corresponding numbered circuit branch with the preset fault confidence level threshold of the corresponding numbered circuit branch, and simultaneously compare the estimated residual value of the corresponding numbered circuit branch with the preset estimated residual value threshold of the corresponding numbered circuit branch, and output the fault signal. Step 5: Receive the fault signal, determine the nature of the fault and locate the fault point based on the virtual fault current and voltage method, and issue a protection signal; Step 6: Receive the protection signal and activate the three-level protection mechanism to achieve rapid isolation of the fault.

2. The multi-level fast fault isolation method based on online impedance spectrum identification according to claim 1, characterized in that, The specific process of injecting a set frequency disturbance signal into each numbered circuit branch according to a set periodic frequency band to obtain the impedance spectrum characteristics of each circuit branch includes: Based on the topology of each circuit branch of the multi-branch series-parallel energy router, a preset number label is used to number each circuit branch of the multi-branch series-parallel energy router. The programmable waveform generator built into the FPGA is configured with a periodic frequency band and a set frequency disturbance signal. The programmable waveform generator then injects the set frequency disturbance signal into each numbered circuit branch using the set periodic frequency band. By using the digital phase-locked loop and synchronous detection technology built into the FPGA, the impedance amplitude and impedance phase difference of the voltage and current response at each frequency point of each circuit branch are extracted to construct the impedance spectrum and obtain the impedance spectrum characteristics of each circuit branch.

3. The multi-level rapid fault isolation method based on online impedance spectrum identification according to claim 2, characterized in that, The impedance spectrum characteristics of each circuit branch specifically include: the impedance amplitude and impedance phase difference of the voltage and current in each circuit branch; The set frequency disturbance signal specifically includes a sweep frequency signal that varies continuously in the range of 20kHz to 200kHz.

4. The multi-level fast fault isolation method based on online impedance spectrum identification according to claim 1, characterized in that, The specific process of training the pre-set fault identification model includes: The impedance spectrum characteristics of each circuit branch after obtaining the historical number and the fault confidence of the corresponding numbered circuit branch are used as training data. The training data is divided into training samples, test samples, and validation samples, and a training classifier is constructed. The impedance spectrum features of each circuit branch after historical numbering in the training samples are vectorized to obtain the impedance spectrum feature vector of each circuit branch, and then input into the training classifier. The fault confidence of the corresponding numbered circuit branch in the training samples is used as the output data of the training classifier. The training classifier is trained, and the training classifier extracts the fault type features of the corresponding numbered circuit branches through a convolutional layer; The trained classifier is tested and validated based on test samples and validation samples, and the trained classifier that meets the preset accuracy is output as the preset fault recognition model after training is completed. The impedance spectrum characteristics of each circuit branch after numbering are vectorized and input into the pre-trained fault identification model to obtain the fault confidence of the corresponding numbered circuit branch.

5. The multi-level fast fault isolation method based on online impedance spectrum identification according to claim 4, characterized in that, The training classifier specifically includes one or more of the following: convolutional neural network, support vector machine, and Naive Bayes.

6. The multi-level fast fault isolation method based on online impedance spectrum identification according to claim 1, characterized in that, The process of estimating the equivalent parameters of each numbered circuit branch based on the extended Kalman filter model to obtain the estimated residual values ​​of the corresponding numbered circuit branches includes: An equivalent circuit model is constructed based on the topology of each circuit branch of a multi-branch series-parallel energy router. Obtain the equivalent parameters from the equivalent circuit model and use the equivalent parameters as state variables; An extended Kalman filter model is constructed, and the real-time current and voltage values ​​of the corresponding numbered circuit branches are acquired by sensors as observation data. The state variables are augmented with the observed data to construct an augmented state vector, and a nonlinear state-space equation is constructed based on the augmented state vector. The nonlinear state-space equations are input into the extended Kalman filter model for recursive calculation, and the equivalent parameter estimates of the corresponding numbered circuit branches are output. Substitute the estimated equivalent parameters of the corresponding numbered circuit branches into the equivalent circuit model to calculate the predicted voltage and current values. Calculate the deviations between the real-time current and voltage values ​​and the predicted current and voltage values ​​to obtain the estimated residual values ​​for the corresponding numbered circuit branches.

7. The multi-level fast fault isolation method based on online impedance spectrum identification according to claim 6, characterized in that, The equivalent parameters include: equivalent resistance, equivalent inductance, and equivalent capacitance.

8. The multi-level fast fault isolation method based on online impedance spectrum identification according to claim 1, characterized in that, The specific process of comparing the fault confidence level of the corresponding numbered circuit branch with the preset fault confidence level threshold for the corresponding numbered circuit branch, simultaneously comparing the estimated residual value of the corresponding numbered circuit branch with the preset estimated residual value threshold for the corresponding numbered circuit branch, and outputting the fault signal includes: The fault confidence threshold and the estimated residual value threshold of the corresponding numbered circuit branch are preset. Compare the fault confidence level of the corresponding numbered circuit branch with the preset fault confidence level threshold of the corresponding numbered circuit branch; The estimated residual value of the corresponding numbered circuit branch is compared with the preset estimated residual value threshold of the corresponding numbered circuit branch. A fault signal is output if and only if the fault confidence level of the corresponding numbered circuit branch is greater than the preset fault confidence level threshold of the corresponding numbered circuit branch and the estimated residual value of the corresponding numbered circuit branch is greater than the preset estimated residual value threshold of the corresponding numbered circuit branch.

9. The multi-level fast fault isolation method based on online impedance spectrum identification according to claim 1, characterized in that, The specific process of determining the nature of a fault and locating the fault point based on the virtual fault current-voltage method includes: Preset virtual fault conditions and add the virtual fault conditions to the equivalent circuit model of the corresponding numbered circuit branch; Calculate the virtual fault current and virtual fault voltage values ​​for each numbered circuit branch under multiple virtual fault conditions; The ranges of virtual fault current values ​​and virtual fault voltage values ​​for each numbered circuit branch under virtual fault conditions are obtained. If the real-time current and voltage values ​​of the corresponding numbered circuit branches acquired by the sensor fall within the virtual fault current and virtual fault voltage ranges corresponding to each numbered circuit branch under the virtual fault condition. The corresponding numbered circuit branch is then marked as the faulty circuit branch, and the fault nature and fault location of the faulty circuit branch are located according to the virtual fault conditions.

10. A multi-level fast fault isolation method based on online impedance spectrum identification according to claim 9, characterized in that, The virtual fault conditions specifically include: branch short-circuit fault conditions, branch open-circuit fault conditions, ground short-circuit fault conditions, common-mode fault conditions, and differential-mode fault conditions.

11. The multi-level fast fault isolation method based on online impedance spectrum identification according to claim 1, characterized in that, The three-tiered protection mechanism specifically includes: The first level involves soft shutdown operations performed by the SiC power device drive circuits local to each circuit branch. The second level involves disconnecting the solid-state circuit breakers corresponding to each circuit branch within a preset operation time, which is a few microseconds, to achieve a rapid response. The third level performs power reconfiguration adjustments on the remaining fault-free circuit branches within a preset operating time to ensure that the bus voltage or load power remains stable.

12. The multi-level fast fault isolation method based on online impedance spectrum identification according to claim 11, characterized in that, The specific process of SiC power device drive circuit performing soft shutdown operation includes: The soft shutdown operation involves two stages of gate voltage control; The first stage reduces the gate voltage from the drive voltage of 15V to the intermediate level of 5V and maintains it for a preset time to limit the rate of rise of fault current and overvoltage. The second stage further reduces the gate voltage to the turn-off level of 0V to achieve complete turn-off.

13. The multi-level fast fault isolation method based on online impedance spectrum identification according to claim 11, characterized in that, The process of a solid-state circuit breaker disconnecting a circuit includes: By employing a forced zero-crossing strategy, a reverse current is generated by activating a parallel LC oscillation branch to counteract the main circuit current, thereby enabling the solid-state switch to turn off at the moment the current crosses zero, thus achieving arc-free interruption.

14. The multi-level fast fault isolation method based on online impedance spectrum identification according to claim 11, characterized in that, The specific process of power reconfiguration adjustment for the remaining fault-free circuit branches includes: Obtain the remaining fault-free circuit branches and adjust the PWM duty cycle of the remaining fault-free circuit branches; Introducing virtual impedance control, the form is as follows: The virtual impedance is superimposed on the PWM reference signal to suppress bus voltage fluctuations and dampen system oscillations; Adjusting the virtual impedance component in the PWM reference signal, i.e. and Partially, to obtain the virtual impedance compensation amount; The PWM duty cycle of the remaining fault-free circuit branches is reallocated by the MCU and virtual impedance compensation is injected. To achieve voltage restoration and output power balance of the remaining fault-free circuit branch busbars; in, Indicates the virtual impedance compensation amount; This represents the resistance of the resistor to the current. Indicates the inductor part; This represents the Laplace transform variable in the complex frequency domain, indicating the frequency characteristics.

15. A multi-level fast fault isolation device based on online impedance spectrum identification, employing the multi-level fast fault isolation method based on online impedance spectrum identification as described in any one of claims 1-14, characterized in that, The device includes the following modules: feature acquisition module, fault confidence generation module, residual generation module, comparison and analysis module, fault location module, and safety protection module; The feature acquisition module pre-numbers each circuit branch of the multi-branch series-parallel energy router with a preset number label. According to the set periodic frequency band, a set frequency disturbance signal is injected into each numbered circuit branch to obtain the impedance spectrum characteristics of each circuit branch. The fault confidence generation module vectorizes the impedance spectrum characteristics of each numbered circuit branch and inputs them into the trained preset fault identification model to obtain the fault confidence of the corresponding numbered circuit branch. The residual generation module estimates the equivalent parameters of each numbered circuit branch based on the extended Kalman filter model to obtain the estimated residual values ​​of the corresponding numbered circuit branches. The comparison and analysis module compares the fault confidence level of the corresponding numbered circuit branch with the preset fault confidence level threshold of the corresponding numbered circuit branch, and simultaneously compares the estimated residual value of the corresponding numbered circuit branch with the preset estimated residual value threshold of the corresponding numbered circuit branch, and outputs the fault signal. The fault location module receives fault signals, determines the nature of the fault and locates the fault point based on the virtual fault current and voltage method, and issues a protection signal. The safety protection module receives protection signals and activates a three-level protection mechanism to achieve rapid isolation of faults.

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