Reverse conducting IGBT device and preparation method thereof
By optimizing the structural design of the reverse-conducting IGBT device, the challenges of reliability and dynamic performance adjustment were solved, achieving higher reliability and lower losses, and improving the overall performance of the reverse-conducting IGBT device.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-02-28
- Publication Date
- 2026-04-07
AI Technical Summary
The reliability of reverse-conducting IGBT devices needs to be improved, especially in terms of dynamic performance regulation, reverse recovery current, and switching losses.
By optimizing the structural design of the reverse-conducting IGBT device, including forming multiple spaced gate structures, emitter regions, and second electrode layers in the drift layer, and forming Schottky contacts and ohmic contacts at the interface, combined with the use of a buffer layer and a third electrode layer, the trade-off between the IGBT and the FRD region is adjusted to reduce the forward voltage drop and reverse recovery current.
It improves the reliability and high-temperature operating capability of reverse-conducting IGBT devices, optimizes overall dynamic and static losses, and reduces leakage current and switching losses.
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Figure CN121815683A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of semiconductor technology, and in particular to a reverse-conducting IGBT device and its fabrication method. Background Technology
[0002] The Insulated-Gate Bipolar Transistor (IGBT) combines the advantages of the Giant Transistor (GTR) and the Power MOSFET, exhibiting excellent characteristics and a wide range of applications. An IGBT is a three-terminal device consisting of a gate, collector, and emitter. IGBTs are widely used in new energy vehicles, rail transportation, and power grids.
[0003] The reverse-conducting IGBT (RC-IGBT) combines the advantages of IGBT and FWD (fast recovery diode) into an integrated component to reduce costs and improve heat dissipation performance.
[0004] However, the reliability of reverse-conducting IGBT devices in related technologies needs to be improved. Summary of the Invention
[0005] This application provides a reverse-conducting IGBT device and its fabrication method to address the issue that the reliability of reverse-conducting IGBT devices in related technologies needs to be improved.
[0006] This application provides a reverse-conducting IGBT device, comprising: a drift layer; a first electrode layer; a diode cathode region located between a portion of the drift layer and the first electrode layer; a first doped region located between a portion of the drift layer and the first electrode layer, wherein the arrangement direction of the first doped region and the diode cathode region is perpendicular to the arrangement direction of the drift layer and the first electrode layer, the interface between the first doped region and the first electrode layer forms a Schottky contact, and the interface between the diode cathode region and the first electrode layer forms an ohmic contact; a plurality of spaced gate structures extending from the surface of the drift layer away from the first electrode layer into a portion of the drift layer; an emitter region located in the drift layer between adjacent gate structures; a second electrode layer located in the drift layer between the emitter region and the gate structures, wherein the interface between the second electrode layer and the drift layer located on the side of the emitter region facing the first electrode layer forms a Schottky contact, and the interface between the second electrode layer and the emitter region forms an ohmic contact.
[0007] Optionally, the first doped region and the diode cathode region have the same conductivity type, and the doping concentration of the first doped region is less than the doping concentration of the diode cathode region.
[0008] Optionally, in the arrangement direction parallel to the drift layer and the first electrode layer, the size of the emission region is smaller than the size of the second electrode layer.
[0009] Optionally, in the arrangement direction parallel to the drift layer and the first electrode layer, the size of the emission region is 0.2 micrometers to 0.4 micrometers, and the size of the second electrode layer is 0.3 micrometers to 0.5 micrometers.
[0010] Optionally, it further includes: a third electrode layer located on the side of the emitter region and the second electrode layer opposite to the first electrode layer, the third electrode layer being connected to the second electrode layer and the emitter region, and the third electrode layer being electrically isolated from the gate structure.
[0011] Optionally, it further includes: a buffer layer located between the first electrode layer and the drift layer and between the diode cathode region and the drift layer, wherein the conductivity type of the buffer layer is the same as that of the drift layer, and the doping concentration of the buffer layer is greater than that of the drift layer and less than that of the diode cathode region.
[0012] This application also provides a method for fabricating a reverse-conducting IGBT device, comprising: forming a plurality of spaced gate structures in a drift layer; forming an emitter region and a second electrode layer in the drift layer between adjacent gate structures, the second electrode layer being located between the emitter region and the gate structure; forming a diode cathode region and a first doped region on the back side of the drift layer; forming a first electrode layer on the side of the diode cathode region and the first doped region away from the drift layer, the interface between the first doped region and the first electrode layer forming a Schottky contact, and the interface between the diode cathode region and the first electrode layer forming an ohmic contact; wherein the arrangement direction of the first doped region and the diode cathode region is perpendicular to the arrangement direction of the drift layer and the first electrode layer; wherein the interface between the second electrode layer and the drift layer located on the side of the emitter region facing the first electrode layer forms a Schottky contact, and the interface between the second electrode layer and the emitter region forms an ohmic contact.
[0013] Optionally, it further includes: forming a third electrode layer on the side of the emitter region and the second electrode layer opposite to the first electrode layer, the third electrode layer being connected to the second electrode layer and the emitter region, and the third electrode layer being electrically isolated from the gate structure.
[0014] Optionally, it further includes: forming a buffer layer, the buffer layer being located between the first electrode layer and the drift layer and between the diode cathode region and the drift layer, the conductivity type of the buffer layer being the same as that of the drift layer, and the doping concentration of the buffer layer being greater than that of the drift layer and less than that of the diode cathode region. Attached Figure Description
[0015] Figure 1 This is a schematic diagram of the structure of a reverse-conducting IGBT device in related technologies;
[0016] Figure 2 This is a schematic diagram of the structure of a reverse-conducting IGBT device according to an embodiment of the present invention;
[0017] Figure 3 A schematic diagram showing the current of a reverse-conducting IGBT device in the forward conduction mode;
[0018] Figure 4 A schematic diagram showing the current of a reverse-conducting IGBT device in IGBT off-mode.
[0019] Figure 5 This is a schematic diagram showing the current of a reverse-conducting IGBT device in FRD conduction mode. Detailed Implementation
[0020] Figure 1 This is a schematic diagram of a reverse-conducting IGBT device in related technologies. The reverse-conducting IGBT device connects a fast recovery diode and the IGBT device in anti-parallel, increasing the power density. In the reverse-conducting IGBT device, a P-type collector-doped region 112 and an N-type diode cathode region 111 are respectively located on the back side of the drift layer 130. The back electrode 100 is located on the side of the collector-doped region 112 and the diode cathode region 111 facing away from the drift layer 130. The first well region 150 has an N-type emitter region 152, and the second well region has a P-type diode anode region 171. The reverse-conducting IGBT device has both forward and reverse conduction capabilities. When forward-conducting, the reverse-conducting IGBT device operates in IGBT mode; when reverse-conducting, the reverse-conducting IGBT device operates in FRD mode.
[0021] Research has revealed two challenges in improving the performance of reverse-conducting IGBT devices: First, the dynamic performance adjustment requires simultaneously considering the trade-offs between the IGBT region and the FRD (Fast Recovery Diode) region. For the IGBT region, considering safe operating area and breakdown voltage, a high doping concentration in the well region is desirable. However, from the perspective of the FRD region, a lower anode concentration results in lower reverse recovery losses. This presents a significant contradiction, making the trade-off adjustment difficult. Because the anode of the FRD region is generally formed by the IGBT region's well region, the anode concentration in the diode region of a reverse-conducting IGBT device is significantly higher than that of a conventional FRD. Therefore, the higher anode concentration in the FRD region leads to a higher forward voltage drop (VT) in the FRD region. f The value will be too low, which will result in the maximum reverse recovery current (I) in the FRD region. rm ) and switching losses (E rec The positive voltage drop (V) in the FRD region is too large. How can we minimize the positive voltage drop (V) in the FRD region? f One of the challenges in improving the performance of reverse-conducting IGBT devices is ensuring that the performance of the IGBT region is not affected. Secondly, reverse-conducting IGBT devices require the introduction of lifetime control to reduce the maximum reverse recovery current (If). rm ) and switching losses (E rec This, in turn, causes the on-state voltage drop (V) in the IGBT region. ce The increased risk negatively impacts the overall loss trade-off. These two challenges make it difficult for reverse-conducting IGBT devices to fully leverage the advantages of chip integration, and their reliability needs improvement.
[0022] Based on this, the embodiments of this application provide a reverse-conducting IGBT device and its fabrication method, which improves the reliability of the reverse-conducting IGBT device.
[0023] To enable those skilled in the art to better understand the technical solutions of this disclosure, and to fully understand and implement the process of how this disclosure applies technical means to solve technical problems and achieve corresponding technical effects, the technical solutions in the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this disclosure, not all embodiments. The embodiments of this disclosure and the various features within them can be combined with each other without conflict, and the resulting technical solutions are all within the protection scope of this disclosure. All other embodiments obtained by those skilled in the art based on the embodiments of this disclosure without creative effort should fall within the protection scope of this disclosure.
[0024] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this disclosure are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of this disclosure described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.
[0025] It should be noted that the steps shown in the flowchart in the accompanying drawings can be executed in a computer system such as a set of computer-executable instructions, and although a logical order is shown in the flowchart, in some cases the steps shown or described may be executed in a different order than that shown here.
[0026] One embodiment of this application provides a reverse-conducting IGBT device, referenced... Figure 2 ,include:
[0027] Drift layer 230;
[0028] First electrode layer 200;
[0029] The diode cathode region 211 is located between a portion of the drift layer 230 and the first electrode layer 200;
[0030] The first doped region 212 is located between a portion of the drift layer 230 and the first electrode layer 200. The arrangement direction of the first doped region 212 and the diode cathode region 211 is perpendicular to the arrangement direction of the drift layer 230 and the first electrode layer 200. The interface between the first doped region 212 and the first electrode layer 200 forms a Schottky contact, and the interface between the diode cathode region 211 and the first electrode layer 200 forms an ohmic contact.
[0031] A plurality of spaced gate structures 260 extend from the side surface of the drift layer 230 away from the first electrode layer 200 into a portion of the drift layer 230;
[0032] The emitter region 250 is located in the drift layer 230 between adjacent gate structures 260;
[0033] The second electrode layer 240 is located in the drift layer 230 between the emitter region 250 and the gate structure 260. The interface between the second electrode layer 240 and the drift layer 230 located on the side of the emitter region 250 facing the first electrode layer 200 forms a Schottky contact, and the interface between the second electrode layer 240 and the emitter region 250 forms an ohmic contact.
[0034] In one embodiment, the size of the emission region 250 is smaller than the size of the second electrode layer 240 in the arrangement direction parallel to the drift layer 230 and the first electrode layer 200.
[0035] refer to Figure 3 The reverse-conducting IGBT device is in the forward conduction mode of the IGBT, and the reverse-conducting IGBT device is operating in IGBT mode. Figure 3 The arrowed lines indicate the current direction. The voltage applied to the second electrode layer 240 is less than the voltage applied to the first electrode layer 200, while the voltage applied to the gate structure 260 is greater than the voltage applied to the second electrode layer 240. An electron accumulation layer forms on the sidewalls of the gate structure 260, the emitter region 250 emits electrons, the first doped region 212 injects holes into the drift layer 230, and the second electrode layer 240 receives a small number of holes. Because a Schottky contact is formed at the interface between the first electrode layer 200 and the first doped region 212, the turn-on voltage of the Schottky junction between the first electrode layer 200 and the first doped region 212 is lower than that of a typical PN junction, thus reducing the forward conduction voltage drop of the reverse-conducting IGBT device.
[0036] refer to Figure 4 The reverse-conducting IGBT device is in IGBT off mode. Figure 4The arrows indicate the current direction. The voltage applied to the second electrode layer 240 is less than the voltage applied to the first electrode layer 200, and the voltage applied to the gate structure 260 is less than the voltage applied to the second electrode layer 240. A hole inversion layer is formed on the sidewall of the gate structure 260. Holes are injected into the drift layer 230 by the first doped region 212 and flow into the second electrode layer 240 through the sidewall of the gate structure 260. Since the size of the second electrode layer 240 is larger than the size of the emitter region 250 in the arrangement direction parallel to the drift layer 230 and the first electrode layer 200, that is, the depth of the second electrode layer 240 is greater than the depth of the emitter region 250, the electric field formed by the second electrode layer 240 and the drift layer 230 on both sides of the emitter region 250 will shield electrons and cut off the electron current path, making it difficult for the emitter region 250 to inject electrons into the drift layer 230, thereby causing the reverse-conducting IGBT device to enter the IGBT turn-off mode. Since the potential barrier of the second electrode layer 240 is higher than that of the drift layer 230, the built-in electric field formed by the second electrode layer 240 and the drift layer 230 can shield the electron injection capability of the emitter region 250, thereby putting the reverse-conducting IGBT device in a stable blocking state.
[0037] refer to Figure 5 The reverse-conducting IGBT device is in FRD conduction mode. Figure 5 The arrowed lines indicate the direction of current. The voltage applied to the second electrode layer 240 is greater than the voltage applied to the first electrode layer 200. The second electrode layer 240, the diode cathode region 211, and the drift layer 230 between the second electrode layer 240 and the diode cathode region 211 constitute an FRD (Fast Recovery Diode). The second electrode layer 240 serves as the anode of the fast recovery diode, and the diode cathode region 211 serves as the cathode of the fast recovery diode. The voltage applied to the gate structure 260 is greater than the voltage applied to the emitter region. Holes are injected into the drift layer 230 from the second electrode layer 240, and electrons are injected into the drift layer 230 from the diode cathode region 211. Because the Schottky junction turn-on voltage of the second electrode layer 240 and the drift layer 230 is lower than that of a typical PN junction, the on-state voltage drop of the FRD is reduced.
[0038] In this embodiment, the first doped region 212 and the diode cathode region 211 have the same conductivity type, and the doping concentration of the first doped region 212 is less than the doping concentration of the diode cathode region 211.
[0039] In this embodiment, the gate structure 260 includes a gate dielectric layer 261 and a gate electrode layer 262. The gate dielectric layer 261 surrounds the sidewalls of the gate electrode layer 262 and the side surface of the gate electrode layer 262 facing the first electrode layer 200. The material of the gate dielectric layer 261 includes silicon oxide. The material of the gate electrode layer 262 includes polysilicon.
[0040] In one embodiment, in the arrangement direction parallel to the drift layer 230 and the first electrode layer 200, the size of the emission region 250 is 0.2 micrometers to 0.4 micrometers, for example 0.2 micrometers, 0.3 micrometers or 0.4 micrometers; the size of the second electrode layer 240 is 0.3 micrometers to 0.5 micrometers, for example 0.3 micrometers, 0.4 micrometers or 0.5 micrometers.
[0041] In one embodiment, the material of the first electrode layer 200 includes a metal, such as aluminum.
[0042] In one embodiment, the reverse-conducting IGBT device further includes a third electrode layer 270, which is located on the side of the emitter region 250 and the second electrode layer 240 away from the first electrode layer 200. The third electrode layer 270 is connected to the second electrode layer 240 and the emitter region 250, and is electrically isolated from the gate structure 260.
[0043] The third electrode layer 270 connects the second electrode layer 240 and the emitter region 250. Thus, when the reverse-conducting IGBT device is in FRD conduction mode, the hole injection efficiency of the second electrode layer 240 further decreases, and the forward voltage drop (VFRD) in the FRD region decreases. f The current should not be too low, thus ensuring that the maximum reverse recovery current (I) of the FRD is not too low. rm ) and switching losses (E rec It shouldn't be too big.
[0044] In this embodiment, based on optimizing the overall dynamic and static losses of the reverse-conducting IGBT device, lifetime control can be eliminated, the leakage current of the reverse-conducting IGBT device can be reduced, and its high-temperature operating capability and reliability can be improved.
[0045] In one embodiment, the material of the third electrode layer 270 includes a metal, such as aluminum. In another embodiment, the material of the second electrode layer 240 includes a metal, such as aluminum.
[0046] In one embodiment, the third electrode layer 270 is made of the same material as the second electrode layer 240, and the third electrode layer 270 and the second electrode layer 240 are integrally formed. This simplifies the fabrication process.
[0047] In one embodiment, the material of the third electrode layer 270 is different from the material of the second electrode layer 240.
[0048] In one embodiment, the reverse-conducting IGBT device further includes a buffer layer 220, which is located between the first electrode layer 200 and the drift layer 230, and between the diode cathode region 211 and the drift layer 230. The conductivity type of the buffer layer 220 is the same as that of the drift layer 230, and the doping concentration of the buffer layer 220 is greater than that of the drift layer 230. The doping concentration of the buffer layer 220 is less than that of the diode cathode region 211.
[0049] Furthermore, the doping concentration of the buffer layer 220 is greater than the doping concentration of the first doped region 212.
[0050] In other embodiments, the doping concentration of the buffer layer 220 may be equal to the doping concentration of the first doped region 212, or the doping concentration of the buffer layer 220 may be less than the doping concentration of the first doped region 212.
[0051] In one embodiment, the reverse-conducting IGBT device further includes an insulating isolation layer 290 located between the third electrode layer 270 and the gate structure 260. The insulating isolation layer 290 isolates the third electrode layer 270 and the gate structure 260. The material of the insulating isolation layer 290 includes silicon oxide.
[0052] Another embodiment of this application provides a method for fabricating a reverse-conducting IGBT device, comprising: forming a plurality of spaced gate structures in a drift layer; forming an emitter region and a second electrode layer in the drift layer between adjacent gate structures, the second electrode layer being located between the emitter region and the gate structure; forming a diode cathode region and a first doped region on the back side of the drift layer; forming a first electrode layer on the side of the diode cathode region and the first doped region away from the drift layer, the interface between the first doped region and the first electrode layer forming a Schottky contact, and the interface between the diode cathode region and the first electrode layer forming an ohmic contact; wherein the arrangement direction of the first doped region and the diode cathode region is perpendicular to the arrangement direction of the drift layer and the first electrode layer; wherein the interface between the second electrode layer and the drift layer located on the side of the emitter region facing the first electrode layer forms a Schottky contact, and the interface between the second electrode layer and the emitter region forms an ohmic contact.
[0053] The fabrication method of the reverse-conducting IGBT device further includes: forming a third electrode layer on the side of the emitter region and the second electrode layer away from the first electrode layer, wherein the third electrode layer is connected to the second electrode layer and the emitter region, and the third electrode layer is electrically isolated from the gate structure.
[0054] The fabrication method of the reverse-conducting IGBT device further includes: forming a buffer layer, wherein the buffer layer is located between the first electrode layer and the drift layer and between the diode cathode region and the drift layer, the conductivity type of the buffer layer is the same as that of the drift layer, and the doping concentration of the buffer layer is greater than that of the drift layer and less than that of the diode cathode region.
[0055] The fabrication method of the reverse-conducting IGBT device further includes: forming an insulating isolation layer on the side of the gate structure opposite to the first electrode layer before forming the third electrode layer; and the third electrode layer covering the insulating isolation layer.
[0056] The descriptions of the insulating isolation layer, the third electrode layer, and the buffer layer are the same as those in the foregoing embodiments and will not be repeated here.
[0057] While the embodiments disclosed herein are as described above, the foregoing content is merely for the purpose of facilitating understanding of this disclosure and is not intended to limit this disclosure. Any person skilled in the art to which this disclosure pertains may make any modifications and changes in form and detail of the implementation without departing from the spirit and scope of this disclosure; however, the scope of patent protection of this disclosure shall still be determined by the scope defined in the appended claims.
Claims
1. A reverse-conducting IGBT device, characterized in that, include: Drift layer; First electrode layer; The diode cathode region is located between a portion of the drift layer and the first electrode layer; A first doped region is located between a portion of the drift layer and the first electrode layer. The arrangement direction of the first doped region and the diode cathode region is perpendicular to the arrangement direction of the drift layer and the first electrode layer. The interface between the first doped region and the first electrode layer forms a Schottky contact, and the interface between the diode cathode region and the first electrode layer forms an ohmic contact. Multiple spaced gate structures extend from a side surface of the drift layer away from the first electrode layer into a portion of the drift layer; The emitter region is located in the drift layer between adjacent gate structures; The second electrode layer is located in the drift layer between the emitter region and the gate structure. The interface between the second electrode layer and the drift layer located on the side of the emitter region facing the first electrode layer forms a Schottky contact, and the interface between the second electrode layer and the emitter region forms an ohmic contact.
2. The reverse-conducting IGBT device according to claim 1, characterized in that, The first doped region and the diode cathode region have the same conductivity type, and the doping concentration of the first doped region is less than the doping concentration of the diode cathode region.
3. The reverse-conducting IGBT device according to claim 1, characterized in that, In the arrangement direction parallel to the drift layer and the first electrode layer, the size of the emission region is smaller than the size of the second electrode layer.
4. The reverse-conducting IGBT device according to claim 3, characterized in that, In the arrangement direction parallel to the drift layer and the first electrode layer, the size of the emission region is 0.2 micrometers to 0.4 micrometers, and the size of the second electrode layer is 0.3 micrometers to 0.5 micrometers.
5. The reverse-conducting IGBT device according to claim 1, characterized in that, It also includes: a third electrode layer located on the side of the emitter region and the second electrode layer away from the first electrode layer, the third electrode layer being connected to the second electrode layer and the emitter region, and the third electrode layer being electrically isolated from the gate structure.
6. The reverse-conducting IGBT device according to claim 1, characterized in that, Also includes: A buffer layer is located between the first electrode layer and the drift layer, and between the diode cathode region and the drift layer. The conductivity type of the buffer layer is the same as that of the drift layer, and the doping concentration of the buffer layer is greater than that of the drift layer and less than that of the diode cathode region.
7. A method for fabricating a reverse-conducting IGBT device, characterized in that, include: Multiple spaced gate structures are formed in the drift layer; An emitter region and a second electrode layer are formed in the drift layer between adjacent gate structures, the second electrode layer being located between the emitter region and the gate structure; A diode cathode region and a first doped region are formed on the back side of the drift layer; A first electrode layer is formed on the side of the diode cathode region and the first doped region away from the drift layer. A Schottky contact is formed at the interface between the first doped region and the first electrode layer, and an ohmic contact is formed at the interface between the diode cathode region and the first electrode layer. The arrangement direction of the first doped region and the diode cathode region is perpendicular to the arrangement direction of the drift layer and the first electrode layer. The interface between the second electrode layer and the drift layer located on the side of the emission region facing the first electrode layer forms a Schottky contact, and the interface between the second electrode layer and the emission region forms an ohmic contact.
8. The preparation method according to claim 7, characterized in that, Also includes: A third electrode layer is formed on the side of the emitter region and the second electrode layer opposite to the first electrode layer. The third electrode layer is connected to the second electrode layer and the emitter region, and is electrically isolated from the gate structure.
9. The preparation method according to claim 7, characterized in that, Also includes: A buffer layer is formed between the first electrode layer and the drift layer, and between the diode cathode region and the drift layer. The conductivity type of the buffer layer is the same as that of the drift layer, and the doping concentration of the buffer layer is greater than that of the drift layer and less than that of the diode cathode region.