Gate negative trigger unidirectional thyristor
By introducing a cathode short-circuit point and isolation region structure into the unidirectional thyristor, the triggering of negative signals in the second quadrant is realized, which solves the problem of the traditional unidirectional thyristor being difficult to conduct under negative signals, and improves the reliability and anti-interference capability of the device in complex power grid and harmonic environments.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2026-01-07
- Publication Date
- 2026-04-10
AI Technical Summary
Traditional unidirectional thyristors cannot be triggered to conduct under negative signals in the second quadrant, making them difficult to use in complex waveforms or power grids containing negative signal components, and lacking a negative triggering mechanism.
Design a gate negative trigger unidirectional thyristor. By setting a cathode short-circuit point in the cathode region to form a negative signal coupling path with the gate region, and combining the isolation region and the slot region structure, it can achieve negative signal triggering conduction in the second quadrant and is not easy to conduct in the first quadrant.
Stable triggering of unidirectional thyristors under negative signals in the second quadrant has been achieved, expanding the application range, improving reliability and anti-interference capability in complex power grids and harmonic environments, and reducing trigger current requirements.
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Figure CN121843147A_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to, but is not limited to, the field of unidirectional thyristor technology, and particularly relates to a gate negative trigger unidirectional thyristor. Background Technology
[0002] Traditional unidirectional thyristors (SCRs) are based on a PNPN four-layer structure. Their core triggering mechanism relies on a positive signal in the first quadrant for conduction. Specifically, when the anode (A) is positive and the cathode (K) is negative, a positive voltage is applied to the gate (G) relative to K, forward biasing the gate-cathode PN junction (J3). This activates the positive feedback of the internal bipolar transistor, achieving conduction. In the production and application of unidirectional thyristors (or unidirectional silicon controlled rectifiers), there is a first-quadrant triggering mechanism (i.e., K... - A + (G is a positive signal relative to K). The urgent technical problems that need to be solved in the existing technology are: the core limitation of traditional unidirectional thyristors lies in the unidirectional dependence of the trigger signal, the lack of trigger capability in the second quadrant, and the constraints of structural design on negative triggering, which makes it difficult to apply them in specific negative triggering scenarios.
[0003] Existing technology: Triac (bidirectional thyristor); Triac is a bidirectional thyristor capable of conducting during both positive and negative half-cycles of AC, and its gate can accept either positive or negative trigger signals. The design of Triac allows for triggering conduction in four quadrants (including quadrant 2: anode positive, current positive, gate negative signal).
[0004] Triac's trigger sensitivity in the second and fourth quadrants is significantly lower than in the first and third quadrants. For example, the trigger current requirement in the fourth quadrant is typically the highest, and its resistance to dI / dt (current rise rate) is the worst. This means that even if negative triggering is possible, Triac's triggering behavior in these quadrants remains unstable, limiting its reliability for high-voltage or high-frequency applications.
[0005] For SCR devices that strictly rely on unidirectional conduction, their gates only support positive triggering, making it impossible to trigger conduction using negative signals in the second quadrant. This makes traditional unidirectional SCRs unsuitable for applications with complex waveforms or power grids containing negative signal components, as they lack a negative triggering mechanism.
[0006] CN101587895A discloses a "gate-sensitive triggered unidirectional thyristor chip and its manufacturing method": This chip has a surface-film resistor strip placed between the P-type connection hole and the N⁺ emitter region. One end of this thin-film resistor forms an ohmic contact with the cathode electrode, and the other end forms an ohmic contact with the P-type lead hole. This structure, by adding a resistor between the gate and the cathode, achieves suppression or control of the gate trigger current, thereby improving trigger current consistency and anti-interference capability.
[0007] Although the existing technology enhances trigger consistency, it still only supports positive gate signal triggering and cannot achieve negative triggering conduction under the second quadrant condition (gate is negative relative to cathode). Furthermore, its structure lacks a dedicated area (such as a tank area, cathode short-circuit point, or isolation P-region) to respond to negative polarity signal triggering. This renders the technology ineffective in achieving the "difficult to trigger in the first quadrant, triggerable in the second quadrant" control behavior required by this invention, constituting the key technical gap and breakthrough point addressed by this invention. Summary of the Invention
[0008] To address the problems existing in the prior art, this invention provides a gate negative-triggered unidirectional thyristor, enabling it to operate in the second quadrant (A... + K - (G is a negative signal relative to K) triggers conduction, and at the same time, it is not easy to conduct in the positive triggering scenario in the first quadrant, which meets the application requirements of the negative triggering circuit.
[0009] The present invention is implemented as follows: a gate negative trigger unidirectional thyristor, comprising: a gate region, wherein the gate region is an N+ type semiconductor region; The cathode region is an N+ type semiconductor region. Multiple cathode short-circuit points are arranged in the cathode region in an alternating pattern along a ring array and a radial array to form a uniform current distribution when the anode is positive and the cathode is negative. A trench region or terminal region that surrounds the gate region and the cathode region and is adjacent to the isolation region; The isolation region is located outside the tank region or the terminal region and is a P-type region. The isolation region introduces a reverse potential barrier between the gate region and the cathode region to suppress the positive triggering conduction in the first quadrant. Specifically, the gate region can be triggered to conduct in the second quadrant through the current path formed by the cathode short-circuit point and the isolation region under the action of a negative signal between the gate and the cathode, thereby achieving the working characteristic that it is not easy to trigger in the first quadrant but can be triggered in the second quadrant.
[0010] Furthermore, the gate region is embedded within the area enclosed by the isolation region and forms a PN junction with the isolation region, thereby constituting the electrical boundary for gate triggering.
[0011] Furthermore, the slot area or terminal area adopts a single-sided slot structure, a double-sided slot structure, or a planar terminal structure to improve the electric field distribution.
[0012] Furthermore, the cathode short-circuit points are distributed in an array on the surface of the cathode region, forming a negative signal coupling path through the semiconductor body region and the gate region.
[0013] Furthermore, when the second quadrant is triggered, the negative signal of the cathode region guided by the cathode short-circuit point triggers the small thyristor formed around the gate region. The small thyristor is composed of the gate region N+, the short base region P, the long base region N-, and the anode region P+. After the small thyristor is turned on, its potential approaches the anode potential, thereby triggering the main thyristor to turn on.
[0014] Furthermore, the gate region is formed within the isolation region through ion implantation or high-temperature diffusion processes.
[0015] Furthermore, the isolation region is prepared by epitaxial growth or diffusion processes and is used to block unexpected current leakage.
[0016] This invention provides a method for manufacturing a gate negative-triggered unidirectional thyristor, comprising the following steps: A P-type isolation region is epitaxially grown on the substrate; An N+ gate region is formed within the isolation region using ion implantation or diffusion processes. A trench area or terminal area is formed around the periphery of the isolation zone; A cathode N+ region is formed by doping on the surface of the substrate, and several cathode short-circuit points are prepared within the cathode N+ region.
[0017] Furthermore, the cathode short-circuit point is formed by local ion implantation after the area is defined by photolithography masking, and a potential coupling channel is realized in the subsequent heat treatment process.
[0018] This invention provides an application circuit based on the above-mentioned gate negative trigger unidirectional thyristor. The circuit uses a gate negative signal to trigger the thyristor to conduct in the second quadrant, thereby realizing the switching control of special lines in the power grid containing negative signal components.
[0019] The unidirectional thyristor described in this invention is suitable for power electronic applications requiring second-quadrant triggering, such as DC negative triggering circuits, reverse triggering protection circuits, and asymmetric triggering control systems. It is the first time that a unidirectional thyristor has been achieved with a negative signal triggering in the second quadrant, expanding the application scenarios of negative triggering circuits. Gate N + The design, combined with the cathode short-circuit point, improves negative trigger response efficiency and reliability. The terminal area supports various structures (single-sided / double-sided slots, planar terminals) to adapt to different manufacturing processes and the voltage rating requirements of adapter components (such as 600V, 1200V, etc.), reducing production difficulty.
[0020] This invention enables the use of a negative signal-triggered unidirectional thyristor, overcoming the limitation of traditional SCRs that can only be triggered by the positive gate. This lays the device foundation for the realization of special circuits and novel power control circuits, significantly expanding the application range of unidirectional thyristors. While maintaining traditional conduction characteristics, this device adds a second-quadrant negative triggering mode, providing new solutions for complex power grids, harmonic environments, and specific industrial drive scenarios.
[0021] This invention, a gate-triggered unidirectional thyristor, is the first of its kind proposed in China, filling a long-standing technological gap due to the lack of such devices. This structure achieves a practically feasible negative-triggered conduction mechanism by introducing a short-circuit point in the cathode region to form a negative signal coupling path with the gate region. This meets the industry's urgent need for negative-triggered switching devices in specialized circuit designs, demonstrating significant originality and breakthrough value.
[0022] For a long time, there has been a widespread technical prejudice in the industry that "unidirectional thyristors can only be triggered by a positive gate signal," which has become a consensus in semiconductor power device design. This invention, through structural innovation, supplements and improves the gate triggering method of unidirectional thyristors, and for the first time realizes a device paradigm of negative triggering conduction, breaking through the inherent mindset and providing new ideas for the subsequent development of multi-mode triggered power devices. Attached Figure Description
[0023] Figure 1 This is a perspective view of a common thyristor die provided by existing technology; Figure 2 This is a perspective view of a gate negative-triggered unidirectional thyristor provided in an embodiment of the invention; Figure 3 This is a cross-sectional view of a conventional unidirectional thyristor (single mesa glass passivation) provided by existing technology; Figure 4 This is a cross-sectional view of a unidirectional thyristor (single mesa glass passivation) provided in an embodiment of the invention; In the diagram: 1. Cathode region N + 1. Zone; 2. Tank or terminal zone; 3. Cathode zone short circuit point; 4. Isolation zone (P zone); 5. Gate zone (G zone, N zone) + 6. Gate region P region. Detailed Implementation
[0024] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention.
[0025] In existing industrial applications, thyristors are widely used as power electronic devices in AC voltage regulation, motor drives, rectification control, and power transmission systems. However, traditional unidirectional thyristors mainly rely on positive gate triggering. Under certain operating conditions, such as complex loads or power grid fluctuations, the sensitivity of positive signal triggering is insufficient, easily leading to triggering failures or false triggering, thus affecting the reliability of the device and the accuracy of power control. Especially in high-voltage, high-current applications, the positive signal triggering method in gate region 5 has limited anti-interference capabilities, and the industry urgently needs to improve the structure to achieve more stable conduction control.
[0026] This invention solves the problem of triggering difficulties in traditional devices operating in the second quadrant by introducing a gate negative triggering mechanism. Specifically, in terms of structural design, a cathode short-circuit point 3 is arranged within the cathode region 1, enabling the formation of an effective potential coupling path when the gate input is a negative signal relative to the cathode. This design utilizes the local negative potential of the cathode to reverse bias and control the PN junction formed by the gate region 5 and the isolation region 4 at the semiconductor physics level, extending the triggering action from a single direction to dual-quadrant operation, thereby expanding the application boundaries of the device. This method not only enhances the adaptability to complex current waveforms but also improves the triggering consistency of the device under high-frequency and impact conditions.
[0027] Its working principle can be explained as follows: Under the action of a negative signal, the cathode short-circuit point 3 induces the conduction of the small thyristor around the gate region 5. This small thyristor is composed of the gate region N+5, the short base region P, the long base region N-, and the anode P+, and it first enters the conducting state, forming a local current channel. Subsequently, this local channel gradually raises the potential distribution in the main structure, causing the PNPN four-layer structure of the main thyristor, composed of the cathode region 1, the short base region P, the long base region N-, and the anode region, to reach the critical conduction condition, thereby realizing the rapid conduction of the entire thyristor. This dual-layer triggering mechanism not only improves the reliability of the device but also effectively reduces the trigger current requirement.
[0028] In terms of manufacturing process, this invention utilizes ion implantation or high-temperature diffusion technology to form a gate N+ region 5 within the isolation region 4, and achieves doping control through the epitaxial or diffusion process of the trench region or terminal region 2 and the isolation region 4. The isolation region 4, formed through epitaxial growth or diffusion, can suppress parasitic leakage current generation, ensuring the stability of the device under high voltage. This synergistic optimization of process and structural design enables the device to possess higher breakdown voltage and lower leakage current characteristics in high-power applications, meeting the industry's requirements for high-reliability power devices.
[0029] At the application level, this technical solution has significant advantages in high-voltage rectification, AC voltage regulation, and DC transmission systems, and is particularly suitable for applications requiring dual-quadrant triggering capabilities. Because the cathode short-circuit point 3, combined with the negative signal triggering method of the gate region 5, effectively utilizes the negative signal components present in the system waveform, the device exhibits stronger stability and anti-interference capabilities in environments with high grid harmonics or frequent voltage fluctuations. Simultaneously, the reduced gate current triggering requirement also alleviates the design complexity and power consumption burden of the external drive circuitry.
[0030] This invention innovatively introduces a negative triggering path at the structural levels of cathode region 1, gate region 5, isolation region 4, and trench region or terminal region 2, achieving a dual-quadrant triggering capability that traditional thyristors cannot possess. This solves the technical problems of insensitive triggering and insufficient adaptability to high operating conditions in the industry. This solution not only optimizes the device's working mechanism but also provides a more reliable semiconductor switch selection for high-power electronic control systems, demonstrating significant industrial application value and engineering promotion significance.
[0031] like Figure 2 As shown, this invention overcomes the trigger quadrant limitation through structural innovation and provides a gate negative-triggered unidirectional thyristor, the specific design of which is as follows: Gate region: using N + The P-type semiconductor region (replacing the traditional P-type gate) forms a PN junction with the short base region P-region, providing an electrical boundary for the negative signal triggering of the small thyristor and changing the potential coupling characteristics between the gate and the cathode.
[0032] Cathode region: N + It has a semiconductor region and a cathode short-circuit point for guiding negative signal transmission.
[0033] Isolation region: A P-type semiconductor region located outside the trench region or terminal region, providing electrical isolation. It is used only to achieve electrical isolation between the gate region, cathode region, and external circuits, and does not participate in the conduction process of the small thyristor or main thyristor.
[0034] The slot or terminal area surrounds the gate and cathode regions; it supports single-sided slot, double-sided slot, or planar terminal structures to optimize the electric field distribution at the device edge.
[0035] Triggering characteristics differences Quadrant 1 (A) + K - (G is a positive signal relative to K) Gate region (N) + Type) and cathode region (N) + Due to the semiconductor characteristics of the type, it is difficult to form a positive bias trigger current between the gate and cathode, the positive feedback of the internal bipolar transistor cannot be started, and the device is not easy to conduct.
[0036] Quadrant 2 (A)+ K - (G is a negative signal relative to K) Negative signal transmission: The negative signal in the cathode region is applied to the gate region through the short-circuit point; Small thyristor triggering: A small thyristor formed around the gate region (by the gate region N) + Short base region P region, long base region N region - Zone, anode zone P + (The structure) is triggered to conduct; Main thyristor conduction: After the small thyristor is turned on, its potential approaches that of the anode (positive potential), forming a positive signal relative to the gate, which triggers the PNPN structure of the main thyristor to enter positive feedback conduction.
[0037] This invention provides a method for fabricating a gate-negative triggered unidirectional thyristor, comprising: Gate region: N-type is formed within the P-type isolation region through ion implantation / high-temperature diffusion. + A specific region is used to ensure clear PN junction boundaries.
[0038] Cathode short circuit point: formed by photolithography / etching on the cathode N + Short-circuit points are prepared in the region to construct negative signal coupling paths.
[0039] Isolation region: A P-type isolation region is prepared by diffusion to block unexpected current leakage.
[0040] Terminal area: Processed into single-sided groove, double-sided groove or planar terminal, the edge electric field is controlled to improve the pressure resistance.
[0041] Anode area: P-type area on the back of the die.
[0042] Short base region: Located below the K region, it usually diffuses together with the back P region to form.
[0043] Long base region: Located between the K region and the anode region, it is usually the same as the substrate concentration and doping type.
[0044] 2. Work Process Analysis (1) Quadrant 1 (A) + K - (G is a positive signal relative to K) Gate (N) + ) and cathode (N + Due to the mismatch between semiconductor types, the main thyristor can only be triggered after the gate PN junction breakdown voltage is exceeded. The trigger current is difficult to generate, and the main thyristor is not easy to conduct or does not conduct.
[0045] (2) Quadrant 2 (A) + K - (G is a negative signal relative to K) Negative signal transmission: The cathode negative signal acts on the gate region through the short-circuit point, causing the PN junction of the gate N+ and the short base region P to be forward biased, which indirectly causes the PN junction (J2) of the short base region P and the base region N to be forward biased.
[0046] Triggering of a small thyristor: Short base region P (base), long base region N - Region (collector), anode P + (Emitter) and Gate N + The trigger electrode forms a small thyristor, and J2 (the PN junction formed by the short base region P and the long base region N) is forward biased to start its conduction.
[0047] Main thyristor conduction: After the small thyristor is turned on, the gate potential approaches the anode (positive potential), forming a positive signal relative to the cathode, which triggers the positive feedback conduction of the main thyristor PNPN structure.
[0048] This invention is specifically applied to low-frequency AC switching or phase control functions, with a negative trigger signal. Voltage: 600-1200V; Current: 1-40 Ampers; Trigger current: 0.1-50mA.
[0049] Example 1: DC Negative Trigger Control Circuit This gate-triggered unidirectional thyristor is used in a 600V / 10A DC negative trigger control circuit to achieve DC circuit on / off control triggered by a negative signal.
[0050] In the circuit, the thyristor anode A is connected to the positive terminal of the DC power supply, and the cathode K is connected to the negative terminal of the DC power supply (satisfying the A+ and K- conditions). When the circuit needs to be turned on, a negative signal relative to the cathode is applied to the gate G (trigger current range 0.1-50mA). This triggers the small thyristors around the gate region (from the gate N...). + Short base region P, base region N, anode P + (Construction) Conduction. After the small thyristor is turned on, its potential approaches the positive potential of the anode, forming a positive signal relative to the gate. This further triggers the PNPN structure of the main thyristor to enter positive feedback conduction, realizing the conduction control of the circuit.
[0051] When a signal that is positive relative to the cathode is applied to the gate (quadrant 1 scenario), since both the gate region and the cathode region are N... + This type of transistor cannot form a forward-biased PN junction, so no trigger current is generated, and the main thyristor is not easy to conduct, thus avoiding false triggering by positive signals.
[0052] Example 2: Reverse Trigger Protection Circuit This thyristor is used in a 1200V / 20A reverse trigger protection circuit to quickly trigger conduction through a negative signal to achieve the protection function when the circuit malfunctions.
[0053] In the circuit, a thyristor is connected in series in the power electronic circuit to be protected. The anode A is connected to the circuit input terminal (positive potential), and the cathode K is connected to the circuit output terminal (negative potential). When the circuit detects an overvoltage anomaly, the protection system outputs a negative trigger signal (trigger current 5mA) with a relative cathode voltage of -3V to the gate G. The negative signal is transmitted to the gate region through regularly distributed cathode short-circuit points. The triggering process is the same as in Example 1: the small thyristor conducts first, which in turn drives the main thyristor to conduct, short-circuiting the circuit to limit the overvoltage and achieve the protection function.
[0054] In this scenario, the thyristor in the first quadrant (positive gate signal) has both the gate and cathode at N-axis. + The design is not easily conductive, ensuring that positive signals will not falsely trigger protection actions during normal operation, and only responding to negative trigger signals, thus meeting the specific requirements of reverse trigger protection.
[0055] The gate negative-triggered unidirectional thyristor provided in this embodiment of the invention includes: 1. Material sheet: N-type, 111 crystal orientation, resistivity: 25-35Ω`cm, sheet thickness 210-240um; 2. Cleaning: Use solution #3, solution #1, and solution #2. 3. Primary oxidation: Oxide layer thickness 1.6µm; 4. Photolithography in the isolation zone; 5. Cleaning: Use solution #3, solution #1, and solution #2. 6. Boron pre-expansion in the isolation zone: boron latex source or BBr3, cube: 2-5Ω / □; 7. Cleaning: Use hydrofluoric acid to remove BSG from the surface; use solution No. 3, solution No. 1, and solution No. 2; 8. Boron-based expansion in the isolation zone: generally 1270-1286℃, nitrogen and oxygen gases; time: 100-160h; 9. Cleaning: Rinse the surface oxide layer with hydrofluoric acid, using solution No. 3, solution No. 1, and solution No. 2; 10. Pre-expansion of dilute boron: boron latex source, 70-80Ω / □ (square). 11. Cleaning: Rinse the surface oxide layer with hydrofluoric acid, using solution No. 3, solution No. 1, and solution No. 2; 12. Light boron oxidation: 180-220Ω / hole (square), 13. Cleaning: Rinse the surface oxide layer with hydrofluoric acid, using solution No. 3, solution No. 1, and solution No. 2; 14. Dilute boron primary expansion: Temperature 1255℃, gas nitrogen and oxygen; Time: 32h; Block size 130-170Ω / hole. 15. Remove the surface oxide layer; 16. Pre-expansion with concentrated boron: boron latex source or BBr3, cube: 2-7Ω / □; 17. Oxidation: Oxidation layer thickness 1.6µm; 18. Photolithography of the cathode region (photolithography of the gate cathode region and the normal cathode region) 19. Cleaning: Solution No. 3, Solution No. 1, Solution No. 2; 20. Phosphorus pre-expansion: Block: 0.8~1.0Ω / □; 21. Cleaning: Rinse off PSG with hydrofluoric acid, using solution No. 3, solution No. 1, and solution No. 2; 22. Phosphorus main expansion: The main expansion temperature and time are determined according to the IGT requirements, generally between 1200-1255℃, with nitrogen, hydrogen, and oxygen gases; time: 1-6 hours. 23. Groove area photolithography.
[0056] Example 1
[0057] In one specific structure, the cathode region 1 is fabricated as a large-area N+ doped region with multiple cathode short-circuit points 3 uniformly distributed on its surface. These short-circuit points are formed into a regular array through a doping window process to ensure that negative signals can be efficiently coupled and conducted within the cathode region 1. The gate region 5 is embedded in the region enclosed by the isolation region 4, which is a P-type epitaxial layer. The isolation region 4 achieves a deep boundary through high-temperature diffusion, ensuring that the current flows only in the designed path during gate triggering and avoiding unexpected leakage.
[0058] When operating conditions in the second quadrant are applied externally, the potential change at the cathode short-circuit point 3 is directly coupled to the periphery of the gate region 5, triggering the conduction of the small thyristor structure. As the path formed by the gate region N+, short base region P, long base region N-, and anode P+ of the small thyristor conducts first, the PNPN structure of the main thyristor, formed by the cathode region 1 and other base and anode regions, is guided to conduct as a whole, achieving fast and stable switching action.
[0059] Example 2
[0060] In another structure, the trench region or terminal region 2 adopts a single-sided trench structure, distributed around the cathode region 1 and the gate region 5, to reduce the edge electric field concentration effect. A potential buffer zone is formed between the terminal region 2 and the isolation region 4, improving the edge breakdown voltage of the device under high voltage operation. This design is particularly suitable for high-voltage direct current transmission systems, ensuring stable operation of the device under long-term high-current impact.
[0061] During operation, terminal region 2 limits edge current leakage, and isolation region 4 further blocks unnecessary parasitic currents, ensuring that the gate negative signal can effectively trigger the thyristor. Through this structural combination, the device exhibits higher reliability and stronger electric field distribution uniformity in power transmission scenarios.
[0062] Example 3
[0063] In terms of manufacturing process, the gate region 5 can be formed inside the isolation region 4 by ion implantation. This method uses a high-energy ion beam to implant N-type impurities into the P-type isolation region 4, forming a doping profile with both deep and shallow junctions. This process can strictly control the junction depth, making it suitable for the fabrication of medium- and high-voltage devices and ensuring the uniformity and reliability of the PN junction.
[0064] In the device formed by this process, the cathode short-circuit point 3 is regularly distributed through photolithography and local doping, and interacts with the gate region 5 to form a complete negative triggering path. When a negative signal in the second quadrant is applied, the triggering process is sensitive and consistent, making it particularly suitable for industrial rectifier systems with frequent start-stop cycles.
[0065] Example 4
[0066] Another manufacturing method involves using epitaxial growth to prepare the isolation region 4, and then forming the gate region 5 within it through high-temperature diffusion. The epitaxial layer ensures the overall lattice continuity of the device, reduces defect density, and thus improves the breakdown voltage level of the device. High-temperature diffusion can form a uniform N+ gate region over a large area, meeting the requirements of high-power applications.
[0067] In this structure, the slot region 2 adopts a double-sided slot form, which allows the electric field to be doubly dispersed in both the longitudinal and lateral directions. Combined with the distribution of the cathode short-circuit point 3, the device can still maintain a low trigger current in high-frequency environments, making it suitable for applications such as motor speed regulation and AC voltage regulation systems.
[0068] Example 5
[0069] In one application-optimized design, the short-circuit points 3 inside the cathode region 1 are arranged in a honeycomb pattern rather than a simple linear array. This arrangement further improves the uniformity of signal coupling. The gate region 5 is located in the central area of the isolation region 4, with a clear electrical boundary, more concentrated trigger response, and avoids edge effect interference.
[0070] When the device is applied to industrial power grids containing numerous harmonics, the honeycomb-shaped distribution of cathode short-circuit points 3 ensures that the gate region 5 is uniformly triggered under negative signals, resulting in more stable overall device conduction. This optimized design improves power quality control accuracy and extends system lifespan.
[0071] Example 6
[0072] In a structural design to enhance anti-interference capabilities, the isolation region 4 between the gate region 5 and the cathode region 1 is formed by thickening the epitaxial layer and supplemented by a multi-field plate structure, which effectively improves the device's ability to suppress electromagnetic interference. The cathode short-circuit points 3 are intentionally distributed with unequal spacing during layout to avoid current concentration on a specific path.
[0073] When operating under high-frequency impact and strong interference environments, this structure exhibits a more dispersed current distribution when a negative signal triggers the gate region 5 through short-circuit point 3, reducing local hot spots and improving the overall device's anti-interference capability and reliability. This design is particularly suitable for applications in rail transit power systems and aviation power control systems.
[0074] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any modifications, equivalent substitutions, and improvements made by those skilled in the art within the scope of the technology disclosed in the present invention, and within the spirit and principles of the present invention, should be covered within the scope of protection of the present invention.
Claims
1. A gate-negative triggered unidirectional thyristor, characterized in that, include: Gate region, wherein the gate region is an N+ type semiconductor region; The cathode region is an N+ type semiconductor region. Multiple cathode short-circuit points are arranged in the cathode region in an alternating pattern along a ring array and a radial array to form a uniform current distribution when the anode is positive and the cathode is negative. A trench region or terminal region that surrounds the gate region and the cathode region and is adjacent to the isolation region; The isolation region is located outside the tank region or the terminal region and is a P-type region. The isolation region introduces a reverse potential barrier between the gate region and the cathode region to suppress the positive triggering conduction in the first quadrant. In this configuration, the gate region can be triggered to conduct in the second quadrant through the current path formed by the cathode short-circuit point and the isolation region under the influence of a negative signal between the gate and the cathode. This achieves the working characteristic that it is not easy to trigger in the first quadrant but can be triggered in the second quadrant.
2. The gate negative-triggered unidirectional thyristor according to claim 1, characterized in that, The gate region is embedded within the area enclosed by the isolation region and forms a PN junction with the isolation region, thereby constituting the electrical boundary for gate triggering.
3. The gate negative-triggered unidirectional thyristor according to claim 1, characterized in that, The slot area or terminal area adopts a single-sided slot structure, a double-sided slot structure, or a planar terminal structure to improve the electric field distribution.
4. The gate negative-triggered unidirectional thyristor according to claim 1, characterized in that, The cathode short-circuit points are distributed in an array on the surface of the cathode region, forming a negative signal coupling path through the semiconductor body region and the gate region.
5. The gate negative-triggered unidirectional thyristor according to claim 1, characterized in that, When the second quadrant is triggered, the negative signal of the cathode region guided by the cathode short-circuit point triggers the small thyristor formed around the gate region. The small thyristor is composed of the gate region N+, the short base region P, the long base region N-, and the anode region P+. After the small thyristor is turned on, its potential approaches the anode potential, thereby triggering the main thyristor to turn on.
6. The gate negative-triggered unidirectional thyristor according to claim 1, characterized in that, The gate region is formed within the isolation region through ion implantation or high-temperature diffusion processes.
7. The gate negative-triggered unidirectional thyristor according to claim 1, characterized in that, The isolation region is prepared by epitaxial growth or diffusion processes and is used to block unexpected current leakage.
8. A method for manufacturing a gate negative-triggered unidirectional thyristor, characterized in that, Includes the following steps: A P-type isolation region is epitaxially grown on the substrate; An N+ gate region is formed within the isolation region using ion implantation or diffusion processes. A trench area or terminal area is formed around the periphery of the isolation zone; A cathode N+ region is formed by doping on the surface of the substrate, and several cathode short-circuit points are prepared within the cathode N+ region.
9. The manufacturing method according to claim 8, characterized in that, The cathode short-circuit point is formed by local ion implantation after the area is defined by photolithography masking, and a potential coupling channel is realized in the subsequent heat treatment process.
10. An application circuit based on the gate negative trigger unidirectional thyristor of claim 1, characterized in that, The circuit uses a negative gate signal to trigger the thyristor to conduct in the second quadrant, thereby realizing the switching control of special lines in the power grid containing negative signal components.
Citation Information
Patent Citations
Gate pole sensitive triggering unidirectional thyristor chip and preparation method thereof
CN101587895A