Preparation method of circuit board with metalized half holes and side surface interconnection ceramic substrate

Abstract

The invention provides a preparation method of a circuit board with metalized half holes and a side surface interconnection ceramic substrate, and relates to the technical field of ceramic processing. The preparation method of the circuit board with the metalized half holes comprises the following steps: preparing a plurality of first through holes in a ceramic substrate; metalizing the front and back surfaces of the ceramic substrate to form a plurality of metalized through holes; performing secondary punching on all the metalized through holes to obtain a ceramic substrate comprising a plurality of second through holes; wherein the second through hole comprises two arc-shaped half holes, and the two arc-shaped half holes are in metal-free connection; preparing an outer circuit and a solder mask layer on the ceramic substrate comprising the plurality of second through holes to obtain a transition ceramic substrate; and based on the positions of the two arc-shaped half holes in the second through hole, cutting the transition ceramic substrate to obtain the circuit board containing the metalized half holes. According to the invention, the preparation difficulty of the metalized half hole can be reduced, and the yield is high.

Description

Technical Field

[0001] This invention relates to the field of ceramic processing technology, and in particular to a method for manufacturing a circuit board with metallized half-holes and a ceramic substrate for side interconnection. Background Technology

[0002] With the rapid development of electronic technology, electronic products are moving towards miniaturization, portability, multifunctionality, high integration, and high reliability. As the core material for chip packaging, the packaging substrate protects, fixes, and supports the chip, enhancing its thermal conductivity and heat dissipation performance. Furthermore, the upper layer of the packaging substrate connects to the chip, and the lower layer connects to the printed circuit board, thus achieving electrical and physical connections and facilitating communication between the chip's internal and external circuits.

[0003] DPC ceramic substrates utilize semiconductor microfabrication technology and surface copper plating processes, offering advantages such as high pattern precision, excellent thermal conductivity, and vertical interconnect capability. Castle-type side-interconnect DPC ceramic substrates are soldered to the PCB board and component leads via side-metallized half-holes.

[0004] In related technologies, the method for preparing metallized half-holes involves first drilling a circular hole on a board, then performing processes such as copper plating, pattern electroplating, film removal, and etching on the circular hole, and finally milling off half of the circular hole to create a half-hole. However, the inventors discovered that in the process of preparing circuit boards with metallized half-holes, the milling cutter needs to be operated repeatedly, resulting in large operational errors. This can easily lead to problems such as milling through the copper foil on the hole wall and milling the half-hole off-center, resulting in a low yield of half-holes. Summary of the Invention

[0005] This invention provides a method for fabricating a circuit board with metallized half-holes and a ceramic substrate for side interconnection, in order to solve the problems of complex fabrication processes and low yield of current metallized half-holes.

[0006] In a first aspect, embodiments of the present invention provide a method for manufacturing a circuit board with metallized half-holes, comprising: Multiple first through holes are fabricated on a ceramic substrate; The front and back sides of the ceramic substrate are metallized to form multiple metallized through holes; All metallized vias are drilled a second time to obtain a ceramic substrate containing multiple second vias; wherein, each second via includes two arc-shaped half-holes, and there is no metal connection between the two arc-shaped half-holes; An outer layer circuit and a solder resist layer are fabricated on the ceramic substrate containing multiple second through holes to obtain a transition ceramic substrate. Based on the positions of the two arc-shaped half-holes in the second through hole, the transition ceramic substrate is cut to obtain a circuit board containing metallized half-holes.

[0007] In one possible implementation, the first through hole is a rounded rectangle; The process involves secondary drilling of all metallized vias to obtain multiple second vias, including: Multiple second through holes are obtained by drilling holes based on preset through holes on the two long sides of all the metallized through holes; wherein the preset through holes overlap with the long sides of the metallized through holes, so that the metal layer in the overlapping area is removed and there is no metal connection between the two arc-shaped half holes.

[0008] In one possible implementation, the preset through hole is a square hole or a rectangular hole, and the area where the long side of the preset through hole overlaps with the metallized through hole is adjacent to the arc-shaped half hole.

[0009] In one possible implementation, the step of cutting the transition ceramic substrate based on the positions of the two arc-shaped half-holes in the second through-hole to obtain a circuit board containing metallized half-holes includes: Using a grinding wheel cutter, cut along the straight edge between the two arc-shaped half-holes in the second through hole to obtain a circuit board containing metallized half-holes.

[0010] In one possible implementation, the width of the grinding wheel cutter is consistent with the length of the straight side between the two arc-shaped semi-holes in the second through hole.

[0011] In one possible implementation, after obtaining the circuit board containing the metallized half-holes, the process further includes: The cut surface is sandblasted. The sandblasted circuit board is then treated to protect its surface.

[0012] In one possible implementation, before forming the solder resist layer on the ceramic substrate, the method further includes: The ceramic substrate is subjected to sandblasting.

[0013] In one possible implementation, the step of fabricating an outer layer circuit and a solder mask layer on the ceramic substrate containing a plurality of second through-holes to obtain a transition ceramic substrate includes: A photosensitive dry film is coated on the ceramic substrate containing multiple second through holes; The ceramic substrate covered with a photosensitive dry film is exposed and developed to expose the area of ​​the pattern to be electroplated on the ceramic substrate. After copper plating is performed on the electroplated pattern area, the dry film is removed. A solder resist layer is prepared on a ceramic substrate after the dry film is removed.

[0014] In one possible implementation, removing the dry film after copper plating the electroplated pattern area includes: The copper-plated ceramic substrate is then ground and leveled. Remove the dry film.

[0015] In a second aspect, embodiments of the present invention provide a side-interconnect ceramic substrate, including a ceramic substrate, conductive lines disposed on the ceramic substrate, and a metallized half-hole penetrating the ceramic substrate, wherein the metallized half-hole is fabricated based on the circuit board fabrication method with metallized half-hole as described in any one of the first aspects.

[0016] This invention provides a method for fabricating a circuit board with metallized half-holes. First, multiple first through-holes are fabricated on a ceramic substrate, and the front and back sides of the ceramic substrate are metallized to form multiple metallized through-holes. To form arc-shaped half-holes, all metallized through-holes require secondary drilling. Furthermore, to prevent the metal connecting the arc-shaped half-holes from lifting during the cutting of the second through-holes, the secondary drilling process for all metallized through-holes not only forms two arc-shaped half-holes but also ensures that the metal between the two arc-shaped half-holes is disconnected, thus preventing metal lifting during the final cutting process. Additionally, to enable electrical connection between the fabricated multiple second through-holes, an outer layer circuitry and a solder mask layer are fabricated on the ceramic substrate containing the multiple second through-holes, resulting in a transition ceramic substrate. After preparing the transition ceramic substrate, it can be cut according to the positions of the two arc-shaped half-holes in the second through-holes to obtain a circuit board containing metallized half-holes. This invention improves the fabrication efficiency and yield of metallized half-hole circuit boards by performing secondary drilling on the metallized through-holes. Attached Figure Description

[0017] Figure 1 This is a schematic diagram of the fabrication method of a metallized half-hole circuit board provided in an embodiment of the present invention; Figure 2 This is a schematic diagram of the structure of the first through hole provided in an embodiment of the present invention; Figure 3 This is a schematic diagram of the structure of the second through hole provided in an embodiment of the present invention; Figure 4 This is a three-dimensional structural schematic diagram of the second through hole provided in an embodiment of the present invention. Detailed Implementation

[0018] The present application will be described more clearly below with reference to specific embodiments. These embodiments will help those skilled in the art to further understand the function of the present application, but do not limit the present application in any way. It should be noted that those skilled in the art can make several modifications and improvements without departing from the concept of the present application. These all fall within the protection scope of the present application.

[0019] It should be understood that, when used in this application specification and the appended claims, the term "comprising" indicates the presence of the described features, integrals, steps, operations, elements and / or components, but does not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components and / or a collection thereof.

[0020] It should also be understood that the term “and / or” as used in this application specification and the appended claims means any combination of one or more of the associated listed items and all possible combinations, and includes such combinations.

[0021] In the description of this application and the appended claims, the terms "first," "second," "third," etc., are used only to distinguish descriptions and should not be construed as indicating or implying relative importance.

[0022] References to "one embodiment" or "some embodiments" as described in this specification mean that one or more embodiments of this application include a specific feature, structure, or characteristic described in connection with that embodiment. Therefore, the phrases "in one embodiment," "in some embodiments," "in other embodiments," "in still other embodiments," etc., appearing in different parts of this specification do not necessarily refer to the same embodiment, but rather mean "one or more, but not all, embodiments," unless otherwise specifically emphasized. The terms "comprising," "including," "having," and variations thereof mean "including but not limited to," unless otherwise specifically emphasized.

[0023] Furthermore, the term "multiple" mentioned in the embodiments of this application should be interpreted as two or more.

[0024] First, the terms used in the embodiments of this application will be explained: DPC stands for Direct Plating Copper, referring both to the ceramic circuit fabrication process of direct copper plating and the direct copper-plated ceramic substrates produced using this process. This process uses ceramic substrates such as aluminum nitride and alumina as the substrate material. The core of the process involves fabricating circuits through sputtering, photolithography, and electroplating. The specific steps generally involve drilling and cleaning the ceramic substrate, depositing a metal seed layer using magnetron sputtering, followed by photolithography to shape the circuitry, and finally electroplating to thicken the circuitry and complete surface treatment, thus achieving a high-precision bond between the ceramic and copper layers. DPC ceramic substrates produced using this process feature high circuit precision, good surface flatness, and excellent thermal conductivity.

[0025] DPC ceramic substrate: Using thin film metallization and electroplating process technology, metal lines are first fabricated on the ceramic substrate by image transfer, and then high-density double-sided wiring and vertical interconnect structure are formed by electroplating technology, so as to achieve high-precision bonding between ceramic and metal.

[0026] Castle-type side-interconnect DPC ceramic substrate: This is a direct copper-plated ceramic substrate with a unique structure. Through an electroplating thickening process, a metal dam with a height of 0.6-1.2mm is directly constructed on the ceramic substrate, forming a three-dimensional chamber structure resembling a castle. It is soldered to the PCB board and component leads via side-metallized half-holes.

[0027] Metallized half-holes: also known as half-holes or stamp holes, are a special conductive connection structure at the edge of electronic substrates. In high-precision packaging substrates such as castle-type side interconnect DPC ceramic substrates, they are also one of the key structures for achieving side interconnects.

[0028] Currently, with the diversification, high density, and miniaturization of printed circuit boards (PCBs), metallized half-holes are typically found at the board edges. Existing metallized half-holes at the board edges are usually manufactured using CNC machine tools. The current manufacturing process typically involves: first drilling a round hole on the board, then performing processes such as copper plating, pattern electroplating, film removal, and etching on the round hole, and finally routerting off half of the round hole to create a half-hole.

[0029] However, the inventors discovered that the current manufacturing process requires repeated milling with a milling cutter. However, due to large operational errors, problems such as milling through the copper foil on the hole wall and milling deviation of half-holes occur, resulting in a decrease in the yield of the fabricated castle-shaped side interconnect DPC ceramic substrate.

[0030] To solve the above-mentioned technical problems, the present invention provides a Figure 1 This is a schematic diagram illustrating a method for fabricating a circuit board with metallized half-holes according to an embodiment of the present invention. (Refer to...) Figure 1 The method for fabricating the circuit board with metallized half-holes includes: S110. Prepare multiple first through holes on a ceramic substrate.

[0031] In some embodiments, before drilling holes in the ceramic substrate 110, it is necessary to first prepare a drawing of the first through hole 120.

[0032] In this embodiment, such as Figure 2 As shown, the first through hole 120 can be a rounded rectangle. To match the size of the cutting blade, the length of the rounded rectangle of the first through hole 120 can be set to be the same as the width of the cutting blade, and the width of the rounded rectangle can be set to be the same as the diameter of the half hole.

[0033] The first through hole 120 consists of two half holes 1210.

[0034] In this embodiment, after drilling holes in the ceramic substrate 110, ultrasonic cleaning is required. The cleaning steps are as follows: acid washing, ultrasonic cleaning with deionized water, acetone, ethanol, and deionized water for 10 minutes each, followed by drying the surface.

[0035] In this embodiment, laser drilling can be used.

[0036] Laser drilling utilizes a high-energy-density laser beam to achieve non-contact drilling. The laser emits a highly directional, high-brightness beam, which, after being focused by a lens, can shrink to the micrometer or even nanometer scale, creating an ultra-high energy-density point of attack. When the beam strikes the material surface, the irradiated area absorbs a large amount of energy in an extremely short time, within milliseconds, microseconds, or even femtoseconds, rapidly melting, vaporizing, or even plasmaizing. The molten or vaporized material is then blown away from the processing area by an auxiliary gas, ultimately forming a hole. Based on the pulse characteristics of the laser used, laser drilling can be divided into two categories: pulsed laser drilling and continuous laser drilling.

[0037] S120. Metallize the front and back sides of the ceramic substrate to form multiple metallized through holes.

[0038] After obtaining multiple first through holes 120, a metal seed layer 140 is deposited on both sides of the ceramic substrate by magnetron sputtering. The metal type of the metal seed layer 140 is usually titanium / titanium-tungsten and copper.

[0039] For example, the thickness of titanium / titanium-tungsten is 100-1000 nm, and the thickness of copper is 100-1000 nm. The metal seed layer 140 is a crucial intermediate layer in the thin film deposition and patterning process. Its core function is to provide a foundation for the growth or electroplating of subsequent metal layers, while ensuring the electrical and mechanical properties of the device. The seed layer can act as a conductive bridge between the insulating substrate and the subsequent metal layers, ensuring the continuity of the current path inside the device. For example, in the through-silicon via (TSV) process, the metal seed layer 140 is deposited on the sidewalls of the TSV before copper is filled, achieving vertical electrical interconnection of the chip.

[0040] After depositing metal seed layers on both sides of the ceramic substrate, the thickness of the metal layer needs to be increased because the seed layer is relatively thin. Therefore, it is necessary to electroplate a copper seed layer to thicken it to 2-3 μm.

[0041] S130. Perform secondary drilling on all metallized through holes to obtain a ceramic substrate containing multiple second through holes.

[0042] In this embodiment, secondary drilling is performed on the two long sides of all metallized through holes based on preset through holes to obtain multiple second through holes 130.

[0043] Among them, such as Figure 3 and 4 As shown, the long sides of the preset through-hole and the metallized through-hole overlap, causing the metal layer in the overlapping area to be removed, and there is no metal connection between the two arc-shaped half-holes.

[0044] In some embodiments, such as Figure 3 and 4 In the diagram, the location indicated by the arrow in the second through hole 130 is the preset through hole. The preset through hole is a square or rectangular hole, and the area where the long side of the preset through hole overlaps with the metallized through hole is adjacent to the arc-shaped half hole.

[0045] By machining square holes of a certain length on both sides of the rounded rectangle of the first through hole 120, the seed layer metal of the original rectangular sidewall can be removed, leaving only the seed layer metal of the half-hole wall.

[0046] In addition, cleaning is required after the second drilling.

[0047] This invention, by performing secondary drilling, can directly sever the connection between the seed layers of the half-holes of adjacent products after panelization, avoiding copper layer extension, edge curling, and hole blockage caused by subsequent electroplating thickening during cutting.

[0048] S140. An outer layer circuit and a solder mask layer are fabricated on a ceramic substrate containing multiple second through holes to obtain a transition ceramic substrate.

[0049] In some embodiments, a photosensitive dry film 150 may first be coated onto a ceramic substrate containing a plurality of second through-holes. Then, the ceramic substrate coated with the photosensitive dry film is exposed and developed to expose the areas to be electroplated. Next, the electroplated areas are copper-plated, and then the photosensitive dry film 150 is removed. Finally, a solder resist layer is prepared on the ceramic substrate after the dry film has been removed.

[0050] In this embodiment, after the ceramic substrate with multiple second through holes 130 is prepared, a photosensitive dry film 150 needs to be coated on the surface of the ceramic substrate using a laminator. The thickness of the photosensitive dry film 150 depends on the required metallization thickness of the ceramic substrate surface, and is usually 30~100μm. The lamination temperature is 100±10μm, and the lamination pressure is controlled at 0.3-0.5MPa. If the pressure is too low, the adhesion will be insufficient; if the pressure is too high, it will easily cause fragmentation.

[0051] Photosensitive dry film, also known as photoresist dry film, is a solid form of photoresist and a key material for pattern transfer in the electronics manufacturing industry, especially indispensable in printed circuit board manufacturing. Photosensitive dry film consists of a three-layer composite structure, with each layer having a clearly defined function to ensure storage and usage performance: First, a polyester film, approximately 12μm thick, acts as a carrier film, protecting the intermediate photosensitive layer from damage during transportation and handling; second, the photosensitive layer, the core functional layer, is mainly composed of acrylate copolymers, combined with photoinitiators, polymer monomers, and other components, and is crucial for achieving photochemical reactions and pattern formation; third, a polyethylene film acts as a cover film, preventing adhesion and ensuring the photosensitive layer doesn't stick before use, requiring peeling before application.

[0052] Then, the photosensitive dry film is patterned through processes such as exposure and development, exposing the patterned areas to be electroplated. This step only creates the pattern on the front side; the back side only requires exposure and curing. At this time, the exposure dose is 100±30 mJ / cm². 2 Developing spray pressure: 1.0-2.0 bar, developer solution: Na2CO3 / K2CO3: 0.85-1.0 wt%, temperature: 27-30℃.

[0053] After the photolithography process is completed, copper plating is required on the surfaces where copper needs to be plated. Using a thick copper electroplating process, the copper layer is thickened in the areas where patterns need to be formed. Because electroplating results in uneven copper thickness, the copper-plated substrate needs to be ground and leveled to obtain a copper layer of uniform thickness. At this point, the copper thickness within the half-hole increases to a certain level.

[0054] Once the copper thickness within the semi-hole reaches a certain level, the dry film can be removed using a 3% sodium hydroxide solution. Dry film removal is a crucial step in electronic manufacturing processes such as PCB and IC packaging, following patterning / etching / electroplating. Different removal methods must be selected based on the dry film type (uncured or cured) and subsequent process requirements. The core principle is to achieve efficient stripping without damaging the substrate. Unexposed photosensitive dry film has not undergone cross-linking polymerization and can be removed by dissolving it with alkaline developer. This is a selective removal step during pattern transfer, not the final dry film stripping. After exposure and curing, the dry film forms a cross-linked macromolecular network that cannot be dissolved by conventional developer, requiring chemical or plasma stripping methods.

[0055] After removing the dry film, a wet etching process can be used to sequentially etch away the copper layer and the titanium / titanium-tungsten seed layer. Targeted chemical reagents are used to achieve selective etching, which removes the target copper layer without damaging the substrate material, thus ensuring the structural and performance integrity of the device.

[0056] For wet etching of the copper layer 160, reagents with high etching rates to copper and low corrosion to the substrate should be selected first. Simultaneously, the degree of isotropic / anisotropic etching should be controlled to avoid lateral etching of the circuitry leading to a decrease in precision. The titanium / titanium-tungsten seed layer, acting as an adhesion / barrier layer between the copper layer and the substrate, requires highly selective etching; that is, removing the titanium / titanium-tungsten while avoiding corrosion of the already formed copper circuitry and the substrate insulating layer. Therefore, a targeted etching system must be selected.

[0057] After etching is completed, sandblasting is required to clean the surface copper layer and roughen the surface of the copper layer to increase the adhesion of the subsequent solder mask layer 170.

[0058] Solder resist is a critical protective and insulating layer on the surface of printed circuit boards and semiconductor packaging substrates. Its core function is to protect exposed copper traces, prevent short circuits, and improve the environmental reliability of devices. It also assists in precise soldering and is a vital functional layer for ensuring circuit stability in electronic manufacturing processes. Solder resist is typically a uniformly coated organic resin film, generally 10-30 μm thick, and its material must possess insulation, temperature resistance, adhesion, and chemical stability. Solder resists are classified into two types: thermosetting solder resist inks and photosensitive solder resist inks. In some high-reliability applications, polyimide solder resist layers are used due to their excellent temperature resistance and radiation resistance, making them suitable for extreme operating environments.

[0059] In this invention, the solder resist layer is made of photosensitive ink. The solder resist layer manufacturing process includes: screen printing ink onto the substrate surface, baking at 75°C for 20 minutes, followed by exposure and development to obtain patterned solder resist, and finally curing the solder resist at 180°C for 30 minutes.

[0060] S150. Based on the positions of the two arc-shaped half-holes in the second through hole, the transition ceramic substrate is cut to obtain a circuit board containing metallized half-holes.

[0061] After the solder resist layer has cured, the transition ceramic substrate can be cut.

[0062] In some embodiments, when cutting the half-hole, the melting point of the metal layer is much lower than the high-temperature resistance of the semiconductor wafer. If laser or plasma cutting is used, the high temperature will cause the metal layer to melt and then solidify, forming irregular edge burrs, microcracks, or oxide layers, which will damage the stability of the bonding between the pad layer and the gold wire, and also increase the contact resistance of the grounding path, degrading the radio frequency performance. Therefore, abrasive wheel cutting can be used. Abrasive wheel cutting belongs to the category of cold working. Material separation is achieved through high-speed grinding of a diamond wheel. The heat-affected zone during the processing is extremely small, which can effectively avoid thermal deformation and oxidation of the metal layer and lattice damage to the semiconductor wafer, ensuring the flatness of the grounding pad edge and the quality of the metal layer.

[0063] Using a grinding wheel cutter, cut along the straight edge between the two arc-shaped half-holes in the second through hole to obtain a circuit board containing metallized half-holes.

[0064] In this embodiment, the width of the grinding wheel cutter is consistent with the length of the straight side between the two arc-shaped half-holes in the second through hole, thereby ensuring the quality of the resulting metallized half-hole.

[0065] In some embodiments, multiple circuit boards containing metallized half-holes are fabricated simultaneously during the fabrication process. Therefore, non-half-hole edges are laser-cut, and the boards are not cracked immediately after cutting.

[0066] Since the cutting involves non-half-hole edges and does not involve metallization, laser scribing can be used. CNC laser scribing can achieve batch processing of half-holes of various specifications, with dimensional tolerances controlled within ±0.01mm, increasing efficiency by more than 30% compared to mechanical processing.

[0067] In some embodiments, after cutting a circuit board containing metallized half-holes, a secondary sandblasting process can be performed on the metallized half-holes to remove any small amount of copper rolls that may be generated after cutting.

[0068] In some embodiments, to protect the surface of the circuit board containing the metallized semi-hole from oxidation or corrosion by the external environment and to ensure good soldering or bonding performance, the circuit board containing the metallized semi-hole is electroless plated with nickel-gold or nickel-palladium-gold. Generally, the nickel layer thickness is 3~5μm, the palladium layer thickness is 0.03~0.5μm, and the gold layer thickness is 0.03~0.5μm.

[0069] After electroless plating of nickel-gold or nickel-palladium-gold on the surface of a circuit board containing metallized half-holes, it can be split in the direction of laser scribing along the non-half-hole edge.

[0070] This invention provides a method for fabricating a circuit board with metallized half-holes. First, multiple first through-holes are fabricated on a ceramic substrate, and the front and back sides of the ceramic substrate are metallized to form multiple metallized through-holes. To form arc-shaped half-holes, all metallized through-holes require secondary drilling. Furthermore, to prevent the metal connecting the arc-shaped half-holes from lifting during the cutting of the second through-holes, the secondary drilling process for all metallized through-holes not only forms two arc-shaped half-holes but also ensures that the metal between the two arc-shaped half-holes is disconnected, thus preventing metal lifting during the final cutting process. Additionally, to enable electrical connection between the fabricated multiple second through-holes, an outer layer circuitry and a solder mask layer are fabricated on the ceramic substrate containing the multiple second through-holes, resulting in a transition ceramic substrate. After preparing the transition ceramic substrate, it can be cut according to the positions of the two arc-shaped half-holes in the second through-holes to obtain a circuit board containing metallized half-holes. This invention improves the fabrication efficiency and yield of metallized half-hole circuit boards by performing secondary drilling on the metallized through-holes.

[0071] It should be understood that the sequence number of each step in the above embodiments does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present invention.

[0072] In a second aspect, the present invention also provides a side-interconnected ceramic substrate, comprising a ceramic substrate, conductive lines disposed on the ceramic substrate, and a metallized half-hole penetrating the ceramic substrate, wherein the metallized half-hole is prepared based on the preparation method of a circuit board having a metallized half-hole according to any one of the first aspects.

[0073] In some embodiments, the metallized half-hole is formed by drilling twice.

[0074] In this embodiment, it is still based on Figure 2 For example, the shape of the first through hole can be a rounded rectangle. To match the size of the cutting blade, the length of the rounded rectangle of the first through hole can be set to be the same as the width of the cutting blade, and the width of the rounded rectangle can be set to be the same as the diameter of the half hole.

[0075] The second drilling involves drilling holes along the two long sides of all the metallized through holes, based on the preset through holes, to obtain multiple second through holes. The long sides of the preset through holes overlap with the metallized through holes, causing the metal layer in the overlapping area to be removed, and there is no metal connection between the two arc-shaped half-holes. By machining square holes of a certain length on both sides of the rounded rectangle of the first through hole, the seed layer metal on the sidewalls of the original rectangular portion can be removed, leaving only the seed layer metal on the half-hole wall.

[0076] The above embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit it. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A method for fabricating a circuit board with metallized half-holes, characterized in that, include: Multiple first through holes are fabricated on a ceramic substrate; The front and back sides of the ceramic substrate are metallized to form multiple metallized through holes; All metallized vias are drilled a second time to obtain a ceramic substrate containing multiple second vias; wherein, each second via includes two arc-shaped half-holes, and there is no metal connection between the two arc-shaped half-holes; An outer layer circuit and a solder resist layer are fabricated on the ceramic substrate containing multiple second through holes to obtain a transition ceramic substrate. Based on the positions of the two arc-shaped half-holes in the second through hole, the transition ceramic substrate is cut to obtain a circuit board containing metallized half-holes.

2. The method for fabricating a circuit board with metallized half-holes as described in claim 1, characterized in that, The first through hole is a rounded rectangle; The process involves secondary drilling of all metallized vias to obtain multiple second vias, including: Multiple second through holes are obtained by drilling holes based on preset through holes on the two long sides of all the metallized through holes; wherein the preset through holes overlap with the long sides of the metallized through holes, so that the metal layer in the overlapping area is removed and there is no metal connection between the two arc-shaped half holes.

3. The method for fabricating a circuit board with metallized half-holes as described in claim 2, characterized in that, The preset through hole is a square hole or a rectangular hole, and the area where the long side of the preset through hole overlaps with the metallized through hole is adjacent to the arc-shaped half hole.

4. The method for fabricating a circuit board with metallized half-holes as described in claim 3, characterized in that, The step of cutting the transition ceramic substrate based on the positions of the two arc-shaped half-holes in the second through-hole to obtain a circuit board containing metallized half-holes includes: Using a grinding wheel cutter, cut along the straight edge between the two arc-shaped half-holes in the second through hole to obtain a circuit board containing metallized half-holes.

5. The method for fabricating a circuit board with metallized half-holes as described in claim 3, characterized in that, The width of the grinding wheel cutter is the same as the length of the straight side between the two arc-shaped semi-holes in the second through hole.

6. The method for fabricating a circuit board with metallized half-holes as described in claim 1 or 4, characterized in that, After obtaining the circuit board containing the metallized half-hole, the process further includes: The cut surface is sandblasted. The surface of the sandblasted circuit board is then treated to protect its surface.

7. The method for fabricating a circuit board with metallized half-holes as described in claim 1, characterized in that, Before preparing the solder resist layer on the ceramic substrate, the method further includes: The ceramic substrate is subjected to sandblasting.

8. The method for fabricating a circuit board with metallized half-holes as described in claim 1, characterized in that, The process of fabricating an outer layer circuit and a solder resist layer on the ceramic substrate containing multiple second through holes to obtain a transition ceramic substrate includes: A photosensitive dry film is coated on the ceramic substrate containing multiple second through holes; The ceramic substrate covered with a photosensitive dry film is exposed and developed to expose the area of ​​the pattern to be electroplated on the ceramic substrate. After copper plating is performed on the electroplated pattern area, the dry film is removed. A solder resist layer is prepared on a ceramic substrate after the dry film is removed.

9. The method for manufacturing a circuit board with metallized half-holes as described in claim 8, characterized in that, After copper plating the electroplated pattern area, removing the dry film includes: The copper-plated ceramic substrate is then ground and leveled. Remove the dry film.

10. A ceramic substrate with side interconnects, characterized in that, The circuit includes a ceramic substrate, conductive lines disposed on the ceramic substrate, and a metallized half-hole penetrating the ceramic substrate, wherein the metallized half-hole is prepared based on the circuit board preparation method with metallized half-hole according to any one of claims 1-9.

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