Ceramic glaze composition, preparation method of semiconductor equipment part, semiconductor equipment part and semiconductor equipment

Abstract

The invention provides a ceramic glaze composition, a preparation method of a semiconductor equipment part, the semiconductor equipment part and semiconductor equipment. The preparation method comprises the following steps: providing a first melting material, a second melting material and a semiconductor equipment part body; the first melting material comprises Al2O3, a corrosion-resistant additive and SiO2; the second melting material comprises SiO2, SiC and boride; respectively melting the first melting material and the second melting material, and uniformly mixing to obtain a ceramic glaze composition; applying a ceramic glaze composition to enable the ceramic glaze composition to at least cover part of the surface of the semiconductor equipment part body; and sintering to form a ceramic glaze layer on the surface of the semiconductor equipment part body. The mixed melting material is applied to the surface of the semiconductor equipment part body, and then the ceramic glaze layer is formed through high-temperature sintering, so that compared with a traditional anodic oxidation layer, the corrosion resistance is improved, the breakdown voltage resistance is improved, and the thermal cycle performance is also obviously improved.

Description

Technical Field

[0001] This invention belongs to the field of semiconductor technology, specifically relating to a ceramic glaze composition, a method for preparing semiconductor equipment components, semiconductor equipment components, and semiconductor equipment. Background Technology

[0002] In semiconductor equipment, the treatment of critical components is crucial to ensuring equipment stability and performance. Traditionally, anodic oxide layers are widely used to improve the corrosion resistance and wear resistance of metal surfaces. Anodizing semiconductor equipment components is an important means of improving their surface properties and corrosion resistance. Components with anodized surfaces not only have an aesthetically pleasing appearance but also better wear resistance, corrosion resistance, and electrical insulation. However, although traditional anodic oxide layers have shown good performance in some applications, their limitations in treating critical components in semiconductor equipment cannot be ignored, and these limitations become particularly prominent in specific process environments.

[0003] First, the oxidation depth of traditional anodic oxide layers (e.g., alumina layers) is typically no more than 150 micrometers, with a breakdown voltage of approximately 1200V, making it difficult to meet high insulation requirements. Alumina layers formed by anodic oxidation have an amorphous structure, which, while offering some corrosion resistance, is limited by its hygroscopic and acid / alkali-soluble properties, hindering its application in extreme environments. Furthermore, the density of these alumina layers is low, typically below 85%, and they possess a porous structure. While this porous structure provides a high specific surface free energy and facilitates adsorption, it also increases the risk of corrosive media penetration, leading to reduced corrosion resistance. Moreover, the structural instability of anodic oxide layers and their high adsorption capacity due to their porous structure make them susceptible to damage in plasma etching environments. This damage not only affects the integrity and functionality of the component but can also adversely impact process stability. Particulate contaminants generated on the surface of the component during plasma etching can contaminate the substrate, thereby affecting the quality of the final product. Summary of the Invention

[0004] The purpose of this invention is to improve the insulation, corrosion resistance and heat resistance of the anodic oxide layer.

[0005] To achieve the above objectives, the present invention provides a method for manufacturing semiconductor device components, comprising:

[0006] The system provides a first melt, a second melt, and a semiconductor device component body; the first melt comprises Al2O3, a corrosion-resistant additive, and SiO2, wherein the corrosion-resistant additive is a rare earth metal oxide; the second melt comprises SiO2, SiC, and a boride.

[0007] The first and second molten materials are melted separately and then mixed uniformly to obtain a ceramic glaze composition.

[0008] A ceramic glaze composition is applied such that it at least covers a portion of the surface of the semiconductor device component body;

[0009] Sintering forms a ceramic glaze layer on the surface of the semiconductor device component body.

[0010] Optionally, the corrosion-resistant additive accounts for 1 wt% to 5 wt% of the mass percentage of the first melt, and the SiO2 accounts for 0.1 wt% to 0.5 wt% of the mass percentage of the first melt.

[0011] Optionally, the SiC accounts for 0.1 wt% to 0.5 wt% of the second molten material, and the boride accounts for 1 wt% to 5 wt% of the second molten material.

[0012] Optionally, the mass ratio of the first melt to the second melt is 1:0.05 to 1:0.1.

[0013] Optionally, the SiC comprises nanoscale SiC whiskers.

[0014] Optionally, the SiC whiskers have a length of 50nm to 100nm and a diameter of 1nm to 3nm.

[0015] Optionally, the boride comprises boric acid and / or borax.

[0016] Optionally, the rare earth metal oxide comprises at least one oxide of lanthanum (La), cerium (Ce), praseodymium (Pr), neodymium (Nd), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), holmium (Ho), erbium (Er), thulium (Tm), ytterbium (Yb), scandium (Sc), and yttrium (Y).

[0017] Optionally, before melting the first melt and the second melt respectively, the process further includes a step of grinding the first melt and the second melt respectively, wherein the particle size of the second melt is smaller than that of the first melt after grinding.

[0018] Optionally, the particle size of the second molten material after grinding is greater than or equal to 5000 mesh.

[0019] Optionally, the particle size of the first molten material after grinding is greater than or equal to 2000 mesh.

[0020] Optionally, the method of applying the ceramic glaze composition includes at least one of thermal spraying, brushing, dipping, or electrostatic spraying.

[0021] Optionally, the sintering temperature is 1000℃~1500℃.

[0022] Optionally, the thickness of the ceramic glaze layer is 10μm-10000μm.

[0023] Optionally, the density of the ceramic glaze layer is greater than or equal to 95%.

[0024] The present invention also provides a semiconductor device component, comprising:

[0025] Semiconductor equipment component bodies, and,

[0026] The ceramic glaze layer prepared according to the above method covers the surface of the semiconductor device component body.

[0027] Optionally, it further comprises: a corrosion-resistant layer covering the surface of the ceramic glaze layer; the material of the corrosion-resistant layer comprises at least one of rare earth metal oxides, rare earth metal fluorides, and rare earth metal fluorides.

[0028] Optionally, the substrate of the semiconductor device component body comprises at least one of aluminum, stainless steel, or ceramic.

[0029] Optionally, the semiconductor device components may be components made of materials involving anodizing, such as gas spray heads, electrostatic chucks, chamber walls, and plasma confinement rings.

[0030] The present invention also provides a semiconductor device, comprising: a reaction chamber; and the aforementioned semiconductor device components disposed within the reaction chamber.

[0031] Optionally, the semiconductor device includes any one of capacitively coupled plasma etching equipment, inductively coupled plasma etching equipment, and metal-organic chemical vapor deposition equipment.

[0032] The present invention also provides a ceramic glaze composition for semiconductor device components, comprising: a first melt and a second melt, wherein the mass ratio of the two melts is 1:0.05 to 1:0.1; the first melt comprises Al2O3, a corrosion-resistant additive, and SiO2, wherein the corrosion-resistant additive is a rare earth metal oxide, and the corrosion-resistant additive accounts for 1 wt% to 5 wt% of the mass percentage of the first melt, and SiO2 accounts for 0.1 wt% to 0.5 wt% of the mass percentage of the first melt; the second melt comprises SiO2, SiC, and a boride, wherein SiC accounts for 0.1 wt% to 0.5 wt% of the mass percentage of the second melt, and the boride accounts for 1 wt% to 5 wt% of the mass percentage of the second melt.

[0033] Compared with the prior art, the technical solution of the present invention has at least the following beneficial effects:

[0034] This invention involves applying a mixed molten material to the surface of a semiconductor device component. The mixed molten material comprises a first molten material and a second molten material. The first molten material contains Al₂O₃, a corrosion-resistant additive, and SiO₂, while the second molten material contains SiO₂, SiC, and borides. The corrosion-resistant additive improves the corrosion resistance of the ceramic glaze layer; SiO₂ acts as a binder, facilitating the adhesion of each component to Al₂O₃ and the substrate; and the borides promote the fusion of SiO₂ and SiC. The first and second molten materials are melt-mixed in a specific ratio to form a ceramic glaze composition. This composition, through sintering, forms a ceramic glaze layer with a density greater than or equal to 95%, which is detrimental to the adsorption and penetration of corrosive media, further improving the corrosion resistance of the ceramic glaze layer. It also increases the breakdown voltage, improves insulation, and significantly improves thermal cycling performance. Attached Figure Description

[0035] Figure 1 This is a process flow diagram of a method for manufacturing a semiconductor device component according to the present invention.

[0036] Figure 2 This is a partial structural schematic diagram of a semiconductor device component according to the present invention.

[0037] Figure 3 This is a partial structural schematic diagram of another semiconductor device component of the present invention.

[0038] Figure 4 This is a schematic diagram comparing the scanning electron microscope (SEM) images of semiconductor device components from Example 1 and the comparative example after thermal cycling treatment. The SEM image shows an accelerating voltage of 1.0 kV and a magnification of 200x. Figure 4 The 'a' represents a comparative semiconductor device component. Figure 4 b represents the semiconductor device component of Example 1.

[0039] Figure 5 This is a comparison chart showing the results of the breakdown resistance test of semiconductor equipment components in Example 1 and the comparative example. Figure 5 In this context, A represents the breakdown resistance of the semiconductor device component in the comparative example. Figure 5 In this context, B represents the breakdown resistance of the semiconductor device component in Example 1.

[0040] Attached image labels:

[0041] Semiconductor equipment component body 21

[0042] Ceramic glaze layer 22

[0043] Corrosion-resistant layer 23. Detailed Implementation

[0044] The technical solution of the present invention will now be clearly and completely described with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0045] In the description of this invention, it should be noted that the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0046] As mentioned in the background section, anodic oxide layers used for surface treatment of semiconductor equipment components have limitations in terms of insulation, corrosion resistance, and heat resistance. With the development of semiconductor technology, the requirements for key components are becoming increasingly stringent, especially in terms of insulation, corrosion resistance, and heat resistance, while cost control also needs to be considered.

[0047] Therefore, the present invention also provides a ceramic glaze composition for semiconductor equipment components. The ceramic glaze layer formed by high-temperature sintering has excellent insulation and corrosion resistance, and can withstand long-term thermal cycling without easily cracking or peeling off. It can replace the anodic oxide layer for surface treatment of semiconductor equipment components.

[0048] The ceramic glaze composition of the present invention comprises: a first melt and a second melt, wherein the mass ratio of the two melts is 1:0.05 to 1:0.1; the first melt comprises Al2O3, a corrosion-resistant additive and SiO2, wherein the corrosion-resistant additive is a rare earth metal oxide; the second melt comprises SiO2, SiC and boride.

[0049] The rare earth metal oxide comprises at least one oxide selected from the elements lanthanum (La), cerium (Ce), praseodymium (Pr), neodymium (Nd), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), holmium (Ho), erbium (Er), thulium (Tm), ytterbium (Yb), scandium (Sc), and yttrium (Y). As an example, the rare earth metal oxide may be Y₂O₃.

[0050] The primary function of the corrosion-resistant additive is to improve the chemical corrosion resistance of the ceramic glaze layer; however, excessive addition may lead to cracking of the ceramic glaze layer. By selecting specific corrosion-resistant additives and controlling their dosage, the corrosion resistance of the ceramic glaze layer can be effectively improved. As an example, the corrosion-resistant additive accounts for 1 wt% to 5 wt% of the mass of the first fused material. In another embodiment, the corrosion-resistant additive accounts for 2 wt% to 4 wt% of the mass of the first fused material.

[0051] In the first fused material, SiO2 primarily acts as a binder, bonding Al2O3 with the corrosion-resistant additives and lowering the melting temperature of the first fused material, making it easier for the ceramic glaze composition to deposit on the substrate surface of the semiconductor device component. As an example, SiO2 accounts for 0.1wt% to 0.5wt% of the first fused material by mass. The Al2O3, as the matrix material, ensures that the coefficient of thermal expansion of the ceramic glaze layer is close to or equivalent to that of the substrate of the semiconductor device component, thus avoiding potential peeling or cracking of the ceramic glaze layer under high-temperature thermal cycling processes. In another embodiment, SiO2 accounts for 0.2wt% to 0.4wt% of the first fused material by mass.

[0052] The silicon oxide in the second fused material serves to tightly fuse the SiC particles together. SiC itself increases hardness. The SiC comprises nanoscale SiC whiskers, which effectively improve the toughness of the ceramic glaze layer and reinforce the Al2O3 substrate. As an example, the SiC whiskers have a length of 50nm–100nm and a diameter of 1nm–3nm. Within a certain dosage range, a higher SiC content in the second fused material results in a higher breakdown voltage. In one embodiment, the SiC accounts for 0.1wt%–0.5wt% of the mass of the second fused material. In another embodiment, the SiC accounts for 0.2wt%–0.4wt% of the mass of the second fused material.

[0053] The main function of the boride is to promote the fusion of SiC and SiO2, lower the solidification point of the second molten material, and make the second molten material more dense. As an example, the boride comprises boric acid and / or borax. In one embodiment, the boride accounts for 1 wt% to 5 wt% of the mass percentage of the second molten material. In another embodiment, the boride accounts for 2 wt% to 4 wt% of the mass percentage of the second molten material. In yet another embodiment, the boride accounts for 2.8 wt% to 3.6 wt% of the mass percentage of the second molten material.

[0054] like Figure 1 As shown, the present invention provides a method for manufacturing semiconductor device components, comprising:

[0055] Step S1: Provide a first melt, a second melt, and a semiconductor device component body; the first melt comprises Al2O3, a corrosion-resistant additive, and SiO2, wherein the corrosion-resistant additive is a rare earth metal oxide; the second melt comprises SiO2, SiC, and borides.

[0056] Step S2: Melt the first melt and the second melt separately, and then mix them evenly to obtain a ceramic glaze composition.

[0057] In some embodiments, to minimize the solidification point of the molten material and facilitate its processing, a separate grinding step is included before melting the first and second molten materials. Separate and uniform grinding can reduce the melting temperature and melting time of the first and second molten materials. After grinding, the particle size of the second molten material is smaller than that of the first molten material. In some embodiments, the particle size of the second molten material after grinding is greater than or equal to 5000 mesh; the particle size of the first molten material after grinding is greater than or equal to 2000 mesh.

[0058] Step S3: Apply a ceramic glaze composition such that the ceramic glaze composition at least covers a portion of the surface of the semiconductor device component body.

[0059] The method of applying the ceramic glaze composition can be dry spraying or wet wetting, including at least one of thermal spraying, brushing, dipping or electrostatic spraying.

[0060] In some embodiments, dry spraying is used, for example, by using a thermal spraying process to heat the ceramic glaze composition in a spray gun to 1200°C to 1500°C and spray it uniformly onto the substrate surface of the semiconductor device component body.

[0061] In some embodiments, a wet impregnation process is employed, for example, an immersion process: a mixed melt (the ceramic glaze composition) is dispersed in ethanol to obtain a slurry, wherein the mixed melt has a mass percentage of 70 wt% to 80 wt% in ethanol. The semiconductor device component body is then immersed in the slurry such that the slurry completely covers the surface of the semiconductor device component body, and then removed and dried at room temperature to remove the ethanol.

[0062] Step S4: High-temperature sintering to form a ceramic glaze layer on the surface of the semiconductor device component body.

[0063] The sintering temperature for the high-temperature sintering is 1000℃~1500℃.

[0064] In some embodiments, laser sintering can be used, with a laser power density of 100 W / cm². 2 ~200W / cm 2 The sintering temperature reaches 1000℃ at the instant.

[0065] The thickness of the ceramic glaze layer can reach 10μm-10000μm, which is much greater than the thickness of the anodized layer.

[0066] The substrate surface of the semiconductor device component can be made of materials such as aluminum, stainless steel, or ceramic. The ceramic glaze composition covering the surface of the semiconductor device component is sintered at high temperature, resulting in a ceramic glaze layer with a density greater than or equal to 95%, exhibiting good insulation, heat resistance, and corrosion resistance, making it suitable as a replacement for traditional anodizing layers. The semiconductor device components provided by this invention include, but are not limited to, components involving anodizing layer protection.

[0067] like Figure 2 The diagram shown is a partial structural schematic of a semiconductor device component provided by the present invention. The semiconductor device component includes:

[0068] Semiconductor equipment component body 21, and,

[0069] The ceramic glaze layer 22 prepared according to the above method covers the surface of the semiconductor device component body 21.

[0070] The surface of these semiconductor device components is covered with a ceramic glaze layer 22, which has excellent corrosion resistance, insulation, and heat resistance. It can replace conventional anodized layers, thus making these semiconductor device components suitable for process environments where they do not directly contact corrosive gases or have relatively little contact with them. As an example, the semiconductor device components may be a lower grounding ring, a middle grounding ring, a shielding ring, etc.

[0071] like Figure 3 The diagram shown is a partial structural schematic of another semiconductor device component provided by the present invention, the semiconductor device component comprising:

[0072] Semiconductor equipment component body 21,

[0073] Ceramic glaze layer 22, and

[0074] A corrosion-resistant layer 23 covers the surface of the ceramic glaze layer 22; the material of the corrosion-resistant layer 23 includes at least one of rare earth metal oxides, rare earth metal fluorides, or rare earth metal fluorides.

[0075] The surface of these semiconductor device components is covered by a corrosion-resistant layer 23, which has better corrosion resistance than an anodized layer. A ceramic glaze layer 22 serves as an intermediate transition layer between the semiconductor device component body 21 and the corrosion-resistant layer 23. Because the ceramic glaze layer 22 has superior corrosion resistance, insulation, and heat resistance, as a transition layer, it not only facilitates a tight bond between the corrosion-resistant layer 23 and the semiconductor device component body 21, preventing potential detachment or cracking under high-temperature cycling, but also further enhances corrosion resistance and insulation. Therefore, the semiconductor device components are suitable for process environments that involve direct contact with corrosive gases or relatively frequent contact with corrosive gases. As an example, the semiconductor device components include spray heads, electrostatic chucks, chamber walls, liners, or constraint rings, etc., that require exposure to corrosive and high-temperature cycling processes.

[0076] The semiconductor equipment components can be used in any one of capacitively coupled plasma etching equipment, inductively coupled plasma etching equipment, and metal-organic chemical vapor deposition equipment.

[0077] Example 1

[0078] Step S1: Provide the first molten material, the second molten material, and the semiconductor equipment component body.

[0079] Preparation of the first molten material: The first molten material is composed of Al2O3, Y2O3, and SiO2, wherein Y2O3 accounts for 3 wt% of the first molten material by mass, and SiO2 accounts for 0.5 wt% of the first molten material by mass. The first molten material is mixed and ground uniformly to a particle size of approximately 2000 mesh.

[0080] Preparation of the second molten material: The second molten material is composed of SiO2, SiC, and borax, wherein SiC accounts for 0.1 wt% of the mass percentage of the second molten material, and borax accounts for 5 wt% of the mass percentage of the second molten material. The SiC has a whisker morphology, is nanoscale in size, with a length of 50 nm to 60 nm and a diameter of approximately 3 nm. The second molten material is mixed and uniformly ground to a particle size of approximately 5000 mesh.

[0081] Step S2: Melt the first melt and the second melt separately, and then mix them uniformly at a mass ratio of 1:0.05 to obtain a ceramic glaze composition.

[0082] Step S3: Heat the ceramic glaze composition in a spray gun to 1300℃~1500℃ and spray it evenly onto the surface of the substrate.

[0083] Step S4: High-temperature sintering at approximately 1500°C to form a ceramic glaze layer with a thickness of 100 μm on the surface of the semiconductor device component body.

[0084] The semiconductor device component prepared in Example 1 was thermally cycled five times at temperatures ranging from 25°C to 300°C. Electron microscopy revealed no cracks or pores on the surface. Figure 4 As shown in b, the semiconductor device components prepared in Example 1 have good heat resistance.

[0085] The semiconductor device components prepared in Example 1 were subjected to a breakdown resistance test: An alternating current breakdown test method was used, with the test sample in electrode contact, a voltage applied, and the breakdown voltage of the coating determined by observing breakdown marks or measuring the current value. Figure 5 As shown in B, the breakdown voltage reaches 2500V, indicating that the semiconductor equipment components prepared in Example 1 have good insulation properties, which can effectively ensure the equipment performance and operational safety during the semiconductor manufacturing process.

[0086] Example 2

[0087] Step S1: Provide the first molten material, the second molten material, and the semiconductor equipment component body.

[0088] Preparation of the first molten material: The first molten material is composed of Al2O3, Y2O3, and SiO2, wherein Y2O3 accounts for 1 wt% of the mass percentage of the first molten material, and SiO2 accounts for 0.1 wt% of the mass percentage of the first molten material. The first molten material is mixed and ground uniformly to a particle size of approximately 3000 mesh.

[0089] Preparation of the second melt: The second melt is composed of SiO2, SiC, and boric acid, wherein SiC accounts for 0.3 wt% of the mass percentage of the second melt, and boric acid accounts for 1 wt% of the mass percentage of the second melt. The SiC has a whisker morphology, is nanoscale, with a length of 60 nm to 80 nm, and a diameter of approximately 1 nm. The second melt is mixed and uniformly ground to a particle size of approximately 6000 mesh.

[0090] Step S2: Melt the first melt and the second melt separately, and then mix them uniformly in a mass ratio of 1:0.1 to obtain a ceramic glaze composition.

[0091] Step S3: Heat the ceramic glaze composition in a spray gun to 1200℃~1300℃ and spray it evenly onto the surface of the substrate.

[0092] Step S4 involves high-temperature sintering at approximately 1300°C to form a ceramic glaze layer with a thickness of 10000μm on the surface of the semiconductor device component body.

[0093] The semiconductor device component prepared in Example 2 was thermally cycled 5 times at temperatures ranging from 25°C to 300°C. Electron microscopy revealed no cracks or pores on the surface, indicating that the semiconductor device component prepared in Example 2 has good heat resistance.

[0094] The semiconductor equipment components prepared in Example 2 were subjected to a breakdown resistance test: using an AC breakdown test method, the test sample was in electrode contact, voltage was applied, and the breakdown voltage of the coating was determined by observing the breakdown marks or measuring the current value. The breakdown resistance voltage reached 2600V, indicating that the semiconductor equipment components prepared in Example 2 have good insulation performance, which can effectively ensure the equipment performance and operational safety in the semiconductor manufacturing process.

[0095] Example 3

[0096] Step S1: Provide the first molten material, the second molten material, and the semiconductor equipment component body.

[0097] Preparation of the first melt: The first melt is composed of Al2O3, lanthanum oxide, and SiO2, wherein lanthanum oxide accounts for 5 wt% of the first melt by mass, and SiO2 accounts for 0.3 wt% of the first melt by mass. The first melt is mixed and ground uniformly to a particle size of approximately 2500 mesh.

[0098] Preparation of the second melt: The second melt is composed of SiO2, SiC, and boric acid, wherein SiC accounts for 0.5 wt% of the mass percentage of the second melt, and boric acid accounts for 2 wt% of the mass percentage of the second melt. The SiC has a whisker morphology, is nanoscale, with a length of 80 nm to 100 nm, and a diameter of approximately 1 nm. The second melt is mixed and uniformly ground to a particle size of approximately 7000 mesh.

[0099] Step S2: Melt the first melt and the second melt separately, and then mix them uniformly at a mass ratio of 1:0.08 to obtain a ceramic glaze composition.

[0100] Step S3: The ceramic glaze composition is dispersed in ethanol to obtain a slurry, wherein the mass ratio of the ceramic glaze composition in ethanol is 75 wt%. The semiconductor device component body is immersed in the slurry and then removed and dried at room temperature.

[0101] Step S4 involves laser sintering with a laser power density of 200 W / cm². 2 The sintering temperature reaches 1000℃, forming a ceramic glaze layer with a thickness of 10μm on the surface of the semiconductor device component body.

[0102] The semiconductor device component prepared in Example 3 was thermally cycled 5 times at temperatures ranging from 25°C to 300°C. Electron microscopy revealed no cracks or holes on the surface, indicating that the semiconductor device component prepared in Example 3 has good heat resistance.

[0103] The semiconductor equipment components prepared in Example 3 were subjected to a breakdown resistance test: using the AC breakdown test method, the test sample was in electrode contact, voltage was applied, and the breakdown voltage of the coating was determined by observing the breakdown marks or measuring the current value. The breakdown resistance voltage reached 2650V, indicating that the semiconductor equipment components prepared in Example 3 have good insulation performance, which can effectively ensure the equipment performance and operational safety in the semiconductor manufacturing process.

[0104] Comparative Example

[0105] A semiconductor device component manufactured using existing technology has a conventional anodic oxide layer with a thickness of 100 μm formed on its surface. After undergoing five thermal cycles at temperatures ranging from 25°C to 300°C, electron microscopy revealed surface cracking and the formation of multiple pores, such as... Figure 4 As shown in Figure a, this indicates that its heat resistance is poor.

[0106] A breakdown resistance test will be conducted on a proportion of semiconductor device components, such as... Figure 5 As shown in Figure A, the breakdown voltage is approximately 1200V, which is far lower than the breakdown voltage of the ceramic glaze layer of this invention. Experimental results show that the traditional anodic oxide layer ( Figure 5 The electrical breakdown resistance of A) is only that of the ceramic glaze layer of the present invention ( Figure 5 The insulation performance of traditional anodic oxide layers is poor, as shown by the fact that B) is half of that in B).

[0107] In summary, the present invention applies a mixed melt material formed by melting and mixing a first melt material and a second melt material to the surface of the semiconductor device component body. The first melt material contains Al2O3, corrosion-resistant additives, and SiO2; the second melt material contains SiO2, SiC, and borides; and then sintersects at high temperature to form a ceramic glaze layer with a density greater than or equal to 95%. Compared with the traditional anodized layer, this invention not only improves corrosion resistance and increases breakdown voltage, but also significantly improves thermal cycling performance.

[0108] Although the present invention has been described in detail through the preferred embodiments above, it should be understood that the above description should not be considered as a limitation of the present invention. Various modifications and substitutions to the present invention will be apparent to those skilled in the art after reading the above description. Therefore, the scope of protection of the present invention should be defined by the appended claims.

Claims

1. A method of producing a semiconductor device component, characterized by, Include: The system provides a first melt, a second melt, and a semiconductor device component body; the first melt comprises Al2O3, a corrosion-resistant additive, and SiO2, wherein the corrosion-resistant additive is a rare earth metal oxide; the second melt comprises SiO2, SiC, and a boride. The first and second molten materials are melted separately and then mixed uniformly to obtain a ceramic glaze composition. A ceramic glaze composition is applied such that it at least covers a portion of the surface of the semiconductor device component body; Sintering forms a ceramic glaze layer on the surface of the semiconductor device component body.

2. The production method according to claim 1, wherein The corrosion-resistant additive accounts for 1 wt% to 5 wt% of the mass of the first melt, and the SiO2 accounts for 0.1 wt% to 0.5 wt% of the mass of the first melt.

3. The preparation method according to claim 1, characterized in that, The SiC accounts for 0.1 wt% to 0.5 wt% of the second molten material, and the boride accounts for 1 wt% to 5 wt% of the second molten material.

4. The preparation method according to claim 1, characterized in that, The mass ratio of the first melt to the second melt is 1:0.05 to 1:0.

1.

5. The preparation method according to claim 1, characterized in that, The SiC comprises nanoscale SiC whiskers.

6. The preparation method according to claim 5, characterized in that, The SiC whiskers have a length of 50nm to 100nm and a diameter of 1nm to 3nm.

7. The preparation method according to claim 1, characterized in that, The boride contains at least one of boric acid or borax.

8. The preparation method according to claim 1, characterized in that, The rare earth metal oxides include at least one oxide of lanthanum (La), cerium (Ce), praseodymium (Pr), neodymium (Nd), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), holmium (Ho), erbium (Er), thulium (Tm), ytterbium (Yb), scandium (Sc), and yttrium (Y).

9. The preparation method according to claim 1, characterized in that, Before melting the first melt and the second melt respectively, the process further includes a grinding step for the first melt and the second melt respectively, wherein the particle size of the second melt is smaller than that of the first melt after grinding.

10. The preparation method according to claim 9, characterized in that, After grinding, the particle size of the second molten material is greater than or equal to 5000 mesh.

11. The preparation method according to claim 9, characterized in that, After grinding, the particle size of the first molten material is greater than or equal to 2000 mesh.

12. The preparation method according to claim 1, characterized in that, The method of applying the ceramic glaze composition includes at least one of thermal spraying, brushing, dipping, or electrostatic spraying.

13. The preparation method according to claim 1, characterized in that, The sintering temperature is 1000℃~1500℃.

14. The preparation method according to claim 1, characterized in that, The thickness of the ceramic glaze layer is 10μm-10000μm.

15. The preparation method according to claim 1, characterized in that, The density of the ceramic glaze layer is greater than or equal to 95%.

16. A semiconductor device component, characterized in that, Include: Semiconductor equipment component bodies, and, The ceramic glaze layer prepared by the method according to any one of claims 1-15 covers the surface of the semiconductor device component body.

17. The semiconductor device component as claimed in claim 16, characterized in that, It also includes: a corrosion-resistant layer covering the surface of the ceramic glaze layer; the material of the corrosion-resistant layer includes at least one of rare earth metal oxides, rare earth metal fluorides, and rare earth metal fluorides.

18. The semiconductor device component as claimed in claim 16, characterized in that, The substrate of the semiconductor device component body includes at least one of aluminum, stainless steel, or ceramic.

19. The semiconductor device component as claimed in claim 16, characterized in that, The semiconductor device components include at least one of a gas spray head, an electrostatic chuck, an inner wall of a cavity, and a plasma confinement ring.

20. A semiconductor device, characterized in that, It includes: a reaction chamber; and a semiconductor device component as described in any one of claims 16-19, disposed within the reaction chamber.

21. The semiconductor device as claimed in claim 20, characterized in that, The semiconductor device includes any one of capacitively coupled plasma etching equipment, inductively coupled plasma etching equipment, or metal-organic chemical vapor deposition equipment.

22. A ceramic glaze composition for semiconductor device components, characterized in that, The mixture comprises: a first melt and a second melt, wherein the mass ratio of the two melts is 1:0.05 to 1:0.1; the first melt comprises Al2O3, a corrosion-resistant additive, and SiO2, wherein the corrosion-resistant additive is a rare earth metal oxide, and the corrosion-resistant additive accounts for 1 wt% to 5 wt% of the mass percentage of the first melt, and SiO2 accounts for 0.1 wt% to 0.5 wt% of the mass percentage of the first melt; the second melt comprises SiO2, SiC, and borides, wherein SiC accounts for 0.1 wt% to 0.5 wt% of the mass percentage of the second melt, and borides account for 1 wt% to 5 wt% of the mass percentage of the second melt.

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