Method of forming thin film and method of manufacturing electroluminescent display device using the same

Abstract

Disclosed are a method of forming a thin film on a substrate provided with a first sub-pixel region and a second sub-pixel region, and a method of manufacturing an electroluminescent display device using the same, the method of forming a thin film including: forming a first light emitting layer in the first sub-pixel region, the step of forming the first light emitting layer in the first sub-pixel region includes forming a gallium (Ga)-containing semiconductor layer in the first sub-pixel region.

Description

Technical Field

[0001] This disclosure relates to a method for forming a thin film and a method for using the thin film to manufacture an electroluminescent display device. Background Technology

[0002] Liquid crystal displays (LCDs) and organic light-emitting diode (OLED) displays are widely used as display devices. Recently, technologies for manufacturing high-resolution display devices using micron-scale light-emitting diode (LED) devices have attracted much attention.

[0003] Compared to other subpixels (e.g., subpixels for emitting red light or subpixels for emitting green light), subpixels for emitting blue light in multiple organic light-emitting diodes (OLEDs) tend to have shorter lifespans. Increasing the drive current to improve brightness can also lead to device degradation. Furthermore, implementing display devices using micro LEDs (inorganic light-emitting diodes) presents increased production costs compared to OLEDs.

[0004] To manufacture existing micro LEDs, displays with self-emissive structures where micron-sized micro LEDs are mounted at pixel positions on a driving substrate offer advantages such as high brightness, high power efficiency, long lifespan, and various form factor implementations. However, the transfer process for positioning micron-sized micro LEDs at pixel positions on the driving substrate is performed using a pick-and-place method, which is difficult to guarantee in terms of productivity and economic feasibility. In particular, there is a need for alternative methods to manufacture large-size micro LED displays. Summary of the Invention

[0005] Technical issues

[0006] Therefore, this disclosure is made in view of the above-mentioned problems, and unlike the prior art methods for manufacturing an entire pixel having micro LEDs, the object of this disclosure is to provide a method for forming a thin film of a blue pixel with a relatively long lifespan and low production cost by depositing micro LEDs in a blue pixel of an OLED pixel with a relatively short lifespan among multiple pixels, and a method for manufacturing an electroluminescent display device using said method.

[0007] Technical solution

[0008] To achieve the above objective, a method for forming a thin film on a substrate having a first sub-pixel region and a second sub-pixel region includes: forming a first light-emitting layer in the first sub-pixel region, wherein the step of forming the first light-emitting layer in the first sub-pixel region includes forming a gallium (Ga)-containing semiconductor layer in the first sub-pixel region.

[0009] The method may further include forming a second light-emitting layer in the second sub-pixel region.

[0010] The step of forming the first light-emitting layer in the first sub-pixel region may further include: forming a pattern to cover the second sub-pixel region while exposing the first sub-pixel region before forming the gallium-containing semiconductor layer.

[0011] The step of forming the first light-emitting layer in the first sub-pixel region further includes: between the step of forming the pattern and the step of forming the gallium-containing semiconductor layer, forming a metal-containing seed layer in the first sub-pixel region, wherein the gallium-containing semiconductor layer is formed on the seed layer.

[0012] The step of forming a gallium (Ga)-containing semiconductor layer on a seed layer may include: forming a first gallium (Ga)-containing semiconductor layer on the seed layer, forming a second gallium (Ga)-containing semiconductor layer on the first semiconductor layer, and forming a third gallium (Ga)-containing semiconductor layer on the second semiconductor layer.

[0013] The first semiconductor layer contains P-type gallium nitride (GaN), the second semiconductor layer contains intrinsic gallium nitride (GaN) or indium gallium nitride (InGaN), and the third semiconductor layer may contain N-type gallium nitride (GaN).

[0014] The steps of forming a gallium (Ga) semiconductor layer on a seed layer can include atomic layer deposition (ALD) or metal-organic chemical vapor deposition (MOCVD).

[0015] The step of forming a gallium (Ga)-containing semiconductor layer on a seed layer may include depositing a semiconductor layer of less than 1 μm.

[0016] The method may further include forming a second light-emitting layer in the second sub-pixel region, and removing the pattern between the step of forming the first light-emitting layer and the step of forming the second light-emitting layer.

[0017] The step of forming a gallium (Ga)-containing semiconductor layer in the first sub-pixel region can be performed at a temperature below 400°C.

[0018] The lattice constant of the seed layer can be the same as that of the gallium (Ga)-containing semiconductor layer.

[0019] The seed layer may contain at least one of titanium (Ti), aluminum nitride (AlN), and zinc oxide (ZnO).

[0020] In addition, a method for forming a thin film on a substrate having a first sub-pixel region and a second sub-pixel region includes: forming a first light-emitting layer in the first sub-pixel region, wherein the step of forming the first light-emitting layer in the first sub-pixel region includes: preparing a substrate having a seed layer formed thereon, and forming a gallium-containing semiconductor layer on the seed layer.

[0021] In addition, a method for manufacturing an electroluminescent display device includes: forming a first sub-pixel region and a second sub-pixel region on a substrate, forming a first electrode in each of the first sub-pixel region and the second sub-pixel region, and forming a thin film on the first electrode in each of the first sub-pixel region and the second sub-pixel region, wherein the step of forming the thin film uses the aforementioned method for forming the thin film in the method for manufacturing an electroluminescent display device.

[0022] The step of forming the thin film further includes forming a second light-emitting layer in the second sub-pixel region, the second light-emitting layer disposed in the second sub-pixel region comprising an organic material, and the first light-emitting layer disposed in the first sub-pixel region emitting blue light, and the second light-emitting layer disposed in the second sub-pixel region emitting light of a different color than the first light-emitting layer.

[0023] Beneficial effects

[0024] According to this disclosure, the following effects can be achieved.

[0025] Unlike cases using organic materials, according to one embodiment of this disclosure, the sub-pixels disposed in the first sub-pixel region contain inorganic materials, and the characteristics of the pixels can be prevented from deteriorating even when the driving current is increased to increase lifetime and luminous efficiency.

[0026] Unlike cases where the entire subpixel is formed of inorganic material, according to one embodiment of this disclosure, the subpixel disposed in the first subpixel region contains inorganic material, and the subpixels disposed in the second and third subpixel regions contain organic material, thereby reducing production costs.

[0027] According to one embodiment of this disclosure, a subpixel disposed in a first subpixel region containing inorganic material emits blue light, and subpixels disposed in a second subpixel region and a third subpixel region containing organic material emit green light and red light, respectively, thereby overcoming the problem associated with the short lifespan of the subpixel used to emit blue light.

[0028] The effects of this disclosure are not limited to those described above, and other effects not mentioned will be clearly understood by those skilled in the art from the following description. Attached Figure Description

[0029] Figure 1 This is a schematic cross-sectional view of an electroluminescent display device manufactured by a method for manufacturing an electroluminescent display device according to an embodiment of the present disclosure.

[0030] Figure 2 This is a schematic diagram of a light-emitting layer disposed in a first sub-pixel formed by a method for forming a thin film according to an embodiment of the present disclosure.

[0031] Figures 3A to 3H A cross-sectional view illustrating a method of manufacturing an electroluminescent display device according to an embodiment of the present disclosure. Detailed Implementation

[0032] The advantages and features of this disclosure, as well as methods of carrying it, will be illustrated by the following embodiments described with reference to the accompanying drawings. However, this disclosure may be implemented in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure may be thoroughly and completely understood, and will fully convey the scope of this disclosure to those skilled in the art. Furthermore, this disclosure is defined only by the scope of the claims.

[0033] The shapes, dimensions, scales, angles, and quantities disclosed in the drawings used to describe embodiments of this disclosure are merely examples, and therefore this disclosure is not limited to the details shown. Throughout the specification, the same reference numerals denote the same components. In the following description, detailed descriptions of known functions or configurations will be omitted where it is determined that such detailed descriptions would unnecessarily obscure the focus of this disclosure. When using the terms "comprising," "having," and "including" as described in this specification, another component may be added unless "only" is used. Unless otherwise stated, singular terms may include plural forms.

[0034] Although the error is not described in detail when interpreting the component, the component should be interpreted as containing such an error.

[0035] When describing positional relationships, for example, when using terms such as "above," "on top of," "below," and "beside" to describe the positional order between two components, it is permissible to include cases where they are not in contact, unless terms such as "directly" or "right in front of" are used.

[0036] When describing temporal relationships, for example, when describing the order of time using terms such as "after," "following," "next," and "before," discontinuous situations may be included unless terms such as "immediately after" or "directly" are used.

[0037] It will be understood that while terms such as "first," "second," etc., may be used herein to describe various components, these components should not be limited to these terms. These terms are used only to distinguish components. For example, without departing from the scope of this disclosure, a first component may be named a second component, and similarly, a second component may be named a first component.

[0038] Features of the various embodiments of this disclosure may be coupled or combined with each other in part or in whole, and may operate and be technically driven in various ways in a manner that will be fully understood by those skilled in the art. Embodiments of this disclosure may be implemented independently of each other, or may be implemented together in a mutually dependent relationship.

[0039] The preferred embodiments of this disclosure will now be described in detail with reference to the accompanying drawings.

[0040] Figure 1 This is a schematic cross-sectional view of an electroluminescent display device manufactured by a method for manufacturing an electroluminescent display device according to an embodiment of the present disclosure.

[0041] like Figure 1 As shown, an electroluminescent display device manufactured by a method for manufacturing an electroluminescent display device according to an embodiment of the present disclosure includes a substrate 100, a buffer layer 110, a thin film transistor TR, a gate insulating film 130, an interlayer insulating film 150, a planarization layer 170, first electrodes 200a to 200c, a dam 210, a first light-emitting layer ELa, a second light-emitting layer ELa, a third light-emitting layer ELa, and a second electrode 220.

[0042] An electroluminescent display device according to an embodiment of the present disclosure may include a first sub-pixel region SP1, a second sub-pixel region SP2 and a third sub-pixel region SP3, and sub-pixels emitting different colors of light may be respectively disposed in sub-pixel regions SP1 to SP3.

[0043] According to one embodiment of this disclosure, a subpixel disposed in a first subpixel region SP1 can emit blue light, a subpixel disposed in a second subpixel region SP2 can emit green light, and a subpixel disposed in a third subpixel region SP3 can emit red light. However, this disclosure is not limited thereto, and a fourth subpixel region may be provided, including a subpixel for emitting white light.

[0044] The circuit region CA used to drive each sub-pixel can be set between each of the sub-pixel regions SP1 to SP3.

[0045] The substrate 100 can be formed of glass or plastic. In particular, the substrate 100 can be formed of a transparent plastic with flexible properties, such as polyimide. If a polyimide substrate 100 is used, a heat-resistant polyimide that can withstand high temperatures can be used, taking into account the high-temperature deposition process performed on the substrate 100.

[0046] A buffer layer 110 is formed on the substrate 100. The buffer layer 110 protects the active layer 120 by blocking air and moisture. The buffer layer 110 may be formed of an inorganic insulating material, such as silicon oxide, silicon nitride, or metal oxide, but is not limited thereto, or may be formed of an organic insulating material. The buffer layer 110 may be formed of a monolayer or a multilayer structure.

[0047] A thin-film transistor TR is formed on the buffer layer 110. The thin-film transistor TR can drive sub-pixels disposed in each of the sub-pixel regions SP1 to SP3. The thin-film transistor TR can, for example, drive a thin-film transistor TFT.

[0048] The thin-film transistor TR can be disposed in the circuit region CA. The thin-film transistor TR includes an active layer 120, a gate 140, a source 161, and a drain 162.

[0049] The active layer 120 is formed on the buffer layer 110. The active layer 120 may contain silicon-based semiconductor materials or oxide semiconductor materials.

[0050] The active layer 120 may include a channel portion 121, a first connection portion 122a disposed on one side of the channel portion 121 (e.g., the left side of the channel portion 121), and a second connection portion 122b disposed on the other side of the channel portion 121 (e.g., the right side of the channel portion 121), wherein the first connection portion 122a and the second connection portion 122b may be used as lines or electrodes because they have better conductivity characteristics than the channel portion 121.

[0051] The gate insulating film 130 can be disposed on the active layer 120. Specifically, the gate insulating film 130 can be disposed on the entire surface of the substrate 100, and can be disposed on the active layer 120 and the buffer layer 110. Therefore, the active layer 120 can be surrounded by the buffer layer 110 and the gate insulating film 130, but is not limited thereto. The gate insulating film 130 can be patterned by using the gate 140 as a mask so that one end and the other end of the gate insulating film 130 can correspond to one end and the other end of the gate 140.

[0052] The gate insulating film 130 may contain a silicon nitride film (SiN). x or silicon oxide film SiO xHowever, this is not a limitation. The gate insulating film 130 may comprise a single layer or multiple layers containing inorganic and / or organic insulating materials.

[0053] The gate 140 may be disposed on the gate insulating film 130. The gate 140 may be disposed on the active layer 120. Specifically, the gate 140 may overlap the channel portion 121 of the active layer 120.

[0054] The gate 140 may contain at least one of the following: aluminum-based metals such as aluminum (Al) or aluminum alloys; silver-based metals such as silver (Ag) or silver alloys; copper-based metals such as copper (Cu) or copper alloys; molybdenum-based metals such as molybdenum (Mo) or molybdenum alloys; chromium (Cr); tantalum (Ta); neodymium (Nd); and titanium (Ti). The gate 140 may have a structure comprising a single metal layer or a multilayer structure comprising at least two metal layers with different physical properties.

[0055] The interlayer insulating film 150 insulates the gate 140 from the source 161 and further insulates the gate 140 from the drain 162. The interlayer insulating film 150 may comprise a single layer or multiple layers containing inorganic and / or organic insulating materials.

[0056] The source 161 and drain 162 may be disposed on the interlayer insulating film 150. The source 161 and drain 162 may be formed of the same material as the gate 140, but are not limited thereto. The source 161 and drain 162 may be formed of materials according to common knowledge in the art.

[0057] The source electrode 161 can be electrically connected to one side of the active layer 120 (e.g., the first connection portion 122a), and the drain electrode 162 can be electrically connected to the other side of the active layer 120 (e.g., the second connection portion 122b). Specifically, the source electrode 161 can be connected to the first connection portion 122a of the active layer 120 through contact holes (not shown) provided in the gate insulating film 130 and the interlayer insulating film 150, and the drain electrode 162 can be connected to the second connection portion 122b of the active layer 120 through contact holes (not shown) provided in the gate insulating film 130 and the interlayer insulating film 150.

[0058] A planarization layer 170 is disposed on the source 161 and the drain 162. When a contact hole (not shown) is disposed in the planarization layer 170, the source 161 is exposed by the contact hole (not shown). However, in some cases, the drain 162 may be exposed by the contact hole (not shown).

[0059] First electrodes 200a to 200c are formed on planarization layer 170 and connected to source 161 or drain 162 through contact holes (not shown). First electrodes 200a to 200c can function as anodes.

[0060] The embankment 210 is disposed at the edge of the first electrodes 200a to 200c, thereby defining the light-emitting area. Therefore, the upper surface area of ​​the first electrodes 200a to 200c exposed but not covered by the embankment 210 will become the light-emitting area.

[0061] According to one embodiment of the present disclosure, the sub-pixels disposed in the first sub-pixel region SP1 may have different structures from the sub-pixels disposed in the second sub-pixel region SP2 and the sub-pixels disposed in the third sub-pixel region SP3.

[0062] According to one embodiment of this disclosure, a sub-pixel disposed in a first sub-pixel region SP1 may include a first light-emitting layer ELa, a sub-pixel disposed in a second sub-pixel region SP2 may include a second light-emitting layer ELb, and a sub-pixel disposed in a third sub-pixel region SP3 may include a third light-emitting layer ELc.

[0063] In this case, the first light-emitting layer ELa can contain inorganic materials, and the second light-emitting layer ELb and the third light-emitting layer ELc can contain organic materials. Therefore, the sub-pixel disposed in the first sub-pixel region SP1 contains a micro LED device, and the sub-pixels disposed in the second sub-pixel region SP2 and the third sub-pixel region SP3 contain an organic light-emitting diode (OLED) device.

[0064] The first light-emitting layer ELa includes a seed layer 310, a first semiconductor layer 320, a second semiconductor layer 330, and a third semiconductor layer 340. Meanwhile, reference will be made to... Figure 2 Describe the structure of the first light-emitting layer, Ela, in detail.

[0065] Although not illustrated in detail, the second light-emitting layer ELb and the third light-emitting layer ELc may include a hole injection layer HIL, a hole transport layer HTL, a light-emitting layer, an electron transport layer ETL, and an electron injection layer EIL. In some cases, an electron blocking layer EBL may be disposed between the light-emitting layer and the hole transport layer HTL, and the hole blocking layer HBL may be disposed between the light-emitting layer and the electron transport layer ETL.

[0066] The second electrode 220 is disposed on the light-emitting layers ELa, ELb, and ELc. The second electrode 220 can function as a cathode.

[0067] The second electrode 220 can be continuously disposed in the first sub-pixel region SP1 to the third sub-pixel region SP3, and can be disposed in a shared electrode configuration. However, this disclosure is not limited thereto.

[0068] Although not shown, an encapsulation layer for preventing the penetration of moisture or oxygen may be additionally formed on the second electrode 220.

[0069] Figure 2 This is a schematic diagram of a first light-emitting layer disposed in a first sub-pixel region formed by a thin film forming method according to an embodiment of the present disclosure. In this case, because the first sub-pixel region and Figure 1 The first sub-pixel regions of the electroluminescent display devices shown are the same, so repeated descriptions of them will be omitted.

[0070] like Figure 2 As shown, the sub-pixel disposed in the first sub-pixel region SP1 may include a first electrode 200a, a seed layer 310, a first semiconductor layer 320, a second semiconductor layer 330, a third semiconductor layer 340, and a second electrode 220. Simultaneously, the first electrode 200a and the second electrode 220 are connected to a reference... Figure 1 The first and second electrodes are described as being the same, so repeated descriptions of them will be omitted.

[0071] The first electrode 200a may contain indium tin oxide (ITO).

[0072] The seed layer 310 can be disposed on the first electrode 200a. When the seed layer 310 is disposed on the first electrode 200a, the first semiconductor layer 320 can be easily deposited on the first sub-pixel region SP1.

[0073] The seed layer 310 can be formed by sputtering or atomic layer deposition (ALD).

[0074] The seed layer 310 may contain at least one of titanium (Ti), aluminum nitride (AlN), and zinc oxide (ZnO). Furthermore, the seed layer 310 may preferably have a hexagonal close-packed structure (HCP). Therefore, the lattice constant of the seed layer 310 is the same as or similar to the lattice constant of the first semiconductor layer 320, and the first semiconductor layer 320 can be easily deposited on the seed layer 310.

[0075] The first semiconductor layer 320 may be formed on the seed layer 310. The first semiconductor layer 320 contains a material containing gallium (Ga). For example, the first semiconductor layer 320 may contain a material containing p-type gallium (Ga). For example, the first semiconductor layer 320 may contain a gallium nitride GaN:Mg doped with magnesium (Mg).

[0076] According to one embodiment of this disclosure, the first semiconductor layer 320 can be deposited on the first seed layer 310 by atomic layer deposition (ALD) or metal-organic chemical vapor deposition (MOCVD). Alternatively, if atomic layer deposition (ALD) or metal-organic chemical vapor deposition (MOCVD) is used, the first semiconductor layer 320 can be formed by forming plasma inside the cavity used to form the first semiconductor layer 320 to the third semiconductor layer 340.

[0077] The second semiconductor layer 330 may be formed on the first semiconductor layer 320. The second semiconductor layer 330 contains a material containing gallium (Ga). Specifically, the second semiconductor layer 330 may contain a material containing intrinsic gallium (Ga), or it may contain a material containing indium (In) and gallium (Ga). For example, the second semiconductor layer 330 may contain intrinsic gallium nitride (GaN) or indium gallium nitride (InGaN). In this case, the second semiconductor layer 330 may be formed from a monolayer of intrinsic gallium nitride (GaN), a monolayer of indium gallium nitride (InGaN), or a multilayer obtained by alternately stacking intrinsic gallium nitride (GaN) and indium gallium nitride (InGaN).

[0078] According to one embodiment of this disclosure, the second semiconductor layer 330 can be disposed on the first semiconductor layer 320 by atomic layer deposition (ALD) or metal-organic chemical vapor deposition (MOCVD). Furthermore, if atomic layer deposition (ALD) or metal-organic chemical vapor deposition (MOCVD) is used, the second semiconductor layer 330 can be formed by forming plasma inside the cavity used to form the first semiconductor layer 320 to the third semiconductor layer 340.

[0079] A third semiconductor layer 340 may be formed on the second semiconductor layer 330. The third semiconductor layer 340 contains a gallium (Ga)-containing material. Specifically, the third semiconductor layer 340 contains N-type gallium (Ga). For example, the third semiconductor layer 340 may contain gallium nitride GaN:Si doped with silicon Si.

[0080] According to one embodiment of this disclosure, the third semiconductor layer 340 can be disposed on the second semiconductor layer 330 by atomic layer deposition (ALD) or metal-organic chemical vapor deposition (MOCVD). Furthermore, if atomic layer deposition (ALD) or metal-organic chemical vapor deposition (MOCVD) is used, the third semiconductor layer 340 can be formed by forming plasma inside the cavity used to form the first semiconductor layer 320 to the third semiconductor layer 340.

[0081] The second electrode 220 may be formed on the third semiconductor layer 340. The second electrode 220 may be formed of magnesium (Mg), silver (Ag), or an alloy of magnesium (Mg) and silver (Ag). However, this disclosure is not limited thereto, and the second electrode 220 may be formed of various materials according to common knowledge in the art.

[0082] According to one embodiment of this disclosure, when the seed layer 310, the first semiconductor layer 320, the second semiconductor layer 330, and the third semiconductor layer 340 in the first light-emitting layer ELa disposed in the first sub-pixel region SP1 are formed by atomic layer deposition (ALD), the first light-emitting layer ELa disposed in the first sub-pixel region SP1 can be formed to have a small thickness of less than 1 μm. When the first light-emitting layer ELa is formed by atomic layer deposition (ALD), a micro LED with a smaller thickness than that in the prior art can be realized.

[0083] Figures 3A to 3H This is a cross-sectional view illustrating a method for manufacturing an electroluminescent display device according to an embodiment of the present disclosure.

[0084] First, such as Figure 3A As shown, after forming the substrate 100, buffer layer 110, thin-film transistor TR, gate insulating film 130, interlayer insulating film 150, and planarization layer 170, first electrodes 200a, 200b, and 200c can be formed on the planarization layer 170. Specifically, the first electrodes 200a, 200b, and 200c can be formed on the planarization layer 170 respectively to correspond to the first sub-pixel region SP1 (see...). Figure 1 SP1), the second sub-pixel region SP2 (see Figure 1 SP2) and the third sub-pixel region (see SP2) and the third sub-pixel region (see Figure 1 SP3).

[0085] Next, as Figure 3B As shown, in order to form a sub-pixel set in the first sub-pixel region SP1 (see... Figure 1 SP1), pattern 400 can be formed to cover the first sub-pixel region (see SP1). Figure 1 The remaining area other than SP1. Pattern 400 can be a resist pattern, a photoresist pattern, or a mask, but is not limited to these.

[0086] Pattern 400 may have a first sub-pixel region corresponding to the sub-pixels used to form sub-pixels containing inorganic materials (see...). Figure 1 The open region 410 of SP1 can be exposed in this case. Figure 1 A portion of the upper surface of the first electrode 200a in SP1).

[0087] Next, as Figure 3C As shown, the seed material layer 310a can be formed to cover the side surface of the first electrode 200a, the pattern 400, and the first sub-pixel region SP1 (see...). Figure 1 The upper surface of pattern 400 in SP1). In seed layer 310 (see...) Figure 1Before the formation of the seed material layer 310a, the seed material layer 310a can be formed on the substrate (see 310). Figure 1 The entire surface of the layer (100) is covered.

[0088] The seed material layer 310a may contain any of titanium (Ti), aluminum nitride (AlN), and zinc oxide (ZnO). The seed material layer 310a may be formed on the photoresist pattern 400 by atomic layer deposition (ALD).

[0089] Next, as Figure 3D As shown, the first semiconductor material layer 320a, the second semiconductor material layer 330a, and the third semiconductor material layer 340a can be sequentially formed on the seed material layer 310a. In this case, before the formation of the first semiconductor layer 320, the second semiconductor layer 330, and the third semiconductor layer 340, the first semiconductor material layer 320a, the second semiconductor material layer 320b, and the third semiconductor material layer 330c are formed on the substrate (see...). Figure 1 The entire surface of the layer (100) is covered.

[0090] According to one embodiment of this disclosure, each of the first semiconductor material layer 320a, the second semiconductor material layer 330a, and the third semiconductor material layer 340a can be deposited by atomic layer deposition (ALD) or metal-organic chemical vapor deposition (MOCVD).

[0091] The first semiconductor material layer 320a may, for example, comprise p-type gallium (Ga). More specifically, the first semiconductor material layer 320a may comprise p-type gallium nitride (GaN:Mg) doped with magnesium (Mg).

[0092] Furthermore, a second semiconductor material layer 330a is formed on the first semiconductor material layer 320a. For example, the second semiconductor material layer 330a may contain a material containing intrinsic gallium (Ga) or a material containing indium (In) and gallium (Ga). More specifically, the second semiconductor material layer 330a may contain intrinsic gallium nitride (GaN) or indium gallium nitride (InGaN). Simultaneously, the second semiconductor material layer 330a may be formed from a monolayer of intrinsic gallium nitride (GaN), a monolayer of indium gallium nitride (InGaN), or a multilayer obtained by alternately stacking intrinsic gallium nitride (GaN) and indium gallium nitride (InGaN).

[0093] A third semiconductor material layer 340a is formed on the second semiconductor material layer 330a. For example, the third semiconductor material layer 340a contains N-type gallium (Ga). Specifically, the third semiconductor material layer 340a may contain N-type gallium nitride GaN:Si doped with silicon (Si).

[0094] Next, as Figure 3E As shown, a portion of the seed material layer 310a, a portion of the first semiconductor material layer 320a, a portion of the second semiconductor material layer 330a, and a portion of the third semiconductor material layer 340a can be patterned to form a first sub-pixel region (see...). Figure 1 A seed layer 310, a first semiconductor layer 320, a second semiconductor layer 330 and a third semiconductor layer 340 are formed in SP1.

[0095] Therefore, the first light-emitting layer ELa is formed in the first sub-pixel region (see...). Figure 1 On the first electrode 210a of SP1).

[0096] Meanwhile, although not specifically shown in the accompanying drawings, after the formation of the seed layer 310, the first semiconductor layer 320, the second semiconductor layer 330, and the third semiconductor layer 340, the layers disposed on the substrate (see Figure 1) can be removed. Figure 1 The pattern 400 on the entire surface of the 100 (except for the first sub-pixel region (see 100)) Figure 1 (Except for SP1). In this case, pattern 400 can be removed by stripping, but is not limited to this.

[0097] The seed layer 310, the first semiconductor layer 320, the second semiconductor layer 330, and the third semiconductor layer 340 can be formed in the first sub-pixel region (see See Figure 1 On the first electrode 200a of SP1). In this case, a portion of the upper surface of the first electrode 200a is not exposed to the seed layer 310 to the third semiconductor layer 330, but the side surface of the first electrode 200a and the rest of the upper surface of the first electrode 200a can be exposed to the outside.

[0098] According to one embodiment of this disclosure, pattern 400 is formed in a first sub-pixel region (see...). Figure 1 After forming a seed layer 310, a first semiconductor layer 320, a second semiconductor layer 330, and a third semiconductor layer 340 in the remaining areas other than SP1, such that no inorganic material is formed in the first sub-pixel region (see...). Figure 1 The second sub-pixel region SP2 (see SP1) is outside of SP1. Figure 1 SP2) or the third sub-pixel region (see SP2) or the third sub-pixel region (see Figure 1 On the first electrode 200b or the first electrode 200c in SP3).

[0099] Next, as Figure 3F As shown, the embankment 210 can be formed on the first electrodes 200a, 200b, and 200c. In this case, the embankment 210 can be patterned to expose the first sub-pixel region SP1 (see...). Figure 1SP1), the second sub-pixel region SP2 (see Figure 1 SP2) and the third sub-pixel region SP3 (see SP2) Figure 1 The first electrode 200a, 200b, 200c of SP3) has multiple portions. Specifically, in the first sub-pixel region (see... Figure 1 In the case of SP1, a dam 210 can be formed, exposing the upper surface of the third semiconductor layer 340, while the remaining portion of the upper surface of the first electrode 200a, the side surface of the first electrode 200a, and the side surfaces of the seed layer 310, the first semiconductor layer 320, the second semiconductor layer 330, and the third semiconductor layer 340 are covered. Meanwhile, in the second sub-pixel region SP2 (see... Figure 1 SP2) and the third sub-pixel region (see SP2) and the third sub-pixel region (see Figure 1 In the case of SP3), the embankment 210 can be formed to cover part of the side surfaces of the first electrodes 200b and 200c and the upper surface of the first electrodes 200b and 200c.

[0100] Next, as Figure 3G As shown, the second luminescent layer ELb and the third luminescent layer ELc can be formed in the second sub-pixel region SP2 (see...). Figure 1 SP2) and the third sub-pixel region SP3 (see SP2) Figure 1 In SP3).

[0101] Light-emitting layers that emit different colors of light can be respectively set on the second light-emitting layer ELb and the third light-emitting layer ELc using fine metal masks (FMM).

[0102] First, the second light-emitting layer ELb is formed in the second sub-pixel region SP2 using an FMM mask for forming the second light-emitting layer ELb (see...). Figure 1 After SP2), the third emitting layer ELc can be formed in the third sub-pixel region by using another FMM mask for forming the third emitting layer ELc (see SP2). Figure 1 In SP3). However, this disclosure is not limited to this, and the second light-emitting layer ELb and the third light-emitting layer ELc can be formed by an inkjet process.

[0103] Finally, as Figure 3H As shown, the second electrode 220 can be formed on the entire surface of the substrate 100. Specifically, the second electrode 220 can be disposed on the entire surface of the substrate 100 to cover the first light-emitting layer Ela disposed in the first sub-pixel region SP1, the second light-emitting layer ELb disposed in the second sub-pixel region SP2, the third light-emitting layer ELc disposed in the third sub-pixel region SP3, and the upper surface and side surface of the embankment 210.

[0104] The second electrode 220 may comprise magnesium (Mg), silver (Ag), or an alloy of magnesium (Mg) and silver (Ag). However, this disclosure is not limited thereto.

[0105] When the second electrode 220 is formed over the entire surface of the substrate 100, an electroluminescent display device according to an embodiment of the present disclosure can be implemented. Although not illustrated, after the second electrode 220 is formed, an encapsulation layer can be formed to block moisture or oxygen introduced from the outside.

[0106] Although this disclosure has been described in detail with reference to the accompanying drawings, it is not necessarily limited to these embodiments, and modifications can be made in various ways without departing from the scope and spirit of this disclosure. Therefore, the embodiments disclosed herein are intended to illustrate the scope of the technical concept of this disclosure, and the scope of the technical concept of this disclosure is not limited to these embodiments. It should be understood that the above embodiments are exemplary and do not limit all possibilities. The scope of this disclosure should be interpreted according to the claims, and all technical concepts within the scope of the equivalents of the claims should be interpreted as being included within the scope of this disclosure.

Claims

1. A method for forming a thin film on a substrate having a first sub-pixel region and a second sub-pixel region, comprising: A first light-emitting layer is formed in the first sub-pixel region. The step of forming the first light-emitting layer in the first sub-pixel region includes forming a gallium (Ga)-containing semiconductor layer in the first sub-pixel region.

2. The method of claim 1, further comprising forming a second light-emitting layer in the second sub-pixel region.

3. The method as described in claim 1, wherein, The step of forming the first light-emitting layer in the first sub-pixel region further includes: Before forming the gallium-containing semiconductor layer, a pattern is formed to cover the second sub-pixel region while exposing the first sub-pixel region.

4. The method of claim 3, wherein, The step of forming the first light-emitting layer in the first sub-pixel region further includes: Between the step of forming the pattern and the step of forming the gallium-containing semiconductor layer, a metal-containing seed layer is formed in the first sub-pixel region. The gallium-containing semiconductor layer is formed on the seed layer.

5. The method of claim 4, wherein, The step of forming the gallium (Ga)-containing semiconductor layer on the seed layer includes: A first gallium (Ga)-containing semiconductor layer is formed on the seed layer; A second gallium (Ga)-containing semiconductor layer is formed on the first semiconductor layer; and A gallium (Ga)-containing third semiconductor layer is formed on the second semiconductor layer.

6. The method of claim 5, wherein, The first semiconductor layer comprises p-type gallium nitride (GaN). The second semiconductor layer comprises intrinsic gallium nitride (GaN) or indium gallium nitride (InGaN), and The third semiconductor layer comprises N-type gallium nitride (GaN).

7. The method of claim 4, wherein, The step of forming the gallium (Ga)-containing semiconductor layer on the seed layer uses atomic layer deposition (ALD) or metal-organic chemical vapor deposition (MOCVD).

8. The method of claim 4, wherein, The step of forming the gallium (Ga)-containing semiconductor layer on the seed layer includes depositing the semiconductor layer to a depth of less than 1 μm.

9. The method of claim 3, further comprising: A second light-emitting layer is formed in the second sub-pixel region; as well as The pattern is removed between the step of forming the first light-emitting layer and the step of forming the second light-emitting layer.

10. The method of claim 1, wherein, The step of forming the gallium (Ga)-containing semiconductor layer in the first sub-pixel region is performed at a temperature below 400°C.

11. The method of claim 4, wherein, The lattice constant of the seed layer is the same as that of the gallium (Ga)-containing semiconductor layer.

12. The method of claim 4, wherein, The seed layer contains at least one of titanium (Ti), aluminum nitride (AlN), and zinc oxide (ZnO).

13. A method for forming a thin film on a substrate having a first sub-pixel region and a second sub-pixel region, comprising: A first light-emitting layer is formed in the first sub-pixel region. The step of forming the first light-emitting layer in the first sub-pixel region includes: Preparing a substrate with a seed layer; and A gallium-containing semiconductor layer is formed on the seed layer.

14. A method for manufacturing an electroluminescent display device, comprising: A first sub-pixel region and a second sub-pixel region are formed on the substrate; A first electrode is formed in each of the first sub-pixel region and the second sub-pixel region; as well as A thin film is formed on the first electrode in each of the first sub-pixel region and the second sub-pixel region. The step of forming the thin film is performed by the method for forming the thin film as described in any one of claims 1 to 13.

15. The method of claim 14, wherein, The step of forming the thin film further includes forming a second light-emitting layer in the second sub-pixel region. The second light-emitting layer disposed in the second sub-pixel region comprises an organic material, and The first light-emitting layer disposed in the first sub-pixel region emits blue light, and the second light-emitting layer disposed in the second sub-pixel region emits light of a different color than the first light-emitting layer.

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