Analog frequency locking circuit, analog frequency locking method and power converter using analog frequency locking circuit

Abstract

According to the analog frequency locking circuit, the analog frequency locking method and the power converter applying the analog frequency locking circuit, the first control signal generating circuit generates the first control signal based on the actual working frequency signal and the reference frequency signal of the system, and the current source generating circuit generates the second current source or the third current source based on the first control signal. When the system is in a conduction stage, the third current source is used for charging the first capacitor, the second current source is used for discharging the first capacitor, and based on the effects of the first current source, the second current source and the third current source, capacitor voltage is generated on the first capacitor, so that the actual working frequency of the system is stabilized at the reference frequency. Through a simulation mode, the actual working frequency of the system is stabilized at the reference frequency, the frequency modulation result is stable and accurate, the adjustment speed is determined by a loop and is relatively high, and compared with the prior art, the use of a large number of D triggers can be avoided, and the chip area is saved.

Description

Technical Field

[0001] The present invention relates to the field of power electronics, and particularly to an analog frequency-locking circuit, a method, and a power converter applying the same. Background Art

[0002] In the field of power supply applications, it is often necessary for the system operating frequency to be in a relatively stable state. However, during the operation of the system, due to the influence of input voltage, load current, or other factors, the operating frequency of the system often drifts with the operating conditions, thereby deteriorating the output voltage ripple. Therefore, a frequency-locking circuit has emerged to stabilize the operating frequency of the system at a certain value. Existing digital frequency-locking solutions require multiple modules to cooperate (for example, ADC, DAC, and programmable gain amplifier module PGA, etc.), resulting in an increase in chip area and cost. One of the existing analog frequency-locking solutions is as follows. Taking a buck converter as an example, a ramp voltage Vc is generated by charging a capacitor C with a current Ivin that is in a certain proportional relationship with the input voltage Vin. The first input terminal of the first comparator receives Vc, and its second input terminal receives K*Vout. The ramp voltage Vc is compared with K*Vout (K is a preset value), and the conduction time Ton = Vout / (Vin*f) = C*K*Vout / Ivin is obtained; it can be seen from this formula that the conduction time Ton is inversely proportional to the system operating frequency f; within the actual switching period (1 / f), a capacitor is charged by a current source to generate a voltage Vf, and within the reference period (1 / fref), a capacitor is charged by a current source to generate a threshold voltage Vref. The second comparator compares Vf and Vref in real time. When Vf < Vref, it can be determined that f > fref, and the second input terminal of the first comparator can be set to K*Vout + ΔV, so that Ton increases to adjust the actual operating frequency f downwards; when Vf > Vref, it can be determined that f < fref, and the second input terminal of the first comparator can be set to K*Vout - ΔV, so that Ton decreases to adjust the actual operating frequency f upwards, finally making the actual operating frequency f of the system stable near the reference frequency fref; however, in this solution, a large number of D flip-flops are required, resulting in an increase in chip area; and due to factors such as capacitance tolerance and current source deviation, it is necessary to introduce test modes (such as calibration mode, compensation mode) to correct errors, resulting in redundant control logic and increased circuit complexity; and if the value of ΔV is too large, although the system response speed is relatively fast, the frequency locking accuracy will decrease, manifested as an increase in the frequency fluctuation range; on the contrary, if the value of ΔV is too small, the system dynamic response is sluggish and cannot track the output disturbance caused by changes in input voltage or load in a timely manner. Therefore, it is necessary to propose a new frequency-locking solution to solve the problems existing in the prior art. Summary of the Invention

[0003] To address the aforementioned technical problems, this invention provides an analog frequency-locking circuit, a method, and a power converter using the same.

[0004] According to a first aspect of the present invention, an analog frequency-locking circuit is provided for use in a power converter. The frequency-locking circuit includes a first current source, a first capacitor, and a first comparator. During a system conduction phase, the first current source charges the first capacitor; during a system turn-off phase, the voltage on the first capacitor is discharged to near zero. A first input terminal of the first comparator receives the capacitor voltage generated on the first capacitor, and a second input terminal of the first comparator receives the first voltage. When the capacitor voltage reaches the first voltage, the first comparator flips, indicating that the conduction phase has reached a corresponding duration. The characteristic of this circuit is...

[0005] The frequency locking circuit further includes a second current source and a third current source. When the system is in the conduction phase, the third current source is used to charge the first capacitor, and the second current source is used to discharge the first capacitor. Based on the effects of the first current source, the second current source, and the third current source, a capacitor voltage is generated on the first capacitor.

[0006] The frequency locking circuit further includes a first control signal generation circuit and a current source generation circuit. The first control signal generation circuit generates a first control signal based on the actual operating frequency signal and the reference frequency signal of the system. The current source generation circuit generates a second current source or the third current source based on the first control signal, so as to stabilize the actual operating frequency of the system at the reference frequency.

[0007] Optionally, the first control signal generation circuit includes a frequency-to-voltage circuit and an operational amplifier module. The frequency-to-voltage circuit receives the actual operating frequency signal and the reference frequency signal of the system, and converts them into a second voltage and a third voltage, respectively. The operational amplifier module generates the first control signal based on the second voltage and the third voltage.

[0008] Optionally, the second current source is a preset value. When the actual operating frequency signal of the system is less than the reference frequency signal, the second voltage is greater than the third voltage. The current source generating circuit receives the first control signal and generates the third current source to stabilize the actual operating frequency of the system at the reference frequency.

[0009] Optionally, the third current source is a preset value. When the actual operating frequency signal of the system is greater than the reference frequency signal, the second voltage is less than the third voltage. The current source generating circuit receives the first control signal and generates the second current source to stabilize the actual operating frequency of the system at the reference frequency.

[0010] Optionally, when the actual operating frequency signal of the system is less than the reference frequency signal, the second voltage is greater than the third voltage, and the current source generating circuit receives the first control signal and generates the third current source to stabilize the actual operating frequency of the system at the reference frequency.

[0011] When the actual operating frequency signal of the system is greater than the reference frequency signal, the second voltage is less than the third voltage. The current source generating circuit receives the first control signal and generates the second current source to stabilize the actual operating frequency of the system at the reference frequency.

[0012] Optionally, the current source generating circuit includes a first transistor, the first control signal acts on the control terminal of the first transistor, the current flowing through the first transistor is adjusted based on the magnitude of the first control signal, and a corresponding current source is generated based on the current flowing through the first transistor.

[0013] Optionally, the first current source and the first voltage are set based on the type of the power converter, wherein the type of the power converter includes boost, buck, and buck-boost power converters.

[0014] Optionally, the frequency-to-voltage circuit includes a first D flip-flop, a first frequency conversion circuit, a second D flip-flop, and a second frequency conversion circuit. The first D flip-flop receives the actual power frequency signal of the system and divides it by two to generate a first frequency signal. The first frequency-to-voltage circuit receives the first frequency signal and converts it into a second voltage. The second D flip-flop receives the reference frequency signal and divides it by two to generate a second frequency signal. The second frequency-to-voltage circuit receives the second frequency signal and converts it into a third voltage.

[0015] This invention also provides an analog frequency locking method applied in a power converter, which has the functions of the analog frequency locking circuit described above. During the system's on-phase, a first current source charges a first capacitor; during the system's off-phase, the voltage on the first capacitor is discharged to near zero potential. The capacitor voltage generated on the first capacitor is compared with a first voltage; when the capacitor voltage reaches the first voltage, it indicates that the on-phase has reached a corresponding duration. The invention is characterized by...

[0016] When the system is in the conduction phase, the third current source is used to charge the first capacitor, and the second current source is used to discharge the first capacitor. Based on the effects of the first current source, the second current source, and the third current source, a capacitor voltage is generated on the first capacitor.

[0017] It generates a first control signal based on the system's actual operating frequency signal and a reference frequency signal, and generates a second current source or a third current source through the first control signal to stabilize the system's actual operating frequency at the reference frequency.

[0018] The present invention also provides a power converter, characterized in that it includes the analog frequency-locking circuit described above.

[0019] The beneficial effects of the present invention include at least the following:

[0020] In summary, the analog frequency-locking circuit, method, and power converter using the present invention provide a first control signal generation circuit that generates a first control signal based on the system's actual operating frequency signal and a reference frequency signal. A current source generation circuit generates a second or third current source based on the first control signal. When the system is in the conduction phase, the third current source charges the first capacitor, and the second current source discharges the first capacitor. Based on the effects of the first, second, and third current sources, a capacitor voltage is generated on the first capacitor, thereby stabilizing the system's actual operating frequency at the reference frequency. The present invention achieves stable and accurate frequency modulation by simulating the actual operating frequency of the system at the reference frequency. Furthermore, the adjustment speed is determined by the loop, resulting in a relatively fast adjustment speed. Compared to existing technologies, it avoids the use of numerous D flip-flops, saving chip area.

[0021] It should be noted that the above general description and the following detailed description are exemplary and explanatory only, and do not limit the present invention. Attached Figure Description

[0022] Figure 1 A schematic diagram of the analog frequency locking circuit provided by the present invention is shown;

[0023] Figure 2 A schematic diagram of a first control signal generation circuit and a current source generation circuit provided by the present invention is shown.

[0024] Figure 3 An embodiment of the analog frequency locking circuit provided by the present invention is shown;

[0025] Figure 4 Another embodiment of the analog frequency-locking circuit provided by the present invention is shown;

[0026] Figure 5 An embodiment of the first control signal generation circuit provided by the present invention is shown;

[0027] Figure 6 Another embodiment of the first control signal generation circuit provided by the present invention is shown. Detailed Implementation

[0028] To facilitate understanding of the present invention, a more complete description will be given below with reference to the accompanying drawings. Preferred embodiments of the invention are shown in the drawings. However, the invention can be implemented in various forms and is not limited to the embodiments described herein. Rather, these embodiments are provided to provide a thorough and complete understanding of the disclosure of the invention.

[0029] like Figure 1 The diagram shown is a schematic of an analog frequency-locking circuit provided by the present invention. This analog frequency-locking circuit is applied in a power converter and includes a first current source I1, a first capacitor C1, and a first comparator CMP1. During the system's on-state (i.e., within the time ton), the first current source I1 charges the first capacitor C1. During the system's off-state, the voltage VC on the first capacitor C1 is discharged to near zero potential (ideally zero potential). The first input terminal of the first comparator CMP1 receives the capacitor voltage VC generated on the first capacitor C1, and the second input terminal of the first comparator CMP1 receives a first voltage V1. When the capacitor voltage VC reaches the first voltage V1, the first comparator CMP1 flips, indicating that the on-state has reached the corresponding duration (i.e., the system on-state time Ton has reached the corresponding duration). Based on the comparator output VCMP1, corresponding control is implemented. The principle of subsequent control based on VCMP1 can be found in the prior art and will not be described in detail here. Figure 1 The diagram also shows a first switch S1 and a second switch S2, wherein the first switch S1 is closed during the system conduction phase to charge the first capacitor, and the second switch S2 is used to discharge the capacitor voltage VC in order to form a discharge path. Figure 1 The connection method of the first switch S1 and the second switch S2 is only illustrative; other connection methods can also be used to achieve the functions described above. The first current source I1 and the first voltage V1 mentioned above are related to the type of power converter. For example, when the power converter is a buck converter, as in the prior art, the first current source I1 is a current Ivin that is proportional to the input voltage Vin (which can also be considered as K1*Vin), and the first voltage V1 is equal to K2*Vout; when the power converter is a boost converter, the first current source I1 is equal to K1*Vout, and the first voltage V1 is equal to K2*(Vout-Vin); when the power converter is a buck-boost converter, the first current source I1 is equal to K1*(Vout+Vin), and the first voltage V1 is equal to K2*Vout. The values ​​of K1 and K2 can be set according to the actual application.

[0030] like Figure 1 As shown, the frequency locking circuit in this invention further includes a second current source I2, a third current source I3, a first control signal generation circuit, and a current source generation circuit. Figure 1(I2 and I3 are used as illustrations). When the system is in the conduction phase, the third current source I3 charges the first capacitor C1, and the second current source I2 discharges the first capacitor C1. Based on the effects of the first current source I1, the second current source I2, and the third current source I3, a capacitor voltage VC is generated across the first capacitor C1. The first control signal generation circuit generates a first control signal VK1 based on the system's actual operating frequency signal f_actual and the reference frequency signal f_ref. The current source generation circuit generates either the second current source I2 or the third current source I3 from the first control signal VK1 to stabilize the system's actual operating frequency f_actual at the reference frequency f_ref. The reference frequency signal can be generated using existing technologies, which will not be elaborated further.

[0031] Figure 2 The diagram shows an embodiment of the first control signal generation circuit and the current source generation circuit provided by the present invention. The first control signal generation circuit includes a frequency-to-voltage circuit and an operational amplifier module A. The frequency-to-voltage circuit receives the actual operating frequency signal f_actual and the reference frequency signal f_ref of the system, and converts them into a second voltage V2 and a third voltage V3, respectively. The operational amplifier module A generates a first control signal VK1 based on the second voltage V2 and the third voltage V3. The current source generation circuit 10-1 generates a second current source I2 or a third current source I3 based on the first control signal VK1.

[0032] Furthermore, Figure 3 The diagram shows an embodiment of the analog frequency-locking circuit of the present invention, combined with... Figure 2 In this embodiment, the second current source I2 is set to a preset value. This preset value prevents the actual operating frequency of the system from exceeding the reference frequency. This preset value can be predicted during circuit design, taking into account factors such as process deviations. In this embodiment, when the actual operating frequency signal f_actual is less than the reference frequency signal f_ref, the second voltage V2 is greater than the third voltage V3. The current source generating circuit receives the first control signal VK1 and generates the third current source I3 to stabilize the actual operating frequency of the system at the reference frequency. The current source generating circuit includes... Figure 2 10-1 and Figure 3 10-2 in the middle, Figure 2 and Figure 3The diagram illustrates one embodiment of a current source generating circuit. The current source generating circuit 10-1 includes a first transistor M1. A first control signal VK1 acts on the control terminal of the first transistor M1. The current flowing through the first transistor M1 is adjusted based on the magnitude of the first control signal VK1 (in this embodiment, I3 = (VK1 - Vgsm1) / R1). A third current source I3 is generated based on the current flowing through the first transistor M1. For example, the current on the first transistor M1 is mirrored and output through the current source generating circuit 10-2 (the second transistor M2 and the third transistor M3 form a current mirror structure. In this embodiment, the mirror ratio is 1:1, but other ratios can also be set) to obtain the third current source I3.

[0033] Figure 4 The diagram illustrates another embodiment of the analog frequency-locking circuit of the present invention. In this embodiment, the third current source I3 is set to a preset value. This preset value prevents the actual operating frequency of the system from being lower than the reference frequency. Similarly, this preset value can be predicted during circuit design, taking into account factors such as process deviations. When the actual operating frequency signal f_actual of the system is greater than the reference frequency signal f_ref, the second voltage V2 is less than the third voltage V3. The current source generating circuit receives the first control signal VK1 and generates the second current source I2 to stabilize the actual operating frequency of the system at the reference frequency. The current source generating circuit includes... Figure 2 10-1 and Figure 4 10-3 in the middle, Figure 2 and Figure 4 The diagram illustrates one embodiment of the current source generating circuit. As described above, the current source generating circuit 10-1 adjusts the current flowing through the first transistor M1 based on the magnitude of the first control signal VK1 (in this embodiment, I2 = (VK1 - Vgsm1) / R1), and generates a second current source I2 based on the current flowing through the first transistor M1. For example, the current on the first transistor M1 is mirrored and output by the current source generating circuit 10-3 (the fourth transistor M4 to the seventh transistor M7 form a current mirror structure; in this embodiment, the mirror ratio is 1:1, but other ratios can also be set) to obtain the second current source I2.

[0034] In another embodiment of the analog frequency-locking circuit of the present invention, the second current source I2 or the third current source I3 may not be set to a preset value. In this case, both current sources are generated by the current source generating circuit based on the first control signal VK1. Specifically, when the actual operating frequency signal f_actual of the system is less than the reference frequency signal f_ref, the second voltage V2 is greater than the third voltage V3. The current source generating circuit receives the first control signal VK1 and generates the third current source I3 to stabilize the actual operating frequency of the system at the reference frequency. When the actual operating frequency signal f_actual of the system is greater than the reference frequency signal f_ref, the second voltage V2 is less than the third voltage V3. The current source generating circuit receives the first control signal VK1 and generates the second current source I2 to stabilize the actual operating frequency of the system at the reference frequency.

[0035] It should be noted that the current source generating circuit described above is only an example, and the present invention is not limited to it. Other circuit structures can also be used to generate the corresponding current based on the first control signal VK1.

[0036] Figure 5 The illustration shows one embodiment of the generation of the first control signal, which can be applied to... Figure 3 In the embodiment shown, Figure 5 In the diagram, operational amplifier module A is the first operational amplifier A1. The frequency-to-voltage conversion circuit includes a first D flip-flop D1, a first frequency conversion circuit, a second D flip-flop D2, and a second frequency conversion circuit. The first D flip-flop D1 receives the actual power frequency signal f_actual of the system, based on... Figure 5 The first D flip-flop D1 is connected in such a way that it divides f_actual by two to generate a first frequency signal f1. A first frequency to voltage converter receives the first frequency signal f1 and converts it into a second voltage V2. The second D flip-flop D2 receives a reference frequency signal f_ref and, based on... Figure 5 The second D flip-flop D2 is connected in a manner that divides f_ref by two to generate a second frequency signal f2. A second frequency-to-voltage conversion circuit receives the second frequency signal f2 and converts it into a third voltage V3. The first input terminal of the first operational amplifier A1 receives the second voltage V2, and its second input terminal receives the third voltage V3, outputting a first control signal VK1. The second voltage V2 and the third voltage V3 can be inversely proportional to the magnitude of their respective frequency signals. The specific implementation of the first and second frequency conversion circuits can be found in existing technologies and will not be described in detail here. That is, when the actual operating frequency signal f_actual of the system is less than the reference frequency signal f_ref, the second voltage V2 is greater than the third voltage V3. The current source generation circuit receives the first control signal VK1 and generates a third current source I3, thereby stabilizing the actual operating frequency of the system at the reference frequency.

[0037] Figure 6 The diagram shows another embodiment of the generation of the first control signal, which can be applied to... Figure 4 In the embodiment shown, Figure 6 In this circuit, operational amplifier module A is the second operational amplifier A2. The frequency-to-voltage conversion circuit includes a first D flip-flop D1, a first frequency conversion circuit, a second D flip-flop D2, and a second frequency conversion circuit. The first D flip-flop D1 receives the actual power frequency signal f_actual of the system. Similarly, it divides f_actual by two to generate a first frequency signal f1. The first frequency-to-voltage conversion circuit receives the first frequency signal f1 and converts it into a second voltage V2. The second D flip-flop D2 receives the reference frequency signal f_ref and divides f_ref by two to generate a second frequency signal f2. The second frequency-to-voltage conversion circuit receives the second frequency signal f2 and converts it into a third voltage V3. The second input terminal of the second operational amplifier A2 receives the second voltage V2, and its first input terminal receives the third voltage V3, and outputs a first control signal VK1. The second voltage V2 and the third voltage V3 can be inversely proportional to the magnitude of their respective frequency signals. The specific implementation of the first and second frequency conversion circuits can be found in the prior art, and will not be described in detail here. That is, when the actual operating frequency signal f_actual of the system is greater than the reference frequency signal f_ref, the second voltage V2 is less than the third voltage V3. The current source generating circuit receives the first control signal VK1 and generates the second current source I2 to stabilize the actual operating frequency of the system at the reference frequency.

[0038] In another embodiment of the present invention, the first control signal generation circuit may include a first operational amplifier A1 and a second operational amplifier A2, used to realize that when the actual operating frequency signal f_actual of the system is less than the reference frequency signal f_ref, the second voltage V2 is greater than the third voltage V3, and the current source generation circuit receives the first control signal VK1 and generates the third current source I3; so as to stabilize the actual operating frequency of the system at the reference frequency; when the actual operating frequency signal f_actual of the system is greater than the reference frequency signal f_ref, the second voltage V2 is less than the third voltage V3, and the current source generation circuit receives the first control signal VK1 and generates the second current source I2, so as to stabilize the actual operating frequency of the system at the reference frequency.

[0039] The present invention also provides a simulated frequency locking method, which can achieve the functions described above. For details, please refer to the above description, which will not be repeated here.

[0040] The present invention also provides a power converter, which includes the analog frequency-locking circuit described above.

[0041] In summary, the analog frequency-locking circuit, method, and power converter using the present invention provide a first control signal generation circuit that generates a first control signal based on the system's actual operating frequency signal and a reference frequency signal. A current source generation circuit generates a second or third current source based on the first control signal. When the system is in the conduction phase, the third current source charges the first capacitor, and the second current source discharges the first capacitor. Based on the effects of the first, second, and third current sources, a capacitor voltage is generated on the first capacitor, thereby stabilizing the system's actual operating frequency at the reference frequency. The present invention achieves stable and accurate frequency modulation by simulating the actual operating frequency of the system at the reference frequency. Furthermore, the adjustment speed is determined by the loop, resulting in a relatively fast adjustment speed. Compared to existing technologies, it avoids the use of numerous D flip-flops, saving chip area.

[0042] Finally, it should be noted that the above embodiments are merely examples for clearly illustrating the present invention and are not intended to limit the implementation. Those skilled in the art will recognize that other variations or modifications can be made based on the above description. It is neither necessary nor possible to exhaustively list all possible implementations. However, obvious variations or modifications derived therefrom are still within the scope of protection of this invention.

Claims

1. An analog frequency-locking circuit, applied in a power converter, the frequency-locking circuit comprising a first current source, a first capacitor, and a first comparator, wherein during the system's on-state phase, the first current source charges the first capacitor, and during the system's off-state phase, the voltage on the first capacitor is discharged to near zero potential; a first input terminal of the first comparator receives the capacitor voltage generated on the first capacitor, and a second input terminal of the first comparator receives the first voltage; when the capacitor voltage reaches the first voltage, the first comparator flips, indicating that the on-state phase has reached a corresponding duration; characterized in that... The frequency locking circuit further includes a second current source and a third current source. When the system is in the conduction phase, the third current source is used to charge the first capacitor, and the second current source is used to discharge the first capacitor. Based on the effects of the first current source, the second current source, and the third current source, a capacitor voltage is generated on the first capacitor. The frequency locking circuit further includes a first control signal generation circuit and a current source generation circuit. The first control signal generation circuit generates a first control signal based on the actual operating frequency signal and the reference frequency signal of the system. The current source generation circuit generates a second current source or the third current source based on the first control signal, so as to stabilize the actual operating frequency of the system at the reference frequency.

2. The frequency locking circuit according to claim 1, characterized in that, The first control signal generation circuit includes a frequency-to-voltage circuit and an operational amplifier module. The frequency-to-voltage circuit receives the actual operating frequency signal and the reference frequency signal of the system, and converts them into a second voltage and a third voltage, respectively. The operational amplifier module generates the first control signal based on the second voltage and the third voltage.

3. The frequency locking circuit according to claim 2, characterized in that, The second current source is a preset value. When the actual operating frequency signal of the system is less than the reference frequency signal, the second voltage is greater than the third voltage. The current source generating circuit receives the first control signal and generates the third current source to stabilize the actual operating frequency of the system at the reference frequency.

4. The frequency locking circuit according to claim 2, characterized in that, The third current source is a preset value. When the actual operating frequency signal of the system is greater than the reference frequency signal, the second voltage is less than the third voltage. The current source generating circuit receives the first control signal and generates the second current source to stabilize the actual operating frequency of the system at the reference frequency.

5. The frequency locking circuit according to claim 2, characterized in that, When the actual operating frequency signal of the system is less than the reference frequency signal, the second voltage is greater than the third voltage. The current source generating circuit receives the first control signal and generates the third current source to stabilize the actual operating frequency of the system at the reference frequency. When the actual operating frequency signal of the system is greater than the reference frequency signal, the second voltage is less than the third voltage. The current source generating circuit receives the first control signal and generates the second current source to stabilize the actual operating frequency of the system at the reference frequency.

6. The frequency locking circuit according to any one of claims 1-5, characterized in that, The current source generating circuit includes a first transistor. The first control signal acts on the control terminal of the first transistor, and the current flowing through the first transistor is adjusted based on the magnitude of the first control signal, thereby generating a corresponding current source based on the current flowing through the first transistor.

7. The frequency locking circuit according to claim 1, characterized in that, The first current source and the first voltage are set according to the type of the power converter, and the type of the power converter includes boost, buck and buck-boost power converters.

8. The frequency locking circuit according to claim 2, characterized in that, The frequency-to-voltage circuit includes a first D flip-flop, a first frequency conversion circuit, a second D flip-flop, and a second frequency conversion circuit. The first D flip-flop receives the actual power frequency signal of the system and divides it by two to generate a first frequency signal. The first frequency-to-voltage circuit receives the first frequency signal and converts it into a second voltage. The second D flip-flop receives the reference frequency signal and divides it by two to generate a second frequency signal. The second frequency-to-voltage circuit receives the second frequency signal and converts it into a third voltage.

9. An analog frequency locking method applied in a power converter, having the functions of the analog frequency locking circuit according to any one of claims 1-8, wherein during the system's on-phase period, a first current source charges a first capacitor, and during the system's off-phase period, the voltage on the first capacitor is discharged to near zero potential. The capacitor voltage generated on the first capacitor is compared with a first voltage. When the capacitor voltage reaches the first voltage, it indicates that the conduction phase has reached a corresponding duration; characterized in that... When the system is in the conduction phase, the third current source is used to charge the first capacitor, and the second current source is used to discharge the first capacitor. Based on the effects of the first current source, the second current source, and the third current source, a capacitor voltage is generated on the first capacitor. It generates a first control signal based on the system's actual operating frequency signal and a reference frequency signal, and generates a second current source or a third current source through the first control signal to stabilize the system's actual operating frequency at the reference frequency.

10. A power converter, characterized in that, Includes the analog frequency locking circuit as described in any one of claims 1-8.

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