Photon mutual injection distributed expandable VCSEL phase-locked array

Abstract

The invention discloses a photon mutual injection distributed expandable VCSEL (Vertical Cavity Surface Emitting Laser) phase-locked array, which is characterized in that efficient electrical isolation between adjacent VCSEL units is realized through a multi-time ion injection process, and the array is divided into a plurality of independent controllable sub-arrays by utilizing addressable electrodes. Photon mutual injection is directly carried out between the VCSEL units through the interior of the resonant cavity to realize phase locking, and dependence on a complex external phase locking system is not needed, so that high-beam-quality laser output is realized, the system complexity and integration difficulty are remarkably reduced, and miniaturization is facilitated. The array is compact in structure, the phase locking mode is flexible and controllable, and the array is suitable for the high-tech fields of optical interconnection, laser radar, free space communication, optical calculation and the like.

Description

A Photonic Mutual Injection Distributed Scalable VCSEL Phase-Locked Array Technical Field

[0001] This invention belongs to the field of semiconductor laser technology, specifically relating to a vertical cavity surface-emitting laser (VCSEL) array that achieves phase-locking based on on-chip photon mutual injection, has a flexible array size that can be expanded, and a dynamically adjustable phase-locking mode. Background Technology

[0002] VCSELs have attracted widespread attention in optical communication, sensing, and lidar fields due to their advantages such as low threshold current, circular beam shape, and ease of two-dimensional integration. However, the output power of a single VCSEL is limited, and the beam quality is constrained by the unit size, making it difficult to directly meet the application requirements of high-brightness light sources. Therefore, VCSEL arrays are typically used to increase the output power, and phase-locked loop (PLL) technology is used to achieve coherent coupling between multiple units, thereby obtaining high-power, low-divergence-angle laser output.

[0003] Currently, the main technical approaches to achieving phase-locked loop (PLL) in VCSEL arrays include microlens array beam shaping and Talbot external cavity feedback PLL. These methods can achieve phase synchronization between array elements to a certain extent, but their PLL mechanism relies on external optical components and a sophisticated electronic feedback control system to stabilize the phase difference between elements. When the phase difference between elements is adjusted to zero, in-phase mode-locked output can be achieved, improving beam quality. However, as the number of array elements increases, the complexity of the external optical system significantly increases, the assembly precision requirements become extremely stringent, and the system's stability and scalability are limited, making it difficult to achieve large-scale, highly integrated PLL.

[0004] To address the aforementioned issues, this invention proposes an array structure based on ion implantation to achieve electrical isolation between VCSEL units. This allows adjacent VCSEL units to directly inter-inject photons through the optical field within the resonant cavity, thereby achieving phase-locked output. This method eliminates the need for complex external optical components, simplifying the system structure and improving integration and stability. Furthermore, by rationally designing the spacing between adjacent units and the ion implantation depth, and combining this with independent control of the operating current of each subarray, dynamic switching and control of different phase-locked modes (in-phase or out-of-phase mode-locking) can be achieved. This design not only overcomes the shortcomings of traditional VCSEL phase-locked arrays in terms of scalability and system complexity but also provides a new technological platform for the application of high-brightness, programmable laser sources in fields such as lidar, free-space optical communication, and optical computing. Summary of the Invention

[0005] To address the shortcomings of existing technologies, this invention proposes a photonic mutual injection distributed scalable VCSEL phase-locked array. The aim is to provide a VCSEL array with flexibly scalable array size, capable of achieving high beam quality output, and with dynamically adjustable phase-locking method. The specific technical solution is as follows:

[0006] This invention provides a photonic mutual injection distributed scalable VCSEL phase-locked array, comprising:

[0007] A VCSEL subarray is formed by arranging multiple VCSEL units. This subarray can be expanded through arbitrary splicing to form a larger-scale array. The arrangement of the VCSEL units includes, but is not limited to, equally spaced periodic square close-packed, hexagonal close-packed, or non-equal-spaced arrangements. To achieve higher phase-locked coupling efficiency, this invention preferably uses an equally spaced hexagonal close-packed arrangement of VCSEL units, ensuring that each VCSEL unit forms a photon mutual injection channel with six adjacent units, thereby significantly improving coupling efficiency.

[0008] The VCSEL subarray consists of the following components from bottom to top: an N-type electrode region (1), an N-type contact layer region (2), an N-type mirror region (3), a lower confinement layer region (4), a multi-layer quantum well active region (5), an upper confinement layer region (6), a P-type mirror region (7), an ion implantation region (8), a P-type contact layer region (9), and an addressable P-type electrode region (10).

[0009] The P-type reflector region contains an ion-implanted region (i.e., an electrically isolated region) and a non-ion-implanted region (i.e., a light-emitting region). During device operation, a refractive index difference arises between these two regions due to the difference in carrier distribution. This refractive index difference affects the optical path and phase relationship between adjacent VCSEL cells, and can also be controlled by adjusting the VCSEL cell spacing, ion implantation depth, and operating current. Therefore, this invention achieves precise control of the phase difference between light-emitting cells through the coordinated design of cell spacing, implantation depth, and operating current, thereby obtaining different phase-locked far-field modes.

[0010] Furthermore, the electrically isolated region is achieved through multiple ion implantation processes to ensure good electrical isolation characteristics between VCSEL cells. H⁺ ions can be used as the implantation source for the ion implantation process. Before ion implantation, a proton implantation mask pattern needs to be prepared on the epitaxial wafer surface to define the light-emitting region and the electrically isolated region. Specifically, a SiO₂ layer with a thickness of approximately 3 μm can be grown using PECVD as a mask layer. Then, a lift-off process and reactive ion etching (RIE) technique are used to selectively remove some of the SiO₂ outside the light-emitting region, retaining a 0-1000 nm thick SiO₂ layer to control the ion implantation depth. The SiO₂ retained on the light-emitting region can block ion implantation, maintaining good conductivity in that region.

[0011] Furthermore, the VCSEL subarray consists of one or more VCSEL units. To achieve independent control of each subarray, photolithography and lift-off processes are used to precisely define the subarray region corresponding to each electrode during the fabrication of the addressable P-type electrodes. The addressable P-type electrodes are electrically isolated from each other. During device operation, by independently adjusting the injection current of different subarrays, the carrier concentration distribution and temperature field distribution within the resonant cavity can be changed, thereby modulating the refractive index distribution within the cavity and dynamically adjusting the phase difference between each VCSEL unit, achieving dynamically reconfigurable output in phase-locked mode.

[0012] Furthermore, the VCSEL units are spaced apart, and this spacer region coincides with the ion implantation region in the P-type mirror. By rationally designing the size of this spacer region, the optical coupling and phase matching conditions between the units can be further controlled.

[0013] Furthermore, the aforementioned VCSEL phase-locked array can achieve far-field output in multiple phase-locked modes. First, the array structure is fabricated by designing the VCSEL cell spacing and proton injection depth. Then, by independently adjusting the operating current of each subarray, dynamic control of the phase-locked modes can be achieved, resulting in different far-field distributions. Specifically, when the phase difference between all VCSEL cells is zero, the array achieves complete in-phase mode-locking. At this point, the far-field optical field is a coherent superposition of the optical fields of all cells, resulting in low divergence angle and high brightness laser output.

[0014] The beneficial effects of this invention are as follows:

[0015] Easy on-chip integration of micro / nano optical components: The VCSEL array is fabricated using ion implantation, which enables efficient electrical isolation without disrupting the spacing between adjacent VCSEL units, ensuring that the device surface maintains good flatness after fabrication. This provides an ideal planar platform for the subsequent direct integration of micro / nano optical components such as metasurfaces and liquid crystal cavities, facilitating the realization of photonic chips with higher integration density.

[0016] The array's phase-locked mode is controllable and scalable: By rationally designing the spacing region between optical units and the ion implantation depth, and combining this with independent control of the operating current of each subarray, the phase-locked state between array units can be changed in real time, thereby achieving dynamic reconfiguration of the phase-locked mode. Furthermore, this array structure supports modular splicing of subarrays, facilitating flexible expansion of the array size.

[0017] High beam quality laser output: When the array achieves complete in-phase mode-locking (i.e., zero phase difference between units), the optical fields of all VCSEL units are coherently superimposed, forming a low divergence angle and high brightness laser beam in the far field. As the array size increases, the output power is further improved while maintaining good beam quality, meeting the requirements of high-brightness laser applications. Attached Figure Description

[0018] Figure 1: Schematic diagram of a photon-injected distributed scalable VCSEL phase-locked array structure proposed in this invention.

[0019] Figure 2: Schematic diagram of the fabrication process of a photon-injected distributed scalable VCSEL phase-locked array proposed in this invention.

[0020] Figure 3: Light-emitting area and addressable electrode photolithographic mask layout of a 6×61 hexagonal close-packed VCSEL phase-locked array.

[0021] Figure 4: Two phase distributions and their far-field plots for a 61-element array.

[0022] Figure 5: Schematic diagram of inter-array coupling of a 6×61 hexagonal close-packed VCSEL phase-locked array. Detailed Implementation

[0023] To make the above-mentioned objectives, features and advantages of this application more apparent and understandable, the specific embodiments of this application will be described in detail below with reference to the accompanying drawings.

[0024] Many specific details are set forth in the following description in order to provide a full understanding of this application. However, this application may also be implemented in other ways different from those described herein. Those skilled in the art can make similar extensions without departing from the spirit of this application. Therefore, this application is not limited to the specific embodiments disclosed below.

[0025] Secondly, this application provides a detailed description in conjunction with schematic diagrams. When detailing the embodiments of this application, for ease of explanation, the cross-sectional views illustrating the device structure may be partially enlarged, not adhering to the usual scale. Furthermore, the schematic diagrams are merely examples and should not limit the scope of protection of this application. In addition, actual fabrication should include three-dimensional spatial dimensions of length, width, and depth.

[0026] Example 1: Fabrication of a 6×61 hexagonal close-packed VCSEL coupling array

[0027] This embodiment provides a method for fabricating a photonically injected scalable VCSEL phase-locked array, and the specific process steps are as follows:

[0028] Step 1: Design the photolithographic pattern of the light-emitting region and addressable electrodes for a 6×61 hexagonal close-packed VCSEL in-phase coupled array. As shown in Figures 2(a) and 2(b): 366 VCSEL cells are arranged in a close hexagonal pattern. The light-emitting region is designed as a circle with a diameter of 6 µm, and the center distance between adjacent circles is 12 µm. Addressable electrodes are designed to evenly divide it into 6 sub-arrays, each consisting of 61 VCSEL cells.

[0029] Step 2: A 3 μm thick silicon dioxide layer (11) was grown on the surface of the VCSEL epitaxial wafer using plasma-enhanced chemical vapor deposition (PECVD). The epitaxial wafer, from bottom to top, consists of: an N-type heavily doped GaAs contact layer (2), and 30.5 pairs of N-type Al... 0.9 Ga 0.1 As and Al 0.05 Ga 0.95 Distributed Bragg reflectors with alternating As material growth (3), a lower confinement layer with gradually varying Al composition from 0.6 to 0.3 (4), and 3 pairs of Ga... 0.08 As 0.92 P and GaIn 0.18 As 0.82 The active region of the quantum well structure is composed of materials (5), an upper confinement layer (6) with Al composition gradually grown from 0.3 to 0.6, and 19 pairs of P-type Al. 0.9 Ga 0.1 As and Al 0.05 Ga 0.95 Distributed Bragg reflectors (7) with alternating As material growth and a P-type heavily doped GaAs contact layer (9).

[0030] Step 3: A 300 nm thick layer of metallic Ni is formed on silicon dioxide using the lift-off process in photolithography. The pattern of this Ni layer (12) is defined by the light-emitting region pattern of the VCSEL array described in Step 1 and is used as a hard mask for subsequent etching of SiO2.

[0031] Step 4: Using reactive ion etching (RIE) technology, the Ni mask prepared in step 3 is etched to etch out the silicon dioxide outside the light region. The etching depth is 2.1 μm, and the remaining 0.9 μm is used to control the proton implantation depth, thereby completing the fabrication of the ion implantation mask.

[0032] Step 5: Perform two ion implantations on the prepared wafer, using H₂ as the ion source. + Ions were implanted at energies of 315 keV and 250 keV, respectively. To avoid channeling during ion implantation, the wafer was tilted at 7° before implantation. Ultimately, a 3 µm thick layer of silica remained in the light-emitting region, blocking H+ at this implantation energy. + The ions allow the light-emitting region to retain excellent conductivity. The 0.9 μm silica layer outside the light-emitting region has insufficient blocking ability, forming an ion implantation region (7) with a depth of about 1.95 µm, which has good electrical insulation.

[0033] Step 6: After ion implantation, the SiO2 mask layer on the wafer surface is removed using buffered oxide etchant (BOE). Then, a 50 / 300 nm thick Ti / Au electrode is formed on the P-type contact layer of the wafer using a lift-off process in photolithography. The Ti / Au electrode pattern is defined by the VCSEL array addressable electrode pattern described in Step 1.

[0034] Step 7: Use a grinding mill to grind the substrate to a thickness of about 100 μm, and use physical vapor deposition to sputter a 50 / 300 nm thick AuGeNi / Au layer onto the N-type substrate. Finally, the wafer is subjected to rapid thermal annealing at 350 °C for 35 s to form good ohmic contacts.

[0035] Example 2: Far-field output of current-controlled VCSEL phase-locked array.

[0036] This embodiment provides a method for controlling the phase difference within each VCSEL cell by applying independent current to each VCSEL subarray, thereby enabling the VCSEL array to output in-phase or out-of-phase coupled far-field signals.

[0037] For ease of description of this embodiment, the VCSEL subarrays are numbered as shown in Figure 5(a), with the subarrays numbered sequentially as ①, ②, ③, ④, ⑤, and ⑥.

[0038] When each subarray operates independently under different current conditions, as shown in Figure 4(a), under current A, the subarray outputs a main lobe with high brightness and six surrounding secondary lobes, and the intensity of its main lobe is significantly higher than that of the secondary lobes in the far field. This is a result of phase unification and in-phase coupling among all VCSEL units. As shown in Figure 4(b), under current B, the subarray outputs a far field different from the in-phase output, and its main lobe energy weakens. Under this phase lock, a special optical field distribution is formed, which is a result of phase non-unification and out-of-phase coupling among all VCSEL units.

[0039] When subarrays ① and ② operate simultaneously while the other four subarrays remain inactive, and both subarrays ① and ② operate under current A, they are in a state of in-phase coupling. The far field output of the array composed of subarrays ① and ② is shown in Figure 5(b). Compared to the far field output when subarrays ① or ② operate independently, the far field main lobe output when operating simultaneously has a smaller divergence angle and higher power.

[0040] When subarray ① operates at current A and subarray ② operates at current B, with subarray ① in an in-phase coupled state and subarray ② in an out-of-phase coupled state, the far-field output of the array composed of subarrays ① and ② is shown in Figure 5(c).

[0041] Finally, the six subarrays are made to work simultaneously, and the current is adjusted so that they are all in phase coupling. The far field of the array output composed of the outputs of the six subarrays is shown in Figure 5(d).

[0042] The above description is merely a preferred embodiment of this application. Although this application has disclosed preferred embodiments above, it is not intended to limit this application. Any person skilled in the art can make many possible variations and modifications to the technical solutions of this application using the methods and techniques disclosed above, or modify them into equivalent embodiments with equivalent changes, without departing from the scope of the technical solutions of this application. Therefore, any simple modifications, equivalent changes, and modifications made to the above embodiments based on the technical essence of this application without departing from the content of the technical solutions of this application shall still fall within the protection scope of the technical solutions of this application.

Claims

1. A photonic cross-injection distributed scalable VCSEL phase-locked array, characterized in that, include: At least one VCSEL subarray composed of multiple VCSEL units arranged together, wherein the array size is expanded by splicing the VCSEL subarrays. The VCSEL subarray comprises, in the vertical direction, the following regions in sequence: N-type electrode region (1), N-type contact layer region (2), N-type mirror region (3), lower confinement layer region (4), multilayer quantum well active region (5), upper confinement layer region (6), P-type mirror region (7), ion implantation region (8), P-type contact layer region (9), and addressable P-type electrode region (10).

2. The photonic mutual injection distributed scalable VCSEL phase-locked array according to claim 1, characterized in that, The electrically isolated region is formed through multiple ion implantation processes to achieve electrical isolation between adjacent VCSEL units.

3. The photonic mutual injection distributed scalable VCSEL phase-locked array according to claim 1, characterized in that, The P-type reflector region (7) includes an electrically isolated region formed by ion implantation and a light-emitting region that has not been implanted with ions. The electrically isolated region and the light-emitting region have different refractive indices when the device is working.

4. The photonic mutual injection distributed scalable VCSEL phase-locked array according to claim 1, characterized in that, The VCSEL subarray contains one or more VCSEL units, and each subarray is connected to an independent addressable P-type electrode (10); the addressable P-type electrodes are electrically isolated from each other and are used to independently control the operating current of the corresponding subarray.

5. The photonic mutual injection distributed scalable VCSEL phase-locked array according to claim 1, characterized in that, An interval region is provided between adjacent VCSEL units, and the interval region coincides with the electrical isolation region in the P-type reflector region (7) in the vertical direction.

6. The photonic mutual injection distributed scalable VCSEL phase-locked array according to claim 1, characterized in that, The far-field output mode of the phase-locked array depends on the relative phase difference between all VCSEL units. By adjusting the array structure parameters or the subarray operating current, different phase-locked output modes can be achieved.

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