Display panel, preparation method thereof and display device

Abstract

The invention provides a display panel, a preparation method thereof and a display device. The light-emitting carrier plate comprises a glass substrate, a plurality of sub-pixels with different colors, a plurality of anode leads and an insulating layer. The glass substrate is provided with an anode through hole. And one sub-pixel is arranged corresponding to one anode through hole. The plurality of anode leads and the plurality of sub-pixels are arranged in a one-to-one correspondence manner. And the anode lead is arranged in the anode through hole and is used for connecting the anode of the sub-pixel and the silicon-based driving substrate. The insulating layer is arranged on the side, away from the glass substrate, of the anode, covers the anode lead and exposes the anode. Wherein two anode leads corresponding to part of two adjacent sub-pixels share the same anode through hole, and are insulated from each other through an insulating layer. According to the invention, two partial adjacent sub-pixels share the same anode through hole, so that the number of punched holes in the glass substrate is reduced, and the fragment risk of the glass substrate in the subsequent production process is reduced.

Description

Technical Field

[0001] This application relates to the field of display technology, and in particular to a display panel, a method for manufacturing the same, and a display device. Background Technology

[0002] Organic light-emitting diode (OLED) displays are devices that utilize the reversible color-changing phenomenon produced by organic semiconductor materials under the drive of electric current to achieve graphic display. OLED displays offer advantages such as ultra-lightweight, ultra-thin design, high brightness, wide viewing angle, low voltage, low power consumption, fast response, high definition, shock resistance, flexibility, low cost, simple manufacturing process, use of fewer raw materials, high luminous efficiency, and wide temperature range. Therefore, OLED display technology is considered the most promising next-generation display technology.

[0003] In existing technologies, the number of sub-pixels is the same as the number of anode vias. Each sub-pixel needs to be connected to the anode and the circuit driving the anode through the anode via. This results in a large number of holes being drilled on the OLED substrate, which damages the rigidity of the substrate and increases the risk of breakage during subsequent production. Summary of the Invention

[0004] The main technical problem addressed by this application is to provide a display panel and its manufacturing method, as well as a display device, thereby solving the problem of reducing the risk of substrate breakage in the prior art.

[0005] To address the aforementioned technical problems, the first technical solution provided in this application is: to provide a display panel, comprising:

[0006] Silicon-based driving substrate;

[0007] The light-emitting carrier is bonded to the silicon-based driving substrate; the light-emitting carrier includes:

[0008] Glass substrate with anodic through-holes;

[0009] Multiple sub-pixels of different colors are disposed on the surface of the glass substrate away from the silicon-based driving substrate; each sub-pixel corresponds to an anode via.

[0010] Multiple anode leads are configured to correspond one-to-one with multiple sub-pixels; the anode leads are disposed within the anode vias and are used to connect the anode of the sub-pixels to the silicon-based driving substrate.

[0011] An insulating layer is disposed on the side of the anode away from the glass substrate, and covers the anode lead while exposing the anode;

[0012] In some cases, two adjacent sub-pixels share the same anode via, and are insulated from each other by an insulating layer.

[0013] In this configuration, the anode lead covers part of the hole wall of the corresponding anode via; the anode of a sub-pixel and its corresponding anode lead are patterned through the same conductive layer; two anode leads sharing the same anode via are patterned through different conductive layers.

[0014] The insulating layer has pixel openings, each corresponding to an anode, and exposes the anode.

[0015] The two anode leads within the same anode through-hole are defined as the first anode lead and the second anode lead, respectively.

[0016] The insulating layer includes a first insulating layer and a second insulating layer; the first insulating layer and the second insulating layer are patterned by different insulating material layers; in the direction perpendicular to the glass substrate, the first insulating layer and the second insulating layer are partially overlapped, and the overlapping area is located between sub-pixels;

[0017] The first insulating layer covers at least the first anode lead, and the second insulating layer covers at least the second anode lead.

[0018] In the overlapping region, the second insulating layer is located on the side of the first insulating layer away from the glass substrate, and the overlapping portion of the second insulating layer forms an isolation structure to isolate the sub-pixels.

[0019] The display panel includes multiple sub-pixel columns, each sub-pixel column includes multiple consecutively arranged pixel groups, each pixel group includes two adjacent sub-pixels, and the two anode leads corresponding to each pixel group share the same anode via; in each pixel group, the corresponding anode via is located between two sub-pixels.

[0020] In the sub-pixel column, the number of corresponding anode vias is equal to the number of pixel groups;

[0021] or,

[0022] In a sub-pixel column, the number of corresponding anode vias is greater than the number of pixel groups; the first and last sub-pixels in a sub-pixel column are defined as end sub-pixels, and at least one end sub-pixel has an exclusive anode via.

[0023] The sub-pixel includes an anode, a light-emitting layer, and a cathode stacked sequentially. The cathode is a full-surface structure and covers an insulating layer and the sub-pixel.

[0024] The multiple sub-pixels of different colors are designated as red sub-pixels, green sub-pixels, and blue sub-pixels.

[0025] To solve the above-mentioned technical problems, the second technical solution provided in this application is: to provide a display device, which includes a motherboard and the above-mentioned display panel.

[0026] To solve the above-mentioned technical problems, the third technical solution provided in this application is: a method for manufacturing a display panel, wherein the method for manufacturing the above-mentioned display panel includes:

[0027] Provide a silicon-based driving substrate;

[0028] Anode through-holes are fabricated on a glass substrate;

[0029] Multiple sub-pixels of different colors, multiple anode leads, and an insulating layer are fabricated on a glass substrate to form a light-emitting carrier. Each sub-pixel corresponds to one anode via. Multiple anode leads are arranged one-to-one with multiple sub-pixels. The anode leads are disposed within the anode vias. The insulating layer is disposed on the side of the anode away from the glass substrate, covering the anode leads and exposing the anode. Among them, the two anode leads corresponding to some adjacent sub-pixels share the same anode via and are insulated from each other by the insulating layer.

[0030] The light-emitting carrier is bonded to the silicon-based driving substrate.

[0031] The steps of fabricating multiple sub-pixels of different colors, multiple anode leads, and an insulating layer on a glass substrate to form a light-emitting carrier include:

[0032] A first conductive layer is fabricated and patterned on a glass substrate to form the anode of a portion of the sub-pixels and the corresponding anode leads;

[0033] A first insulating material layer is prepared on the anode surface and patterned to form the first insulating layer in the insulating layer;

[0034] A second conductive layer is prepared on the first insulating layer and patterned to form the anode and corresponding anode leads of another portion of the sub-pixels;

[0035] A second insulating material layer is prepared on the second conductive layer and patterned to form the second insulating layer in the insulating layer; in the direction perpendicular to the glass substrate, the first insulating layer and the second insulating portion are overlapped, and the overlapping area is located between sub-pixels;

[0036] Pixel openings are etched on the first insulating layer and the second insulating layer respectively to expose the anode; the pixel openings are set in a one-to-one correspondence with the anode.

[0037] The beneficial effects of this application are as follows: Unlike existing technologies, this application provides a display panel and its fabrication method, as well as a display device. The display panel includes a silicon-based driving substrate and a light-emitting carrier. The light-emitting carrier is bonded to the silicon-based driving substrate. The light-emitting carrier includes a glass substrate, multiple sub-pixels of different colors, multiple anode leads, and an insulating layer. The glass substrate has anode vias. Multiple sub-pixels of different colors are disposed on the surface of the glass substrate away from the silicon-based driving substrate. One sub-pixel corresponds to one anode via. Multiple anode leads are disposed one-to-one with multiple sub-pixels. The anode leads are disposed within the anode vias and are used to connect the anode of the sub-pixel to the silicon-based driving substrate. The insulating layer is disposed on the side of the anode away from the glass substrate, covering the anode leads and exposing the anode. Specifically, two anode leads corresponding to some adjacent sub-pixels share the same anode via and are insulated from each other by the insulating layer. By having some adjacent sub-pixels share the same anode via, this application reduces the number of holes drilled on the glass substrate, thereby reducing the risk of breakage of the glass substrate during subsequent production processes. Attached Figure Description

[0038] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without any creative effort.

[0039] Figure 1 This is a schematic diagram of the structure of a display panel in the prior art;

[0040] Figure 2 This is a schematic diagram of the structure of the first embodiment of the display panel provided in this application;

[0041] Figure 3 yes Figure 2 Schematic diagram of the cross-sectional structure at the middle EE;

[0042] Figure 4 This is a schematic diagram of the structure of the second embodiment of the display panel provided in this application;

[0043] Figure 5 This is a schematic diagram of the structure of the third embodiment of the display panel provided in this application;

[0044] Figure 6 This is a schematic diagram of the structure of the fourth embodiment of the display panel provided in this application;

[0045] Figure 7 This is a schematic diagram of the structure of the fifth embodiment of the display panel provided in this application;

[0046] Figure 8This is a schematic diagram of the structure of the sixth embodiment of the display panel provided in this application;

[0047] Figure 9 This is a flowchart illustrating one embodiment of the manufacturing method of the display panel provided in this application;

[0048] Figure 10 yes Figure 9 A schematic diagram of the structure corresponding to step S100;

[0049] Figure 11 yes Figure 9 A schematic diagram of the structure corresponding to step S200;

[0050] Figure 12 yes Figure 9 A flowchart illustrating an implementation method for step S300;

[0051] Figure 13 yes Figure 12 Schematic diagram of the structure corresponding to steps S301 to S305;

[0052] Figure 14 yes Figure 12 A schematic diagram of the structure corresponding to step S306 in the middle section;

[0053] Figure 15 yes Figure 9 A schematic diagram of the structure corresponding to step S400 in the middle section;

[0054] Figure 16 This is a schematic diagram of an embodiment of the display device provided in this application.

[0055] Explanation of icon numbers:

[0056] 100. Display panel; 10. Light-emitting substrate; 11. Glass substrate; 111. Anode via; 12. Subpixel; 121. Anode; 122. Light-emitting layer; 123. Cathode; R. Red subpixel; G. Green subpixel; B. Blue subpixel; 124. Subpixel column; 125. Pixel group; 126. End subpixel; 120. Pixel unit; 12A. First pixel row; 12B. Second pixel row; 13. Anode lead; 13A. First anode lead; 13B. Second anode lead Line; 14, Insulating layer; 141, First insulating layer; 142, Second insulating layer; 140, Pixel opening; 15, Encapsulation layer; 16, Isolation structure; 171, First conductive layer; 172, Second conductive layer; 181, First insulating material layer; 182, Second insulating material layer; 20, Silicon-based driving substrate; 21, Silicon substrate; 22, Driving circuit layer; 23, Protective layer; 24, Anode driving electrode; D1, First direction; D2, Second direction; 200, Main board; 300, Display device. Detailed Implementation

[0057] The embodiments of this application will now be described in detail with reference to the accompanying drawings.

[0058] In the following description, specific details such as particular system architectures, interfaces, and technologies are presented for illustrative purposes rather than for limiting purposes, in order to provide a thorough understanding of this application.

[0059] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of the embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0060] The terms "first," "second," and "third" in this application are for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Therefore, a feature defined as "first," "second," or "third" may explicitly or implicitly include at least one of that feature. In the description of this application, "multiple" means at least two, such as two, three, etc., unless otherwise explicitly specified. All directional indications (such as up, down, left, right, front, back, etc.) in the embodiments of this application are only used to explain the relative positional relationships and movements between components in a specific orientation (as shown in the figures). If the specific orientation changes, the directional indications also change accordingly. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or device that includes a series of steps or units is not limited to the listed steps or units, but may optionally include steps or units not listed, or may optionally include other steps or units inherent to these processes, methods, products, or devices.

[0061] In this document, the term "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0062] Please see Figure 1 , Figure 1 This is a schematic diagram of the structure of a display panel in the prior art.

[0063] In the prior art, the number of sub-pixels 12 and anode vias 111 is the same, and the anode 121 of sub-pixels 12 and the circuit driving the anode 121 need to be electrically connected through the anode vias 111. However, the large number of anode vias 111 results in a large number of holes on the same substrate, which damages the rigidity of the substrate and increases the risk of breakage during subsequent production.

[0064] Please see Figure 2 and Figure 3 , Figure 2 This is a schematic diagram of the structure of the first embodiment of the display panel provided in this application. Figure 3 yes Figure 2 A schematic diagram of the cross-sectional structure at the EE section.

[0065] To address the problems of the prior art, this application provides a display panel 100. The display panel 100 includes a silicon-based driving substrate 20 and a light-emitting carrier 10. The light-emitting carrier 10 is bonded to the silicon-based driving substrate 20. The light-emitting carrier 10 includes a glass substrate 11, a plurality of sub-pixels 12 of different colors, a plurality of anode leads 13, and an insulating layer 14. The glass substrate 11 has an anode through-hole 111. The plurality of sub-pixels 12 of different colors are disposed on the surface of the glass substrate 11 away from the silicon-based driving substrate 20. One sub-pixel 12 is disposed corresponding to one anode through-hole 111. The plurality of anode leads 13 are disposed one-to-one with the plurality of sub-pixels 12. The anode leads 13 are disposed within the anode through-holes 111 for connecting the anode 121 of the sub-pixel 12 to the silicon-based driving substrate 20. The insulating layer 14 is disposed on the side of the anode 121 away from the glass substrate 11, and covers the anode leads 13 while exposing the anode 121. Among them, the two anode leads 13 corresponding to two adjacent sub-pixels 12 share the same anode through-hole 111 and are insulated from each other by an insulating layer 14.

[0066] This application reduces the number of holes on the glass substrate 11 by having two adjacent sub-pixels 12 share the same anode via 111, thereby reducing the risk of breakage of the glass substrate 11 in subsequent production processes.

[0067] The silicon-based driving substrate 20 includes a silicon substrate 21 and a driving circuit layer 22, with the driving circuit layer 22 disposed on the side of the silicon substrate 21 close to the light-emitting carrier 10.

[0068] Silicon substrate 21 refers to a substrate based on monocrystalline silicon material.

[0069] The driving circuit layer 22 includes an active driving circuit (not shown) integrated on the silicon substrate 21 using CMOS (Complementary Metal-Oxide-Semi conductor) technology.

[0070] The separate fabrication of the silicon-based driving substrate 20 and the light-emitting carrier 10 can improve production efficiency. Secondly, it can avoid the impact of the vapor deposition process on the silicon-based driving substrate 20, reducing losses. In other words, from a process perspective, separate fabrication of the silicon-based driving substrate 20 and the light-emitting carrier 10 can not only improve yield but also reduce costs.

[0071] The glass substrate 11 also has a cathode via (not shown), which is spaced apart from the anode via 111. The cathode 123 of the sub-pixel 12 is electrically connected to the silicon-based driving substrate 20 through the cathode via. Both the anode via 111 and the cathode via penetrate the glass substrate 11. The cathode via may be provided with a conductive material so that the conductive material at the cathode via can electrically connect the cathode 123 and the silicon-based driving substrate 20. The conductive material may cover the hole wall of the cathode via or fill the cathode via; there is no limitation here, and it can be selected according to actual needs.

[0072] The anode via 111 can be a through-hole or a non-through-hole. For example, the cross-section of the anode via 111 in the direction perpendicular to the glass substrate 11 can be rectangular, trapezoidal, parallelogram, or other shapes. Similarly, the cathode via can be a through-hole or a non-through-hole.

[0073] In this embodiment, the anode via 111 is a straight through-hole, which reduces the current path and facilitates the fabrication of the via. In the direction perpendicular to the glass substrate 11, the cross-section of the anode via 111 is an inverted trapezoid, facilitating the attachment of the anode lead 13 to the hole wall of the anode via 111. The width of the inverted trapezoid gradually decreases in the direction close to the glass substrate 11.

[0074] Both the cathode through-hole and the anode through-hole 111 were prepared using through-glass via (TGV) technology.

[0075] It should be noted that the anode through-hole 111 and cathode through-hole in this application refer to single holes, not metallized vias. That is, the anode through-hole 111 in this application does not include conductive material disposed within the anode through-hole 111.

[0076] It should be understood that, compared with through-silicon via (TSV) technology, glass via technology has the advantages of superior high-frequency electrical characteristics, low cost, simple process flow, and strong mechanical stability.

[0077] Compared to the prior art where the sub-pixel 12 is fabricated on the silicon-based driving substrate 20 and electrically connected to the silicon-based driving substrate 20 through silicon vias, this application sets the sub-pixel 12 on the glass substrate 11 and bonds the sub-pixel 12 to the silicon-based driving substrate 20 through glass vias, which can reduce costs and improve high-frequency electrical characteristics.

[0078] There are no restrictions on the size relationship between the cathode through hole and the anode through hole 111 here; the selection can be made according to actual needs.

[0079] In some embodiments, the cross-section of the anode through-hole 111 in the direction parallel to the glass substrate 11 can be a regular or irregular shape such as a circle, triangle, rhombus, rectangle, or hexagon. There are no restrictions here, and the shape can be selected according to actual needs.

[0080] In this embodiment, the cross-section of the anode through-hole 111 is circular in the direction parallel to the glass substrate 11.

[0081] Sub-pixel 12 is an OLED. Sub-pixel 12 includes an anode 121, a light-emitting layer 122, and a cathode 123 stacked sequentially. The anode 121 is disposed on the side surface of the glass substrate 11 away from the silicon-based driving substrate 20.

[0082] In some embodiments, the size of subpixel 12 is 6 micrometers to 15 micrometers. It should be understood that the size of subpixel 12 can also be other values.

[0083] In some embodiments, the cathode 123 is a full-surface structure, covering the insulating layer 14 and the sub-pixels 12. The multiple sub-pixels 12 of different colors are designated as red sub-pixel R, green sub-pixel G, and blue sub-pixel B.

[0084] In other embodiments, the cathode 123 may be a non-full-surface structure. The sub-pixels 12 may also be other colors, and the display panel 100 may include sub-pixels 12 of more colors; this is not limited here and can be selected according to actual needs.

[0085] One sub-pixel 12 corresponds to one anode via 111, and one anode via 111 can correspond to one or two sub-pixels 12. That is, some sub-pixels 12 share the same anode via 111, so that the number of anode vias 111 is less than the number of sub-pixels 12.

[0086] In some embodiments, in a direction parallel to the glass substrate 11, the anode via 111 is located on the side of the corresponding sub-pixel 12, that is, the sub-pixel 12 and the anode via 111 are misaligned, which is beneficial to improve the flatness of the anode 121 film layer, thereby improving the light emission effect of the sub-pixel 12.

[0087] In some embodiments, the anode lead 13 covers a portion of the hole wall of the corresponding anode via 111. The anode 121 of the sub-pixel 12 and the corresponding anode lead 13 are patterned using the same conductive layer. Two anode leads 13 sharing the same anode via 111 are patterned using different conductive layers.

[0088] In other words, in this application, the anodes 121 of all sub-pixels 12 are not patterned through the same conductive layer, but are patterned through multiple conductive layers. The anodes 121 of the sub-pixels 12 and the anode leads 13 connected to the anodes 121 are patterned through the same conductive layer.

[0089] It should be noted that in this application, some adjacent sub-pixels 12 share the same anode via 111. This does not mean that the anodes 121 of the two adjacent sub-pixels 12 are connected to the same anode lead 13. Rather, the anode leads 13 connected to the two adjacent sub-pixels 12 are located within the same anode via 111 and are insulated from each other.

[0090] One end of the anode lead 13 is electrically connected to the corresponding anode 121, and the other end passes through the corresponding anode via 111 and is electrically connected to the silicon-based driving substrate 20, thereby realizing the electrical connection between the anode 121 and the silicon-based driving substrate 20. The anode lead 13 covers part of the hole wall of the corresponding anode via 111, rather than completely filling the corresponding anode via 111.

[0091] In some embodiments, the insulating layer 14 has pixel openings 140, which are disposed in a one-to-one correspondence with the anode 121, and expose the anode 121.

[0092] The two anode leads 13 within the same anode through-hole 111 are defined as the first anode lead 13A and the second anode lead 13B, respectively.

[0093] The insulating layer 14 includes a first insulating layer 141 and a second insulating layer 142. The first insulating layer 141 and the second insulating layer 142 are patterned using different insulating material layers. In a direction perpendicular to the glass substrate 11, the first insulating layer 141 and the second insulating layer 142 partially overlap, and the overlapping area is located between the sub-pixels 12. The first insulating layer 141 at least covers the first anode lead 13A, and the second insulating layer 142 at least covers the second anode lead 13B.

[0094] The insulating layer 14 can act as a pixel definition layer (PDL), thus eliminating the need for the preparation of the pixel definition layer.

[0095] The pixel opening 140 is formed on the first insulating layer 141 or the second insulating layer 142. That is, the pixel opening 140 is located in the non-overlapping area of ​​the first insulating layer 141 and the second insulating layer 142.

[0096] A portion of the first insulating layer 141 is disposed within the anode through-hole 111 to cover the first anode lead 13A, and another portion is disposed on the side of the anode 121 away from the glass substrate 11 and exposes the anode 121 to define the position of the sub-pixel 12.

[0097] Similarly, a portion of the second insulating layer 142 is disposed within the anode via 111 to cover the second anode lead 13B, and another portion is disposed on the side of the anode 121 away from the glass substrate 11 and exposes the anode 121, thereby defining the position of the sub-pixel 12.

[0098] It can be understood that the portion of the first insulating layer 141 disposed on the side of the anode 121 away from the glass substrate 11 serves as a pixel definition layer, and the portion of the second insulating layer 142 disposed on the side of the anode 121 away from the glass substrate 11 serves as a pixel definition layer.

[0099] In some embodiments, in the overlapping region, the second insulating layer 142 is located on the side surface of the first insulating layer 141 away from the glass substrate 11, and the overlapping portion of the second insulating layer 142 forms an isolation structure 16 to isolate the sub-pixel 12. This design can reduce the number of fabrication steps for the isolation structure 16.

[0100] In other words, in the overlapping area, a second insulating layer 142 disposed on the surface of the first insulating layer 141 away from the glass substrate 11 protrudes from the first insulating layer 141 to form an isolation structure 16. The isolation structure 16 can isolate the light-emitting layer 122 of the sub-pixel 12, thereby preventing pixel crosstalk.

[0101] In other embodiments, an additional structural isolation sub-pixel 12 light-emitting layer 122 may be provided in the overlapping area. This is not limited here and can be selected according to actual needs.

[0102] In some embodiments, the display panel 100 includes a plurality of subpixel columns 124, each subpixel column 124 including a plurality of consecutively arranged pixel groups 125, each pixel group 125 including two adjacent subpixels 12, and the two anode leads 13 corresponding to each pixel group 125 sharing the same anode via 111. In each pixel group 125, the corresponding anode via 111 is located between two subpixels 12 to reduce the length of the trace.

[0103] Each subpixel column 124 includes a plurality of subpixels 12 arranged sequentially along a preset direction. A subpixel column 124 can be a row of subpixels 12 or a column of subpixels 12.

[0104] In this application, we will take a sub-pixel column 124 as an example for illustration.

[0105] In the sub-pixel column 124, the anode through-hole 111 is located on one side of the column direction of the sub-pixel 12, so that the anode through-hole 111 corresponding to each column of sub-pixels 12 can be located on the same straight line, which can reduce the drilling path and improve the drilling efficiency.

[0106] In some embodiments, the number of corresponding anode vias 111 in the sub-pixel column 124 is equal to the number of pixel groups 125. That is, the number of sub-pixels 12 is twice the number of anode vias 111. Compared with the prior art design where the number of sub-pixels 12 is equal to the number of anode vias 111, the embodiments of this application can reduce the number of holes by half, reducing the risk of breakage of the glass substrate 11 in subsequent production processes; and, the spacing between two adjacent anode vias 111 is two sub-pixels 12, increasing the spacing between the anode vias 111, further reducing the risk of breakage of the glass substrate 11 in subsequent production processes.

[0107] In other embodiments, the number of corresponding anode vias 111 in the sub-pixel column 124 is greater than the number of pixel groups 125. The first and last sub-pixels 12 in the sub-pixel column 124 are defined as end sub-pixels 126, and at least one end sub-pixel 126 exclusively has an anode via 111, and the anode via 111 is located on the side of the corresponding end sub-pixel 126 away from the pixel group 125. That is, in the sub-pixel column 124, the first sub-pixel 12 in the column direction is an end sub-pixel 126, and the last sub-pixel 12 is also an end sub-pixel 126. That is, the sub-pixel column 124 includes two end sub-pixels 126, one end sub-pixel 126 exclusively has an anode via 111, and the other end sub-pixel 126 shares the same anode via 111 with the adjacent sub-pixel 12. The number of corresponding anode vias 111 in the sub-pixel column 124 is more than twice the number of pixel groups 125. Alternatively, each of the two end sub-pixels 126 may have its own anode via 111, and the number of corresponding anode vias 111 in the sub-pixel column 124 is more than twice the number of pixel groups 125.

[0108] In one specific embodiment, only one anode through-hole 111 with an anode lead 13 is provided on the side of the corresponding end sub-pixel 126 away from the other end sub-pixel 126, so that two adjacent anode through-holes 111 in the sub-pixel column 124 are spaced apart by two sub-pixels 12, which increases the spacing between the anode through-holes 111 and helps to reduce the risk of glass substrate 11 breaking in subsequent production processes.

[0109] It should be noted that in the multiple sub-pixel columns 124 of this application, the number of corresponding anode vias 111 in some sub-pixel columns 124 is equal to the number of pixel groups 125, while the number of corresponding anode vias 111 in other sub-pixel columns 124 is greater than the number of pixel groups 125. Alternatively, the number of corresponding anode vias 111 in each sub-pixel column 124 is equal to the number of pixel groups 125. Or, the number of corresponding anode vias 111 in each sub-pixel column 124 is greater than the number of pixel groups 125. The number of pixel groups 125 in different sub-pixel columns 124 can be equal or unequal; and the number of sub-pixels 12 in different sub-pixel columns 124 can be equal or unequal, depending on the arrangement of the sub-pixels 12. No excessive restrictions are imposed here; the choice is made according to actual needs.

[0110] In this embodiment, the number of sub-pixels 12 in each sub-pixel column 124 is the sum of the number of anode vias 111 corresponding to that sub-pixel column 124 and the number of pixel groups 125.

[0111] In this embodiment, the number of corresponding anode vias 111 in each sub-pixel column 124 is equal to the number of pixel groups 125.

[0112] In some embodiments, three sub-pixels 12 of different colors form a pixel unit 120, and the pixel units 120 are arranged in an array. The extension direction of the sub-pixel column 124 is the column direction of the pixel unit 120.

[0113] In each pixel unit 120, two sub-pixels 12 form a first pixel row 12A along a first direction D1, and another sub-pixel 12 extends along the first direction D1 to form a second pixel row 12B. The first pixel row 12A and the second pixel row 12B are arranged along a preset direction, which is either the first direction D1 or the second direction D2. The first direction D1 is the column direction of the pixel unit 120, and the second direction D2 is the row direction of the pixel unit 120. When the preset direction is the first direction D1, each column of pixel units 120 includes one sub-pixel row 124; when the preset direction is the second direction D2, each column of pixel units 120 includes two sub-pixel rows 124.

[0114] In some embodiments, the preset direction is the second direction D2, and each column of pixel units 120 includes two sub-pixel columns 124. In the first direction D1, two adjacent pixel units 120 are arranged repeatedly, mirrored, or centrally symmetrically; and / or, in the second direction D2, two adjacent pixel units 120 are arranged repeatedly or mirrored.

[0115] In one specific embodiment, such as Figure 2As shown, in each pixel unit 120, red sub-pixels R and green sub-pixels G are arranged sequentially along the first direction D1 to form a first pixel row 12A, and blue sub-pixels B extend along the first direction D1 to form a second pixel row 12B. In the direction parallel to the glass substrate 11, all sub-pixels 12 are rectangular, and the pixel unit 120 is rectangular. In the first direction D1, the left and right sides of the red sub-pixels R and green sub-pixels G are aligned. In the second direction D2, the side of the red sub-pixel R furthest from the green sub-pixel G is aligned with one side of the blue sub-pixel B, and the side of the green sub-pixel G furthest from the red sub-pixel R is aligned with the other side of the blue sub-pixel B.

[0116] In other embodiments, sub-pixels 12 can be trapezoidal, triangular, parallelogram, or other shapes, without limitation, and can be selected according to actual needs. Pixel units 120 can be parallelograms or other shapes.

[0117] Please see Figures 2 to 8 , Figure 4 This is a schematic diagram of the structure of the second embodiment of the display panel provided in this application. Figure 5 This is a schematic diagram of the structure of the third embodiment of the display panel provided in this application. Figure 6 This is a structural schematic diagram of the fourth embodiment of the display panel provided in this application. Figure 7 This is a structural schematic diagram of the fifth embodiment of the display panel provided in this application. Figure 8 This is a structural schematic diagram of the sixth embodiment of the display panel provided in this application.

[0118] In one specific embodiment, such as Figure 2 and Figure 4 As shown, in the first direction D1, two adjacent pixel units 120 are arranged symmetrically at the center, and in the second direction D2, two adjacent pixel units 120 are arranged in a mirror image. In each column of pixel units 120, the number of anode through-holes 111 corresponding to one column of sub-pixels 12 is more than twice the number of pixel groups 125, and the number of anode through-holes 111 corresponding to another column of sub-pixels 12 is equal to the number of pixel groups 125, effectively reducing the risk of breakage of the glass substrate 11 in subsequent production processes.

[0119] In one specific embodiment, such as Figure 5 As shown, pixel units 120 are repeatedly arranged in the first direction D1 and repeatedly arranged in the second direction D2; or, as Figure 6 As shown, two adjacent pixel units 120 are arranged symmetrically in the first direction D1, and the pixel units 120 are repeated in the second direction D2; or, as Figure 7As shown, two adjacent pixel units 120 in the first direction D1 are arranged in a centrally symmetrical manner, and two adjacent pixel units 120 in the second direction D2 are arranged in a mirror image. Compared with the prior art where one sub-pixel 12 corresponds to one anode via 111, and the number of sub-pixels 12 is equal to the number of anode vias 111, in this embodiment, the number of anode vias 111 in each column of sub-pixels 12 is equal to the number of pixel groups 125. That is, the number of sub-pixels 12 in each column of sub-pixels 12 is twice the number of corresponding anode vias 111. This embodiment reduces the number of anode vias 111 by 1 / 2, effectively reducing the risk of breakage of the glass substrate 11 in subsequent production processes.

[0120] In one specific embodiment, such as Figure 8 As shown, in each pixel unit 120, the first pixel row 12A and the second pixel row 12B are arranged along the first direction D1. The pixel units 120 are arranged repeatedly in the first direction D1 and in the second direction D2. Compared with the prior art where one sub-pixel 12 corresponds to one anode via 111 and the number of sub-pixels 12 is equal to the number of anode vias 111, in this embodiment, the number of anode vias 111 corresponding to each column of sub-pixels 12 is equal to the number of pixel groups 125, reducing the number of anode vias 111 by 1 / 2, effectively reducing the risk of breakage of the glass substrate 11 in subsequent production processes.

[0121] The light-emitting carrier 10 also includes an encapsulation layer 15, which is located on the side of the sub-pixel 12 away from the glass substrate 11. The material of the encapsulation layer 15 is not limited here and can be selected according to actual needs.

[0122] In some embodiments, the silicon-based driving substrate 20 further includes a protective layer 23 disposed on the side of the driving circuit layer 22 away from the silicon substrate 21; and / or, the light-emitting carrier 10 further includes a protective layer 23 disposed on the side of the glass substrate 11 away from the sub-pixel 12.

[0123] In this embodiment, the silicon-based driving substrate 20 further includes a protective layer 23, which is disposed on the side of the driving circuit layer 22 away from the silicon substrate 21. The silicon-based driving substrate 20 has an anode driving electrode 24. In a direction perpendicular to the glass substrate 11, the anode driving electrode 24 penetrates the protective layer 23 and electrically connects the anode lead 13 to the driving circuit layer 22. The silicon-based driving substrate 20 also includes a cathode driving electrode (not shown) for electrically connecting the conductive material at the cathode via and the driving circuit layer 22.

[0124] Please see Figure 2 , Figure 3 , Figures 9 to 11 , Figure 9This is a schematic flowchart illustrating one embodiment of the manufacturing method of the display panel provided in this application. Figure 10 yes Figure 9 A schematic diagram of the structure corresponding to step S100. Figure 11 yes Figure 9 A schematic diagram of the structure corresponding to step S200.

[0125] This application provides a method for manufacturing a display panel, used to manufacture the display panel 100 described above.

[0126] The methods for manufacturing display panels include:

[0127] S100: Provides a silicon-based driving substrate.

[0128] Specifically, a silicon-based driving substrate 20 is provided. The structure of the silicon-based driving substrate 20 is as described above and will not be repeated here.

[0129] S200: Anode through-holes are fabricated on a glass substrate.

[0130] Specifically, holes are drilled in the glass substrate 11 to form an anode through-hole 111.

[0131] It should be understood that drilling holes in the glass substrate 11 also forms cathode vias.

[0132] S300: Multiple sub-pixels of different colors, multiple anode leads, and an insulating layer are fabricated on a glass substrate to form a light-emitting carrier; one sub-pixel corresponds to one anode via; multiple anode leads are arranged one-to-one with multiple sub-pixels; the anode leads are disposed within the anode vias; the insulating layer is disposed on the side of the anode away from the glass substrate, and covers the anode leads while exposing the anode; wherein, the two anode leads corresponding to some adjacent sub-pixels share the same anode via, and are insulated from each other by the insulating layer.

[0133] Please see Figures 2 to 15 , Figure 12 yes Figure 9 A flowchart illustrating an embodiment of step S300. Figure 13 yes Figure 12 Structural diagrams corresponding to steps S301 to S305. Figure 14 yes Figure 12 A schematic diagram of the structure corresponding to step S306. Figure 15 yes Figure 9 A schematic diagram of the structure corresponding to step S400.

[0134] In some embodiments, step S300, which involves fabricating multiple sub-pixels of different colors, multiple anode leads, and an insulating layer on a glass substrate to form a light-emitting carrier, includes:

[0135] Step S301: Prepare a first conductive layer on a glass substrate and pattern it to form the anode of a portion of the sub-pixels and the corresponding anode leads.

[0136] Specifically, a first conductive layer 171 is deposited on the glass substrate 11, and the desired pattern is formed by exposure, development and etching to form the anode 121 and the corresponding anode lead 13 of a portion of the sub-pixels 12.

[0137] There are no restrictions on the material and thickness of the first conductive layer 171; they can be selected according to actual needs.

[0138] Step S302: Prepare and pattern a first insulating material layer on the anode surface to form the first insulating layer in the insulating layer.

[0139] Specifically, a first insulating material layer 181 is deposited on the first conductive layer 171, the first insulating material layer 181 covers the glass substrate 11, and the desired pattern is formed after exposure, development and etching to form the first insulating layer 141, the first insulating layer 141 covers the portion of the first conductive layer 171 that is patterned and retained on the glass substrate 11.

[0140] The first insulating material layer 181 can be made of the same material as the pixel definition layer, or it can be made of a different material. There are no restrictions on the material and thickness of the first insulating material layer 181; they can be selected according to actual needs.

[0141] Step S303: Prepare a second conductive layer on the first insulating layer and pattern it to form the anode and corresponding anode lead of another portion of the sub-pixels.

[0142] Specifically, a second conductive layer 172 is deposited on the glass substrate 11, which covers the first insulating layer 141 and the glass substrate 11. The desired pattern is formed by exposure, development and etching to form the anode 121 and the corresponding anode lead 13 of another part of the sub-pixel 12.

[0143] There are no restrictions on the material and thickness of the second conductive layer 172; they can be selected according to actual needs.

[0144] In this embodiment, the thickness of the first conductive layer 171 is the same as the thickness of the second conductive layer 172.

[0145] Step S304: A second insulating material layer is prepared on the second conductive layer and patterned to form a second insulating layer in the insulating layer; in the direction perpendicular to the glass substrate, the first insulating layer and the second insulating portion are overlapped, and the overlapping area is located between sub-pixels.

[0146] Specifically, a second insulating material layer 182 is deposited on the second conductive layer 172, and a desired pattern is formed through exposure, development, and etching to form a second insulating layer 142. The second insulating layer 142 covers the portion of the patterned second conductive layer 172 that remains on the glass substrate 11. In the region between the sub-pixels 12, the second insulating layer 142 overlaps with the first insulating layer 141.

[0147] The positional relationship between the first insulating layer 141 and the second insulating layer 142 is as described above and will not be repeated here.

[0148] The material and thickness of the first insulating layer 181 are not limited here, and can be selected according to actual needs.

[0149] In this embodiment, the first insulating material layer 181 and the second insulating material layer 182 have the same thickness.

[0150] Step S305: Etch pixel openings on the first insulating layer and the second insulating layer respectively to expose the anode; the pixel openings are set in a one-to-one correspondence with the anode.

[0151] Specifically, pixel openings 140 are etched on the first insulating layer 141 and the second insulating layer 142 respectively to expose the anode 121. The pixel openings 140 and the anode 121 are arranged in a one-to-one correspondence.

[0152] In some embodiments, step S300, which involves fabricating multiple sub-pixels of different colors, multiple anode leads, and an insulating layer on a glass substrate to form a light-emitting carrier, further includes:

[0153] Step S306: Sequentially prepare the light-emitting layer and cathode of the sub-pixel, and prepare an encapsulation layer on the side of the sub-pixel away from the glass substrate.

[0154] Specifically, the light-emitting layer 122 of the sub-pixel 12 is fabricated using the FMM (Fine Metal Masking) process. Then, a cathode 123 and an encapsulation layer 15 are sequentially fabricated on the light-emitting layer 122.

[0155] It should be noted that the light-emitting layer 122 of the sub-pixels 12 of different colors is prepared using different organic materials.

[0156] S400: Bonds the light-emitting carrier to the silicon-based driving substrate.

[0157] Specifically, the light-emitting carrier 10 is aligned and bonded to the silicon-based driving substrate 20 to form the display panel 100.

[0158] Please see Figure 16 , Figure 16 This is a schematic diagram of an embodiment of the display device provided in this application.

[0159] This application provides a display device. The display device 300 includes a motherboard 200 and the aforementioned display panel 100. The display device 300 in this embodiment is an AMOLED.

[0160] The motherboard 200 is electrically connected to the display panel 100. The motherboard 200 is used to transmit various required signals to the display panel 100 to control the display screen of the display panel 100. For example, clock signals (CK), low potential signals (Vss), power supply voltage signals (VDD), and data signals (Data) required by the driving circuit layer.

[0161] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions in other embodiments.

[0162] The above are merely embodiments of this application and do not limit the scope of patent protection of this application. Any equivalent structural or procedural changes made using the content of this application’s specification and drawings, or direct or indirect applications in other related technical fields, are similarly included within the scope of patent protection of this application.

Claims

1. A display panel, characterized in that, include: Silicon-based driving substrate; The light-emitting carrier is bonded to the silicon-based driving substrate; The light-emitting carrier plate includes: Glass substrate with anodic through-holes; Multiple sub-pixels of different colors are disposed on the surface of the glass substrate away from the silicon-based driving substrate; each sub-pixel corresponds to one anode via. Multiple anode leads are provided, each corresponding to one of the multiple sub-pixels; the anode leads are disposed within the anode through-holes and are used to connect the anode of the sub-pixel to the silicon-based driving substrate; An insulating layer is disposed on the side of the anode away from the glass substrate, and covers the anode lead while exposing the anode; Among them, the two anode leads corresponding to two adjacent sub-pixels share the same anode via and are insulated from each other by the insulating layer.

2. The display panel according to claim 1, characterized in that, The anode lead covers a portion of the hole wall corresponding to the anode via; the anode of the sub-pixel and the corresponding anode lead are patterned through the same conductive layer; two anode leads sharing the same anode via are patterned through different conductive layers.

3. The display panel according to claim 2, characterized in that, The insulating layer has pixel openings, each pixel opening corresponding to one of the anodes, and exposing the anodes; The two anode leads within the same anode through-hole are respectively defined as the first anode lead and the second anode lead; The insulating layer includes a first insulating layer and a second insulating layer; the first insulating layer and the second insulating layer are formed by patterning different insulating material layers. In a direction perpendicular to the glass substrate, the first insulating layer and the second insulating layer partially overlap, and the overlapping area is located between the sub-pixels; The first insulating layer covers at least the first anode lead, and the second insulating layer covers at least the second anode lead.

4. The display panel according to claim 3, characterized in that, In the overlapping region, the second insulating layer is located on the side surface of the first insulating layer away from the glass substrate, and the overlapping portion of the second insulating layer forms an isolation structure to isolate the sub-pixel.

5. The display panel according to claim 2, characterized in that, The display panel includes multiple sub-pixel columns, each sub-pixel column includes multiple consecutively arranged pixel groups, each pixel group includes two adjacent sub-pixels, and the two anode leads corresponding to each pixel group share the same anode via; in each pixel group, the corresponding anode via is located between the two sub-pixels.

6. The display panel according to claim 5, characterized in that, In the sub-pixel column, the number of corresponding anode vias is equal to the number of pixel groups; or, In the sub-pixel column, the number of corresponding anode vias is greater than the number of pixel groups; the first and last sub-pixels in the sub-pixel column are defined as end sub-pixels, and at least one end sub-pixel exclusively has the anode via.

7. The display panel according to claim 2, characterized in that, The sub-pixel includes the anode, the light-emitting layer and the cathode stacked in sequence, wherein the cathode is a full-surface structure and covers the insulating layer and the sub-pixel; The multiple sub-pixels of different colors are designated as red sub-pixels, green sub-pixels, and blue sub-pixels.

8. A display device, characterized in that, Includes the motherboard and the display panel according to any one of claims 1 to 7.

9. A method for manufacturing a display panel, characterized in that, For manufacturing the display panel according to any one of claims 1 to 7; comprising: Provide a silicon-based driving substrate; Anode through-holes are fabricated on a glass substrate; Multiple sub-pixels of different colors, multiple anode leads, and an insulating layer are fabricated on the glass substrate to form a light-emitting carrier. Each sub-pixel corresponds to one anode via. Multiple anode leads are arranged in a one-to-one correspondence with multiple sub-pixels. The anode leads are disposed within the anode vias. The insulating layer is disposed on the side of the anode away from the glass substrate, covering the anode leads and exposing the anode. Two adjacent sub-pixels may share the same anode via with their corresponding anode leads, and are insulated from each other by the insulating layer. The light-emitting carrier is bonded to the silicon-based driving substrate.

10. The method for manufacturing a display panel according to claim 9, characterized in that, The step of fabricating multiple sub-pixels of different colors, multiple anode leads, and an insulating layer on the glass substrate to form a light-emitting carrier includes: A first conductive layer is prepared and patterned on the glass substrate to form an anode and corresponding anode lead for a portion of the sub-pixels; A first insulating material layer is prepared on the anode surface and patterned to form the first insulating layer in the insulating layer; A second conductive layer is prepared on the first insulating layer and patterned to form the anode of another portion of the sub-pixels and the corresponding anode leads; A second insulating material layer is prepared on the second conductive layer and patterned to form the second insulating layer in the insulating layer; in a direction perpendicular to the glass substrate, the first insulating layer and the second insulating portion are overlapped, and the overlapping area is located between the sub-pixels; Pixel openings are etched on the first insulating layer and the second insulating layer respectively to expose the anode; the pixel openings are configured in a one-to-one correspondence with the anode.

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