Light emitting element, display device including the same, and method of manufacturing the display device

Abstract

The invention relates to a light emitting element, a display device, and a method of manufacturing the display device. A light emitting element according to an embodiment includes: a first semiconductor layer; a second semiconductor layer disposed on the first semiconductor layer; a light emitting layer disposed on the second semiconductor layer; a third semiconductor layer disposed on the light emitting layer; an element electrode layer disposed on the third semiconductor layer; a connection electrode disposed on the element electrode layer; a first insulating layer surrounding a side surface of the first semiconductor layer and a side surface of the second semiconductor layer; a contact electrode surrounding a side surface of the first semiconductor layer and a side surface of the second semiconductor layer; and a second insulating layer surrounding a side surface of the second semiconductor layer, a side surface of the light emitting layer, a side surface of the third semiconductor layer, a side surface of the element electrode layer, and a side surface of the connection electrode, in which the contact electrode is in contact with the side surface of the second semiconductor layer.

Description

Light-emitting element, display device including light-emitting element, and method of manufacturing display device Technical Field

[0001] This disclosure relates to light-emitting elements, display devices including light-emitting elements, and methods for manufacturing display devices. Background Technology

[0002] With the development of multimedia, display devices are becoming increasingly important. In response, various types of display devices are being used, such as organic light-emitting diode displays (OLED displays) and liquid crystal displays (LCDs).

[0003] Display devices for displaying images include display panels, such as organic light-emitting display panels or liquid crystal display panels. Within these display panels, light-emitting display panels may include light-emitting elements. For example, light-emitting diodes (LEDs) include organic light-emitting diodes (OLEDs) that use organic materials as light-emitting materials and inorganic light-emitting diodes that use inorganic materials as light-emitting materials. Summary of the Invention

[0004] [Technical Issue] This disclosure provides a light-emitting element capable of contacting the side surface of a first semiconductor layer, a display device including the light-emitting element, and a method for manufacturing the display device.

[0005] However, this disclosure is not limited to those aspects set forth herein. These and other aspects of this disclosure will become more apparent to those skilled in the art upon reference to the detailed description of this disclosure given below.

[0006] [Technical Solution] According to an aspect of this disclosure, a light-emitting element includes: a first semiconductor layer; a second semiconductor layer disposed on the first semiconductor layer; a light-emitting layer disposed on the second semiconductor layer; a third semiconductor layer disposed on the light-emitting layer; an element electrode layer disposed on the third semiconductor layer; a connecting electrode disposed on the element electrode layer; a first insulating layer surrounding a side surface of the first semiconductor layer and a side surface of the second semiconductor layer; a contact electrode surrounding a side surface of the first insulating layer and a side surface of the second semiconductor layer; and a second insulating layer surrounding a side surface of the second semiconductor layer, a side surface of the light-emitting layer, a side surface of the third semiconductor layer, a side surface of the element electrode layer, and a side surface of the connecting electrode, wherein the contact electrode is in contact with a side surface of the second semiconductor layer.

[0007] The first insulating layer surrounds the entire side surface of the first semiconductor layer and a portion of the side surface of the second semiconductor layer.

[0008] The contact electrode does not contact the first semiconductor layer.

[0009] The second insulating layer surrounds the side surface of the contact electrode but does not contact the first insulating layer.

[0010] The light-emitting element further includes a contact region in which a contact electrode and a second semiconductor layer are in contact with each other, wherein the contact region is disposed in a region ranging from 1% to 90% of the length of the second semiconductor layer from the interface between the first semiconductor layer and the second semiconductor layer.

[0011] The contact area is in the range of 1% to 90% of the total area of ​​the side surface of the second semiconductor layer.

[0012] The side surfaces of the first insulating layer, the contact electrode, and the second insulating layer are aligned with each other.

[0013] The first insulating layer does not contact the second semiconductor layer.

[0014] The second insulating layer does not contact the side surface of the contact electrode and is aligned with the side surface of the contact electrode.

[0015] The light-emitting element also includes a reflective layer surrounding the side surface of the second insulating layer, wherein the side surface of the reflective layer is aligned with the side surface of the contact electrode.

[0016] The first semiconductor layer includes an undoped semiconductor, the second semiconductor layer includes an n-type semiconductor, and the third semiconductor layer includes a p-type semiconductor.

[0017] According to an aspect of this disclosure, a display device includes: a substrate; a pixel electrode disposed on the substrate; a plurality of light-emitting elements disposed on the pixel electrode; a first organic layer disposed on the pixel electrode and disposed between the plurality of light-emitting elements; and a common electrode disposed on the first organic layer and the plurality of light-emitting elements, wherein each of the plurality of light-emitting elements includes: a connecting electrode disposed on the pixel electrode; an element electrode layer disposed on the connecting electrode; a third semiconductor layer disposed on the element electrode layer; a light-emitting layer disposed on the third semiconductor layer; a second semiconductor layer disposed on the light-emitting layer; a first semiconductor layer disposed on the second semiconductor layer; a first insulating layer surrounding a side surface of the first semiconductor layer and a side surface of the second semiconductor layer; a contact electrode surrounding a side surface of the first insulating layer and a side surface of the second semiconductor layer; and a second insulating layer surrounding a side surface of the second semiconductor layer, a side surface of the light-emitting layer, a side surface of the third semiconductor layer, a side surface of the element electrode layer, and a side surface of the connecting electrode, wherein the contact electrode is disposed on a side surface of the second semiconductor layer, and the common electrode is connected to the contact electrode.

[0018] The connecting electrode is connected to the pixel electrode, and the second semiconductor layer is electrically connected to the common electrode through the connecting electrode.

[0019] The top surface of the first organic layer is aligned with the top surface of the first insulating layer and the top surface of the contact electrode.

[0020] The common electrode is disposed on the first semiconductor layer, the first insulating layer, the contact electrode, and the first organic layer.

[0021] The display device further includes a third insulating layer disposed between the first semiconductor layer and the common electrode, wherein the common electrode does not contact the first semiconductor layer.

[0022] The third insulating layer is in contact with the first semiconductor layer but not with the first insulating layer.

[0023] The common electrode is in contact with the side surface of the first insulating layer and the side surface of the contact electrode.

[0024] The light-emitting element also includes a reflective layer surrounding the side surface of the second insulating layer, and the first organic layer covers the reflective layer.

[0025] The display device further includes: a second organic layer disposed on the first organic layer, wherein a common electrode is disposed between the first organic layer and the second organic layer.

[0026] The common electrode surrounds and contacts the side surface of the contact electrode, and the second organic layer covers a portion of the common electrode.

[0027] According to an aspect of this disclosure, a method of manufacturing a display device includes: forming a pixel electrode on a substrate; forming a light-emitting element on a substrate; combining the light-emitting element formed on the substrate onto the pixel electrode; forming an organic layer on the pixel electrode between the light-emitting elements; and forming a common electrode on the organic layer and the light-emitting element, wherein forming the light-emitting element on the substrate includes: forming a first semiconductor layer, a second semiconductor layer, a light-emitting layer, a third semiconductor layer, and an element electrode layer on the substrate; forming a first insulating layer surrounding a side surface of the first semiconductor layer and a side surface of the second semiconductor layer; forming contact electrodes surrounding the side surfaces of the first insulating layer and the second semiconductor layer; forming a second insulating layer surrounding the side surfaces of the second semiconductor layer, the light-emitting layer, the third semiconductor layer, and the element electrode layer; and forming a connection electrode on the element electrode layer.

[0028] The first insulating layer, the second insulating layer, and the contact electrode are formed by simultaneously etching the first insulating material layer, the contact electrode material layer, and the second insulating layer.

[0029] Assembling a light-emitting element formed on a substrate onto a pixel electrode includes: bonding a support film to a connection electrode of the light-emitting element; separating the substrate from the light-emitting element; bonding a transfer film to a surface of the light-emitting element opposite to the support film; separating the support film from the light-emitting element; assembling the connection electrode of the light-emitting element onto the pixel electrode; and removing the transfer film from the light-emitting element.

[0030] After separating the support film from the light-emitting element, the transfer film is stretched to increase the spacing between the light-emitting elements.

[0031] When combining the connecting electrodes of the light-emitting element onto the pixel electrode, a laser is irradiated onto the pixel electrode to melt and bond the connecting electrodes to the pixel electrode.

[0032] Other features and embodiments may be apparent from the following detailed description and accompanying drawings.

[0033] [Beneficial Effects] In the light-emitting element, the display device including the light-emitting element, and the method of manufacturing the display device according to the embodiments of the present disclosure, a contact electrode that contacts the side surface of the second semiconductor layer can be formed to drive the light-emitting element through a common electrode, thereby omitting the removal process of the first semiconductor layer. Therefore, process errors that may occur during the removal process of the first semiconductor layer can be prevented, and the productivity of the manufacturing process of the display device can be improved.

[0034] The effects of the embodiments are not limited to those illustrated above, and many more effects are included in this disclosure. Attached Figure Description

[0035] Figure 1 is a schematic plan view of a display device according to one embodiment; Figure 2 is a schematic layout diagram of the circuit lines of the display substrate of a display device according to one embodiment; Figure 3 is an equivalent circuit diagram of a pixel of a display device according to one embodiment; Figure 4 is an equivalent circuit diagram of a pixel of a display device according to another embodiment; Figure 5 is an equivalent circuit diagram of a pixel of a display device according to another embodiment; Figure 6 is a schematic cross-sectional view of a display device according to one embodiment; Figure 7 is a plan view showing an example of an emitting region of a display device according to one embodiment; Figure 8 is a view showing a light-emitting element according to one embodiment; Figure 9 is a perspective view showing the second semiconductor layer and the contact area of ​​the contact electrode of the light-emitting element according to one embodiment; Figure 10 is a view showing a display device according to one embodiment. Figure 11 is an enlarged view of a portion of the light-emitting element of a display device according to another embodiment; Figure 12 is a diagram showing the light-emitting element according to yet another embodiment; Figure 13 is an enlarged view of the light-emitting element region of a display device according to yet another embodiment; Figure 14 is an enlarged view of the light-emitting element region of a display device according to yet another embodiment; Figure 15 is an enlarged view of the light-emitting element region of a display device according to yet another embodiment; Figure 16 is an enlarged view of the light-emitting element region of a display device according to yet another embodiment; Figures 17 to 19 are enlarged views of the light-emitting element region of a display device according to yet another embodiment; Figure 20 is a flowchart showing a method of manufacturing a display device according to one embodiment; and Figures 21 to 40 are diagrams for illustrating a method of manufacturing a display device according to one embodiment. Detailed Implementation

[0036] The invention will now be described more fully below with reference to the accompanying drawings, in which preferred embodiments of the invention are illustrated. However, the invention may be embodied in various forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art.

[0037] It will also be understood that when a layer is referred to as being "on" another layer or substrate, the layer may be directly on the other layer or substrate, or an intermediary layer may be present. Throughout the specification, the same reference numerals refer to the same components.

[0038] It will be understood that although the terms “first,” “second,” etc., may be used herein to describe various elements, these elements should not be limited by these terms. These terms are used only to distinguish one element from another. For example, a first element discussed below can be referred to as a second element without departing from the teachings of the invention. Similarly, a second element can also be referred to as a first element.

[0039] In the following description, exemplary embodiments of the present disclosure will be described with reference to the accompanying drawings.

[0040] Figure 1 is a schematic plan view of a display device according to one embodiment.

[0041] Referring to Figure 1, the display device 10 according to one embodiment can be applied to various consumer electronics products or Internet of Things (IoT) devices, such as smartphones, cellular phones, tablet PCs, personal digital assistants (PDAs), portable multimedia players (PMPs), televisions, gaming devices, watch-type electronic devices, head-mounted displays, personal computer monitors, laptop computers, car navigation systems, car dashboards, digital cameras, camcorders, external billboards, electronic display panels, medical devices, examination devices, refrigerators, and washing machines, etc. A television is described herein as an example of a display device, and the television can have high resolution or ultra-high resolution, such as high definition (HD), ultra-high definition (UHD), 4K, 8K, etc.

[0042] Furthermore, the display device 10 according to some embodiments can be classified differently based on how it is displayed. For example, categories of display devices may include organic light-emitting diode displays (OLED displays), inorganic light-emitting diode displays (inorganic LED displays), quantum dot light-emitting displays (QEDs), micro LED displays, nano LED displays, plasma display panels (PDPs), field emission displays (FEDs), cathode ray tube displays (CRTs), liquid crystal displays (LCDs), and electrophoretic displays (EPDs), etc. Hereinafter, unless otherwise indicated, organic light-emitting diode display devices will be described as examples of display devices, and the organic light-emitting diode display devices used in the embodiments will be simply referred to as display devices. However, the embodiments are not limited to organic light-emitting diode display devices, and other display devices listed above or known in the art may be employed within the scope of the shared technical concept.

[0043] Furthermore, in the following figures, the first direction DR1 refers to the horizontal direction of the display device 10, the second direction DR2 refers to the vertical direction of the display device 10, and the third direction DR3 refers to the thickness direction of the display device 10. In this case, "left," "right," "up," and "down" refer to the directions when the display device 10 is viewed from a plane. For example, "right" refers to one side of the first direction DR1, "left" refers to the other side of the first direction DR1, "up" refers to one side of the second direction DR2, and "down" refers to the other side of the second direction DR2. In addition, "top" refers to the first side of the third direction DR3, and "bottom" refers to the second side of the third direction DR3.

[0044] According to one embodiment, the display device 10 may have a quadrilateral shape, such as a square shape, in a plan view. Alternatively, if the display device 10 is a television, it may have a rectangular shape with a long side arranged in the horizontal direction. However, the display device 10 is not limited to this; the long side may be arranged in the vertical direction, and the long side may be rotatably mounted, allowing it to be variably arranged in the horizontal or vertical direction. The display device 10 may also have a circular or elliptical shape.

[0045] Display device 10 may include a display area DPA and a non-display area NDA surrounding the display area DPA, the non-display area NDA being along the edge or periphery of the display area DPA. The display area DPA may be an active area for displaying video. The display area DPA may have a square shape in a plan view similar to the overall shape of the display device 10, but is not limited thereto.

[0046] The display area DPA may include multiple pixels PX. The multiple pixels PX may be arranged in a matrix. For example, the multiple pixels PX may be arranged along the rows and columns of a matrix. In a planar view, the shape of each pixel PX may be rectangular or square, but is not limited to these, and may also be a rhombus shape with each side sloping towards one side of the display device 10. The multiple pixels PX may include multiple color pixels PX. For example, the multiple pixels PX may include a first color pixel PX of red, a second color pixel PX of green, and a third color pixel PX of blue, but is not limited to these. Each color pixel PX may be arranged in a stripe type or a PenTile. TM Arranged alternately.

[0047] The non-display area NDA can be disposed on the periphery of the display area DPA. The non-display area NDA can completely or partially surround the display area DPA. The display area DPA can be square in shape, and the non-display area NDA can be arranged adjacent to the four sides of the display area DPA. The non-display area NDA can include the bezel of the display device 10.

[0048] The driving circuit or driving element for driving the display area DPA can be disposed in the non-display area NDA. In one embodiment, the non-display area NDA, which is disposed adjacent to the first side (lower side in FIG. 1) of the display device 10, may have a pad portion provided on the display substrate of the display device 10, and an external device EXD may be mounted on the pad electrode of the pad portion. Examples of external devices EXD include connection films, printed circuit boards, driver chips (DIC), connectors, and wiring connection films, etc. In the non-display area NDA disposed adjacent to the second side (left side in FIG. 1) of the display device 10, a scan driving unit SDR, etc., formed directly on the display substrate of the display device 10, may be disposed.

[0049] Figure 2 is a schematic layout diagram of the circuit lines of the display substrate of a display device according to one embodiment.

[0050] Referring to Figure 2, multiple lines are arranged on the substrate. These multiple lines may include a scan line SCL, a sensing signal line SSL, a data line DTL, a reference voltage line RVL, and a first power supply line ELVDL, etc.

[0051] The scan line SCL and the sensing signal line SSL can extend along the first direction DR1. The scan line SCL and the sensing signal line SSL can be connected to the scan drive unit SDR. The scan drive unit SDR can include drive circuitry. The scan drive unit SDR can be disposed on one side of the non-display area NDA on the display substrate, but it can also be disposed on both sides of the non-display area NDA. The scan drive unit SDR can be connected to the signal connection line CWL, and at least one end of the signal connection line CWL can be connected to an external device ("EXD" in FIG1) by forming a pad WPD_CW on the first non-display area NDA and / or the second non-display area NDA.

[0052] The data line DTL and the reference voltage line RVL can extend along a second direction DR2 intersecting the first direction DR1. The first power line ELVDL can include a portion extending along the second direction DR2. The first power line ELVDL can also include a portion extending along the first direction DR1. The first power line ELVDL can have a mesh structure, but is not limited thereto.

[0053] Wiring pads (WPDs) can be disposed at at least one end of the data line (DTL), the reference voltage line (RVL), and the first power line (ELVDL). Each wiring pad (WPD) can be disposed on a pad area PDA in the non-display area NDA. In one embodiment, the wiring pad for the data line (DTL) (hereinafter referred to as "data pad WPD_DT"), the wiring pad for the reference voltage line (RVL) (hereinafter referred to as "reference voltage pad WPD_RV"), and the wiring pad for the first power line (ELVDL) (hereinafter referred to as "first power pad WPD_ELVD") can be disposed on a pad area PDA in the non-display area NDA. In another example, the data pad WPD_DT, the reference voltage pad WPD_RV, and the first power pad WPD_ELVD can be disposed in different non-display areas NDA. An external device ("external device EXD" in FIG. 1) can be mounted on the wiring pads (WPDs) as described above. The external device EXD can be mounted on the wiring pads (WPDs) by means of anisotropic conductive film or ultrasonic bonding, etc.

[0054] Each pixel PX on the display substrate includes a pixel driving circuit. The wiring described above can pass through or around each pixel PX and apply a driving signal to each pixel driving circuit. The pixel driving circuit can include transistors and capacitors. The number of transistors and capacitors in each pixel driving circuit can vary. Hereinafter, a 3T1C structure including three transistors and one capacitor will be used as an example to describe the pixel driving circuit, but it is not limited to this, and various other modified pixel PX structures, such as 2T1C, 7T1C, and 6T1C structures, can be applied.

[0055] Figure 3 is an equivalent circuit diagram of a pixel of a display device according to one embodiment.

[0056] Referring to FIG3, each pixel PX of the display device according to one embodiment includes, in addition to the light-emitting element LE, three transistors DTR, STR1 and STR2 and a capacitor CST for storage.

[0057] The light-emitting element (LE) emits light in response to the current supplied by the driving transistor (DTR). The LE can be implemented as an inorganic light-emitting diode, an organic light-emitting diode, a micro-light-emitting diode, or a nano-light-emitting diode, etc.

[0058] The first electrode (i.e., the anode electrode) of the light-emitting element LE can be connected to the source electrode of the driving transistor DTR, and the second electrode (i.e., the cathode electrode) can be connected to the second power line ELVSL, which is supplied with a low potential voltage (second power supply voltage) that is lower than the high potential voltage (first power supply voltage) of the first power line ELVDL.

[0059] The driving transistor DTR regulates the current flowing from the first power line ELVDL, which is supplied with the first power supply voltage, to the light-emitting element LE based on the voltage difference between the gate electrode and the source electrode. The gate electrode of the driving transistor DTR can be connected to the first electrode of the first transistor STR1, the source electrode can be connected to the first electrode of the light-emitting element LE, and the drain electrode can be connected to the first power line ELVDL to which the first power supply voltage is applied.

[0060] The first transistor STR1 is turned on by the scan signal of the scan line SCL to connect the data line DTL to the gate electrode of the driving transistor DTR. The gate electrode of the first transistor STR1 can be connected to the scan line SL, the first electrode can be connected to the gate electrode of the driving transistor DTR, and the second electrode can be connected to the data line DTL.

[0061] The second transistor STR2 is turned on by the sensing signal of the sensing signal line SSL to connect the initialization voltage line VIL to the source electrode of the driving transistor DTR. The gate electrode of the second transistor STR2 can be connected to the sensing signal line SSL, the first electrode can be connected to the initialization voltage line VIL, and the second electrode can be connected to the source electrode of the driving transistor DTR.

[0062] In one embodiment, the first electrode of each of the first transistor STR1 and the second transistor STR2 may be the source electrode and the second electrode may be the drain electrode, but is not limited thereto, and may also be the reverse.

[0063] A capacitor CST is formed between the gate and source electrodes of the driving transistor DTR. The capacitor CST stores the voltage difference between the gate voltage and the source voltage of the driving transistor DTR.

[0064] The driving transistor DTR, the first switching transistor STR1, and the second switching transistor STR2 can be formed as thin-film transistors. Furthermore, although FIG3 describes the driving transistor DTR, the first switching transistor STR1, and the second switching transistor STR2 as N-type metal-oxide-semiconductor field-effect transistors (MOSFETs), this disclosure is not limited thereto. That is, the driving transistor DTR, the first switching transistor STR1, and the second switching transistor STR2 can be P-type MOSFETs, or some can be N-type MOSFETs and others can be P-type MOSFETs.

[0065] Figure 4 is an equivalent circuit diagram of a pixel of a display device according to another embodiment.

[0066] Referring to Figure 4, the first electrode of the light-emitting element LE can be connected to the first electrode of the fourth transistor STR4 and the second electrode of the sixth transistor STR6, and the second electrode of the light-emitting element LE can be connected to the second power line ELVSL. A parasitic capacitance Cel can be formed between the first and second electrodes of the light-emitting element LE.

[0067] Each pixel PX includes a driving transistor DTR, a switching element, and a capacitor CST. The switching element includes a first transistor STR1, a second transistor STR2, a third transistor STR3, a fourth transistor STR4, a fifth transistor STR5, and a sixth transistor STR6.

[0068] A drive transistor (DTR) includes a gate electrode, a first electrode, and a second electrode. The DTR controls the drain-source current Ids (also known as the "drive current") flowing between the first and second electrodes based on the data voltage applied to the gate electrode.

[0069] A capacitor CST is formed between the gate electrode of the driving transistor DTR and the first power line ELVDL. One electrode of the capacitor CST can be connected to the gate electrode of the driving transistor DTR, and the other electrode can be connected to the first power line ELVDL.

[0070] When the first electrode of each of the first transistor STR1, second transistor STR2, third transistor STR3, fourth transistor STR4, fifth transistor STR5, and sixth transistor STR6, and the driving transistor DTR is a source electrode, the second electrode can be a drain electrode. Alternatively, if the first electrode of each of the first transistor STR1, second transistor STR2, third transistor STR3, fourth transistor STR4, fifth transistor STR5, and sixth transistor STR6, and the driving transistor DTR is a drain electrode, then the second electrode can be a source electrode.

[0071] The active layer of each of the first transistor STR1, the second transistor STR2, the third transistor STR3, the fourth transistor STR4, the fifth transistor STR5, and the sixth transistor STR6, as well as the driving transistor DTR, can be formed from polycrystalline silicon, amorphous silicon, and oxide semiconductors. When the semiconductor layer (i.e., the active layer) of each of the first transistor STR1, the second transistor STR2, the third transistor STR3, the fourth transistor STR4, the fifth transistor STR5, and the sixth transistor STR6, as well as the driving transistor DTR, is formed from polycrystalline silicon, the process used to form said semiconductor layer can be a low-temperature polycrystalline silicon (LTPS) process.

[0072] Furthermore, Figure 4 focuses on P-type metal-oxide-semiconductor field-effect transistors (MOSFETs) and depicts first transistor STR1, second transistor STR2, third transistor STR3, fourth transistor STR4, fifth transistor STR5, and sixth transistor STR6, as well as the drive transistor DTR, but is not limited thereto, and these transistors can be formed as N-type MOSFETs. For example, the first transistor STR1 can be formed by a P-type MOSFET and may include a first-first transistor ST1-1 and a first-second transistor ST1-2 connected to each other. Similarly, the third transistor STR3 can be formed by a P-type MOSFET and may include a third-first transistor ST3-1 and a third-second transistor ST3-2 connected to each other.

[0073] The gate electrodes of the second transistor STR2 and the first transistor STR1 can be connected to the write scan line GWL, and the gate electrode of the fourth transistor STR4 can be connected to the control scan line GCL. Furthermore, the gate electrode of the third transistor STR3 can be connected to the initialization scan line GIL. The gate electrodes of the fifth transistor STR5 and the sixth transistor STR6 can be connected to the light-emitting line EL. The first power supply voltage of the first power line ELVDL, the second power supply voltage of the second power line ELVSL, and the third power supply voltage of the third power line VIL can be set by considering the characteristics of the driving transistor DTR and the light-emitting element LE, etc.

[0074] For example, the first transistor STR1 can be connected between the second electrode and the gate electrode of the driving transistor DTR. The second transistor STR2 can be connected between the data line DTL and the first electrode of the driving transistor DTR. The third transistor STR3 can be connected between the third power line VIL and the gate electrode of the driving transistor DTR. The fourth transistor STR4 can be connected between the third power line VIL and the light-emitting element LE. The fifth transistor STR5 can be connected between the first power line ELVDL and the first electrode of the driving transistor DTR. The sixth transistor STR6 can be connected between the second electrode of the driving transistor DTR and the light-emitting element LE.

[0075] Figure 5 is an equivalent circuit diagram of a pixel of a display device according to another embodiment.

[0076] The embodiment in Figure 5 differs from the embodiment in Figure 4 in that the driving transistor DTR, the second transistor STR2, the fourth transistor STR4, the fifth transistor STR5, and the sixth transistor STR6 are formed as P-type MOSFETs, and the first transistor STR1 and the third transistor STR3 are formed as N-type MOSFETs.

[0077] Referring to Figure 5, the active layer of each of the driving transistor DTR, the second transistor STR2, the fourth transistor STR4, the fifth transistor STR5, and the sixth transistor STR6, which are formed as P-type MOSFETs, can be formed of polysilicon, and the active layer of each of the first transistor STR1 and the third transistor STR3, which are formed as N-type MOSFETs, can be formed of oxide semiconductor.

[0078] The embodiment in Figure 5 differs from that in Figure 4 in that the gate electrodes of the second transistor STR2 and the fourth transistor STR4 are connected to the write scan line GWL, and the gate electrode of the first transistor STR1 is connected to the control scan line GCL. Furthermore, in Figure 5, the first transistor STR1 and the third transistor STR3 are formed as N-type MOSFETs, allowing a high-gate-voltage scan signal to be applied to the control scan line GCL and the initialization scan line GIL. On the other hand, since the second transistor STR2, the fourth transistor STR4, the fifth transistor STR5, and the sixth transistor STR6 are formed as P-type MOSFETs, a low-gate-voltage scan signal can be applied to the write scan line GWL and the light-emitting line EL.

[0079] It should be noted that the equivalent circuit diagrams of pixels according to embodiments of the present disclosure described above are not limited to those shown in Figures 3 to 5. Equivalent circuit diagrams of pixels according to embodiments of the present disclosure can be formed using other known circuit structures that can be employed by those skilled in the art, in addition to the embodiments shown in Figures 3 to 5.

[0080] Figure 6 is a schematic cross-sectional view of a display device according to one embodiment. Figure 7 is a plan view showing an example of the emitting area of ​​a display device according to one embodiment.

[0081] Referring to FIG6, the display device 10 may include a display substrate 100, a wavelength control unit 200 disposed on the display substrate 100, and a color filter layer CFL.

[0082] Display substrate 100 may include substrate 110 and light-emitting element portion LEP disposed on substrate 110. Substrate 110 may be an insulating substrate. Substrate 110 may include a transparent material. For example, substrate 110 may include a transparent insulating material such as glass or quartz. Substrate 110 may be a rigid substrate. However, substrate 110 is not limited to this and may include plastics such as polyimide. In addition, substrate 110 may have flexible properties that allow substrate 110 to be twisted, bent, folded, or rolled. Substrate 110 may define a plurality of emitting regions EA1, EA2, and EA3 and a non-emitting region NEA.

[0083] Switching elements T1, T2, and T3 can be disposed on the substrate 110. In one embodiment, the first switching element T1 can be disposed in the first emission region EA1 of the substrate 110, the second switching element T2 can be disposed in the second emission region EA2, and the third switching element T3 can be disposed in the third emission region EA3. However, it is not limited thereto, and in other embodiments, at least one of the first switching element T1, the second switching element T2, and the third switching element T3 can be disposed in the non-emission region NEA.

[0084] In one embodiment, the first switching element T1, the second switching element T2, and the third switching element T3 may each be a thin-film transistor comprising amorphous silicon, polycrystalline silicon, or oxide semiconductor. Although not shown, multiple signal lines (e.g., gate lines, data lines, power lines, etc.) may be further disposed on the substrate 110 to transmit signals to each switching element.

[0085] Each switching element T1, T2, and T3 may include a semiconductor layer 65, a gate electrode 75, a source electrode 85a, and a drain electrode 85b. Specifically, a buffer layer 60 may be disposed on the substrate 110. The buffer layer 60 may be configured to cover the front side of the substrate 110. The buffer layer 60 may include silicon nitride, silicon oxide, or silicon oxynitride, and may be a single layer or a double layer of silicon nitride, silicon oxide, or silicon oxynitride.

[0086] Semiconductor layer 65 may be disposed on buffer layer 60. Semiconductor layer 65 may form a channel for each of switching elements T1, T2, and T3. Semiconductor layer 65 may include amorphous silicon, polycrystalline silicon, or oxide semiconductor. In one example, for instance, oxide semiconductor may include a binary compound (AB) comprising elements such as indium, zinc, gallium, tin, titanium, aluminum, hafnium (Hf), zirconium (Zr), and magnesium (Mg). x ), ternary compounds (AB) x C y ) or quaternary compounds (AB) x C y D z In one embodiment, semiconductor layer 65 may include indium tin zinc oxide (IGZO).

[0087] A gate insulating layer 70 may be disposed on the semiconductor layer 65 and the buffer layer 60. The gate insulating layer 70 may include silicon compounds or metal oxides, etc. For example, the gate insulating layer 70 may include silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, tantalum oxide, hafnium oxide, zirconium oxide, and titanium oxide, etc. In one embodiment, the gate insulating layer 70 may include silicon oxide.

[0088] Gate electrode 75 may be disposed on gate insulating layer 70. Gate electrode 75 may overlap with semiconductor layer 65 in the thickness direction. Gate electrode 75 may include a conductive material. Gate electrode 75 may include metal oxides such as ITO, IZO, ITZO, In2O3, or metals such as copper (Cu), titanium (Ti), aluminum (Al), molybdenum (Mo), tantalum (Ta), calcium (Ca), chromium (Cr), magnesium (Mg), or nickel (Ni). For example, gate electrode 75 may be formed from a Cu / Ti bilayer in which a copper upper layer is stacked on a titanium lower layer, but is not limited thereto.

[0089] The first interlayer insulating layer 80 and the second interlayer insulating layer 82 can be disposed on the gate electrode 75 and the gate insulating layer 70. The first interlayer insulating layer 80 can be directly disposed on the gate electrode 75 and the gate insulating layer 70, and the second interlayer insulating layer 82 can be directly disposed on the first interlayer insulating layer 80. Each of the first interlayer insulating layer 80 and the second interlayer insulating layer 82 can include inorganic insulating materials, such as silicon oxide, silicon nitride, silicon oxynitride, hafnium oxide, aluminum oxide, titanium oxide, tantalum oxide, and zinc oxide. However, it is not limited to these, and the second interlayer insulating layer 82 can include organic insulating materials capable of flattening the lower step.

[0090] Source electrode 85a and drain electrode 85b may be disposed on the second interlayer insulating layer 82. Source electrode 85a and drain electrode 85b may be connected to the semiconductor layer 65 through contact holes penetrating the first interlayer insulating layer 80, the second interlayer insulating layer 82, and the gate insulating layer 70, respectively. Source electrode 85a and drain electrode 85b may comprise metal oxides such as ITO, IZO, ITZO, In2O3, or metals such as copper (Cu), titanium (Ti), aluminum (Al), molybdenum (Mo), tantalum (Ta), calcium (Ca), chromium (Cr), magnesium (Mg), and nickel (Ni). For example, source electrode 85a and drain electrode 85b may be formed from a Cu / Ti bilayer in which a copper upper layer is stacked on a titanium lower layer, but are not limited thereto.

[0091] The first planarization layer 120 may be disposed on the first switching element T1, the second switching element T2, and the third switching element T3. The first planarization layer 120 may include an organic material. For example, the first planarization layer 120 may include acrylic resin, epoxy resin, imide resin, or ester resin, etc. In one embodiment, the first planarization layer 120 may include a positive photosensitive material or a negative photosensitive material.

[0092] Pixel connection electrodes 125 may be disposed on the first planarization layer 120. Pixel connection electrodes 125 are configured to correspond to each of the first switching element T1, the second switching element T2, and the third switching element T3, and may be electrically connected to the first switching element T1, the second switching element T2, and the third switching element T3. Pixel connection electrodes 125 may connect pixel electrodes PE1, PE2, and PE3 (described later) to the switching elements T1, T2, and T3 (described above). Pixel connection electrodes 125 may contact the switching elements T1, T2, and T3 through contact holes penetrating the first planarization layer 120.

[0093] The second planarization layer 130 may be disposed on the first planarization layer 120 and the pixel connection electrode 125. The second planarization layer 130 flattens the lower step and may comprise the same material as the first planarization layer 120 described above.

[0094] The light-emitting element portion (LEP) can be disposed on the second planarization layer 130. The light-emitting element portion (LEP) may include multiple pixel electrodes PE1, PE2, and PE3, multiple light-emitting elements LE, and a common electrode CE. In addition, the light-emitting element portion (LEP) may also include a pixel-defining layer (PDL) and an organic layer 140 that divide each of the emission regions EA1, EA2, and EA3.

[0095] Multiple pixel electrodes PE1, PE2, and PE3 may include a first pixel electrode PE1, a second pixel electrode PE2, and a third pixel electrode PE3. The first pixel electrode PE1, the second pixel electrode PE2, and the third pixel electrode PE3 can serve as the first electrode of the light-emitting element LE, and can be either an anode electrode or a cathode electrode. The first pixel electrode PE1 may be disposed in a first emission region EA1, the second pixel electrode PE2 may be disposed in a second emission region EA2, and the third pixel electrode PE3 may be disposed in a third emission region EA3. In an embodiment, the first pixel electrode PE1 may completely overlap with the first emission region EA1, the second pixel electrode PE2 may completely overlap with the second emission region EA2, and the third pixel electrode PE3 may completely overlap with the third emission region EA3.

[0096] Each of the pixel electrodes PE1, PE2, and PE3 can be directly connected to the pixel connection electrode 125 through a contact hole penetrating the second planarization layer 130, and can be electrically connected to each of the switching elements T1, T2, and T3 through the pixel connection electrode 125. The first pixel electrode PE1, the second pixel electrode PE2, and the third pixel electrode PE3 can comprise metals. For example, the metals can include copper (Cu), titanium (Ti), silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), lead (Pb), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), lithium (Li), calcium (Ca), or mixtures thereof. Furthermore, the first pixel electrode PE1, the second pixel electrode PE2, and the third pixel electrode PE3 can have a multilayer structure with two or more metal layers stacked. For example, the first pixel electrode PE1, the second pixel electrode PE2, and the third pixel electrode PE3 can have a two-layer structure in which a copper layer is stacked on a titanium layer, but are not limited thereto.

[0097] Multiple light-emitting elements LE can be disposed on each of the first pixel electrode PE1, the second pixel electrode PE2, and the third pixel electrode PE3.

[0098] As shown in Figures 6 and 7, the light-emitting element LE can be disposed in the first emitting region EA1, the second emitting region EA2, and the third emitting region EA3, respectively. The light-emitting element LE can be a vertically extending light-emitting diode element along the third direction DR3. That is, the length of the light-emitting element LE along the third direction DR3 can be longer than the length of the light-emitting element LE in the horizontal direction. The length in the horizontal direction refers to the length of the first direction DR1 or the length of the second direction DR2. A detailed description of the light-emitting element LE will follow.

[0099] Organic layer 140 can be disposed on multiple pixel electrodes PE1, PE2, and PE3 and pixel defining layer PDL. Organic layer 140 can flatten the lower step, allowing the formation of common electrode CE, which will be described later. Organic layer 140 can be formed at a predetermined height such that at least a portion of the multiple light-emitting elements LE can protrude above organic layer 140. That is, the height of organic layer 140 based on the top surface of the first pixel electrode PE1 can be less than the height of the light-emitting elements LE.

[0100] Organic layer 140 may include organic materials to planarize the lower step. For example, organic layer 140 may include polyacrylate resins, epoxy resins, phenolic resins, polyamide resins, or polyimide resins, unsaturated polyester resins, polyphenylene ether resins, polyphenylene sulfide resins, or benzocyclobutene (BCB).

[0101] A common electrode CE can be disposed on the organic layer 140 and multiple light-emitting elements LE. Specifically, the common electrode CE is disposed on a surface of the substrate 110 on which the light-emitting elements LE are formed, and can be disposed throughout the entire display area DPA. The common electrode CE is configured to overlap with each of the emission areas EA1, EA2, and EA3 in the display area DPA, and can have a thin thickness to allow light emission.

[0102] The common electrode CE can be directly disposed on the upper and side surfaces of multiple light-emitting elements LE. For example, the common electrode CE can contact the contact electrode CTE, which is a side surface of the light-emitting element LE. The common electrode CE can also be a common layer configured to cover and publicly connect multiple light-emitting elements LE.

[0103] Since the common electrode CE is entirely disposed on the substrate 110 and a common voltage is applied, the common electrode CE can comprise a material with low resistance. Additionally, the common electrode CE can be formed to have a thin thickness to facilitate light transmission. For example, the common electrode CE can comprise a low-resistivity metallic material such as aluminum (Al), silver (Ag), or copper (Cu), or a metal oxide such as ITO, IZO, or ITZO. The common electrode CE can have a thickness of about 10 Å to about 200 Å, but is not limited thereto.

[0104] The light-emitting element (LE) can receive either the pixel voltage or the anode voltage from each of the pixel electrodes PE1, PE2, and PE3, and can receive a common voltage through the common electrode CE. The LE can emit light with a predetermined brightness based on the voltage difference between the pixel voltage and the common voltage. In one embodiment, multiple LEs (i.e., inorganic light-emitting diodes) can be disposed on the pixel electrodes PE1, PE2, and PE3 to eliminate the susceptibility of organic light-emitting diodes to external moisture or oxygen and improve lifespan and reliability.

[0105] As shown in Figure 7, light-emitting elements (LEs) can be disposed on each of the pixel electrodes PE1, PE2, and PE3. The LEs can be arranged regularly according to certain rules. For example, the LEs can be spaced apart from each other at regular intervals. However, this is not a limitation, and the LEs can be arranged irregularly.

[0106] Each of the plurality of light-emitting elements LE can be substantially disposed on each of the pixel electrodes PE1, PE2, and PE3. However, this disclosure is not limited thereto, and some light-emitting elements LE can be disposed between each pixel electrode PE1, PE2, and PE3, can be disposed across any pixel electrode in the pixel electrode portion, or can be not disposed on any pixel electrode.

[0107] Simultaneously, a first capping layer CPL1 can be disposed on a substrate 110 on which a common electrode CE is disposed. The first capping layer CPL1 can be directly disposed on the common electrode CE. The first capping layer CPL1 is used to protect the components disposed below (e.g., the light-emitting element LE and the common electrode CE) from moisture or debris.

[0108] The first capping layer CPL1 may include inorganic materials. For example, the first capping layer CPL1 may include at least one of silicon nitride, aluminum nitride, zirconium nitride, titanium nitride, hafnium nitride, tantalum nitride, silicon oxide, aluminum oxide, titanium oxide, tin oxide, cerium oxide, and silicon oxynitride. While the figures show the first capping layer CPL1 formed from a single layer, it is not limited thereto. For example, the first capping layer CPL1 may be formed as multiple layers stacked with alternating inorganic layers, said inorganic layers including at least one of the materials exemplified as potentially included in the first capping layer CPL1. The thickness of the first capping layer CPL1 may be in the range of 0.05 μm to 2 μm, but is not limited thereto.

[0109] Meanwhile, the wavelength control unit 200 can be disposed on the light-emitting element portion LEP. The wavelength control unit 200 may include a first wavelength conversion layer WCL1, a second wavelength conversion layer WCL2, and a light-transmitting layer TPL. In addition, the wavelength control unit 200 may also include a dam layer BNL.

[0110] The dam layer BNL is disposed on the first capping layer CPL1 and can divide multiple emission areas EA1, EA2, and EA3. The dam layer BNL is configured to extend along the first direction DR1 and the second direction DR2 and can be formed as a grid pattern throughout the entire display area DPA. In addition, the dam layer BNL does not overlap with the multiple emission areas EA1, EA2, and EA3, but can overlap with the non-emission area NEA.

[0111] The barrier layer (BNL) can be used to provide space in which the first wavelength conversion layer (WCL1), the second wavelength conversion layer (WCL2), and the light-transmitting layer (TPL) are formed. For this purpose, the barrier layer (BNL) can have a thickness of 1 μm to 10 μm. The barrier layer (BNL) can include an organic insulating material to be formed in a large thickness. For example, the organic insulating material can include epoxy resins, acrylic resins, calomel resins, or imide resins.

[0112] In one embodiment, the dam layer BNL may further comprise a light-blocking material and may include a dye or pigment with light-blocking properties. For example, the dam layer BNL may be a black matrix. External light incident from outside the display device 10 may cause color gamut distortion of the wavelength control unit 200. According to this embodiment, color distortion due to reflection of external light can be reduced by providing a dam layer BNL comprising a light-blocking material in the wavelength control unit 200. Furthermore, the dam layer BNL comprising a light-blocking material can prevent light from penetrating between adjacent emission areas and thus preventing color mixing, thereby further improving color reproduction.

[0113] A first wavelength conversion layer WCL1, a second wavelength conversion layer WCL2, and a light-transmitting layer TPL can be disposed on the emission regions EA1, EA2, and EA3. The first wavelength conversion layer WCL1 and the second wavelength conversion layer WCL2 can convert or shift the peak wavelength of the incident light to another specific peak wavelength and emit light. The first wavelength conversion layer WCL1 converts the blue light emitted from the light-emitting element LE into red light, and the second wavelength conversion layer WCL2 converts the blue light into green light. The light-transmitting layer TPL can transmit blue light as is.

[0114] The first wavelength conversion layer WCL1, the second wavelength conversion layer WCL2, and the light-transmitting layer TPL can be disposed in each of the emission regions EA1, EA2, and EA3 divided by the dike layer BNL, and can be arranged spaced apart from each other. That is, the first wavelength conversion layer WCL1, the second wavelength conversion layer WCL2, and the light-transmitting layer TPL can be formed into a dotted island pattern spaced apart from each other.

[0115] The first wavelength conversion layer WCL1 can be configured to overlap with the first emission region EA1. The first wavelength conversion layer WCL1 can convert or shift the peak wavelength of the incident light to light with another specific peak wavelength and emit light. In an embodiment, the first wavelength conversion layer WCL1 can convert blue light emitted from the light-emitting element LE in the first emission region EA1 into red light with a single peak wavelength in the range of about 610 nm to about 650 nm and emit red light.

[0116] The first wavelength conversion layer WCL1 may include a first matrix resin BRS1, first wavelength conversion particles WCP1, and a scatterer SCP. The first matrix resin BRS1 may include a light-transmitting organic material. For example, the first matrix resin BRS1 may include an epoxy resin, an acrylic resin, a calomel resin, or an imide resin.

[0117] The first wavelength conversion particle (WCP1) can convert blue light incident from the light-emitting element (LE) into red light. For example, the first wavelength conversion particle (WCP1) can convert light in the blue band into light in the red band. The first wavelength conversion particle (WCP1) can be a quantum dot (QD), a quantum rod, a fluorescent material, or a phosphorescent material. For example, a quantum dot can be a particulate material that emits a specific color as electrons transition from the conduction band to the valence band.

[0118] Quantum dots can be semiconductor nanocrystal materials. Depending on their composition and size, quantum dots can have specific band gaps to absorb light and emit light with unique wavelengths. Examples of semiconductor nanocrystals made from quantum dots include group IV nanocrystals, group II-VI compound nanocrystals, group III-V compound nanocrystals, group IV-VI nanocrystals, or combinations thereof.

[0119] Group II-VI compounds are binary compounds selected from the group consisting of CdSe, CdTe, ZnS, ZnSe, ZnTe, ZnO, HgS, HgSe, HgTe, MgSe, MgS and mixtures thereof, and compounds selected from InZnP, AgInS, CuInS, CdSeS, CdSeTe, CdSTe, ZnSeS, ZnSeTe, ZnSTe, HgSeS, HgSeTe, HgSTe, CdZnS, CdZnSe, CdZnT Ternary compounds selected from the group consisting of e, CdHgS, CdHgSe, CdHgTe, HgZnS, HgZnSe, HgZnTe, MgZnSe, MgZnS and mixtures thereof, and quaternary compounds selected from the group consisting of HgZnTeS, CdZnSeS, CdZnSeTe, CdZnSTe, CdHgSeS, CdHgSeTe, CdHgSTe, HgZnSeS, HgZnSeTe, HgZnSTe and mixtures thereof.

[0120] III-V group compounds are binary compounds selected from the group consisting of GaN, GaP, GaAs, GaSb, AlN, AlP, AlAs, AlSb, InN, InP, InAs, InSb and mixtures thereof; ternary compounds selected from the group consisting of GaNP, GaNAs, GaNSb, GaPAs, GaPSb, AlNP, AlNAs, AlNSb, AlPAs, AlPSb, InGaP, InNP, InAlP, InNAs, InNSb, InPAs, InPSb, GaAlNP and mixtures thereof; and quaternary compounds selected from the group consisting of GaAlNAs, GaAlNSb, GaAlPAs, GaAlPSb, GaInNP, GaInNAs, GaInNSb, GaInPAs, GaInPSb, InAlNP, InAlNAs, InAlNSb, InAlPAs, InAlPSb and mixtures thereof.

[0121] Group IV-VI compounds can be selected from the group consisting of binary, ternary, and quaternary compounds. The binary compounds are selected from the group consisting of SnS, SnSe, SnTe, PbS, PbSe, PbTe, and mixtures thereof. The ternary compounds are selected from the group consisting of SnSeS, SnSeTe, SnSTe, PbSeS, PbSeTe, PbSTe, SnPbS, SnPbSe, SnPbTe, and mixtures thereof. The quaternary compounds are selected from the group consisting of SnPbSSe, SnPbSeTe, SnPbSTe, and mixtures thereof. Group IV elements can be selected from the group consisting of Si, Ge, and mixtures thereof. Group IV compounds can be binary compounds selected from the group consisting of SiC, SiGe, and mixtures thereof.

[0122] Binary, ternary, or quaternary compounds can exist in particles at a uniform concentration or in the same particles at partially different concentrations. Quantum dots can also have a core-shell structure with one quantum dot surrounding another. The core-shell interface can have a concentration gradient where the concentration of elements present in the shell decreases towards the center.

[0123] In one embodiment, the quantum dot may have a core-shell structure comprising a core containing nanocrystals as described above and a shell surrounding the core. The shell of the quantum dot may act as a protective layer to prevent chemical denaturation of the core to maintain semiconductor properties and / or as a charging layer to impart electrophoretic properties to the quantum dot. The shell may be single-layered or multi-layered. Examples of shells for quantum dots include oxides of metals or non-metals, semiconductor compounds, or combinations thereof.

[0124] The oxides of metals or nonmetals may be exemplified by binary compounds such as SiO2, Al2O3, TiO2, ZnO, MnO, Mn2O3, Mn3O4, CuO, FeO, Fe2O3, Fe3O4, CoO, Co3O4, NiO, or ternary compounds such as MgAl2O4, CoFe2O4, NiFe2O4, CoMn2O4, but this disclosure is not limited thereto.

[0125] In addition, semiconductor compounds may include, but are not limited to, CdS, CdSe, CdTe, ZnS, ZnSe, ZnTe, ZnSeS, ZnTeS, GaAs, GaP, GaSb, HgS, HgSe, HgTe, InAs, InP, InGaP, InSb, AlAs, AlP, AlSb, etc.

[0126] The scatterer SCP can scatter light from the light-emitting element LE in random directions. The scatterer SCP can have a refractive index different from that of the first matrix resin BRS1 and form an optical interface with the first matrix resin BRS1. For example, the scatterer SCP can be light-scattering particles. The scatterer SCP is not particularly limited to materials capable of scattering at least a portion of the transmitted light, and can be, for example, metal oxide particles or organic particles. Examples of metal oxides include titanium oxide (TiO2), zirconium oxide (ZrO2), aluminum oxide (Al2O3), indium oxide (In2O3), zinc oxide (ZnO), and tin oxide (SnO2), and examples of organic particle materials include acrylic resins or urethane resins. The scatterer SCP can scatter light in random directions without substantially changing the wavelength of the light, regardless of the incident direction of the light.

[0127] The second wavelength conversion layer WCL2 can be configured to overlap with the second emission region EA2. The second wavelength conversion layer WCL2 can convert or shift the peak wavelength of the incident light to light with another specific peak wavelength and emit light. In one embodiment, the second wavelength conversion layer WCL2 can convert blue light emitted from the light-emitting element LE in the second emission region EA2 into green light with a peak wavelength in the range of about 510 nm to about 550 nm and emit green light.

[0128] The second wavelength conversion layer WCL2 may include a second matrix resin BRS2 and second wavelength conversion particles WCP2 and a scatterer SCP dispersed in the second matrix resin BRS2.

[0129] The second matrix resin BRS2 may be made of a material with high light transmittance and may be made of the same material as the first matrix resin BRS1, or may include at least one of the exemplified materials as constituent materials thereof.

[0130] The second wavelength conversion particle WCP2 can convert or shift the peak wavelength of incident light to another specific peak wavelength. In one embodiment, the second wavelength conversion particle WCP2 can convert blue light provided from the light-emitting element LE into green light having a peak wavelength in the range of about 510 nm to about 550 nm and emit green light. Examples of the second wavelength conversion particle WCP2 include quantum dots, quantum rods, or phosphors. A more specific description of the second wavelength conversion particle WCP2 is substantially the same as or similar to the description of the first wavelength conversion particle WCP1 described above, and therefore a more specific description of the second wavelength conversion particle WCP2 will be omitted.

[0131] The light-transmitting layer TPL can be configured to overlap with the third emission region EA3. The light-transmitting layer TPL can transmit incident light. The light-transmitting layer TPL can also transmit blue light emitted from the light-emitting element LE disposed in the third emission region EA3. The light-transmitting layer TPL may include a third matrix resin BRS3 and a scattering element SCP dispersed within the third matrix resin BRS3. Since the third matrix resin BRS3 is substantially the same as or similar to the first matrix resin BRS1 described above, its description will be omitted.

[0132] The light transmitted by the wavelength control unit 200 can achieve full color through further transmission to the color filter layer CFL, which will be described later.

[0133] The wavelength control unit 200 may also include a second capping layer CPL2. The second capping layer CPL2 covers the first wavelength conversion layer WCL1, the second wavelength conversion layer WCL2, the light-transmitting layer TPL, and the dam layer BNL disposed beneath the second capping layer CPL2 to protect them from moisture or foreign matter. The second capping layer CPL2 may include an inorganic material and may include a material substantially the same as or similar to the material of the first capping layer CPL1 described above.

[0134] Meanwhile, the low-refractive layer LRL and the third capping layer CPL3 can be disposed on the second capping layer CPL2.

[0135] The low-refractive-index layer (LRL) can be disposed throughout each of the emitting regions EA1, EA2, and EA3, and the non-emitting region NEA. The LRL can have a low refractive index. For example, the LRL can have a refractive index of about 1.1 or greater, or about 1.4 or less.

[0136] The low-refractive-index layer (LRL) can reflect some of the light emitted in the direction from bottom to top (third direction) back to the lower substrate 110. That is, the LRL can improve light output efficiency by recovering at least some of the light emitted in the upward direction, and as a result, improve the light efficiency of the display device 10. The LRL may include an organic material and may include particles dispersed in the organic material. For example, the particles may include hollow silica particles.

[0137] The third capping layer CPL3 can be applied to the low-refractive layer LRL. The third capping layer CPL3 can prevent impurities such as moisture or air from penetrating from the outside and damaging or contaminating the low-refractive layer LRL.

[0138] The color filter layer CFL can be disposed on the third capping layer CPL3. The color filter layer CFL may include a first color filter CF1, a second color filter CF2, and a third color filter CF3.

[0139] The first color filter CF1, the second color filter CF2, and the third color filter CF3 can be disposed on the third capping layer CPL3. The first color filter CF1 is disposed in the first emission region EA1, the second color filter CF2 is disposed in the second emission region EA2, and the third color filter CF3 is disposed in the third emission region EA3.

[0140] The first color filter CF1, the second color filter CF2, and the third color filter CF3 may include colorants such as dyes or pigments that absorb wavelengths other than their corresponding color wavelengths. The first color filter CF1 selectively transmits red light and blocks or absorbs blue and green light. The second color filter CF2 selectively transmits green light and blocks or absorbs blue and red light. The third color filter CF3 selectively transmits blue light and blocks or absorbs red and green light. For example, the first color filter CF1 may be a red filter, the second color filter CF2 may be a green filter, and the third color filter CF3 may be a blue filter.

[0141] In one embodiment, the light incident on the first color filter CF1 can be red light converted by the first wavelength conversion layer WCL1, and the light incident on the second color filter CF2 can be green light converted by the second wavelength conversion layer WCL2. The light incident on the third color filter CF3 can be blue light transmitted through the light-transmitting layer TPL. As a result, the red light transmitted through the first color filter CF1, the green light transmitted through the second color filter CF2, and the blue light transmitted through the third color filter CF3 can be emitted onto the upper part of the substrate 110 to achieve full color.

[0142] The first color filter CF1, the second color filter CF2, and the third color filter CF3 can absorb some of the light introduced from the outside of the display device 10 to reduce reflected light caused by external light. Therefore, the first color filter CF1, the second color filter CF2, and the third color filter CF3 can prevent color distortion caused by external light reflection.

[0143] Furthermore, a first color filter CF1 is provided in the non-emission region NEA, and at least one of a second color filter CF2 and a third color filter CF3 can be provided overlapping each other. That is, a first color filter CF1, a second color filter CF2, and a third color filter CF3 can be provided in the non-emission region NEA.

[0144] Therefore, light emission from the display device can be blocked in the non-emissive region NEA, and reflection of external light can be suppressed. Each color filter CF1, CF2, and CF3 blocks the emission of light of colors other than the corresponding colors of each emitting region EA1, EA2, and EA3, and thus, red, green, and blue light can be completely blocked in the non-emissive region NEA. However, this disclosure is not limited to this, and light-absorbing components including light-absorbing materials that absorb visible light bands can be disposed in the non-emissive region NEA.

[0145] The outer coating OC can be applied to the color filter layer CFL. The outer coating OC can be applied directly to the color filter layer CFL. The outer coating OC can be entirely applied within the display area DPA and can have a flat surface. The outer coating OC can flatten the steps formed by the underlying color filter layer CFL. The outer coating OC may include a light-transmitting organic material.

[0146] Figure 8 is a view showing a light-emitting element according to one embodiment. Figure 9 is a perspective view showing the contact area of ​​the second semiconductor layer and the contact electrode of the light-emitting element according to one embodiment. Figure 10 is an enlarged view of a portion of the light-emitting element of a display device according to one embodiment.

[0147] Referring to Figures 8 to 10, the light-emitting element LE is a granular element and may have a rod shape or a cylindrical shape with a predetermined aspect ratio. The light-emitting element LE may have nanometer-scale (1 nm or larger and less than 1 μm) or micrometer-scale (1 μm or larger and less than 1 mm) dimensions. In one embodiment, both the diameter and length of the light-emitting element LE may be nanometer-scale, or both may be micrometer-scale. In some other embodiments, the diameter of the light-emitting element LE may be nanometer-scale, while the length of the light-emitting element LE may be micrometer-scale. In some embodiments, some of the light-emitting elements LE may have nanometer-scale diameters and / or lengths, while other light-emitting elements LE may have micrometer-scale diameters and / or lengths.

[0148] In one embodiment, the light-emitting element LE can be an inorganic light-emitting diode. Specifically, the light-emitting element LE can include a semiconductor layer doped with any conductive (e.g., p-type or n-type) impurities. The semiconductor layer can receive electrical signals applied from an external power source and emit them as light within a specific wavelength range.

[0149] According to one embodiment, a light-emitting element (LE) may include a first semiconductor layer (SEM1), a second semiconductor layer (SEM2), a light-emitting layer (MQW), a third semiconductor layer (SEM3), an element electrode layer (ELT), and a connection electrode (BON) sequentially stacked in the longitudinal direction. Furthermore, the light-emitting element (LE) may also include a first insulating layer (INS1) surrounding the outer surfaces of the first semiconductor layer (SEM1) and the second semiconductor layer (SEM2), a contact electrode (CTE) surrounding the outer surfaces of the first insulating layer (INS1) and the second semiconductor layer (SEM2), and a second insulating layer (INS2) surrounding the outer surfaces of the contact electrode (CTE), the second semiconductor layer (SEM2), the light-emitting layer (MQW), the third semiconductor layer (SEM3), the element electrode layer (ELT), and the connection electrode (BON).

[0150] The first semiconductor layer SEM1 can be an undoped semiconductor, and may include undoped n-type or p-type materials. The first semiconductor layer SEM1 may have Al... x Ga y In 1-x-y A semiconductor material with the chemical formula N (0≤x≤1, 0≤y≤1, 0≤x+y≤1). For example, the first semiconductor layer SEM1 can be at least one of undoped AlGaInN, GaN, AlGaN, InGaN, AlN, and InN, but is not limited thereto. The length of the first semiconductor layer SEM1 can be in the range of 0.1μm to 3μm, but is not limited thereto.

[0151] The second semiconductor layer SEM2 can be an n-type semiconductor. When the light-emitting element LE emits light in the blue wavelength range, the second semiconductor layer SEM2 can include a semiconductor with the chemical formula Al. x Ga y In 1-x-y A semiconductor material of type N (0≤x≤1, 0≤y≤1, 0≤x+y≤1). For example, the second semiconductor layer SEM2 can be one or more of n-type doped AlGaInN, GaN, AlGaN, InGaN, AlN, and InN. The second semiconductor layer SEM2 can be doped with an n-type dopant, and the n-type dopant can be Si, Ge, Sn, or Se, etc. For example, the second semiconductor layer SEM2 can be n-GaN doped with n-type Si. The length of the second semiconductor layer SEM2 can be in the range of 1.5μm to 5μm, but is not limited to this.

[0152] The MQW (Multi-Level Light-Emitting) layer can be disposed on the second semiconductor layer SEM2. The MQW can emit light by recombination of electron-hole pairs according to an electrical signal applied through the second semiconductor layer SEM2. The MQW can emit light in the blue band with a center wavelength range of 450 nm to 495 nm.

[0153] The emitting layer MQW can comprise a single quantum well structure or a multiple quantum well structure. If the emitting layer MQW comprises a material with a multiple quantum well structure, then the emitting layer MQW can be a stacked structure with multiple well layers and barrier layers alternating with each other. In this case, the well layers can be formed of InGaN, and the barrier layers can be formed of GaN or AlGaN, but are not limited thereto. The thickness of the well layers can be approximately 1 nm to approximately 4 nm, and the thickness of the barrier layers can be approximately 3 nm to approximately 10 nm.

[0154] Alternatively, the MQW (Multi-Level Wavelight) emitting layer can have a structure in which semiconductor materials with large band gaps and semiconductor materials with small band gaps are stacked alternately, and other group 3 to group 5 semiconductor materials may be included depending on the wavelength of the emitted light. The light emitted from the MQW is not limited to blue light, and may, depending on the situation, emit light in the green or red wavelength band. In one embodiment, when indium is included among the semiconductor materials in the MQW, the color of the emitted light can vary depending on the amount of indium.

[0155] The third semiconductor layer, SEM3, can be disposed on the MQW light-emitting layer. The third semiconductor layer, SEM3, can be a p-type semiconductor and can include materials with the chemical formula Al. x Ga y In 1-x-y The semiconductor material is N (0≤x≤1, 0≤y≤1, 0≤x+y≤1). For example, the third semiconductor layer SEM3 can be at least one of p-type doped AlGaInN, GaN, AlGaN, InGaN, AlN, and InN. The third semiconductor layer SEM3 can be doped with a p-type dopant, and the p-type dopant can be Mg, Zn, Ca, or Ba, etc. For example, the third semiconductor layer SEM3 can be p-GaN doped with p-type Mg. The length of the third semiconductor layer SEM3 can be in the range of 30nm to 200nm, but is not limited to this.

[0156] The element electrode layer (ELT) can be disposed on the third semiconductor layer (SEM3). The element electrode layer (ELT) can be an ohmic connection electrode. However, this disclosure is not limited thereto, and it can also be a Schottky connection electrode. The light-emitting element (LE) can include at least one element electrode layer (ELT). Although a light-emitting element (LE) including one element electrode layer (ELT) is shown in FIG8, this disclosure is not limited thereto, and it can include multiple element electrode layers (ELT).

[0157] The element electrode layer (ELT) may include a conductive metal. For example, the element electrode layer (ELT) may include at least one of aluminum (Al), titanium (Ti), indium (In), gold (Au), silver (Ag), indium tin oxide (ITO), indium zinc oxide (IZO), and indium tin zinc oxide (ITZO). In addition, the element electrode layer (ELT) may include n-type or p-type doped semiconductor materials.

[0158] The connecting electrode BON can be used to transmit the light emission signal from the first pixel electrode PE1 to the light-emitting element LE. The connecting electrode BON can be disposed on the top of the light-emitting element LE. The connecting electrode BON can include at least one of gold (Au), copper (Cu), tin (Sn), silver (Ag), aluminum (Al), and titanium (Ti). For example, the connecting electrode BON can include a 9:1 alloy, an 8:2 alloy, or a 7:3 alloy of gold and tin, or it can include an alloy of copper, silver, and tin (SAC305).

[0159] The first insulating layer INS1 can be configured to surround the outer surface of the first semiconductor layer SEM1 and the outer surface of the second semiconductor layer SEM2 described above. Here, the outer surface can be an outer circumferential surface, an outer surface, or a side surface. For example, the first insulating layer INS1 can be configured to at least surround the outer surface of the first semiconductor layer SEM1 and extend in one direction in which the light-emitting element LE extends. The first insulating layer INS1 can surround the first semiconductor layer SEM1 to prevent contact with the contact electrode CTE. The first insulating layer INS1 can be formed around the side surface of the components described above (e.g., the first semiconductor layer SEM1 and the second semiconductor layer SEM2), and can be configured to surround a portion of the bottom of the second semiconductor layer SEM2. The first insulating layer INS1 can be configured to surround a portion of the side surface of the second semiconductor layer SEM2 such that the contact electrode CTE contacts the outer surface of the second semiconductor layer SEM2.

[0160] The first insulating layer INS1 may include an insulating material, such as an oxide, fluoride, nitride, or organic hybrid material. For example, the first insulating layer INS1 may include at least one of the following: oxides such as Al2O3, HfO2, SiO2, TiO2, SrTiO3, Ta2O5, Gd2O3, ZrO2, Ga2O3, V2O5, Co3O4, ZnO, ZnO:Al, ZnO:B, In2O3:H, WO3, MoO3, Nb2O5, NiO, MgO, or RuO2; fluorides such as MgF2 or AlF3; nitrides such as TiN, TaN, Si3N4, AlN, GaN, WN, HfN, NbN, GdN, VN, or ZrN; and organic hybrid materials such as aluminum oxanes.

[0161] The thickness of the first insulating layer INS1 can be in the range of 0.5 nm to 1.0 μm, but is not limited thereto. Preferably, the thickness of the first insulating layer INS1 can be in the range of 10 nm to 30 nm.

[0162] The contact electrode CTE can be arranged to surround the outer surface of the first insulating layer INS1 and the outer surface of the second semiconductor layer SEM2. For example, the contact electrode CTE can be configured to at least surround the outer surface of the first insulating layer INS1 and contact a portion of the outer surface of the second semiconductor layer SEM2. The contact electrode CTE can extend from the bottom of the light-emitting element LE in one direction extending from the light-emitting element LE. The contact electrode CTE can be spaced apart from the first semiconductor layer SEM1 by the first insulating layer INS1 and may not be in contact with the first semiconductor layer SEM1. The contact electrode CTE can be configured to contact the second semiconductor layer SEM2 and can be used to transfer a low potential voltage applied from the common electrode CE to the light-emitting element LE.

[0163] The contact electrode CTE may include a conductive metal. For example, the contact electrode CTE may include at least one of aluminum (Al), titanium (Ti), indium (In), gold (Au), silver (Ag), indium tin oxide (ITO), indium zinc oxide (IZO), and indium tin zinc oxide (ITZO).

[0164] Furthermore, the contact electrode CTE can contact a portion of the bottom of the light-emitting element LE. The light-emitting element LE can have a contact region CAR in which the contact electrode CTE and the second semiconductor layer SEM2 contact each other. The contact region CAR can be disposed in a portion of the second semiconductor layer SEM2. For example, the contact region CAR can be disposed in an area ranging from 1% to 50% of the length of the second semiconductor layer SEM2 from the interface between the first semiconductor layer SEM1 and the second semiconductor layer SEM2. However, this disclosure is not limited to this, and the contact region CAR can be disposed in an area ranging from 1% to 90% of the length of the second semiconductor layer SEM2 from the interface between the first semiconductor layer SEM1 and the second semiconductor layer SEM2. Furthermore, the contact region CAR can be disposed in the entire area of ​​the second semiconductor layer SEM2.

[0165] The area of ​​the contact region CAR can be adjusted by taking into account the contact resistance between the contact electrode CTE and the second semiconductor layer SEM2. For example, the area of ​​the contact region CAR can be in the range of 10% to 50% of the total area of ​​the outer surface of the second semiconductor layer SEM2. However, this disclosure is not limited to this, and the area of ​​the contact region CAR can be in the range of 1% to 90% of the total area of ​​the outer surface of the second semiconductor layer SEM2. Furthermore, the area of ​​the contact region CAR can be equal to the total area of ​​the outer surface of the second semiconductor layer SEM2.

[0166] The second insulating layer INS2 can be configured to cover the outer surfaces of the second semiconductor layer SEM2, the light-emitting layer MQW, the third semiconductor layer SEM3, the element electrode layer ELT, the connecting electrode BON, and the contact electrode CTE. For example, the second insulating layer INS2 can be configured to at least surround the outer surface of the light-emitting layer MQW and extend in one direction extending from the light-emitting element LE. The second insulating layer INS2 can be used to insulate and protect the second semiconductor layer SEM2, the light-emitting layer MQW, the third semiconductor layer SEM3, the element electrode layer ELT, the connecting electrode BON, and the contact electrode CTE. The second insulating layer INS2 can be formed around the side surfaces of each component, but can be formed to expose both ends of the light-emitting element LE in the longitudinal direction. For example, the second insulating layer INS2 can expose a portion of the connecting electrode BON disposed at the upper end of the light-emitting element LE, and expose a portion of the first semiconductor layer SEM1, the first insulating layer INS1, and the contact electrode CTE disposed at the lower end of the light-emitting element LE. A portion of the side surface of the second insulating layer INS2 can be aligned with a portion of the side surface of the contact electrode CTE and a portion of the side surface of the first insulating layer INS1. In some embodiments, a portion of the side surface of the second insulating layer INS2 may coincide with a portion of the side surface of the contact electrode CTE and a portion of the side surface of the first insulating layer INS1. However, this disclosure is not limited thereto, and a portion of the side surface of the second insulating layer INS2 may not coincide with a portion of the side surface of the contact electrode CTE and a portion of the side surface of the first insulating layer INS1. The second insulating layer INS2 may not be in contact with the first insulating layer INS1.

[0167] The second insulating layer INS2 may include an insulating material, such as an oxide, fluoride, nitride, or organic hybrid material. For example, the second insulating layer INS2 may include at least one of the following: oxides such as Al2O3, HfO2, SiO2, TiO2, SrTiO3, Ta2O5, Gd2O3, ZrO2, Ga2O3, V2O5, Co3O4, ZnO, ZnO:Al, ZnO:B, In2O3:H, WO3, MoO3, Nb2O5, NiO, MgO, or RuO2; fluorides such as MgF2 or AlF3; nitrides such as TiN, TaN, Si3N4, AlN, GaN, WN, HfN, NbN, GdN, VN, or ZrN; and organic hybrid materials such as aluminum oxanes.

[0168] The thickness of the second insulating layer INS2 can be in the range of 0.5 nm to 1.0 μm, but is not limited thereto. Preferably, the thickness of the second insulating layer INS2 can be in the range of 10 nm to 30 nm.

[0169] In one embodiment, the second insulating layer INS2 may be formed of a single layer or multiple layers of a material with insulating properties. One or more insulating layers can prevent oxygen diffusion constituting the second insulating layer INS2 and the degradation of the second semiconductor layer SEM2, the light-emitting layer MQW, and the third semiconductor layer SEM3 of the light-emitting element LE. The second insulating layer INS2 can prevent electrical short circuits that may occur when the light-emitting layer MQW is in direct contact with the electrodes through which electrical signals are transmitted to the light-emitting element LE. Furthermore, since the second insulating layer INS2 protects the outer surface of the light-emitting element LE, including the light-emitting layer MQW, a reduction in luminous efficiency can be prevented.

[0170] As shown in Figure 10, the light-emitting element LE described above can be assembled and disposed on the first pixel electrode PE1. Specifically, the connection electrode BON of the light-emitting element LE can be in direct contact with the first pixel electrode PE1 to transmit the light-emitting signal from the first pixel electrode PE1. An organic layer 140 surrounding the light-emitting element LE can be disposed around the light-emitting element LE, exposing the first semiconductor layer SEM1, the first insulating layer INS1, and the contact electrode CTE, which are one end of the light-emitting element LE. In Figure 10, the upper part of the first insulating layer INS1 of the light-emitting element LE in Figure 8 is shown as partially removed. This structural difference is eliminated in subsequent processes after the fabrication of the light-emitting element LE, and will be described in detail in the fabrication method described later.

[0171] A common electrode CE can be disposed on the light-emitting element LE and the organic layer 140. The common electrode CE can cover the light-emitting element LE and the organic layer 140. The common electrode CE can be in direct contact with the top surface of the first semiconductor layer SEM1, the top surface of the first insulating layer INS1, and the top surface of the contact electrode CTE. When the common electrode CE is in contact with the contact electrode CTE, the low potential voltage of the common electrode CE can be transferred to the light-emitting element LE. For example, the low potential voltage transferred from the common electrode CE can be transferred through the contact electrode CTE to the second semiconductor layer SEM2, which is in contact with the contact electrode CTE.

[0172] As will be described later, a first semiconductor layer SEM1 is generally formed to reduce the difference in lattice constant between the sapphire substrate and the second semiconductor layer SEM2 during the fabrication process of the light-emitting element LE. However, since the first semiconductor layer SEM1 is undoped and has extremely high resistance, an etching process for the first semiconductor layer SEM1 must be performed after the light-emitting element LE is assembled onto the pixel electrodes of the display substrate. The process of etching the first semiconductor layer SEM1 on the display substrate becomes very difficult to precisely etch the first semiconductor layer SEM1 when etching layers other than the first semiconductor layer SEM1 or when the light-emitting element LE is tilted.

[0173] In the light-emitting element LE according to the embodiment described above, the contact electrode CTE can contact the outer surface (or side surface) of the second semiconductor layer SEM2, and a low potential voltage can be applied from the common electrode CE. Therefore, since the light-emitting element LE can be driven normally even with the first semiconductor layer SEM1, there is an advantage that the etching process of the first semiconductor layer SEM1 can be omitted.

[0174] Figure 11 is a diagram illustrating a light-emitting element according to another embodiment.

[0175] Referring to FIG11, this embodiment differs from the embodiments of FIG6 to FIG10 in that the first insulating layer INS1 is disposed only on the outer surface of the first semiconductor layer SEM1. In the following text, descriptions of identical components will be simplified or omitted, and the differences will be described in detail.

[0176] The first insulating layer INS1 can be configured to surround the outer surface of the first semiconductor layer SEM1 of the light-emitting element LE. The first insulating layer INS can be formed around the side of the first semiconductor layer SEM1, but may not surround the outer surfaces of the second semiconductor layer SEM2, the light-emitting layer MQW, the third semiconductor layer SEM3, and the element electrode layer ELT of the light-emitting element LE. The top surface of the first insulating layer INS1 can be aligned with the top surface of the first semiconductor layer SEM1. In some embodiments, the top surface of the first insulating layer INS1 may coincide with the top surface of the first semiconductor layer SEM1. However, this disclosure is not limited thereto, and the top surface of the first insulating layer INS1 may not coincide with the top surface of the first semiconductor layer SEM1. The first insulating layer INS1 may not be in contact with the second semiconductor layer SEM2. The first insulating layer INS1 can be used to insulate between the first semiconductor layer SEM1 and the contact electrode CTE. For example, the first insulating layer INS1 prevents the contact electrode CTE from contacting the first semiconductor layer SEM1.

[0177] The contact electrode CTE can extend from the interface between the first semiconductor layer SEM1 and the second semiconductor layer SEM2 in the longitudinal direction of the second semiconductor layer SEM2 and contact the second semiconductor layer SEM2. Since the first insulating layer INS1 only surrounds the outer surface of the first semiconductor layer SEM1, the contact area of ​​the contact electrode CTE in contact with the second semiconductor layer SEM2 can be increased. Therefore, the contact area between the second semiconductor layer SEM2 and the contact electrode CTE can be increased, thereby improving the efficiency of the light-emitting element LE.

[0178] Figure 12 is a diagram showing a light-emitting element according to yet another embodiment. Figure 13 is an enlarged view of the light-emitting element area of ​​a display device according to yet another embodiment.

[0179] Referring to Figures 12 and 13, the light-emitting element LE according to this embodiment differs from the embodiments of Figures 6 to 10 described above in that the second insulating layer INS2 does not surround the outer surface of the contact electrode CTE and also includes a second organic layer 144.

[0180] Specifically, the second insulating layer INS2 can be configured to surround the outer surface of the second semiconductor layer SEM2, the outer surface of the light-emitting layer MQW, the outer surface of the third semiconductor layer SEM3, the outer surface of the element electrode layer ELT, and the outer surface of the connecting electrode BON of the light-emitting element LE. The second insulating layer INS2 can be formed as part of the outer surface of the second semiconductor layer SEM2, but may not surround the outer surface of the contact electrode CTE of the light-emitting element LE. The lower surface of the second insulating layer INS2 may contact the top surface of the contact electrode CTE. The side surface of the second insulating layer INS2 may be aligned with the side surface of the contact electrode CTE. In some embodiments, the side surface of the second insulating layer INS2 may coincide with the side surface of the contact electrode CTE. However, this disclosure is not limited thereto, and the side surface of the second insulating layer INS2 may not coincide with the side surface of the contact electrode CTE. The second insulating layer INS2 can be used to protect the light-emitting element LE, but in areas where the second insulating layer INS2 is not provided, the contact electrode CTE and the first insulating layer INS1 may be provided to protect the light-emitting element LE.

[0181] The light-emitting element LE described above can be incorporated onto a first pixel electrode PE1. A first organic layer 140 disposed on the first pixel electrode PE1 can surround the light-emitting element LE and expose a portion of the light-emitting element LE. Specifically, the first organic layer 140 can cover the connection electrode BON and the second insulating layer INS2 of the light-emitting element LE. The contact electrode CTE, the first insulating layer INS1, and the first semiconductor layer SEM1 of the light-emitting element LE can be exposed without being covered by the first organic layer 140. The top surface of the first organic layer 140 can be aligned with the top surface of the second insulating layer INS2 of the light-emitting element LE. For example, the top surfaces of the first organic layer 140 and the second insulating layer INS2 can be disposed on the same line. In some embodiments, the top surface of the first organic layer 140 can coincide with the top surface of the second insulating layer INS2 of the light-emitting element LE. However, the invention is not limited thereto, and the top surface of the first organic layer 140 may not coincide with the top surface of the second insulating layer INS2 of the light-emitting element LE.

[0182] A common electrode CE can be disposed on the light-emitting element LE and the first organic layer 140. The common electrode CE can cover the light-emitting element LE, and further cover the first semiconductor layer SEM1, the first insulating layer INS1, and the contact electrode CTE of the light-emitting element LE, and directly contact the first semiconductor layer SEM1, the first insulating layer INS1, and the contact electrode CTE of the light-emitting element LE. Specifically, the common electrode CE can cover and contact the entire outer surface of the contact electrode CTE, thereby improving the efficiency of the light-emitting element LE by reducing the contact resistance between the common electrode CE and the contact electrode CTE.

[0183] A second organic layer 144 may be disposed on the first organic layer 140. The second organic layer 144 may be in contact with the top surface of the common electrode CE and formed to be aligned with the top surface of the light-emitting element LE. In some embodiments, the top surface of the second organic layer 144 may coincide with the top surface of the light-emitting element LE. However, this disclosure is not limited thereto, and the top surface of the second organic layer 144 may not coincide with the top surface of the light-emitting element LE. The second organic layer 144 may be used to flatten the lower step of the common electrode CE.

[0184] Figure 14 is an enlarged view of the light-emitting element area of ​​a display device according to yet another embodiment.

[0185] Referring to FIG14, the display device 10 of this embodiment differs from the embodiments of FIG6 to FIG10 described above in that the third insulating layer INS3 is further disposed between the common electrode CE and the light-emitting element LE.

[0186] The third insulating layer INS3 can be disposed on the light-emitting element LE. The third insulating layer INS3 can be disposed on the first semiconductor layer SEM1 and the first insulating layer INS1 of the light-emitting element LE. The third insulating layer INS3 can be configured to be spaced apart from the contact electrode CTE so as to cover the first semiconductor layer SEM1 and the first insulating layer INS1 but not the contact electrode CTE.

[0187] A third insulating layer INS3 can be disposed between the common electrode CE and the first semiconductor layer SEM1, and can perform the function of preventing the common electrode CE and the first semiconductor layer SEM1 from contacting each other. As described above, since the first semiconductor layer SEM1 is undoped and has very high resistance, the resistance between the common electrode CE and the light-emitting element LE increases, thereby reducing efficiency. Therefore, since the third insulating layer INS3 is disposed between the common electrode CE and the first semiconductor layer SEM1, the common electrode CE does not contact the first semiconductor layer SEM1, so the low potential voltage of the common electrode CE can be transmitted only to the contact electrode CTE.

[0188] A common electrode CE can be disposed on the light-emitting element LE, the third insulating layer INS3, and the organic layer 140. The common electrode CE can contact the contact electrode CTE exposed around the third insulating layer INS3. Therefore, by transferring a low potential voltage applied from the common electrode CE to the contact electrode CTE, the efficiency of the light-emitting element LE can be improved.

[0189] Figure 15 is an enlarged view of the light-emitting element area of ​​a display device according to yet another embodiment.

[0190] Referring to FIG15, the display device 10 of this embodiment differs from the embodiments of FIG6 to FIG10 described above in that the first insulating layer INS1 covers the top surface of the contact electrode CTE.

[0191] The light-emitting element LE can have the same structure as the light-emitting element LE in FIG8 described above. Specifically, a first insulating layer INS1 can be disposed on the top of the light-emitting element LE. The top surface of the first insulating layer INS1 can be aligned with the top surface of the first semiconductor layer SEM1. In some embodiments, the top surface of the first insulating layer INS1 can coincide with the top surface of the first semiconductor layer SEM1. However, this disclosure is not limited thereto, and the top surface of the first insulating layer INS1 may not coincide with the top surface of the first semiconductor layer SEM1.

[0192] The organic layer 140 may be configured to surround the light-emitting element LE, and may be configured not to cover the side surfaces of the first insulating layer INS1, the contact electrode CTE, and the second insulating layer INS2, such that the side surfaces of the first insulating layer INS1, the contact electrode CTE, and the second insulating layer INS2 are exposed. For example, the height of the organic layer 140 may be lower than the height of the side surface of the contact electrode CTE exposed on the side surface of the light-emitting element LE. However, this disclosure is not limited thereto, and the height of the organic layer 140 may be formed to be the same as the height of the second insulating layer INS2.

[0193] The common electrode CE covers the light-emitting element LE and can directly contact the contact electrode CTE exposed on the side of the light-emitting element LE. That is, since the organic layer 140 does not cover the side surface of the contact electrode CTE, the common electrode CE can directly contact the side surface of the contact electrode CTE. Therefore, a low potential voltage can be transferred from the common electrode CE to the light-emitting element LE through the contact electrode CTE.

[0194] Figure 16 is an enlarged view of the light-emitting element area of ​​a display device according to yet another embodiment.

[0195] Referring to FIG16, the difference between the display device 10 of this embodiment and the embodiment of FIG15 described above is that the third insulating layer INS3 is disposed on the first semiconductor layer SEM1 of the light-emitting element LE.

[0196] The third insulating layer INS3 can be disposed on the light-emitting element LE. The third insulating layer INS3 can be disposed on the first semiconductor layer SEM1 and configured to be spaced apart from the first insulating layer INS1. The third insulating layer INS3 can be directly disposed on the top surface of the first semiconductor layer SEM1.

[0197] As described above, the third insulating layer INS3 is disposed between the common electrode CE and the first semiconductor layer SEM1 to prevent the common electrode CE and the first semiconductor layer SEM1 from contacting each other. Therefore, the third insulating layer INS3 is disposed between the common electrode CE and the first semiconductor layer SEM1 so that the low potential voltage of the common electrode CE can be transmitted only to the contact electrode CTE.

[0198] A common electrode CE can be disposed on the light-emitting element LE, the third insulating layer INS3, and the organic layer 140. The common electrode CE can contact the contact electrode CTE exposed on the side of the light-emitting element LE. Therefore, by transferring a low potential voltage applied from the common electrode CE to the contact electrode CTE, the efficiency of the light-emitting element LE can be improved.

[0199] Figures 17 to 19 are enlarged views of the light-emitting element area of ​​a display device according to yet another embodiment.

[0200] Referring to Figures 17 to 19, the display device 10 of this embodiment differs from the embodiments of Figures 8 to 10 described above in that it also includes a reflective layer RFL.

[0201] The reflective layer RFL can be configured to surround the outer surface of the second insulating layer INS2. For example, the reflective layer RFL can be arranged to surround the outer surface of the second insulating layer INS2 and can extend in one direction along which the light-emitting element LE extends. The reflective layer RFL can perform the function of reflecting light emitted from the light-emitting layer MQW and directing the light towards the direction of the first semiconductor layer SEM1. The reflective layer RFL can be configured to correspond to the outer surface of the second semiconductor layer SEM2, the outer surface of the light-emitting layer MQW, the outer surface of the third semiconductor layer SEM3, and the outer surface of the element electrode layer ELT. When the contact electrode CTE is formed of a reflective material, since the contact electrode CTE acts as a reflective layer, the reflective layer RFL may not be provided in the region corresponding to the outer surface of the contact electrode CTE.

[0202] As another example, as shown in Figure 18, the reflective layer RFL can be disposed on the outer surface of the second insulating layer INS2 corresponding to the outer surface of the contact electrode CTE. The reflective layer RFL can be disposed on the entire outer surface of the second insulating layer INS2.

[0203] The reflective layer RFL can be a distributed Bragg reflector (DBR). The reflective layer RFL can include multiple layers to act as a distributed Bragg reflector. The multiple layers can be arranged alternately with high refractive index layers and low refractive index layers.

[0204] The reflective layer RFL may include insulating materials, such as oxides, fluorides, nitrides, or organic hybrid materials. For example, the reflective layer RFL may include at least one of oxides such as Al₂O₃, HfO₂, SiO₂, TiO₂, SrTiO₃, Ta₂O₅, Gd₂O₃, ZrO₂, Ga₂O₃, V₂O₅, Co₃O₄, ZnO, ZnO:Al, ZnO:B, In₂O₃:H, WO₃, MoO₃, Nb₂O₅, NiO, MgO, or RuO₂; fluorides such as MgF₂ or AlF₃; nitrides such as TiN, TaN, Si₃N₄, AlN, GaN, WN, HfN, NbN, GdN, VN, or ZrN; and organic hybrid materials such as aluminoxanes. The thickness of the reflective layer RFL may range from 0.5 nm to 1.0 μm, but is not limited thereto.

[0205] In this embodiment, by including a reflective layer RFL surrounding the outer surface of the light-emitting element LE, the luminous efficiency of light emitted from the light-emitting layer MQW of the light-emitting element LE can be improved.

[0206] In the following description, the manufacturing process of a display device 10 according to one embodiment will be described with reference to other accompanying drawings.

[0207] Figure 20 is a flowchart illustrating a method for manufacturing a display device according to one embodiment. Figures 21 to 40 are diagrams illustrating a method for manufacturing a display device according to one embodiment.

[0208] Figures 21 to 40 are cross-sectional views showing the structure corresponding to the order in which the various layers of the display device 10 are formed. Figures 21 to 40 mainly show the manufacturing process of the light-emitting element portion (LEP) of the display device 10, and it can be generally compared with the cross-sectional view of Figure 6. Furthermore, the first emitting region EA1 of the display device 10 will be described below as an example. In the following, the method of manufacturing the display device shown in Figures 21 to 40 will be described in conjunction with Figure 20.

[0209] Referring to FIG20, a method for manufacturing a display device 10 according to one embodiment may include: forming a plurality of light-emitting elements on a substrate (step S100); forming a substrate including pixel electrodes (step S110); bonding the plurality of light-emitting elements to the pixel electrodes (step S120); and forming an organic layer and a common electrode on the light-emitting elements (step S130).

[0210] First, referring to Figure 21, multiple element rods LEL are formed on the substrate BSUB.

[0211] Specifically, a BSUB substrate is prepared. The BSUB substrate can be a sapphire (Al2O3) substrate or a silicon wafer containing silicon. However, this disclosure is not limited thereto, and in one embodiment, the case where the BSUB substrate is a sapphire substrate will be described as an example.

[0212] Multiple semiconductor material layers SEM1L, SEM2L, MQML, and SEM3L are formed on a substrate BSUB. These multiple semiconductor material layers can be formed by growing seed crystals prepared via epitaxial methods. Here, one of electron beam deposition, physical vapor deposition (PVD), chemical vapor deposition (CVD), plasma laser deposition (PLD), dual-mode thermal evaporation, sputtering, and metal-organic chemical vapor deposition (MOCVD) can be used to form the semiconductor material layers (preferably MOCVD). However, this disclosure is not limited thereto.

[0213] Typically, precursor materials for forming multiple semiconductor material layers can be selected from a generally selectable range to form the target material without any limitations. For example, precursor materials can be metal precursors including alkyl groups (such as methyl or ethyl). Examples of precursor materials may include, but are not limited to, trimethylgallium Ga(CH3)3, trimethylaluminum Al(CH3)3, and triethyl phosphate (C2H5)3PO4.

[0214] Specifically, a first semiconductor material layer SEM1L is formed on the substrate BSUB. Although a first semiconductor material layer SEM1L is shown in the figures, this disclosure is not limited thereto, and multiple layers can be formed. The first semiconductor material layer SEM1L can be configured to reduce the lattice constant difference between the second semiconductor material layer SEM2L and the substrate BSUB. As an example, the first semiconductor material layer SEM1L may include an undoped semiconductor, and may be an undoped n-type or p-type material. In embodiments, the first semiconductor material layer SEM1L may be, but is not limited to, at least one of undoped InAlGaN, GaN, AlGaN, InGaN, AlN, and InN.

[0215] Using the above method, a second semiconductor material layer SEM2L, a light-emitting material layer MQWL, and a third semiconductor material layer SEM3L are sequentially formed on the first semiconductor material layer SEM1L.

[0216] Next, the component electrode material layer ELTL is stacked on the third semiconductor material layer SEM3L.

[0217] Subsequently, a plurality of first mask patterns MP1 are formed on the component electrode material layer ELTL. The first mask patterns MP1 can be hard masks comprising inorganic materials or photoresist masks comprising organic materials. The first mask patterns MP1 prevent the plurality of underlying semiconductor material layers SEM1L, SEM2L, MQWL, and SEM3L, as well as the component electrode material layer ELTL, from being etched. Then, a first etching process is performed in which a portion of the plurality of semiconductor material layers SEM1L, SEM2L, MQWL, and SEM3L, as well as the component electrode material layer ELTL, is etched using the plurality of first mask patterns MP1 as masks.

[0218] As shown in Figure 22, on the substrate BSUB, multiple semiconductor material layers SEM1L, MQWL, SEM2L and SEM3L that do not overlap with the first mask pattern MP1, as well as the element electrode material layer ELTL, are etched and removed, and the unetched portion that overlaps with the first mask pattern MP1 can be formed as an element bar LEL.

[0219] Multiple semiconductor material layers can be etched using conventional methods. For example, processes for etching multiple semiconductor material layers can be performed using dry etching, wet etching, reactive ion etching (RIE), depth reactive ion etching (DRIE), and inductively coupled plasma reactive ion etching (ICP-RIE). In the case of dry etching methods, anisotropic etching can be performed, which is suitable for vertical etching. When using the etching methods described above, the etchant can be Cl2 or O2. However, this disclosure is not limited thereto.

[0220] Next, referring to Figures 23 and 24, a first insulating material layer INS1L is formed on the substrate BSUB. The first insulating material layer INS1L can be formed on the entire surface of the substrate BSUB to cover the element rod LEL. The first insulating material layer INS1L is formed entirely on the outer surface of the first semiconductor layer SEM1, the outer surface of the second semiconductor layer SEM2, the outer surface of the light-emitting layer MQW, the outer surface of the third semiconductor layer SEM3, and the outer surface of the element electrode layer ELT of the element rod LEL.

[0221] Then, a first photoresist PR1 is formed on the substrate BSUB. The first photoresist PR1 can be formed on the first insulating material layer INS1L according to a predetermined height of the component rod LEL. For example, the first photoresist PR1 can be formed to a height greater than or equal to the height of the first semiconductor layer SEM1, and can be formed to a height extending up to a portion of the second semiconductor layer SEM2.

[0222] Next, a second etching process is performed to partially remove the first insulating material layer INS1L. Specifically, the first insulating material layer INS1L exposed above the first photoresist PR1 can be removed by etching. In this process, the first insulating material layer INS1L can be removed, exposing a portion of the second semiconductor layer SEM2 of the element rod LEL, the light-emitting layer MQW, the first semiconductor layer SEM1, and the element electrode layer ELT. Therefore, the first insulating material layer INS1L can be formed as a portion of the outer surface of the first semiconductor layer SEM1 and the outer surface of the second semiconductor layer SEM2 surrounding the element rod LEL. After completing the etching process of the first insulating material layer INS1L, the first photoresist PR1 can be removed.

[0223] Next, referring to Figure 25, the contact electrode material layer CTEL is stacked on the substrate BSUB. The contact electrode material layer CTEL can be formed on the entire surface of the substrate BSUB to cover the element rod LEL. The contact electrode material layer CTEL is formed entirely on the outer surface of the second semiconductor layer SEM2, the outer surface of the light-emitting layer MQW, the outer surface of the first semiconductor layer SEM1, and the outer surface of the element electrode layer ELT of the element rod LEL. In addition, the contact electrode material layer CTEL is also formed on the outer and top surfaces of the first insulating material layer INS1L.

[0224] Next, referring to FIG26, a second photoresist PR2 is formed on the substrate BSUB. The second photoresist PR2 can be formed on the contact electrode material layer CTEL according to a predetermined height of the element rod LEL. For example, the second photoresist PR2 can be formed at least above the height of the first insulating material layer INS1L, and can be formed up to a portion of the height of the second semiconductor layer SEM2.

[0225] Next, referring to Figure 27 and referring to Figure 26, a third etching process is performed to partially remove the contact electrode material layer CTEL. Specifically, the contact electrode material layer CTEL exposed above the second photoresist PR2 can be removed by etching. In this process, the contact electrode material layer CTEL can be removed, exposing a portion of the second semiconductor layer SEM2, the light-emitting layer MQW, the first semiconductor layer SEM1, and the element electrode layer ELT of the element rod LEL. Therefore, the contact electrode material layer CTEL can be formed as a portion of the outer surface of the first insulating material layer INS1L and the outer surface of the second semiconductor layer SEM2 surrounding the element rod LEL. After completing the etching process of the contact electrode material layer CTEL, the second photoresist PR2 can be removed.

[0226] Next, referring to Figure 28, a portion of the second insulating material layer INS2L is etched to form an opening OPN. The opening OPN can expose the top of the component rod LEL. The component electrode layer ELT can be disposed at the top of the component rod LEL, and a portion of the top surface of the component electrode layer ELT can be exposed through the opening OPN of the second insulating material layer INS2L.

[0227] Then, referring to Figures 29 and 30, a third photoresist PR3 is formed on the substrate BSUB. The third photoresist PR3 can be patterned to cover each component bar LEL. The third photoresist PR3 can be formed to cover the second insulating material layer INS2L and the component bar LEL. The third photoresist PR3 can be patterned into an island pattern shape to cover each component bar LEL and spaced apart from each other.

[0228] Subsequently, a fourth etching process is performed to etch the first insulating material layer INS1L, the contact electrode material layer CTEL, and the second insulating material layer INS2L. The first insulating material layer INS1L, the contact electrode material layer CTEL, and the second insulating material layer INS2L exposed by the third photoresist PR3 can be etched and removed. Thus, a plurality of element rods LELs are formed, comprising a first semiconductor layer SEM1, a second semiconductor layer SEM2, a light-emitting layer MQW, a third semiconductor layer SEM3, an element electrode layer ELT, a first insulating layer INS1, a contact electrode CTE, and a second insulating layer INS2. The plurality of element rods LELs can be spaced apart from each other on a substrate BSUB.

[0229] Next, referring to Figure 31, a connection electrode BON is formed on the element rod LEL. The connection electrode BON can be formed by a patterning process after stacking connection electrode material layers. The connection electrode BON can be formed in the opening OPN of the second insulating layer INS2. The connection electrode BON can be directly disposed on the element electrode layer ELT of the element rod LEL, and can be formed to protrude above the second insulating layer INS2. As a result, a light-emitting element LE comprising the element rod LEL and the connection electrode BON is manufactured.

[0230] Next, referring to Figure 32, the support film SPF is attached to the multiple light-emitting elements LE fabricated on the substrate BSUB in Figure 31.

[0231] Specifically, a support film (SPF) is attached to multiple light-emitting elements (LEs). The SPF can be aligned with and attached to each connection electrode (BON) of the multiple LEs. A large number of LEs are arranged and can be attached without detaching from the SPF.

[0232] The support film (SPF) may include a support layer and an adhesive layer disposed on the support layer. The support layer may be made of a transparent and mechanically stable material to allow light to pass through. For example, the support layer may include transparent polymers such as polyester, polyacrylic acid, polyepoxy, polyethylene, polystyrene, polyethylene terephthalate, etc. The adhesive layer may include an adhesive material for bonding the individual light-emitting elements (LEs). For example, the adhesive material may include urethane acrylate, epoxy acrylate, polyester acrylate, etc. The adhesive material may be one whose adhesive strength changes upon application of ultraviolet (UV) light or heat, and therefore the adhesive layer can be easily separated from the light-emitting elements (LEs).

[0233] Subsequently, referring to Figure 33, the substrate BSUB and the light-emitting elements LE are separated by irradiating the substrate BSUB with a laser (first laser). The substrate BSUB is separated from the first semiconductor layer SEM1 and the first insulating layer INS1 of the multiple light-emitting elements LE.

[0234] The process of separating the substrate (BSUB) and the light-emitting element (LE) can be performed using laser lift-off (LLO). LLO uses a laser, and a KrF excimer laser (248 nm wavelength) can be used as the laser source. The energy density of the excimer laser is approximately 550 mJ / cm². 2 Approximately 950 mJ / cm 2 Within the range, and the incident area can be 50×50μm 2 Up to 1×1cm 2 Within this range, but not limited to it.

[0235] Next, referring to Figure 34, the transfer film LFL is attached to multiple light-emitting elements LE.

[0236] Specifically, the transfer film LFL is attached to the first semiconductor layer SEM1 and the first insulating layer INS1 of each of the plurality of light-emitting elements LE. The transfer film LFL can be aligned on the plurality of light-emitting elements LE and attached to the lower surface of the first semiconductor layer SEM1 and the first insulating layer INS1 of each of the plurality of light-emitting elements LE.

[0237] The transfer film LFL can include stretchable materials. For example, stretchable materials can include polyolefins, polyvinyl chloride (PVC), elastomeric silicone, elastomeric polyurethane, and elastomeric polyisoprene. Because the transfer film LFL, like the support film SPF, includes a support layer and an adhesive layer, it can adhere to and support multiple light-emitting elements (LEs).

[0238] Subsequently, referring to Figure 35, the support film SPF is separated from the multiple light-emitting elements LE. After reducing the adhesive strength of the adhesive layer of the support film SPF by applying ultraviolet light or heat, the support film SPF can be physically or naturally separated. The multiple light-emitting elements LE can be arranged in a dot shape on the transfer film LFL, spaced apart from each other by a predetermined first interval D1.

[0239] Next, referring to FIG. 36, the transfer film LFL is stretched (ORI). The transfer film LFL can be stretched two-dimensionally (in a first direction DR1 and a second direction DR2). As the transfer film LFL is stretched, the spacing between the plurality of light-emitting elements LEs bonded to the transfer film LFL can become a second spacing D2, which is larger than the first spacing D1 of FIG. 35. The tensile strength (or tensile strength) of the transfer film LFL can be adjusted according to the desired spacing between the light-emitting elements LEs, and can be, for example, about 120 gf / inch. However, this disclosure is not limited thereto. In this embodiment, a single stretching process is illustrated, but this disclosure is not limited thereto. Multiple stretching processes can be performed.

[0240] Next, referring to Figures 37 and 38, the transfer film LFL is bonded to the substrate 110, and a plurality of light-emitting elements LE are bonded to the first pixel electrode PE1.

[0241] Specifically, the transfer film LFL is aligned on the substrate 110. At this time, the connection electrode BON of the light-emitting element LE formed on the transfer film LFL is aligned to face the substrate 110. As shown in FIG6, the substrate 110 may be formed by a plurality of pixel electrodes PE1 and pixel defining layer PDL.

[0242] Subsequently, the substrate 110 and the transfer film LFL are bonded. Specifically, the connection electrode BON of the light-emitting element LE formed on the transfer film LFL is brought into contact with the first pixel electrode PE1 of the substrate 110. At this time, the connection electrode BON of the light-emitting element LE is in contact with the first pixel electrode PE1. Then, the substrate 110 and the transfer film LFL are bonded to each other by melting the connection electrode BON of the light-emitting element LE and the first pixel electrode PE1. At this time, a plurality of light-emitting elements LE are attached to the top surface of the first pixel electrode PE1.

[0243] Regarding fusion bonding, a laser can be applied from the top of the transfer film LFL to the first pixel electrode PE1. The laser-irradiated first pixel electrode PE1 can conduct the high heat from the laser to bond the interface between the connecting electrode BON of the light-emitting element LE and the first pixel electrode PE1. Specifically, the first pixel electrode PE1 can comprise copper (Cu) with excellent thermal conductivity and can have excellent adhesion properties to the connecting electrode BON of the light-emitting element LE. YAG can be used as the laser source for fusion bonding.

[0244] Subsequently, the transfer film LFL was separated from the multiple light-emitting elements LE.

[0245] Specifically, the transfer film LFL is separated from the first semiconductor layer SEM1 of the light-emitting element LE. The process for separating the transfer film LFL can be a laser lift-off (LLO) process. In a laser lift-off process using a laser, a KrF excimer laser (248 nm wavelength) can be used as the laser source. The energy density of the excimer laser is approximately 550 mJ / cm². 2 Up to 950mJ / cm 2 Within the range, and the incident area can be 50×50μm 2 Up to 1×1cm 2 The scope is limited to this, but this disclosure is not limited thereto. By irradiating the transfer film LFL with a laser, the transfer film LFL can be separated from the light-emitting element LE.

[0246] In another example, besides laser ablation, the process of separating the transfer film LFL can also be physically separated. Since the bonding strength between the transfer film LFL and the light-emitting element LE is less than the bonding strength between the connecting electrode BON of the light-emitting element LE and the first pixel electrode PE1, which are fused together, the transfer film LFL can be physically separated based on the difference in bonding strength.

[0247] Next, referring to FIG. 39, an organic layer 140 is formed on the substrate 110 on which the light-emitting element LE is formed. The organic layer 140 may be formed on the first pixel electrode PE1 and the pixel defining layer PDL. The organic layer 140 may be disposed on each emission region and spaced apart from each other between adjacent emission regions. The organic layer 140 may be formed by coating using a solution process such as spin coating or inkjet printing, and then patterning by an exposure process. The organic layer 140 may be formed to have a height equal to or less than the height of the first semiconductor layer SEM1 of the light-emitting element LE, but is not limited thereto.

[0248] Next, referring together to Figures 39 and 40, a fifth etching process is performed to etch a portion of the first insulating layer INS1 for each light-emitting element LE. In the fifth etching process, the top portion of the first insulating layer INS1 can be etched and removed. For example, the portion of the first insulating layer INS1 covering the top surface of the contact electrode CTE can be etched and removed.

[0249] As shown in Figure 40, the first insulating layer INS1 is etched to align with the top surface of the contact electrode CTE, such that the top surfaces of the first insulating layer INS1 and the top surfaces of the contact electrode CTE are aligned with each other. The top surface of the contact electrode CTE can be exposed upwards by etching the first insulating layer INS1.

[0250] Next, a common electrode CE is formed on the light-emitting element LE and the organic layer 140. The common electrode CE is formed continuously throughout the display area. The common electrode CE covers the organic layer 140 and the light-emitting element LE and is in direct contact with the organic layer 140 and the light-emitting element LE. For example, the common electrode CE may be in contact with the first semiconductor layer SEM1, the first insulating layer INS1, and the contact electrode CTE of the light-emitting element LE. Since the common electrode CE is in contact with the contact electrode CTE, a low potential voltage applied from the common electrode CE can be transmitted to the light-emitting element LE through the contact electrode CTE.

[0251] Subsequently, as shown in FIG6, a display device 10 according to one embodiment is manufactured by forming a wavelength control layer and a color filter layer, etc.

[0252] According to one embodiment, the manufacturing method of the display device 10 can electrically connect the common electrode CE and the light-emitting element LE while omitting the removal process of the first semiconductor layer SEM1. Therefore, the manufacturing process of the display device 10 can be simplified, and process defects can be prevented.

[0253] In concluding this detailed description, those skilled in the art will appreciate that many variations and modifications can be made to the embodiments without substantially departing from the principles of this disclosure. Therefore, the disclosed embodiments are used in a general and descriptive sense only and are not intended to be limiting.

Claims

1. A light-emitting element, wherein, The light-emitting element includes: a first semiconductor layer; a second semiconductor layer disposed on the first semiconductor layer; a light-emitting layer disposed on the second semiconductor layer; a third semiconductor layer disposed on the light-emitting layer; an element electrode layer disposed on the third semiconductor layer; a connecting electrode disposed on the element electrode layer; a first insulating layer surrounding a side surface of the first semiconductor layer and the side surface of the second semiconductor layer; a contact electrode surrounding a side surface of the first insulating layer and the side surface of the second semiconductor layer; and a second insulating layer surrounding the side surface of the second semiconductor layer, the side surface of the light-emitting layer, the side surface of the third semiconductor layer, the side surface of the element electrode layer, and the side surface of the connecting electrode, wherein the contact electrode is in contact with the side surface of the second semiconductor layer.

2. The light-emitting element according to claim 1, wherein, The first insulating layer surrounds the entire side surface of the first semiconductor layer and a portion of the side surface of the second semiconductor layer.

3. The light-emitting element according to claim 1, wherein, The contact electrode does not contact the first semiconductor layer.

4. The light-emitting element according to claim 1, wherein, The second insulating layer surrounds the side surface of the contact electrode but does not contact the first insulating layer.

5. The light-emitting element according to claim 1, wherein, The light-emitting element further includes a contact region in which the contact electrode and the second semiconductor layer are in contact with each other, wherein the contact region is located in a region ranging from 1% to 90% of the length of the second semiconductor layer from the interface between the first semiconductor layer and the second semiconductor layer.

6. The light-emitting element according to claim 5, wherein, The contact area is in the range of 1% to 90% of the total area of ​​the side surface of the second semiconductor layer.

7. The light-emitting element according to claim 1, wherein, The side surface of the first insulating layer, the side surface of the contact electrode, and the side surface of the second insulating layer are aligned with each other.

8. The light-emitting element according to claim 1, wherein, The first insulating layer does not contact the second semiconductor layer.

9. The light-emitting element according to claim 1, wherein, The second insulating layer does not contact the side surface of the contact electrode and is aligned with the side surface of the contact electrode.

10. The light-emitting element according to claim 1, wherein, The light-emitting element further includes a reflective layer surrounding a side surface of the second insulating layer, wherein the side surface of the reflective layer is aligned with the side surface of the contact electrode.

11. The light-emitting element according to claim 1, wherein, The first semiconductor layer comprises an undoped semiconductor, the second semiconductor layer comprises an n-type semiconductor, and the third semiconductor layer comprises a p-type semiconductor.

12. A display device, wherein, The display device includes: a substrate; a pixel electrode disposed on the substrate; a plurality of light-emitting elements disposed on the pixel electrode; a first organic layer disposed on the pixel electrode and between the plurality of light-emitting elements; and a common electrode disposed on the first organic layer and the plurality of light-emitting elements, wherein each of the plurality of light-emitting elements includes: a connecting electrode disposed on the pixel electrode; an element electrode layer disposed on the connecting electrode; a third semiconductor layer disposed on the element electrode layer; a light-emitting layer disposed on the third semiconductor layer; a second semiconductor layer disposed on the light-emitting layer; a first semiconductor layer disposed on the second semiconductor layer; a first insulating layer surrounding a side surface of the first semiconductor layer and the side surface of the second semiconductor layer; a contact electrode surrounding a side surface of the first insulating layer and a side surface of the second semiconductor layer; and a second insulating layer surrounding a side surface of the second semiconductor layer, a side surface of the light-emitting layer, a side surface of the third semiconductor layer, a side surface of the element electrode layer, and a side surface of the connecting electrode, wherein the contact electrode is disposed on the side surface of the second semiconductor layer, and the common electrode is connected to the contact electrode.

13. The display device according to claim 12, wherein, The connection electrode is connected to the pixel electrode, and the second semiconductor layer is electrically connected to the common electrode through the connection electrode.

14. The display device according to claim 12, wherein, The top surface of the first organic layer is aligned with the top surface of the first insulating layer and the top surface of the contact electrode.

15. The display device according to claim 12, wherein, The common electrode is disposed on the first semiconductor layer, the first insulating layer, the contact electrode, and the first organic layer.

16. The display device according to claim 12, wherein, The display device further includes a third insulating layer disposed between the first semiconductor layer and the common electrode, wherein the common electrode is not in contact with the first semiconductor layer.

17. The display device according to claim 16, wherein, The third insulating layer is in contact with the first semiconductor layer but not with the first insulating layer.

18. The display device according to claim 12, wherein, The common electrode is in contact with the side surface of the first insulating layer and the side surface of the contact electrode.

19. The display device according to claim 12, wherein, The light-emitting element further includes a reflective layer surrounding the side surface of the second insulating layer, and the first organic layer covers the reflective layer.

20. The display device according to claim 12, wherein, The display device further includes: a second organic layer disposed on the first organic layer, wherein the common electrode is disposed between the first organic layer and the second organic layer.

21. The display device according to claim 20, wherein, The common electrode surrounds and contacts the side surface of the contact electrode, and the second organic layer covers a portion of the common electrode.

22. A method for manufacturing a display device, wherein, The method includes: forming a pixel electrode on a substrate; forming a light-emitting element on a substrate; combining the light-emitting element formed on the substrate onto the pixel electrode; forming an organic layer on the pixel electrode between the light-emitting elements; and forming a common electrode on the organic layer and the light-emitting element, wherein forming the light-emitting element on the substrate includes: forming a first semiconductor layer, a second semiconductor layer, a light-emitting layer, a third semiconductor layer, and an element electrode layer on the substrate; forming a first insulating layer surrounding a side surface of the first semiconductor layer and a side surface of the second semiconductor layer; forming a contact electrode surrounding a side surface of the first insulating layer and the side surface of the second semiconductor layer; forming a second insulating layer surrounding a side surface of the second semiconductor layer, a side surface of the light-emitting layer, a side surface of the third semiconductor layer, and a side surface of the element electrode layer; and forming a connection electrode on the element electrode layer.

23. The method according to claim 22, wherein, The first insulating layer, the second insulating layer, and the contact electrode are formed by simultaneously etching the first insulating material layer, the contact electrode material layer, and the second insulating material layer.

24. The method according to claim 22, wherein, The step of assembling the light-emitting element formed on the substrate onto the pixel electrode includes: bonding a support film to the connection electrode of the light-emitting element; separating the substrate from the light-emitting element; bonding a transfer film to a surface of the light-emitting element opposite to the support film; separating the support film from the light-emitting element; assembling the connection electrode of the light-emitting element onto the pixel electrode; and removing the transfer film from the light-emitting element.

25. The method according to claim 24, wherein, After separating the support film from the light-emitting element, the transfer film is stretched to increase the spacing between the light-emitting elements.

26. The method according to claim 24, wherein, When the connecting electrode of the light-emitting element is combined onto the pixel electrode, a laser is irradiated onto the pixel electrode to melt and bond the connecting electrode to the pixel electrode.

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