Crossbar switch and application thereof in on-chip double-loop network

Abstract

The invention belongs to the technical field of chip design, and particularly relates to a crossbar switch and application thereof in an on-chip double loop network. Comprising a control channel, and the control channel comprises a control virtual channel, a request arbitration module, an input port control module, an output port control module, a port state management module and a data selection module. The control virtual channel is responsible for receiving a request of a sending end; the request arbitration module adopts a fair rotation arbiter and is responsible for arbitrating a request for controlling a virtual channel; the input port control module is responsible for feeding back an arbitration result of the request arbitration module to the sending end and sending a data enable signal so as to control the sending end to send data to the crossbar switch matrix; the output port control module controls the data selection module to perform data path selection according to the arbitration result of the request arbitration module and the control information of the virtual channel; the data selection module is responsible for sending a data path selection result to the crossbar switch matrix; according to the invention, high-speed transmission of data is realized under the condition that the chip is small in area.

Description

Technical Field

[0001] This invention belongs to the field of chip design technology, and specifically relates to a cross switch and its application in an on-chip dual-ring network. Background Technology

[0002] With the development of integrated circuit technology, the feature size of transistors is approaching its limit. Reducing the feature size facilitates increased chip integration, allowing designers to create numerous high-performance chips. Multi-core processors, as a typical example of high-performance chips, rely heavily on their on-chip interconnect structure, which is a key factor limiting processor performance. Currently, most mainstream multi-core processor interconnect structures employ on-chip networks, with dual-ring networks being the most typical. A dual-ring network consists of one clockwise and one counter-clockwise network. In a dual-ring network structure, a crossbar switch is indispensable for integrating more resources. The crossbar switch connects different request senders and receivers to the dual-ring network, thereby establishing communication between devices and between devices and the core.

[0003] Cross switches are key components of on-chip dual-ring networks, and their transmission efficiency significantly affects the communication efficiency of the dual-ring network. Therefore, in order to improve the communication efficiency of dual-ring networks, this invention proposes a cross switch suitable for on-chip dual-ring networks to ensure high-speed data transmission. Summary of the Invention

[0004] The purpose of this invention is to provide a cross switch and its application in an on-chip dual-ring network. This invention aims to improve the communication efficiency of the dual-ring network. The cross switch uses virtual channel technology to ensure high-speed data transmission. In addition, this invention uses a credit mechanism to avoid data congestion. To avoid data starvation, this invention uses a fair round-robin mechanism to ensure that data from different sending ends can be transmitted fairly to the receiving end.

[0005] To solve the above-mentioned technical problems, the present invention provides a cross switch, comprising: The control channel includes: a control virtual channel, a request arbitration module, an input port control module, an output port control module, a port status management module, and a data selection module. The control virtual channel receives requests from the sending end. The request arbitration module uses a fair round-robin arbitrator to arbitrate requests from the control virtual channel. The input port control module feeds back the arbitration result of the request arbitration module and a data transmission enable signal to the sending end to control the sending end to transmit data to the crossbar switch matrix. The output port control module controls the data selection module to select a data path based on the arbitration result of the request arbitration module and the control information of the virtual channel. The data selection module is responsible for sending the data path selection result to the crossbar switch matrix. The data channel includes a cross switch matrix for point-to-point data transmission from the sending end to the receiving end based on the data path selection result.

[0006] Preferably, the control channel receives control information from the transmitting end, the control information including the data transmission direction (i.e., the receiver's number), the number of Flits contained in each data packet, the virtual channel number, and the valid bits of the control information; the control channel transmits data in units of data packets according to the received control information.

[0007] Preferably, the control virtual channel is divided according to the number of request types to realize different types of requests, and arbitration requests are initiated to the request arbitration module to achieve fair and fast data transmission.

[0008] Preferably, the enabling of the request arbitration module is controlled by the port status management module. The port status management module determines whether to enable the request arbitration module based on the credit status of the virtual channel of the receiving end and the request status of the virtual channel. The credit of the receiving end is managed by the port status management module. When the cross switch matrix sends data to the receiving end, the credit of the receiving end decreases. When the data of the receiving end is used, the credit of the receiving end increases.

[0009] Preferably, provided that all receiving ends can receive the request from the sending end, the transmission direction of the sending end is determined by the request arbitration module.

[0010] Preferably, the port status management module counts the credit value of the receiving virtual channel. One credit value can store one data Flit. The data transmission unit of the cross switch is a data packet. The request arbitration module can only be enabled when the credit value of the receiving virtual channel is sufficient to store one data packet.

[0011] Preferably, the input port control module reads the content of the virtual channel according to the arbitration result. The virtual channel content includes the number of Flits that need to be transmitted for the current data packet. The input port control module notifies the sender to transmit the corresponding number of data packets, i.e., one data packet, and simultaneously notifies the sender to update its control virtual channel credit. The output port control module selects the data transmission path according to the arbitration result and the virtual channel number. The maintenance time of the data transmission path is determined by the number of Flits in the data packet. During data transmission, the port status management module updates the virtual channel credit of the receiving end.

[0012] Preferably, the output port control module determines the number of ticks to be maintained for the selected data path based on the control information of the virtual channel, i.e., the number of Flits contained in each data packet.

[0013] Preferably, the transmission of the data packet is implemented by a state machine, and the input port control module and the output port control module control the transmission of the data packet according to the state machine's state; the state machine's state includes an idle state and a multi-Flit transmission state; for a single-Flit data packet, the packet transmission is completed in the idle state of the state machine; for a multi-Flit data packet, the data of the first Flit is transmitted in the idle state of the state machine, and the data of the remaining Flits is transmitted in the multi-Flit transmission state.

[0014] This invention also provides an application of a crossbar switch in an on-chip dual-ring network, employing a crossbar switch as described above, comprising: a dual-ring network, divided into a clockwise network and a counterclockwise network, representing data routing according to a corresponding routing algorithm selecting the clockwise or counterclockwise network; the dual-ring network has 8 nodes, each node being connected to a corresponding request source or response source through the crossbar switch; the crossbar switch connecting each node is divided into an internet access crossbar switch and an internet access crossbar switch; for the internet access crossbar switch, the request source or response source is the sender, and the node of the dual-ring network is the receiver; for the internet access crossbar switch, the node of the dual-ring network is the sender, and the request source or response source is the receiver.

[0015] Compared with the prior art, the present invention has the following beneficial effects: The cross-switch structure of this invention includes a control channel and a data channel. The control channel comprises a control virtual channel, a fair round-robin arbitrator, an input port control module, an output port control module, a port status management module, and a data selection module. The data channel is implemented using a cross-switch matrix and data selection logic. The control virtual channel enables high-speed data transmission; the fair round-robin arbitrator avoids control request starvation, thereby reducing the risk of data congestion; the input port control module ensures that the sending end transmits data according to the data pack; the output port control module ensures point-to-point transmission of data between the sending and receiving ends according to the data pack; and the port status management module implements a credit management mechanism for the virtual channel, ensuring that data is properly stored after reaching the receiving end. This invention achieves high-speed data transmission within a small chip area. Attached Figure Description

[0016] Figure 1 This is a schematic diagram of the 2×2 cross switch routing of the present invention.

[0017] Figure 2 This is a schematic diagram of the specific structure of a cross switch according to the present invention.

[0018] Figure 3 This is a structural diagram of an application of a cross switch in an on-chip dual-ring network according to the present invention.

[0019] Figure 4 This is a schematic diagram of the state transitions of the data processing state machine of the data packet Pack of the present invention. Detailed Implementation

[0020] The present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. The advantages and features of the present invention will become clearer from the following description. It should be noted that the drawings are all in a very simplified form and use non-precise proportions, and are only used to facilitate and clarify the illustration of the embodiments of the present invention.

[0021] like Figure 1 As shown, for the sake of simplicity, the cross switch with N nodes in this embodiment of the invention is simplified to a cross switch with 2 transmitting nodes and 2 receiving nodes. The transmitting nodes are divided into virtual channel 1 and virtual channel 2, and the receiving nodes are also divided into virtual channel 0 and virtual channel 1. Figure 1 The black connection point in the middle indicates that communication is possible. From... Figure 1 It can be seen that virtual channel 1 of transmitter 0 can reach virtual channel 1 of receiver 0 and virtual channel 1 of receiver 1; virtual channel 2 of transmitter 0 can reach virtual channel 2 of receiver 0 and virtual channel 2 of receiver 1; virtual channel 1 of transmitter 1 can reach virtual channel 1 of receiver 0 and virtual channel 1 of receiver 1; virtual channel 2 of transmitter 1 can reach virtual channel 2 of receiver 0 and virtual channel 2 of receiver 1.

[0022] like Figure 2 As shown, a cross switch suitable for on-chip dual-ring networks includes: The control channel includes: a control virtual channel, a request arbitration module, an input port control module, an output port control module, a port status management module, and a data selection module. The control virtual channel receives requests from the sending end. The request arbitration module uses a fair round-robin arbitrator to arbitrate requests from the control virtual channel. The input port control module feeds back the arbitration result of the request arbitration module and a data transmission enable signal to the sending end to control the sending end to transmit data to the crossbar switch matrix. The output port control module controls the data selection module to select a data path based on the arbitration result of the request arbitration module and the control information of the virtual channel. The data selection module is responsible for sending the data path selection result to the crossbar switch matrix. The data channel includes a cross switch matrix for point-to-point data transmission from the sending end to the receiving end based on the data path selection result.

[0023] The aforementioned crossbar switch employs virtual channel technology. The control virtual channels are divided into control virtual channels 0-3. Control virtual channels 0 and 1 are used to store the control information for control virtual channels 0 and 1 at the transmitting end (end 0), respectively. Control virtual channels 2 and 3 are used to store the control information for control virtual channels 0 and 1 at the transmitting end (end 1), respectively. The crossbar switch's data channels do not have virtual channels; the transmitting and receiving ends are connected point-to-point. A credit management mechanism is used for the virtual channels: the transmitting end manages the credit of the crossbar switch's control virtual channels; the crossbar switch manages the credit of the receiving end's data virtual channels. Transmission between the transmitting end, crossbar switch, and receiving end is in packets (packets), with each packet containing multiple data units, the smallest unit called Flits. The control information for the control channels mainly includes the data transmission direction, virtual channel number, the number of Flits contained in each packet, and the valid bits of the control information.

[0024] The overall working principle is as follows: (1) After the data and control information of the transmitting end are prepared, the control channel of the transmitting end determines whether it can send control information based on the credit of the cross switch control virtual channel. If the cross switch control virtual channel can receive control information, then the control information is sent to the cross switch; otherwise, the sending of control information to the cross switch is suspended.

[0025] (2) After receiving the control request from the transmitter, the control virtual channel of the cross switch sends an arbitration request to the arbitrator.

[0026] (3) The port status management module reads the control information of each control virtual channel, determines the number of data folds that need to be transmitted for each virtual channel, and queries the credit value of the corresponding data virtual channel at the receiving end. The arbitrator can only be enabled when the credit value of the data virtual channel at the receiving end is greater than or equal to the number of data folds that need to be transmitted.

[0027] (4) The arbitrator starts working after receiving the enable signal from the port status management module. The arbitrator adopts fair round-robin arbitration, which can ensure that the request of each sender can be sent and avoid the situation of control virtual channel request starvation.

[0028] (5) The input port control module, based on the arbitration result and the control information of the virtual channel (the number of Flits contained in each pack), notifies the sender to send the data pack and simultaneously notifies the virtual channel to initiate a new arbitration request.

[0029] (6) The output port control management module selects the data path according to the arbitration result, such as from sender 0 to sender 1. At the same time, the output port control module uses the control information of the virtual channel (the number of Flits contained in each pack) to determine the number of ticks maintained by the selected data path.

[0030] (7) When the crossbar switch sends data to the receiving end, the port status management module decrements the credit of the corresponding virtual channel by one for each data Flit sent. After a virtual channel at the receiving end is read by one Flit, the port status management module decrements the credit of the corresponding virtual channel by one.

[0031] like Figure 4 As shown, the transmission of data packets is implemented by a state machine. The input port control module and the output port control module control the transmission of data packets according to the state machine's state. For a single-flit packet, the packet transmission is completed in the idle state of the state machine; for multi-flit transmission, the data transmission of the first flit occurs in the idle state, and the transmission of the remaining flits is completed in the multi-flit sending state. The state transition conditions of the state machine are as follows: Figure 4 As shown.

[0032] like Figure 3 As shown, this embodiment of the invention provides an application of a cross switch in an on-chip dual-ring network. The on-chip dual-ring network is divided into an internet interface and an internet interface. For the internet interface, the on-chip dual-ring network is the receiving end, with the clockwise network being the receiving end 0 and the counterclockwise network being the receiving end 1. For the internet interface, the on-chip dual-ring network is the transmitting end, with the clockwise network being the transmitting end 0 and the counterclockwise network being the transmitting end 1.

[0033] The position of the cross switch in the double ring network is as follows Figure 3 As shown. A dual-ring network represents data that can be routed clockwise or counterclockwise according to the corresponding routing algorithm. Figure 3 The dual-ring network has 8 nodes. Each node is connected to a corresponding source (request source or response source) via a crossbar switch. Each crossbar switch in the dual-ring network is divided into an internet access crossbar switch and a network access crossbar switch. For the internet access crossbar switch, the source is the sender, and the dual-ring network node is the receiver; for the network access crossbar switch, the dual-ring network node is the sender, and the source is the receiver. For example, after data from source 0 goes through the crossbar switch to the internet, the dual-ring network selects a clockwise or counter-clockwise route according to the routing algorithm. When the data reaches node 6, the data from source 0 goes through the network access crossbar switch to reach source 15. Source 15 processes the data and sends the processed data back to the dual-ring network through the internet access crossbar switch. The processed data finally reaches source 0 through the network access crossbar switch of node 0.

[0034] The above description is merely a description of preferred embodiments of the present invention and is not intended to limit the scope of the present invention in any way. Any changes or modifications made by those skilled in the art based on the above disclosure shall fall within the protection scope of the claims.

Claims

1. A cross switch, characterized in that, include: The control channel includes: a control virtual channel, a request arbitration module, an input port control module, an output port control module, a port status management module, and a data selection module. The control virtual channel receives requests from the sending end. The request arbitration module uses a fair round-robin arbitrator to arbitrate requests from the control virtual channel. The input port control module feeds back the arbitration result of the request arbitration module and a data transmission enable signal to the sending end to control the sending end to transmit data to the crossbar switch matrix. The output port control module controls the data selection module to select a data path based on the arbitration result of the request arbitration module and the control information of the virtual channel. The data selection module is responsible for sending the data path selection result to the crossbar switch matrix. The data channel includes a cross switch matrix for point-to-point data transmission from the sending end to the receiving end based on the data path selection result.

2. A cross switch as described in claim 1, characterized in that, The control channel receives control information from the sending end. The control information includes the data transmission direction (i.e., the receiver's number), the number of Flits contained in each data packet, the virtual channel number, and the valid bits of the control information. The control channel transmits data in units of data packets according to the received control information.

3. A cross switch as described in claim 1, characterized in that, The control virtual channel is divided according to the number of request types to realize different types of requests, and at the same time, an arbitration request is initiated to the request arbitration module to achieve fair and fast data transmission.

4. A cross switch as described in claim 1, characterized in that, The enabling of the request arbitration module is controlled by the port status management module. The port status management module determines whether to enable the request arbitration module based on the credit status of the virtual channel of the receiving end and the request status of the virtual channel. The credit of the receiving end is managed by the port status management module. When the cross switch matrix sends data to the receiving end, the credit of the receiving end decreases. When the data of the receiving end is used, the credit of the receiving end increases.

5. A cross switch as described in claim 4, characterized in that, Provided that all receiving ends can receive the sending end's request, the sending end's transmission direction is determined by the request arbitration module.

6. A cross switch as described in claim 4, characterized in that, The port status management module counts the credit value of the receiving virtual channel. One credit value can store one data Flit. The data transmission unit of the cross switch is a data packet. The request arbitration module can only be enabled when the credit value of the receiving virtual channel is sufficient to satisfy one data packet.

7. A cross switch as described in claim 1, characterized in that, The input port control module reads the virtual channel content based on the arbitration result. The virtual channel content includes the number of Flits that need to be transmitted for the current data packet. The input port control module notifies the sender to transmit the corresponding number of data packets, i.e., one data packet, and simultaneously notifies the sender to update its control virtual channel credit. The output port control module selects the data transmission path based on the arbitration result and the virtual channel number. The duration of the data transmission path is determined by the number of Flits in the data packet. During data transmission, the port status management module updates the receiving end's virtual channel credit.

8. A cross switch as described in claim 1, characterized in that, The output port control module determines the number of ticks to be maintained for the selected data path based on the control information of the virtual channel, namely the number of Flits contained in each data packet.

9. A cross switch as described in claim 7, characterized in that, The transmission of the data packet is implemented by a state machine. The input port control module and the output port control module control the transmission of the data packet according to the state machine's state. The state machine's state includes an idle state and a multi-Flit transmission state. For a single-Flit data packet, the packet transmission is completed in the idle state of the state machine. For a multi-Flit data packet, the data of the first Flit is transmitted in the idle state of the state machine, and the data of the remaining Flits is transmitted in the multi-Flit transmission state.

10. An application of a cross switch in an on-chip dual-ring network, employing a cross switch as described in any one of claims 1 to 9, characterized in that, include: A dual-ring network consists of a clockwise network and a counterclockwise network, representing that data is routed to either the clockwise or counterclockwise network according to the corresponding routing algorithm. The dual-ring network has 8 nodes, each node is connected to a corresponding request source or response source through the cross switch; the cross switch connecting each node is divided into an internet cross switch and an internet cross switch; for the internet cross switch, the request source or response source is the sender and the node of the dual-ring network is the receiver; for the internet cross switch, the node of the dual-ring network is the sender and the request source or response source is the receiver.

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