A resonator, a method for manufacturing the resonator, a filter, a chip, and a device.

Abstract

This application provides a resonator, a method for fabricating the resonator, a filter, a chip, and a device. The resonator includes a substrate, a first electrode layer, and a piezoelectric layer. The first electrode layer is located on one side of the substrate and includes a first intercalation electrode and a second intercalation electrode. The first intercalation electrode includes at least two first intercalation strips, and the second intercalation electrode includes at least two second intercalation strips. The piezoelectric layer is located on the side of the first electrode layer facing the substrate and includes a first piezoelectric portion, a second piezoelectric portion, and a first trench. Along a first direction, the first trench is located between the first and second piezoelectric portions. The first direction is perpendicular to the arrangement direction of the first and second intercalation strips and also perpendicular to the stacking direction of the substrate and the piezoelectric layer. Along the stacking direction of the substrate and the piezoelectric layer, the first intercalation strips at least partially overlap with the first piezoelectric portion but do not overlap with the second piezoelectric portion, and the second intercalation strips at least partially overlap with the first piezoelectric portion but do not overlap with the second piezoelectric portion.

Description

Technical Field

[0001] This application relates to the field of resonators, and more particularly to a resonator, a method for manufacturing a resonator, a filter, a chip, and a device. Background Technology

[0002] With the development of communication technology, high-frequency acoustic filters need to meet higher performance requirements in order to achieve high-quality communication in higher frequency bands (such as the Sub-6 GHz band). Resonators are an important component of filters. There are various types of resonators. One type utilizes interdigitated electrode structures (IDTs) to form sheared volume waves on a submicron-thick suspended piezoelectric thin film substrate. For example, a vertically excited volume acoustic resonator (YBAR) can be used.

[0003] The shear bulk acoustic wave resonator excited by a vertical electric field has two electrode structures in the effective aperture region, located on the upper and lower surfaces of the piezoelectric film, respectively. Since the bulk acoustic wave propagates within the piezoelectric film, the film itself provides a carrier for bulk acoustic wave leakage. As the communication frequency increases, the impact of bulk acoustic wave leakage on the resonator becomes increasingly significant. Summary of the Invention

[0004] In view of this, in order to meet the increasing demand for communication frequencies, embodiments of this application propose a resonator, a method for manufacturing the resonator, a filter, a chip, and a device to reduce the problem of bulk acoustic wave leakage in the resonator.

[0005] In a first aspect, embodiments of this application provide a resonator, comprising: a substrate, a first electrode layer, and a piezoelectric layer. The first electrode layer is located on one side of the substrate and includes a first intercalation electrode and a second intercalation electrode. The first intercalation electrode includes at least two first intercalation strips, and the second intercalation electrode includes at least two second intercalation strips. The piezoelectric layer is located on the side of the first electrode layer facing the substrate and includes a first piezoelectric portion, a second piezoelectric portion, and a first trench. Along a first direction, the first trench is located between the first and second piezoelectric portions, the first direction being perpendicular to the arrangement direction of the first and second intercalation strips, and also perpendicular to the stacking direction of the substrate and the piezoelectric layer. Along the stacking direction of the substrate and the piezoelectric layer, the first piezoelectric portion and the first intercalation strips at least partially overlap, and the first piezoelectric portion and the second intercalation strips at least partially overlap. The minimum distance between the orthographic projection of the second piezoelectric portion on the substrate and the orthographic projection of the first intercalation strip on the substrate is greater than zero, and the minimum distance between the orthographic projection of the second piezoelectric portion on the substrate and the orthographic projection of the second intercalation strip on the substrate is greater than zero.

[0006] In this embodiment, a first groove is included between the first piezoelectric part and the second piezoelectric part, that is, the first groove at least partially separates the first piezoelectric part and the second piezoelectric part, thereby facilitating the prevention of bulk acoustic waves from being transmitted from the first piezoelectric part to the second piezoelectric part, that is, facilitating the prevention of bulk acoustic wave leakage.

[0007] In one possible implementation of the first aspect, the first interdigitated electrode further includes a first busbar electrically connected to the first interdigitated electrode; the second interdigitated electrode further includes a second busbar electrically connected to the second interdigitated electrode; along the stacking direction of the substrate and the piezoelectric layer, the second piezoelectric portion overlaps with the first busbar; the piezoelectric layer includes a plurality of first trenches, the plurality of first trenches including first sub-trenches and / or second sub-trenches; wherein the projection of the first sub-trench along the stacking direction of the substrate and the piezoelectric layer is located between the projection of the first interdigitated electrode along the stacking direction of the substrate and the piezoelectric layer and the projection of the second busbar along the stacking direction of the substrate and the piezoelectric layer; along the first direction, the projection of the second sub-trench along the stacking direction of the substrate and the piezoelectric layer is located between the projection of the second interdigitated electrode along the stacking direction of the substrate and the piezoelectric layer and the projection of the first busbar along the stacking direction of the substrate and the piezoelectric layer.

[0008] In this implementation, a first sub-groove is included between the first piezoelectric portion and the second piezoelectric portion facing the substrate, and / or, a second sub-groove is included between the first piezoelectric portion and the second piezoelectric portion facing the substrate. The first sub-groove / second sub-groove can separate the first piezoelectric portion and the second piezoelectric portion, thereby facilitating the prevention of bulk acoustic waves from transmitting from the first piezoelectric portion to the second piezoelectric portion.

[0009] In one implementation of the first aspect, the first interdigitated electrode further includes a first bus bar electrically connected to the first interdigitated electrode; the second interdigitated electrode further includes a second bus bar electrically connected to the second interdigitated electrode; the piezoelectric layer includes a third piezoelectric portion; along the first direction, the second piezoelectric portion is located between the first piezoelectric portion and the third piezoelectric portion; along the stacking direction of the substrate and the piezoelectric layer, the third piezoelectric portion overlaps with the first bus bar and overlaps with the second bus bar, and the distance between the projection of the second piezoelectric portion and the projection of the third piezoelectric portion is equal to zero.

[0010] In this implementation, the distance between the projection of the second piezoelectric part and the projection of the third piezoelectric part is zero, which means that the second piezoelectric part and the third piezoelectric part are connected. The connection between the two can help reduce the alignment accuracy in the production process, thereby reducing the difficulty of the process.

[0011] In one implementation of the first aspect, the first interdigitated electrode further includes a first busbar electrically connected to the first interdigitated electrode; the second interdigitated electrode further includes a second busbar electrically connected to the second interdigitated electrode; the piezoelectric layer further includes one or two third piezoelectric portions and a second trench; along the stacking direction of the substrate and the piezoelectric layer, the third piezoelectric portion overlaps with the first busbar, and / or the third piezoelectric portion overlaps with the second busbar; along the first direction, the second piezoelectric portion is located between the first piezoelectric portion and the third piezoelectric portion, and the second trench is located between the second piezoelectric portion and the third piezoelectric portion.

[0012] In this implementation, the second piezoelectric part and the third piezoelectric part are separated by a second groove to further prevent the leakage and parasitic generation of bulk acoustic waves.

[0013] In one possible implementation of the first aspect, the first trench penetrates the piezoelectric layer along the stacking direction of the substrate and the piezoelectric layer.

[0014] In this implementation, the first trench penetrating the piezoelectric layer can completely separate the first piezoelectric part from the second piezoelectric part, thereby reducing the probability of bulk sound wave leakage and preventing bulk sound wave leakage.

[0015] In one possible implementation of the first aspect, the thickness of the first trench is less than the thickness of the piezoelectric layer along the stacking direction of the substrate and the piezoelectric layer.

[0016] In this implementation, the fact that the thickness of the first trench is less than the thickness of the piezoelectric layer means that the first trench does not penetrate the piezoelectric layer. Therefore, the piezoelectric layer can protect the portion of the piezoelectric layer facing the substrate (the substrate or the second electrode layer).

[0017] In one possible implementation of the first aspect, the first electrode layer further includes a pseudo-finger electrode and a first spacer groove; the first spacer groove is located on the side of the first trench facing the first electrode layer, and the first spacer groove communicates with the first trench; along the stacking direction of the substrate and the piezoelectric layer, the second piezoelectric portion at least partially overlaps with the pseudo-finger electrode, and the first spacer groove penetrates the first electrode layer.

[0018] In this implementation, the first gap is used to separate the spur finger electrode from the corresponding finger strip. The second piezoelectric part at least partially overlaps with the spur finger electrode, and the first gap groove penetrates the first electrode layer, which can prevent the generation of bulk acoustic waves in the second piezoelectric part.

[0019] In one possible implementation of the first aspect, the first electrode layer includes at least two pseudofinger electrodes, the at least two pseudofinger electrodes including a first pseudofinger electrode and a second pseudofinger electrode; the first insertion electrode further includes a first bus bar, the second insertion electrode further includes a second bus bar, the first bus bar is electrically connected to the first finger bar, and the second bus bar is electrically connected to the second finger bar;

[0020] Wherein, the first busbar is electrically connected to the first pseudo-finger electrode, and / or, the second busbar is electrically connected to the second pseudo-finger electrode.

[0021] In this implementation, the first busbar is electrically connected to the first dummy finger electrode, eliminating the need for a patterning process between the two electrodes. Similarly, the second busbar is electrically connected to the second dummy finger electrode, eliminating the need for a patterning process between them. Therefore, this reduces manufacturing complexity and production costs.

[0022] In one possible implementation of the first aspect, the piezoelectric layer includes a plurality of first piezoelectric portions; the plurality of first piezoelectric portions includes a first sub-piezoelectric portion and a second sub-piezoelectric portion; wherein, along the stacking direction of the substrate and the piezoelectric layer, the first finger overlaps with the first sub-piezoelectric portion, the projection of the second finger is located outside the projection of the first sub-piezoelectric portion, the second finger overlaps with the second sub-piezoelectric portion, and the projection of the first finger is located outside the projection of the second sub-piezoelectric portion; the piezoelectric layer further includes a third trench; along the arrangement direction of the first finger and the second finger, the third trench is located between the first sub-piezoelectric portion and the second sub-piezoelectric portion; the third trench communicates with the first trench.

[0023] In this implementation, a third groove exists between the first sub-piezoelectric part and the second sub-piezoelectric part, which is beneficial for increasing the frequency of the bulk acoustic wave.

[0024] In one possible implementation of the first aspect, it further includes: a second electrode layer located on the side of the piezoelectric layer facing the substrate;

[0025] The first finger strip includes a first non-intersecting portion and a first intersecting portion, and the second finger strip includes a second non-intersecting portion and a second intersecting portion. Along the arrangement direction of the first finger strip and the second finger strip, the first intersecting portion and the second intersecting portion overlap. The distance between the projection of the first non-intersecting portion and the projection of the second finger strip is equal to zero, and the distance between the projection of the second non-intersecting portion and the projection of the first finger strip is equal to zero.

[0026] The distance between the orthographic projection of the first non-intercalating portion on the substrate and the orthographic projection of the second electrode layer on the substrate is greater than or equal to zero, and / or the distance between the orthographic projection of the second non-intercalating portion on the substrate and the orthographic projection of the second electrode layer on the substrate is greater than or equal to zero;

[0027] or,

[0028] Along the stacking direction of the substrate and the piezoelectric layer, the overlapping area of ​​the first non-intercalating portion and the second electrode layer is a first overlapping area, and the maximum width of the first overlapping area along the first direction is less than or equal to a first threshold. And / or, along the stacking direction of the substrate and the piezoelectric layer, the overlapping area of ​​the second non-intercalating portion and the second electrode layer is a second overlapping area, and the maximum width of the second overlapping area along the first direction is less than or equal to a second threshold.

[0029] In this implementation, the overlap between the second electrode layer and the first electrode layer satisfies the above conditions, which helps to reduce the parasitic presence of bulk acoustic waves.

[0030] In one possible implementation of the first aspect, the first electrode layer further includes a pseudo-finger electrode and a first spacer groove; the first spacer groove is located on the side of the first trench facing the first electrode layer, and the first spacer groove communicates with the first trench; along the stacking direction of the substrate and the piezoelectric layer, the second piezoelectric portion at least partially overlaps with the pseudo-finger electrode, and the first spacer groove penetrates the first electrode layer; the distance between the orthographic projection of the pseudo-finger electrode on the substrate and the orthographic projection of the second electrode layer on the substrate is greater than or equal to zero.

[0031] In this implementation, the pseudo-electrode and the second electrode layer do not overlap along the stacking direction of the substrate and the piezoelectric layer. Therefore, it is not easy for parasitic bulk acoustic waves to be generated between the pseudo-electrode and the second electrode layer, which helps to reduce the parasitic bulk acoustic waves.

[0032] In one possible implementation of the first aspect, the first insert electrode further includes a first bus bar electrically connected to the first finger strip; the second insert electrode further includes a second bus bar electrically connected to the second finger strip; wherein the first bus bar is electrically insulated from the dummy finger electrode, and / or the second bus bar is electrically insulated from the dummy finger electrode.

[0033] In this implementation, the first busbar is electrically insulated from the dummy electrode, providing redundancy for the alignment accuracy of the second electrode layer and the dummy electrode, and improving the fault tolerance rate when the second electrode layer and the dummy electrode are aligned. That is, even if the two overlap due to process errors, the probability of generating parasitic acoustic waves between them can be effectively reduced.

[0034] In one possible implementation of the first aspect, the first electrode layer further includes a pseudo-finger electrode and a first spacer groove; the first spacer groove is located on the side of the first trench facing the first electrode layer, and the first spacer groove communicates with the first trench; along the stacking direction of the substrate and the piezoelectric layer, the second piezoelectric portion at least partially overlaps with the pseudo-finger electrode, and the first spacer groove penetrates the first electrode layer; the first insert electrode further includes a first bus bar, the first bus bar being electrically connected to the first finger strip; the second insert electrode further includes a second bus bar, the second bus bar being electrically connected to the second finger strip; the first bus bar is electrically insulated from the pseudo-finger electrode, and the second bus bar is electrically insulated from the pseudo-finger electrode; along the stacking direction of the substrate and the piezoelectric layer, the pseudo-finger electrode overlaps with the second electrode layer.

[0035] In this implementation, the pseudo-finger electrode overlaps with the second electrode layer along the stacking direction of the substrate and the piezoelectric layer, which reduces the alignment accuracy requirements during the manufacturing process and thus reduces the difficulty of the manufacturing process.

[0036] In one possible implementation of the first aspect, the first electrode layer further includes a second spacer groove, the first busbar and the corresponding pseudo-finger electrode are separated by the second spacer groove, and / or the second busbar and the corresponding pseudo-finger electrode are separated by the second spacer groove.

[0037] In this implementation, the fourth groove is used to achieve insulation between the busbar and the corresponding dummy finger electrode. The implementation method is simple and helps to reduce costs.

[0038] In one possible implementation of the first aspect, the resonator includes an effective region, with a first interleaved portion and a second interleaved portion located within the effective region, and a first non-interleaved portion and a second non-interleaved portion located outside the effective region. A second electrode layer is located within the effective region.

[0039] In this implementation, the second electrode layer is located within the effective area so that the first non-interleaving portion and the second non-interleaving portion do not overlap with the second electrode layer, thereby avoiding parasitic capacitance between the second electrode layer and the first non-interleaving portion and between the second electrode layer and the second non-interleaving portion, thus avoiding the generation of bulk acoustic waves.

[0040] In one possible implementation of the first aspect, the second electrode layer is located outside the effective region as a first part, and the maximum width of the first part along the first direction is less than or equal to the larger of a first threshold and a second threshold.

[0041] In this implementation, due to the existence of process errors, it is difficult for the second electrode layer to completely overlap with the effective area. However, making the maximum width of the first part in the first direction less than or equal to the larger of the first threshold and the second threshold can help control the overlapping area of ​​the first non-intersecting part and the second electrode layer, as well as the second intersecting part and the second electrode layer, within a controllable range, so as to avoid the parasitic generation of bulk acoustic waves as much as possible.

[0042] In one possible implementation of the first aspect, the first insert electrode further includes a first busbar electrically connected to the first finger strip. The second insert electrode further includes a second busbar electrically connected to the second finger strip. The first busbar is electrically insulated from the dummy finger electrode, and the second busbar is electrically insulated from the dummy finger electrode.

[0043] In this implementation, both the first busbar and the second busbar are electrically insulated from the dummy finger electrode, cutting off the power supply to the dummy finger electrode. This makes the dummy finger electrode an isolated entity, meaning it receives no signal. Since the second electrode layer can be a sensing electrode layer, which is not connected to any electrical signal, even if the second electrode layer overlaps with the dummy finger electrode, the parasitic capacitance between them is negligible or even nonexistent.

[0044] In one possible implementation of the first aspect, the pseudo-electrode's orthogonal projection onto the substrate can be at least one of a circle and a polygon.

[0045] In this implementation, the orthogonal projection of the pseudo-electrode on the substrate can be at least one of a circle or a polygon, which is beneficial for process implementation and reduces production costs.

[0046] In one possible implementation of the first aspect, along a first direction, at least two dummy finger electrodes are included between the first busbar and the second finger bar, the dummy finger electrodes being electrically insulated from both the first busbar and the second finger bar, and adjacent dummy finger electrodes being electrically insulated from each other. And / or, along the first direction, at least two dummy finger electrodes are included between the second busbar and the first finger bar, the dummy finger electrodes being electrically insulated from both the second busbar and the first finger bar, and adjacent dummy finger electrodes being electrically insulated from each other.

[0047] In this implementation, the busbar and the corresponding finger bar include at least two dummy finger electrodes, and the electrical insulation between adjacent dummy finger electrodes helps to prevent the leakage of bulk acoustic waves.

[0048] In one possible implementation of the first aspect, along a first direction, the plurality of pseudofinger electrodes includes a first pseudofinger electrode, a second pseudofinger electrode, and a third pseudofinger electrode, which are arranged sequentially along the first direction X. Along the first direction, the distance between the first pseudofinger electrode and the second pseudofinger electrode is not equal to the distance between the second pseudofinger electrode and the third pseudofinger electrode.

[0049] In this implementation, the distance between the first dummy electrode and the second dummy electrode is not equal to the distance between the second dummy electrode and the third dummy electrode. This differentiated processing can reduce the alignment accuracy in the process, thereby improving product yield.

[0050] Secondly, this application provides a resonator, comprising: a substrate, a first electrode layer, a piezoelectric layer, and a second electrode layer. The first electrode layer is located on one side of the substrate, and the first electrode layer includes a first interdigitated electrode and a second interdigitated electrode. The first interdigitated electrode includes at least two first interdigitated strips, and the second interdigitated electrode includes at least two second interdigitated strips.

[0051] A piezoelectric layer is located on the side of the first electrode layer facing the substrate;

[0052] The second electrode layer is located on the side of the piezoelectric layer facing the substrate;

[0053] The first finger strip includes a first non-intersecting portion and a first intersecting portion, and the second finger strip includes a second non-intersecting portion and a second intersecting portion. Along the arrangement direction of the first finger strip and the second finger strip, the first intersecting portion and the second intersecting portion overlap. The distance between the projection of the first non-intersecting portion and the projection of the second finger strip is equal to zero, and the distance between the projection of the second non-intersecting portion and the projection of the first finger strip is equal to zero.

[0054] The distance between the orthographic projection of the first non-intercalating portion on the substrate and the orthographic projection of the second electrode layer on the substrate is greater than or equal to zero, and / or the distance between the orthographic projection of the second non-intercalating portion on the substrate and the orthographic projection of the second electrode layer on the substrate is greater than or equal to zero;

[0055] or,

[0056] Along the stacking direction of the substrate and the piezoelectric layer, the overlapping area of ​​the first non-intercalating portion and the second electrode layer is a first overlapping area, and the maximum width of the first area along the first direction is less than or equal to a first threshold. And / or, along the stacking direction of the substrate and the piezoelectric layer, the overlapping area of ​​the second non-intercalating portion and the second electrode layer is a second overlapping area, and the maximum width of the second overlapping area along the first direction is less than or equal to a second threshold.

[0057] In this embodiment, parasitic capacitance between the second electrode layer and the non-intercalation portion can be effectively prevented, thereby improving the parasitic problem of bulk acoustic waves in the resonator.

[0058] In one possible implementation of the second aspect, the first threshold is the first manufacturing process error, which is related to at least one of the alignment error between the second electrode layer and the first region, the process error of the second electrode layer, and the process error of the first interdigitated electrode; the second threshold is the second manufacturing process error, which is related to at least one of the alignment error between the second electrode layer and the first region, the process error of the second electrode layer, and the process error of the second finger strip.

[0059] In one possible implementation of the second aspect, the first electrode layer further includes a pseudo-finger electrode; along the stacking direction of the substrate and the piezoelectric layer, the projection of the pseudo-finger electrode is located outside the projection of the second electrode layer.

[0060] In this implementation, the projection of the pseudo-finger electrode is located outside the projection of the second electrode layer, which can effectively reduce the parasitic acoustic waves generated by the piezoelectric part located on the side of the pseudo-finger electrode facing the substrate.

[0061] In one possible implementation of the second aspect, the first insert electrode further includes a first bus bar electrically connected to the first finger strip; the second insert electrode further includes a second bus bar electrically connected to the second finger strip; wherein the first bus bar is electrically insulated from the dummy finger electrode, and the second bus bar is electrically insulated from the dummy finger electrode.

[0062] In this implementation, the busbar is electrically insulated from the dummy finger electrode, which disconnects the dummy finger electrode from the electrical signal, thereby further reducing the generation of parasitic acoustic waves in the piezoelectric layer located on the side of the dummy finger electrode facing the substrate.

[0063] In one possible implementation of the second aspect, the first electrode layer further includes a pseudo-finger electrode; the first interdigitated electrode further includes a first bus bar electrically connected to the first interdigitated electrode; the second interdigitated electrode further includes a second bus bar electrically connected to the second interdigitated electrode; the first bus bar is electrically insulated from the pseudo-finger electrode, and the second bus bar is electrically insulated from the pseudo-finger electrode; the pseudo-finger electrode overlaps with the second electrode layer along the stacking direction of the substrate and the piezoelectric layer.

[0064] In this implementation, the pseudo-finger electrode overlaps with the second electrode layer along the stacking direction of the substrate and the piezoelectric layer, which reduces the alignment accuracy requirements during the manufacturing process and thus reduces the difficulty of the manufacturing process.

[0065] In one possible implementation of the second aspect, the first electrode layer further includes a second spacer groove, the first busbar and the corresponding pseudo-finger electrode are separated by the second spacer groove, and / or the second busbar and the corresponding pseudo-finger electrode are separated by the second spacer groove.

[0066] In this implementation, the fourth groove is used to achieve insulation between the busbar and the corresponding dummy finger electrode. The implementation method is simple and helps to reduce costs.

[0067] Thirdly, embodiments of this application provide a method for manufacturing a resonator, including:

[0068] Obtain the substrate;

[0069] A lower electrode material layer is formed on the substrate, and the lower electrode material layer is patterned to obtain the lower electrode layer.

[0070] A piezoelectric layer is formed on a substrate on which the lower electrode layer is formed;

[0071] An upper electrode layer is formed on the piezoelectric layer, and the upper electrode layer is patterned to obtain a first interdigitated electrode and a second interdigitated electrode. The first interdigitated electrode includes at least two first interdigitated strips, and the second interdigitated electrode includes at least two second interdigitated strips.

[0072] A piezoelectric layer is patterned to obtain a first piezoelectric portion, a second piezoelectric portion, and a first trench; wherein, along a first direction, the first trench is located between the first piezoelectric portion and the second piezoelectric portion, the first direction being perpendicular to the arrangement direction of the first and second fingers, and the first direction being perpendicular to the stacking direction of the substrate and the piezoelectric layer; along the stacking direction of the substrate and the piezoelectric layer, the first piezoelectric portion and the first finger overlap at least partially, and the first piezoelectric portion and the second finger overlap at least partially; along the stacking direction of the substrate and the piezoelectric layer, the minimum distance between the projection of the second piezoelectric portion and the projection of the first finger is greater than zero, and the minimum distance between the projection of the second piezoelectric portion and the projection of the second finger is greater than zero.

[0073] In this embodiment, the resonator provided in the first aspect is obtained by patterning the piezoelectric layer, which can effectively prevent the leakage of bulk acoustic waves.

[0074] In one possible implementation of the third aspect, the patterning of the upper electrode layer and the patterning of the piezoelectric layer can be performed in the same process.

[0075] In this implementation, unnecessary parts of the upper electrode layer and unnecessary parts of the piezoelectric layer can be removed in one process, thereby improving production efficiency.

[0076] Fourthly, embodiments of this application provide a method for manufacturing a resonator, comprising:

[0077] Obtain the substrate;

[0078] A lower electrode material layer is formed on the substrate, and the lower electrode material layer is patterned to obtain the lower electrode layer.

[0079] A piezoelectric layer is formed on a substrate on which the lower electrode layer is formed;

[0080] An upper electrode layer is formed on the piezoelectric layer, and the upper electrode layer is patterned to obtain a first interdigitated electrode and a second interdigitated electrode.

[0081] The first finger electrode includes at least two first finger strips, and the second finger electrode includes at least two second finger strips. The first finger strip includes a first non-intercalating portion and a first intercalating portion, and the second finger strip includes a second non-intercalating portion and a second intercalating portion. Along the arrangement direction of the first finger strip and the second finger strip, the first intercalating portion and the second intercalating portion overlap, the first non-intercalating portion does not overlap with the second finger strip, and the second non-intercalating portion does not overlap with the first finger strip.

[0082] Along the arrangement direction of the substrate and the piezoelectric layer, the first non-intersecting portion does not overlap with the lower electrode layer, and / or the second non-intersecting portion does not overlap with the lower electrode layer;

[0083] or,

[0084] Along the arrangement direction of the substrate and the piezoelectric layer, the overlapping area of ​​the first non-intercalating portion and the lower electrode layer is a first overlapping area, and the maximum width of the first area along the first direction is less than or equal to a first threshold. And / or, along the arrangement direction of the substrate and the piezoelectric layer, the overlapping area of ​​the second non-intercalating portion and the lower electrode layer is a second overlapping area, and the maximum width of the second overlapping area along the first direction is less than or equal to a second threshold. The first direction is parallel to the direction of the first finger strip toward the second busbar.

[0085] In the embodiments of this application, the upper electrode layer and the lower electrode layer obtained by patterning the upper electrode layer do not overlap or the overlapping area is within a controllable range, which can effectively avoid the generation of parasitic capacitance, thereby avoiding the generation of parasitic bulk acoustic waves, and ultimately improving the performance of the resonator.

[0086] Fifthly, embodiments of this application provide a filter, which includes a resonator provided in the first or second aspect.

[0087] The filter provided in this application embodiment can effectively improve the problems of bulk acoustic wave parasitism and leakage in the field of high-frequency communication, thereby ensuring excellent working performance.

[0088] In a sixth aspect, embodiments of this application also provide a radio frequency chip, which includes a resonator provided in the first or second aspect.

[0089] The radio frequency chip provided in this application embodiment can effectively improve the problems of parasitic and leakage bulk acoustic waves in the field of high-frequency communication, thereby improving energy utilization, reducing power consumption, and ensuring good working performance.

[0090] In a seventh aspect, embodiments of this application also provide an apparatus, the apparatus including the resonator provided in the first aspect or the second aspect.

[0091] The device provided in the embodiments of this application can have excellent working performance in the field of high-frequency communication.

[0092] In this embodiment, the first direction is perpendicular to the arrangement direction of the first and second fingers, and also perpendicular to the stacking direction of the substrate and the piezoelectric layer. Along the first direction, a first trench is located between the first and second piezoelectric portions, creating a gap between them. This gap effectively prevents bulk acoustic waves from propagating from the first piezoelectric portion to the second piezoelectric portion, thereby effectively preventing bulk acoustic wave leakage and ultimately improving the resonator's performance. Attached Figure Description

[0093] To more clearly illustrate the technical solutions of the embodiments of this application, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0094] Figure 1 This application provides a schematic diagram of a resonator according to an embodiment of the present application;

[0095] Figure 2 This application provides a schematic diagram of a resonator according to an embodiment of the present application;

[0096] Figure 3 This application provides a schematic diagram of a resonator according to an embodiment of the present application;

[0097] Figure 4 This application provides a schematic diagram of a resonator according to an embodiment of the present application;

[0098] Figure 5 This application provides a schematic diagram of a resonator according to an embodiment of the present application;

[0099] Figure 6 This application provides a schematic diagram of a resonator according to an embodiment of the present application;

[0100] Figure 7 This application provides a schematic diagram of a resonator according to an embodiment of the present application;

[0101] Figure 8 This application provides a schematic diagram of a resonator according to an embodiment of the present application;

[0102] Figure 9 This application provides a schematic diagram of a resonator according to an embodiment of the present application;

[0103] Figure 10a This application provides a schematic diagram of a resonator according to an embodiment of the present application;

[0104] Figure 10b Provided for the embodiments of this application Figure 10a AA section view;

[0105] Figure 10c Provided for the embodiments of this application Figure 10a Sectional view A1-A1;

[0106] Figure 10d Provided for the embodiments of this application Figure 10a A schematic diagram of the second electrode layer in the middle;

[0107] Figure 11a This application provides a schematic diagram of a resonator according to an embodiment of the present application;

[0108] Figure 11b Provided for the embodiments of this application Figure 11a BB section view;

[0109] Figure 11c Provided for the embodiments of this application Figure 11a A schematic diagram of the second electrode layer in the middle;

[0110] Figure 11d A simulation diagram of a resonator is provided for an embodiment of this application;

[0111] Figure 12a This application provides a schematic diagram of a resonator according to an embodiment of the present application;

[0112] Figure 12b Provided for the embodiments of this application Figure 12a CC section view;

[0113] Figure 13a This application provides a schematic diagram of a resonator according to an embodiment of the present application;

[0114] Figure 13b Provided for the embodiments of this application Figure 13aDD sectional view;

[0115] Figure 14a This application provides a schematic diagram of a resonator according to an embodiment of the present application;

[0116] Figure 14b Provided for the embodiments of this application Figure 14a EE sectional view;

[0117] Figure 15 A flowchart illustrating a method for fabricating a resonator according to an embodiment of this application;

[0118] Figure 16 This is a flowchart illustrating a method for manufacturing a resonator according to an embodiment of this application.

[0119] Label Explanation

[0120] 100, Resonator; 101, Substrate; 110, Piezoelectric layer; 111, First piezoelectric part; 112, Second piezoelectric part; 113, First trench; 114, Third piezoelectric part; 115, Second trench; 116, Third trench; 117, Fourth trench; 120, First electrode layer; 121, First intercalation electrode; 1211, First finger strip; 12111, First non-intercalation part; 12112, First intercalation part; 1212, First busbar; 122, Second intercalation electrode; 1221, Second finger strip; 12211, Second non-intercalation part; 12212, Second intercalation part; 1222, Second busbar; 123, Pseudo-finger electrode; 124, First spacer groove; 125, Second spacer groove; 130, Second electrode layer. Detailed Implementation

[0121] To better understand the technical solution of this application, the embodiments of this application will be described in detail below with reference to the accompanying drawings.

[0122] It should be understood that the described embodiments are merely some, not all, of the embodiments in this application. All other embodiments obtained by those skilled in the art based on the embodiments in this application without inventive effort are within the scope of protection of this application.

[0123] The terminology used in the embodiments of this application is for the purpose of describing particular embodiments only and is not intended to be limiting of this application. The singular forms “a,” “the,” and “the” used in the embodiments of this application and the appended claims are also intended to include the plural forms unless the context clearly indicates otherwise.

[0124] It should be understood that the term "and / or" used in this article is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, or B existing alone. Additionally, the character " / " in this article generally indicates that the preceding and following related objects have an "or" relationship.

[0125] Before providing a detailed description of the embodiments of this application, the terms used or possibly used in the embodiments of this application will first be explained.

[0126] To reduce the leakage problem of bulk acoustic resonators, such as Figure 1 As shown, this application embodiment provides a resonator 100, which includes a substrate 101, a piezoelectric layer 110, and a first electrode layer 120. The piezoelectric layer 110 is located on one side of the substrate 101, and the first electrode layer 120 is located on the side of the piezoelectric layer 110 opposite to the substrate 101.

[0127] like Figure 1 As shown, the first electrode layer 120 includes a first interdigitated electrode 121 and a second interdigitated electrode 122. The first interdigitated electrode 121 includes at least two first interdigitated strips 1211. The second interdigitated electrode 122 includes at least two second interdigitated strips 1221. The first interdigitated strips 1211 and the second interdigitated strips 1221 are arranged alternately, forming an interdigitated structure. A spacer groove penetrating the first electrode layer is included between the first interdigitated strips 1211 and the second interdigitated strips 1221. One of the first interdigitated electrode 121 and the second interdigitated electrode 122 is an input electrode for connecting an input signal. The other of the first interdigitated electrode 121 and the second interdigitated electrode 122 is an output electrode for connecting an output signal. To improve energy conversion efficiency, in one possible implementation, the first interdigitated strips 1211 and the second interdigitated strips 1221 are arranged alternately in parallel.

[0128] like Figure 1 As shown, the piezoelectric layer 110 includes a first piezoelectric portion 111, a second piezoelectric portion 112, and a first trench 113. Along a first direction X, the first trench 113 is located between the first piezoelectric portion 111 and the second piezoelectric portion 112. The first direction X is perpendicular to the arrangement direction of the first finger strip 1211 and the second finger strip 1221, and also perpendicular to the stacking direction of the substrate 101 and the piezoelectric layer 110. The piezoelectric layer includes a piezoelectric material. In one embodiment, the piezoelectric material can achieve a piezoelectric effect: after the input electrode receives an input signal, the piezoelectric layer 110 deforms, and this deformation of the piezoelectric layer 110 can generate a corresponding electrical signal on the output electrode, thereby achieving resonance.

[0129] Along the stacking direction of the substrate 101 and the piezoelectric layer 110, the first piezoelectric portion 111 at least partially overlaps with the first finger strip 1211, and the first piezoelectric portion 111 at least partially overlaps with the second finger strip 1221. In one possible implementation, along the stacking direction of the substrate 101 and the piezoelectric layer 110, the first piezoelectric portion partially overlaps with the first finger strip 1211, and the first piezoelectric portion 111 partially overlaps with the second finger strip. For example, as... Figure 1 As shown, a portion of the first piezoelectric part 111 overlaps with the first finger strip 1211, and another portion of the first piezoelectric part 111 overlaps with the second finger strip 1221.

[0130] In one possible implementation, the resonator 100 includes a plurality of first piezoelectric portions 111, some of which correspond one-to-one with first finger strips 1211 and are stacked together, and another portion of which corresponds one-to-one with second finger strips 1221 and are stacked together. For example, the plurality of first piezoelectric portions 111 includes a first sub-piezoelectric portion 111a and a second sub-piezoelectric portion 111b. Along the stacking direction of the substrate 101 and the piezoelectric layer 110, the first sub-piezoelectric portion 111a and the first finger strip 1211 at least partially overlap. Along the stacking direction of the substrate 101 and the piezoelectric layer 110, the second sub-piezoelectric portion 111b and the second finger strip 1221 overlap.

[0131] like Figure 1 As shown, the minimum distance between the orthographic projection of the second piezoelectric part 112 on the substrate 101 and the orthographic projection of the first finger strip 1211 on the substrate 101 is greater than or equal to zero. That is, the orthographic projection of the second piezoelectric part 112 on the substrate 101 and the orthographic projection of the first finger strip 1211 on the substrate 101 do not overlap.

[0132] The orthographic projection is the projection along the stacking direction of the substrate 101 and the piezoelectric layer 110. For example, the orthographic projection of the second piezoelectric part 112 on the substrate 101 is the projection of the second piezoelectric part 112 on the substrate 101 along the stacking direction of the substrate 101 and the piezoelectric layer 110, the orthographic projection of the first finger 1211 on the substrate 101 is the projection of the first finger 1211 on the substrate 101 along the stacking direction of the substrate 101 and the piezoelectric layer 110, and the orthographic projection of the second finger 1221 on the substrate 101 is the projection of the second finger 1221 on the substrate 101 along the stacking direction of the substrate 101 and the piezoelectric layer 110.

[0133] In this embodiment of the application, a first groove 113 is provided between the first piezoelectric part 111 and the second piezoelectric part 112, so that there is a gap between the first piezoelectric part 111 and the second piezoelectric part 112, thereby blocking the propagation path of the bulk sound wave from the first piezoelectric part 111 to the second piezoelectric part 112, which helps to prevent the leakage of the bulk sound wave.

[0134] like Figure 2 As shown, in one embodiment of this application, the first finger electrode 121 further includes a first busbar 1212, which is electrically connected to the first finger bar 1211. The extension direction of the first busbar 1212 intersects the extension direction of the first finger bar 1211. The second finger electrode 122 further includes a second busbar 1222, which is electrically connected to the second finger bar 1221. The extension direction of the second busbar 1222 intersects the extension direction of the second finger bar 1221. Here, the extension direction refers to extension along the length direction. For example, the first busbar 1212 is perpendicular to the first finger bar 1211, and the second busbar 1222 is perpendicular to the second finger bar 1221. The first busbar 1212 and the second busbar 1222 are parallel.

[0135] like Figure 2 As shown, along the stacking direction of the substrate 101 and the piezoelectric layer 110, the second piezoelectric portion 112 overlaps with the first busbar 1212, and the second piezoelectric portion 122 overlaps with the second busbar 1222. In one possible implementation, the piezoelectric layer 110 includes a second piezoelectric portion 112a and a second piezoelectric portion 112b. Specifically, along the stacking direction of the substrate 101 and the piezoelectric layer 110, the second piezoelectric portion 112a overlaps with the first busbar 1212, and the second piezoelectric portion 112b overlaps with the second busbar 1222.

[0136] The piezoelectric layer 110 includes a plurality of first trenches 113, the plurality of first trenches 113 including first sub-trenches 113a and / or second sub-trenches 113b.

[0137] In one possible implementation, when the plurality of first trenches 113 include first sub-trenches 113a, the projection of the first sub-trench 113a along the stacking direction Z of the substrate 101 and the piezoelectric layer 110 is a first projection, the projection of the first finger strip 1211 along the stacking direction Z of the substrate and the piezoelectric layer is a second projection, and the projection of the second busbar 1222 along the stacking direction Z of the substrate and the piezoelectric layer is a third projection. Along the first direction X, the first projection is located between the second projection and the third projection.

[0138] In this implementation, the first projection being located between the second and third projections means that the first piezoelectric portion 111 and the second piezoelectric portion 112 located on the side of the first finger strip 1211 facing the substrate 101 are separated by the first sub-groove 113a, thereby helping to reduce the leakage of bulk acoustic waves.

[0139] In one possible implementation, along the first direction X, the length of the first sub-groove 113a is a first length d1, and the distance between the side of the first finger strip 1211 facing the second busbar 1222 and the side of the second busbar 1222 facing the first finger strip 1211 is a first distance D1. The first length d1 and the first distance D1 are correspondingly equal. The correspondence between the first length and the first distance can be understood as follows: there is a point a1 on the side of the first finger strip 1211 facing the second busbar, and there is a point a2 on the side of the second busbar 1222 facing the first finger strip 1211. The line connecting a1 and a2 is parallel to the first direction X, and the distance between a1 and a2 is the first distance. There is a point A1 on the side of the first sub-groove 113a near the first finger strip 1211, i.e., there is a point A1 on the side of the first piezoelectric part 111 facing the second piezoelectric part 112. Point A2 exists on the side of the first sub-groove 113a away from the first finger strip 1211, that is, point A2 exists on the side of the second piezoelectric part 112 facing the first piezoelectric part 111. The connection line between A1 and a1 is parallel to the stacking direction Z of the substrate 101 and the piezoelectric layer 110, the connection line between A1 and A2 is parallel to the first direction X, and the distance between A1 and A2 is a first length d1, which is equal to the first length D1.

[0140] like Figure 2 As shown, in one possible implementation, when the plurality of first trenches 113 include second sub-trenches 113b, the projection of the second sub-trench 113b along the stacking direction Z of the substrate 101 and the piezoelectric layer 110 is a fourth projection, the projection of the second finger 1221 along the stacking direction Z of the substrate 101 and the piezoelectric layer 110 is a fifth projection, and the projection of the first busbar 1212 along the stacking direction of the substrate 101 and the piezoelectric layer 110 is a sixth projection. Along the first direction X, the fourth projection is located between the fifth and sixth projections.

[0141] In this implementation, the fourth projection being located between the fifth and sixth projections means that the first piezoelectric portion 111 and the second piezoelectric portion 112 located on the side of the second finger strip 1221 facing the substrate 101 are separated by the second sub-groove 113b, thereby facilitating the reduction of bulk acoustic wave leakage.

[0142] In one possible implementation, along the first direction X, the length of the second sub-groove 113b is a second length d2, and the distance between the side of the second finger strip 1221 facing the first busbar 1212 and the side of the first busbar facing the second finger strip 1221 is a second distance D2. The second length d2 and the second distance D2 are correspondingly equal. This correspondence can be referenced to the correspondence in the aforementioned embodiments, and will not be repeated here.

[0143] In this embodiment, the first piezoelectric part 111 located on the side of the first finger strip 1211 (or the second finger strip 1221) facing the substrate and the second piezoelectric part 112 located on the side of the second busbar 1222 (or the first busbar 1212) facing the substrate 101 are both first grooves, so that the first length is maximized, thereby better preventing the leakage of bulk acoustic waves.

[0144] like Figure 3 As shown, in one embodiment of this application, along the stacking direction Z of the substrate 101 and the piezoelectric layer 110, the first trench 113 penetrates the piezoelectric layer 110.

[0145] In this embodiment, the first trench 113 completely penetrates the piezoelectric layer 110, directly separating the first piezoelectric part 111 and the second piezoelectric part 112 on the piezoelectric layer, thereby effectively preventing the leakage of bulk acoustic waves during the resonance process.

[0146] like Figure 4 As shown, in one embodiment of this application, along the stacking direction Z of the substrate 101 and the piezoelectric layer 110, the thickness of the first trench 113 is less than the thickness of the piezoelectric layer 110. The thickness of the piezoelectric layer 110 can refer to the maximum height of the piezoelectric layer 110 along the stacking direction Z of the substrate 101 and the piezoelectric layer 110.

[0147] In this embodiment, the thickness of the first trench 113 in the Z direction is less than the thickness of the piezoelectric layer 110 in the Z direction, which can reduce the difficulty of the process and improve the yield of the finished product. At the same time, the fact that the thickness of the first trench 113 is less than the thickness of the piezoelectric layer 110 means that the first piezoelectric layer includes the bottom of the first trench 113, that is, there is a piezoelectric layer 110 between the first trench 113 and the substrate 101 or the lower electrode, thereby providing protection for the substrate 101 or the lower electrode.

[0148] In one possible implementation, along the stacking direction Z of the substrate 101 and the piezoelectric layer 110, the thickness d of the first trench 113 satisfies: d = kD, where k is a coefficient and D is the thickness of the piezoelectric layer 110. The value of k is greater than or equal to 0.5 and less than or equal to 0.7. For example, d = 0.55D.

[0149] In this implementation, the thickness d of the first groove 113 satisfies the above conditions, which can effectively prevent bulk acoustic wave leakage and ensure the product yield.

[0150] like Figure 4 and 5As shown, in one embodiment of this application, the first finger electrode 121 further includes a first busbar 1212, which is electrically connected to the first finger bar 1211. The extension direction of the first busbar 1212 intersects the extension direction of the first finger bar 1211; for example, the first busbar 1212 is perpendicular to the first finger bar 1211. The second finger electrode 122 further includes a second busbar 1222, which is electrically connected to the second finger bar 1221. The extension direction of the second busbar 1222 intersects the extension direction of the second finger bar 1221; for example, the extension direction of the second busbar 1222 is perpendicular to the extension direction of the second finger bar 1221.

[0151] The piezoelectric layer 110 includes a third piezoelectric portion 114. Along the first direction X, a second piezoelectric portion 112 is located between the first piezoelectric portion 111 and the third piezoelectric portion 114. Along the stacking direction Z of the substrate 101 and the piezoelectric layer 110, the third piezoelectric portion 114 overlaps with the first busbar 1212 and with the second busbar 1222. Along the stacking direction Z of the substrate 101 and the piezoelectric layer 110, the distance between the projections of the second piezoelectric portion 112 and the third piezoelectric portion 114 is zero. That is, the second piezoelectric portion 112 and the third piezoelectric portion 114 are connected. For example, the second piezoelectric portion 112 and the third piezoelectric portion 114 are an integral structure. Figure 4 and Figure 5 The difference lies in the end face area of ​​the second piezoelectric part 112. The different end face areas of the second piezoelectric part 112 can alter the difficulty of the manufacturing process. For example, Figure 5 The end face area of ​​the second piezoelectric part 112 is greater than Figure 4 The end face area of ​​the second piezoelectric part 112 in the middle is then Figure 5 For etching processes where the precision requirements for the mask are relatively low, therefore Figure 5 The process is relatively simple.

[0152] In this embodiment, the second piezoelectric part 112 and the third piezoelectric part 114 are integrated into one structure, which can help reduce the alignment accuracy in the production process, thereby reducing the difficulty of the process.

[0153] like Figure 6As shown, in one embodiment of this application, the first electrode layer 120 further includes a pseudo-finger electrode 123 and a first spacer groove 124. The pseudo-finger electrode 123 and its corresponding finger strip are arranged along the first direction X, and the pseudo-finger electrode 123 and its corresponding finger strip do not form an intercalation structure. The first spacer groove 124 is located on the side of the first trench 113 facing the first electrode layer 120, and the first spacer groove 124 communicates with the first trench 113. The first spacer 124 is used to isolate and separate the pseudo-finger electrode 123 from its corresponding finger strip. The finger strip corresponding to the pseudo-finger electrode 123 is either the first finger strip 1211 or the second finger strip 1221. The finger strip corresponding to the pseudo-finger electrode 123 refers to the finger strip arranged along the first direction X with the pseudo-finger electrode 123. The first spacer groove 124 is along the stacking direction Z of the substrate 101 and the piezoelectric layer 110, the second piezoelectric portion 112 overlaps with the pseudo-finger electrode 123 at least partially, and the first spacer groove 124 penetrates the first electrode layer 120. The first spacer 124 separates the dummy finger electrode from the corresponding finger strip, and the second piezoelectric part overlaps at least partially with the dummy finger electrode 123, thereby helping to avoid the generation of bulk acoustic wave parasites in the second piezoelectric part.

[0154] like Figure 7 As shown, in one possible implementation, the second piezoelectric part 112 overlaps with the pseudo-finger electrode 123.

[0155] like Figure 8 or Figure 9 As shown, in one possible implementation, the second piezoelectric part 112 partially overlaps with the pseudo-finger electrode 123.

[0156] In this embodiment, the pseudo-finger electrode 123 and the corresponding finger strip are separated by a first spacer groove 124, and the space between them is connected to the first trench 113. For example, in one possible implementation, along the Z direction of the stacking of the substrate 101 and the piezoelectric layer 110, the projection of the first spacer groove 124 coincides with the projection of the first trench 113.

[0157] In this embodiment, the first spacer 124 is connected to the first groove 113, which facilitates the first spacer 124 and the first groove 113 to be manufactured in the same process, thereby simplifying the process flow and reducing the process cost.

[0158] like Figure 7 or Figure 8As shown, in one embodiment of this application, the first electrode layer 120 includes a first pseudo-finger electrode 123a and / or a second pseudo-finger electrode 123b. The first insert electrode 121 further includes a first busbar 1212, which is electrically connected to the first finger bar 1211. The second insert electrode 122 further includes a second busbar 1222, which is electrically connected to the second finger bar 1221. The extension direction of the first busbar 1212 intersects the extension direction of the first finger bar 1211; for example, the first busbar 1212 is perpendicular to the first finger bar 1211. The extension direction of the second busbar 1222 intersects the extension direction of the second finger bar 1221; for example, the extension direction of the second busbar 1222 is perpendicular to the extension direction of the second finger bar 1221.

[0159] like Figure 7 or Figure 8 As shown, when the first electrode layer 120 includes a first pseudo-finger electrode 123a, the first busbar 1212 is electrically connected to the first pseudo-finger electrode 123a. For example, the first busbar 1212 and the first pseudo-finger electrode 123a are an integral structure. The first pseudo-finger electrode 123a and the second finger bar 1221 are arranged along a first direction X. And along the arrangement direction Y of the first finger bar 1211 and the second finger bar 1221, the projection of the first pseudo-finger electrode 123a is located outside the projection of the second finger bar 1221.

[0160] like Figure 7 or Figure 8 As shown, when the first electrode layer 120 includes a second pseudo-finger electrode 123b, the second busbar 1222 is electrically connected to the second pseudo-finger electrode 123b; for example, the second busbar 1222 and the first pseudo-finger electrode 123b are integrally formed. The second pseudo-finger electrode 123b and the first finger bar 1212 are arranged along the first direction X. Furthermore, along the arrangement direction of the first finger bar 1211 and the second finger bar 1221, the projection of the second pseudo-finger electrode 123b is located outside the projection of the first finger bar 1212.

[0161] The first electrode layer also includes a first spacer groove 124. Along a first direction, the first spacer groove 124 is included between the first pseudo-finger electrode 123a and the second finger strip 1222, and / or the first spacer groove 124 is included between the second pseudo-finger electrode 123b and the first finger strip 1212. The first trench 113 communicates with the first spacer groove 124. Along the stacking direction of the substrate 101 and the piezoelectric layer 110, the projection of the first trench overlaps with the projection of the first spacer groove; for example, they coincide.

[0162] In this embodiment, the first spacer 124 and the first trench 113 are connected, which can reduce the process flow and cost, and the mask of the prior product can be used to realize the preparation of the first spacer 124 and the first trench 113, thus saving costs to the greatest extent.

[0163] like Figure 6 As shown, in one embodiment of this application, the first finger electrode 121 further includes a first busbar 1212, which is electrically connected to the first finger bar 1211. The second finger electrode 122 further includes a second busbar 1222, which is electrically connected to the second finger bar 1221. The extending direction of the first busbar 1212 intersects the extending direction of the first finger bar 1211; for example, the first busbar 1212 is perpendicular to the first finger bar 1211. The extending direction of the second busbar 1222 intersects the extending direction of the second finger bar 1221; for example, the extending direction of the second busbar 1222 is perpendicular to the extending direction of the second finger bar 1221.

[0164] The piezoelectric layer 110 also includes a second trench 115 and one or two third piezoelectric portions 114.

[0165] Along the first direction X, the second piezoelectric part 112 is located between the first piezoelectric part 111 and the third piezoelectric part 114, and the second groove 115 is located between the second piezoelectric part 112 and the third piezoelectric part 114.

[0166] When the piezoelectric layer includes a third piezoelectric part, along the stacking direction Z of the substrate 101 and the piezoelectric layer 110, the third piezoelectric part 114 overlaps with the first busbar 1212, or the third piezoelectric part 114 overlaps with the second busbar 1222.

[0167] When the piezoelectric layer includes two third piezoelectric parts, along the stacking direction Z of the substrate 101 and the piezoelectric layer 110, one of the two third piezoelectric parts 114 overlaps with the first busbar 1212, and the other of the two third piezoelectric parts 114 overlaps with the second busbar 1222.

[0168] For example, in one possible implementation, the number of second piezoelectric portions 114 and second trenches 115 in the piezoelectric layer 110 is the same. The piezoelectric layer includes two third piezoelectric portions, and the piezoelectric layer 110 includes a plurality of second piezoelectric portions 112, with a second trench 115 between each second piezoelectric portion 112 and its corresponding third piezoelectric portion 113. The third piezoelectric portion 113 corresponding to the second piezoelectric portion 112 refers to the third piezoelectric portion 114 that is closer to the second piezoelectric portion 112.

[0169] For example, in one possible implementation, the piezoelectric layer 110 includes a plurality of second piezoelectric portions 112, one of which is connected to a corresponding third piezoelectric portion 114, and the two are integrally formed. Another second piezoelectric portion 112 includes a second trench 115 between itself and the corresponding third piezoelectric portion 114. The second piezoelectric portion 112 and the corresponding third piezoelectric portion 114 are those that are closer in distance to the second piezoelectric portion 112.

[0170] In one embodiment of this application, the piezoelectric layer 110 includes a third piezoelectric portion 114 and at least two second piezoelectric portions 112. Along the stacking direction Z of the substrate 101 and the piezoelectric layer 110, one of the at least two second piezoelectric portions 112 overlaps with one of the first busbar 1212 and the second busbar 1222. Along the stacking direction Z of the substrate 101 and the piezoelectric layer 110, the third piezoelectric portion 114 overlaps with the other of the first busbar 1212 and the second busbar 1222. Another second piezoelectric portion 112 is included among the at least two second piezoelectric portions 112, and a second trench 115 is formed between the second piezoelectric portion 112 and the third piezoelectric portion 114.

[0171] like Figure 6 or Figure 9 As shown, in one embodiment of this application, the first finger electrode 121 further includes a first busbar 1212, which is electrically connected to the first finger bar 1211. The second finger electrode 122 further includes a second busbar 1222, which is electrically connected to the second finger bar 1221. The extending direction of the first busbar 1212 intersects the extending direction of the first finger bar 1211; for example, the first busbar 1212 is perpendicular to the first finger bar 1211. The extending direction of the second busbar 1222 intersects the extending direction of the second finger bar 1221; for example, the extending direction of the second busbar 1222 is perpendicular to the extending direction of the second finger bar 1221.

[0172] like Figure 6 or Figure 9 As shown, the first busbar 1212 is electrically insulated from the dummy finger electrode 123, and the second busbar 1222 is electrically insulated from the dummy finger electrode 123.

[0173] like Figure 6 or Figure 9As shown, in one possible implementation, the first electrode layer 120 further includes a second spacer groove 125. The second spacer groove 125 is located between the first busbar 1212 and the pseudo-finger electrode 123, and / or between the second busbar 1222 and the pseudo-finger electrode 123. The second spacer groove 125 penetrates the first electrode layer 120. The second spacer groove 125 communicates with the second trench 115. The second spacer groove 125 is located on the side of the second trench 115 facing the first electrode layer 120.

[0174] In one possible implementation, along the stacking direction Z of the substrate 101 and the piezoelectric layer 110, the projection of the second spacer 125 overlaps with the projection of the second trench 115; for example, they coincide.

[0175] In this embodiment, the first busbar 1212 is electrically insulated from the dummy finger electrode 123, and the second busbar 1222 is electrically insulated from the dummy finger electrode 123. Therefore, this embodiment enables the dummy finger electrode 123 to exist as an island, thereby effectively avoiding the parasitic presence of bulk acoustic waves and improving the characteristics of the resonator.

[0176] Combination Figure 10a and 10b In one embodiment of this application, the piezoelectric layer 110 includes a plurality of first piezoelectric portions 111. The plurality of first piezoelectric portions 111 includes a first sub-piezoelectric portion 111a and a second sub-piezoelectric portion 111b.

[0177] Along the stacking direction Z of the substrate 101 and the piezoelectric layer 110, the first finger 1211 overlaps with the first sub-piezoelectric portion 111a, and the second finger 1221 overlaps with the second sub-piezoelectric portion 111b. Along the stacking direction Z of the substrate 101 and the piezoelectric layer 110, the projection of the second finger 1221 is outside the projection of the first sub-piezoelectric portion 111a, and the projection of the first finger 1211 is outside the projection of the second sub-piezoelectric portion 111b.

[0178] The piezoelectric layer 110 also includes a third trench 116. Along the Y-direction of the arrangement of the first finger strip 1211 and the second finger strip 1221, the third trench 116 is located between the first sub-piezoelectric part 111a and the second sub-piezoelectric part 111b. The third trench 116 is connected to the first trench 113.

[0179] In this embodiment, a third groove is included between the first sub-piezoelectric part 111a and the second sub-piezoelectric part 111b to ensure high-frequency bulk acoustic wave resonance.

[0180] Combination Figure 10a and Figure 10cIn one embodiment of this application, along the arrangement direction Y of the first finger strip 1211 and the second finger strip 1221, the distance between the second piezoelectric portion 112 and the first piezoelectric portion 11 is greater than zero. In one possible implementation, the first piezoelectric portion further includes a fourth groove 117, located between the second piezoelectric portion 112 and the first piezoelectric portion 11 along the arrangement direction Y of the first finger strip 1211 and the second finger strip 1221, and communicating with the first groove 113. In one possible implementation, the fourth groove 117 communicates with the second groove 115.

[0181] Combination Figure 10a and 10d In one embodiment of this application, the resonator 100 further includes a second electrode layer 130. The second electrode layer 130 is located on the side of the piezoelectric layer 110 facing the substrate 101. In one possible implementation, the second electrode layer can be a sensing electrode, which may not receive electrical signals. The first finger strip 1211 includes a first non-intercalating portion 12111 and a first intercalating portion 12112, and the second finger strip 1221 includes a second non-intercalating portion 12211 and a second intercalating portion 12212. Along the arrangement direction Y of the first finger strip 1211 and the second finger strip 1221, the first intercalating portion 12112 and the second intercalating portion 12212 overlap. The distance between the projection of the first non-intercalating portion 12111 and the projection of the second finger strip 1221 is equal to zero, and the distance between the projection of the second non-intercalating portion 12211 and the projection of the first finger strip 1211 is equal to zero.

[0182] Combination Figure 10a and 10d The distance between the orthographic projection of the first non-intercalating portion 12111 on the substrate and the orthographic projection of the second electrode layer 130 on the substrate is greater than or equal to zero, and / or the distance between the orthographic projection of the second non-intercalating portion 12211 on the substrate and the orthographic projection of the second electrode layer 130 on the substrate is greater than or equal to zero. That is, along the stacking direction Z of the substrate 101 and the piezoelectric layer 110, the first non-intercalating portion 12111 and the second electrode layer 130 do not overlap, and / or along the stacking direction Z of the substrate 101 and the piezoelectric layer 110, the second non-intercalating portion 12211 and the second electrode layer 130 do not overlap.

[0183] In this embodiment, along the stacking direction Z of the substrate 101 and the piezoelectric layer 110, the first non-intercalating portion 12111 does not overlap with the second electrode layer 130, and / or the second non-intercalating portion 12211 does not overlap with the second electrode layer 130. This means that there is no parasitic capacitance between the first non-intercalating portion 12111 and the second electrode layer 130, or there is no parasitic capacitance between the second non-intercalating portion 12211 and the second electrode layer 130. This effectively ensures that parasitics are avoided during the operation of the resonator, thereby improving the operating characteristics of the resonator.

[0184] In one implementation of this application, the resonator 100 includes an effective region, with a first interleaving portion 12112 and a second interleaving portion 12212 located within the effective region, and a first non-interleaving portion 12111 and a second non-interleaving portion 12211 located outside the effective region. The second electrode layer 130 is located within the effective region.

[0185] In this embodiment, the second electrode layer 130 is located within the effective area to avoid parasitic capacitance between the non-interleaving portion (including the first non-interleaving portion 12111 and the second non-interleaving portion 12211) and the second electrode layer 130.

[0186] Combination Figure 11a and Figure 11b In one embodiment of this application, the resonator 100 further includes a second electrode layer 130. The second electrode layer 130 is located on the side of the piezoelectric layer 110 facing the substrate 101. In one possible implementation, the second electrode layer can be a sensing electrode, which may not receive electrical signals. The first finger strip 1211 includes a first non-intercalating portion 12111 and a first intercalating portion 12112, and the second finger strip 1221 includes a second non-intercalating portion 12211 and a second intercalating portion 12212. Along the arrangement direction Y of the first finger strip 1211 and the second finger strip 1221, the first intercalating portion 12112 and the second intercalating portion 12212 overlap. The distance between the projection of the first non-intercalating portion 12111 and the projection of the second finger strip 1221 is equal to zero, and the distance between the projection of the second non-intercalating portion 12211 and the projection of the first finger strip 1211 is equal to zero.

[0187] Along the stacking direction Z of the substrate 101 and the piezoelectric layer 110, the first non-intercalating portion 12111 overlaps with the second electrode layer 130. The overlapping area of ​​the first non-intercalating portion 12111 and the second electrode layer 130 is a first overlapping region, and the maximum width of the first overlapping region along the first direction is less than or equal to a first threshold. And / or, along the stacking direction of the substrate 101 and the piezoelectric layer 110, the second non-intercalating portion 12211 overlaps with the second electrode layer 130. The overlapping area of ​​the second non-intercalating portion 122111 and the second electrode layer 130 is a second overlapping region, and the maximum width of the second overlapping region along the first direction is less than or equal to a second threshold.

[0188] The first and second thresholds are related to the precision of the manufacturing process. Due to process limitations and unavoidable industrial errors, it is difficult to achieve 100% alignment between the second electrode layer 130 and the effective area. Therefore, overlap between the second electrode layer 130 and the area outside the effective area is unavoidable. However, the maximum width of the overlap area is within the threshold range, which can greatly reduce the parasitic capacitance between the fingers outside the effective area and the second electrode layer 130, thereby reducing the parasitic problem of bulk acoustic waves in the resonator.

[0189] In one possible implementation, the first threshold is a first manufacturing process error, which is related to at least one of the alignment error between the second electrode layer and the first region, the process error of the second electrode layer, and the process error of the first interdigitated electrode. The second threshold is a second manufacturing process error, which is related to at least one of the alignment error between the second electrode layer and the first region, the process error of the second electrode layer, and the process error of the second finger strip.

[0190] In one possible implementation, the second electrode layer 130 is located outside the effective region as a first portion, and the maximum width of the first portion along a first direction is less than or equal to the larger of a first threshold and a second threshold. For example, if the first threshold is greater than or equal to the second threshold, then the maximum width of the first portion along the first direction is less than or equal to the first threshold. Alternatively, if the first threshold is less than or equal to the second threshold, then the maximum width of the first portion along the first direction is less than or equal to the second threshold.

[0191] Combination Figure 10a and Figure 10d In one embodiment of this application, the first electrode layer 120 further includes a pseudo-finger electrode 123 and a first spacer groove 124. The first spacer groove 124 is located on the side of the first trench 113 facing the first electrode layer 120, and the first spacer groove 124 communicates with the first trench 113. Along the stacking direction Z of the substrate 101 and the piezoelectric layer 110, the second piezoelectric portion 112 and the pseudo-finger electrode 123 at least partially overlap, and the first spacer groove 124 penetrates the first electrode layer 120. The distance between the orthographic projection of the pseudo-finger electrode 123 on the substrate 101 and the orthographic projection of the second electrode layer 130 on the substrate is greater than or equal to zero. That is, along the stacking direction Z of the substrate 101 and the piezoelectric layer 110, the pseudo-finger electrode 123 and the second electrode layer 130 do not overlap.

[0192] In this embodiment, along the stacking direction Z of the substrate 101 and the piezoelectric layer 110, it is assumed that the electrode 123 and the second electrode layer 130 do not overlap, which can effectively avoid parasitic capacitance.

[0193] In one embodiment of this application, the first finger insertion electrode 121 further includes a first busbar 1212, which is electrically connected to the first finger strip 1211. The second finger insertion electrode 122 further includes a second busbar 1222, which is electrically connected to the second finger strip 1221. The first busbar 1212 is electrically insulated from the dummy finger electrode 123, and the second busbar 1222 is electrically insulated from the dummy finger electrode 123.

[0194] In one possible implementation, insulation between the dummy finger electrode and the first busbar / second busbar can be achieved through a second spacer 125 penetrating the first electrode layer. Specifically, the first electrode layer 120 further includes a second spacer 125 penetrating the first electrode layer 110; a second spacer 125 is included between the first busbar 1212 and the dummy finger electrode 123; and a second spacer 125 is included between the second busbar 1222 and the dummy finger electrode 123. The second spacer 125 communicates with the second trench 115.

[0195] Combination Figure 11a , 11b as well as Figure 11c In one embodiment of this application, the first electrode layer 120 further includes a pseudo-finger electrode 123 and a first spacer groove 124. The first spacer groove 124 is located on the side of the first trench 113 facing the first electrode layer 120, and the first spacer groove 124 communicates with the first trench 113. Along the stacking direction Z of the substrate 101 and the piezoelectric layer 110, the second piezoelectric portion 112 and the pseudo-finger electrode 123 at least partially overlap, and the first spacer groove 124 penetrates the first electrode layer 120.

[0196] The first interdigitating electrode 121 further includes a first busbar 1212, which is electrically connected to the first interdigitating electrode 1211. The second interdigitating electrode 122 further includes a second busbar 1222, which is electrically connected to the second interdigitating electrode 1221. The extension direction of the first busbar 1212 intersects the extension direction of the first interdigitating electrode 1211; for example, the first busbar 1212 is perpendicular to the first interdigitating electrode 1211. The extension direction of the second busbar 1222 intersects the extension direction of the second interdigitating electrode 1221; for example, the extension direction of the second busbar 1222 is perpendicular to the extension direction of the second interdigitating electrode 1221.

[0197] The first busbar 1212 is electrically insulated from the dummy finger electrode 123, and the second busbar 1222 is electrically insulated from the dummy finger electrode 123.

[0198] Along the stacking direction Z of the substrate 101 and the piezoelectric layer 110, it is assumed that the electrode 123 overlaps with the second electrode layer 130.

[0199] In this embodiment, since the first busbar 1212 and the pseudo-finger electrode 123 are electrically insulated, and the second busbar 1222 and the pseudo-finger electrode 123 are also electrically insulated, parasitic capacitance can be avoided even if the pseudo-finger electrode 123 overlaps with the second electrode layer 130 along the stacking direction Z of the substrate 101 and the piezoelectric layer 110. The fundamental reason is that the second electrode layer 130 can be a sensing layer, meaning it does not receive electrical signals, and the pseudo-finger electrode also does not receive electrical signals. Therefore, parasitic capacitance will not be generated even if they overlap. Furthermore, the overlap of the pseudo-finger electrode 123 and the second electrode layer 130 along the stacking direction Z of the substrate 101 and the piezoelectric layer 110 reduces the accuracy requirements for alignment during the manufacturing process, thereby reducing process difficulty and facilitating cost reduction.

[0200] In one possible implementation, the orthographic projection of the pseudo-finger electrode 123 onto the substrate 101 can be at least one of a circle and a polygon. The polygon includes squares, rectangles, hexagons, octagons, etc. For example, when the resonator includes multiple pseudo-finger electrodes, the multiple pseudo-finger electrodes 123 include a first pseudo-finger electrode and a second pseudo-finger electrode, wherein the orthographic projection of the first pseudo-finger electrode onto the substrate is a circle, and the orthographic projection of the second pseudo-finger electrode onto the substrate is a square.

[0201] In this embodiment, the dummy finger electrode 123 is spaced apart from both the busbar and the finger strip, making the dummy finger electrode 123 exist in an island-like form, thereby reducing the metal density in the region between the first and second busbars. Therefore, this embodiment can effectively reduce problems such as finger strip detachment caused by load issues during the etching process.

[0202] like Figure 11a As shown, along the first direction X, at least two dummy finger electrodes 123 are included between the first busbar 1212 and the second finger bar 1221. The dummy finger electrodes 123 are electrically insulated from the first busbar 1212 and the second finger bar 1221, respectively, and adjacent value electrodes 123 are electrically insulated from each other. And / or, along the first direction X, at least two dummy finger electrodes 123 are included between the second busbar 1222 and the first finger bar 1211. The dummy finger electrodes 123 are electrically insulated from the second busbar 1222 and the first finger bar 1211, respectively, and adjacent value electrodes 123 are electrically insulated from each other.

[0203] In one possible implementation, along a first direction X, a plurality of pseudo-finger electrodes 123 include a first pseudo-finger electrode 123a, a second pseudo-finger electrode 123b, and a third pseudo-finger electrode 123c, which are arranged sequentially along the first direction X. Along the first direction X, the distance between the first pseudo-finger electrode 123a and the second pseudo-finger electrode 123b is not equal to the distance between the second pseudo-finger electrode 123b and the third pseudo-finger electrode 123c.

[0204] The simulation effect diagram of the resonator provided in the embodiments of this application is as follows: Figure 11d As shown. (Through) Figure 11d It can be concluded that the resonator provided in this application embodiment can effectively reduce energy leakage to the left of the resonant frequency and in the lateral direction, and can improve the Q value to the left of the resonant point. Simultaneously, the resonator provided in this application embodiment can also effectively reduce parasitic effects in the overlapping area of ​​the pseudo-finger electrode and the lower electrode, thereby improving the Q value near the anti-resonant point.

[0205] Combination Figure 12a , Figure 12b , Figure 13a as well as Figure 13b This application also provides a resonator, including: a substrate 101, a piezoelectric layer 110, a first electrode layer 120, and a second electrode layer 130. The first electrode layer 120 is located on one side of the substrate 101, and the piezoelectric layer 110 is located on the side of the first electrode layer 120 facing the substrate 101. The second electrode layer 130 is located on the side of the piezoelectric layer 110 facing the substrate 101.

[0206] The first electrode layer 120 includes a first interdigitated electrode 121 and a second interdigitated electrode 122. The first interdigitated electrode 121 includes at least two first interdigitated strips 1211. The second interdigitated electrode 122 includes at least two second interdigitated strips 1221. The first interdigitated strips 1211 and the second interdigitated strips 1221 are arranged alternately, forming an interdigitated structure. One of the first interdigitated electrode 121 and the second interdigitated electrode 122 is an input electrode for connecting an input signal. The other of the first interdigitated electrode 121 and the second interdigitated electrode 122 is an output electrode for connecting an output signal. To improve energy conversion efficiency, in one possible implementation, the first interdigitated strips 1211 and the second interdigitated strips 1221 are arranged alternately in parallel.

[0207] The first finger strip 1211 includes a first non-intersecting portion 12111 and a first intersecting portion 12112, and the second finger strip 1221 includes a second non-intersecting portion 12211 and a second intersecting portion 12212. Along the arrangement direction Y of the first finger strip 1211 and the second finger strip 1221, the first intersecting portion 12112 and the second intersecting portion 12212 overlap. The distance between the projection of the first non-intersecting portion 12111 and the projection of the second finger strip 1221 is equal to zero, and the distance between the projection of the second non-intersecting portion 12211 and the projection of the first finger strip 1211 is equal to zero.

[0208] The distance between the orthographic projection of the first non-intercalating portion 12111 on the substrate and the orthographic projection of the second electrode layer 130 on the substrate is greater than or equal to zero, and / or the distance between the orthographic projection of the second non-intercalating portion 12211 on the substrate and the orthographic projection of the second electrode layer 130 on the substrate is greater than or equal to zero. That is, along the stacking direction Z of the substrate 101 and the piezoelectric layer 110, the first non-intercalating portion 12111 and the second electrode layer 130 do not overlap, and / or along the stacking direction Z of the substrate 101 and the piezoelectric layer 110, the second non-intercalating portion 12211 and the second electrode layer 130 do not overlap.

[0209] In this embodiment, along the stacking direction Z of the substrate 101 and the piezoelectric layer 110, the first non-intercalating portion 12111 does not overlap with the second electrode layer 130, and / or the second non-intercalating portion 12211 does not overlap with the second electrode layer 130. This means that there is no parasitic capacitance between the first non-intercalating portion 12111 and the second electrode layer 130, or there is no parasitic capacitance between the second non-intercalating portion 12211 and the second electrode layer 130. This effectively ensures that parasitics are avoided during the operation of the resonator, thereby improving the operating characteristics of the resonator.

[0210] This application embodiment also provides a resonator, including: a substrate 101, a piezoelectric layer 110, a first electrode layer 120, and a second electrode layer 130. The first electrode layer 120 is located on one side of the substrate 101, and the piezoelectric layer 110 is located on the side of the first electrode layer 120 facing the substrate 101. The second electrode layer 130 is located on the side of the piezoelectric layer 110 facing the substrate 101.

[0211] The first electrode layer 120 includes a first interdigitated electrode 121 and a second interdigitated electrode 122. The first interdigitated electrode 121 includes at least two first interdigitated strips 1211. The second interdigitated electrode 122 includes at least two second interdigitated strips 1221. The first interdigitated strips 1211 and the second interdigitated strips 1221 are arranged alternately, forming an interdigitated structure. One of the first interdigitated electrode 121 and the second interdigitated electrode 122 is an input electrode for connecting an input signal. The other of the first interdigitated electrode 121 and the second interdigitated electrode 122 is an output electrode for connecting an output signal. To improve energy conversion efficiency, in one possible implementation, the first interdigitated strips 1211 and the second interdigitated strips 1221 are arranged alternately in parallel.

[0212] The first finger strip 1211 includes a first non-intersecting portion 12111 and a first intersecting portion 12112, and the second finger strip 1221 includes a second non-intersecting portion 12211 and a second intersecting portion 12212. Along the arrangement direction Y of the first finger strip 1211 and the second finger strip 1221, the first intersecting portion 12112 and the second intersecting portion 12212 overlap. The distance between the projection of the first non-intersecting portion 12111 and the projection of the second finger strip 1221 is equal to zero, and the distance between the projection of the second non-intersecting portion 12211 and the projection of the first finger strip 1211 is equal to zero.

[0213] Along the stacking direction Z of the substrate 101 and the piezoelectric layer 110, the first non-intercalating portion 12111 overlaps with the second electrode layer 130. The overlapping area of ​​the first non-intercalating portion 12111 and the second electrode layer 130 is a first overlapping region, and the maximum width of the first overlapping region along the first direction is less than or equal to a first threshold. And / or, along the stacking direction of the substrate 101 and the piezoelectric layer 110, the second non-intercalating portion 12211 overlaps with the second electrode layer 130. The overlapping area of ​​the second non-intercalating portion 122111 and the second electrode layer 130 is a second overlapping region, and the maximum width of the second overlapping region along the first direction is less than or equal to a second threshold.

[0214] The first and second thresholds are related to the precision of the manufacturing process. Due to the limitations of imperfect manufacturing processes and the unavoidable industrial errors, it is difficult to achieve 100% alignment between the second electrode layer 130 and the effective area. Therefore, overlap between the second electrode layer 130 and the area outside the effective area is unavoidable. However, the maximum width of the overlap area is within the threshold range, which can greatly reduce the parasitic capacitance between the fingers outside the effective area and the second electrode layer 130, thereby reducing the parasitic problem of bulk acoustic waves in the resonator.

[0215] In one possible implementation, the first threshold is a first manufacturing process error, which is related to at least one of the alignment error between the second electrode layer and the first region, the process error of the second electrode layer, and the process error of the first interdigitated electrode. The second threshold is a second manufacturing process error, which is related to at least one of the alignment error between the second electrode layer and the first region, the process error of the second electrode layer, and the process error of the second finger strip.

[0216] Combination Figure 10a , Figure 10b and Figure 10d Or combination Figure 13a as well as Figure 13bIn one embodiment of this application, the first electrode layer 120 further includes a pseudo-finger electrode 123. Along the stacking direction Z of the substrate 101 and the piezoelectric layer 110, the projection of the pseudo-finger electrode 123 is outside the projection of the second electrode layer 130, that is, along the stacking direction Z of the substrate 101 and the piezoelectric layer 110, the pseudo-finger electrode 123 and the second electrode layer 130 do not overlap.

[0217] In this embodiment, along the stacking direction Z of the substrate 101 and the piezoelectric layer 110, it is assumed that the electrode 123 and the second electrode layer 130 do not overlap, which can effectively avoid parasitic capacitance.

[0218] in Figure 10a and Figure 13a The difference is that, Figure 10a The piezoelectric layer in the middle is patterned. Figure 13a The piezoelectric layer in the middle is not patterned.

[0219] Combination Figure 11a and Figure 11b Or combination Figure 14a and Figure 14b In one embodiment of this application, the first electrode layer 120 further includes a pseudo-finger electrode 123. The first insert finger electrode 121 further includes a first busbar 1212, which is electrically connected to the first finger strip 1211. The second insert finger electrode 122 further includes a second busbar 1222, which is electrically connected to the second finger strip 1221. The extension direction of the first busbar 1212 intersects the extension direction of the first finger strip 1211, for example, the first busbar 1212 is perpendicular to the first finger strip 1211. The extension direction of the second busbar 1222 intersects the extension direction of the second finger strip 1221, for example, the extension direction of the second busbar 1222 is perpendicular to the extension direction of the second finger strip 1221. The first busbar 1212 is electrically insulated from the pseudo-finger electrode 123, and the second busbar 1222 is electrically insulated from the pseudo-finger electrode 123.

[0220] Along the stacking direction Z of the substrate 101 and the piezoelectric layer 110, it is assumed that the electrode 123 overlaps with the second electrode layer 130.

[0221] In this embodiment, since the first busbar 1212 and the pseudo-finger electrode 123 are electrically insulated, and the second busbar 1222 and the pseudo-finger electrode 123 are also electrically insulated, parasitic capacitance can be avoided even if the pseudo-finger electrode 123 overlaps with the second electrode layer 130 along the stacking direction Z of the substrate 101 and the piezoelectric layer 110. The fundamental reason is that the second electrode layer 130 can be a sensing layer, meaning it does not receive electrical signals, and the pseudo-finger electrode also does not receive electrical signals. Therefore, parasitic capacitance will not be generated even if they overlap. Furthermore, the overlap of the pseudo-finger electrode 123 and the second electrode layer 130 along the stacking direction Z of the substrate 101 and the piezoelectric layer 110 reduces the accuracy requirements for alignment during the manufacturing process, thereby reducing process difficulty and facilitating cost reduction.

[0222] In one possible implementation, insulation between the dummy electrode and the first busbar / second busbar can be achieved through a second spacer 125 penetrating the first electrode layer. That is, the first electrode layer 120 further includes a second spacer 125, a second spacer 125 is included between the first busbar 1212 and the dummy electrode 123, and / or a second spacer 125 is included between the second busbar 1222 and the dummy electrode 123, the second spacer 125 penetrating the first electrode layer.

[0223] In the embodiments of this application, at least one of the first trench, second trench, third trench, fourth trench, and other trenches (e.g., spacer trenches) can be filled with gas or with a filler material, without limitation. When gas is filled, the internal voltage can be set based on actual needs. The gas filling can be air filling, protective gas filling (e.g., nitrogen), or inert gas filling, etc. For example, in one possible implementation, the first trench, second trench, third trench, fourth trench, and other trenches (e.g., spacer trenches) are all gas-filled.

[0224] In the embodiments of this application, the first electrode layer is made of a metal or other material. For example, the first electrode layer typically includes an adhesive layer, a conductive layer, etc. The first electrode layer includes a conductive layer made of a metal or metal alloy material, such as Cu (Cuprum), Au (Aurum), Ag (Argentum), Cr (Chromium), Mo (Molybdenum), etc., and conductive layers made of their alloys. Another example is that the first electrode layer includes a stack, such as Ti (Titanium) / Al (Aluminium), Ti (Titanium) / AlCu (Aluminium Cuprum). The piezoelectric layer includes at least one tangentially oriented piezoelectric material such as LiNbO3 (Lithium Niobate), LiTaO3 (Lithium Tantalate), AlN (Aluminum Nitride), ZnO (Zinc O), quartz, etc. The second electrode layer includes conductive layers made of materials such as Mo (Molybdenum), Al (Aluminum), and Cr (Chromium). The substrate can include structures such as SiC (Silicon Carbide), Si (Silicon), SiC (Silicon Carbide) and SiO2 (Silicon dioxide), polycrystalline silicon, and POI (Piezoelectric on Insulator).

[0225] like Figure 15 As shown in the embodiments of this application, a method for fabricating a resonator is also provided, comprising:

[0226] S110, Obtain the substrate.

[0227] The substrate provides a stage and support for the entire resonator. The substrate can be a finished product or it can be fabricated in-house. Therefore, obtaining the substrate in step S100 can be achieved by placing a finished substrate to the target location using a transmission or mobile device, or by generating the substrate using a manufacturing process.

[0228] S120, a lower electrode material layer is formed on the substrate, and the lower electrode material layer is patterned to obtain the lower electrode layer.

[0229] In step S120, a lower electrode material layer can be formed on the substrate using processes such as physical vapor deposition or chemical vapor deposition. Then, the lower electrode material layer is patterned using processes such as dry etching or wet etching to obtain the lower electrode layer.

[0230] S130, a piezoelectric layer is formed on a substrate on which a lower electrode layer is formed.

[0231] In step S130, a piezoelectric layer can be formed on the substrate on which the lower electrode layer is formed using a chemical vapor deposition process or an ink printing process.

[0232] S140, an upper electrode layer is formed on the piezoelectric layer, and the upper electrode layer is patterned to obtain a first interdigitated electrode and a second interdigitated electrode. The first interdigitated electrode includes at least two first interdigitated strips, and the second interdigitated electrode includes at least two second interdigitated strips.

[0233] In step S140, an upper electrode layer can be formed on the piezoelectric layer using processes such as physical vapor deposition or chemical vapor deposition. Then, the upper electrode layer is patterned using dry etching or wet etching to obtain the first interdigitated electrode and the second interdigitated electrode.

[0234] S150, the piezoelectric layer is patterned to obtain a first piezoelectric portion, a second piezoelectric portion, and a first trench. The first trench is located between the first and second piezoelectric portions along a first direction, which is perpendicular to the arrangement direction of the first and second fingers and also perpendicular to the stacking direction of the substrate and the piezoelectric layer. Along the stacking direction of the substrate and the piezoelectric layer, the first piezoelectric portion and the first finger at least partially overlap, and the first piezoelectric portion and the second finger at least partially overlap. Along the stacking direction of the substrate and the piezoelectric layer, the minimum distance between the projection of the second piezoelectric portion and the projection of the first finger is greater than zero, and the minimum distance between the projection of the second piezoelectric portion and the projection of the second finger is greater than zero.

[0235] In step S150, the piezoelectric layer is patterned using dry etching or wet etching to obtain a first piezoelectric part, a second piezoelectric part, and a first trench.

[0236] In one possible implementation, the patterning of the upper electrode layer and the patterning of the piezoelectric layer can be performed in the same process. That is, unwanted portions of both the upper electrode layer and the piezoelectric layer can be removed in a single step, thereby improving production efficiency.

[0237] In one possible implementation, steps S140 and S150 can be executed by performing step S140 first and then step S150.

[0238] In this embodiment, a first piezoelectric part and a second piezoelectric part, i.e. a first trench, are obtained by patterning the piezoelectric layer, thereby improving the parasitic problem of bulk acoustic waves in the resonator under high-frequency signals.

[0239] In this embodiment, a patterned upper electrode layer is obtained by patterning the upper electrode layer. The patterned upper electrode layer can be the first electrode layer provided in any of the foregoing embodiments. The patterned piezoelectric layer obtained by patterning the piezoelectric layer can be the piezoelectric layer provided in any of the foregoing embodiments.

[0240] like Figure 16 As shown in the embodiments of this application, a method for manufacturing a resonator is also provided, including:

[0241] S210, Obtain the substrate.

[0242] The substrate provides a stage and support for the entire resonator. The substrate can be a finished product or it can be fabricated in-house. Therefore, obtaining the substrate in step S100 can be achieved by placing a finished substrate to the target location using a transmission or mobile device, or by generating the substrate using a manufacturing process.

[0243] S220, a lower electrode material layer is formed on the substrate, and the lower electrode material layer is patterned to obtain the lower electrode layer.

[0244] In step S220, a lower electrode material layer can be formed on the substrate using processes such as physical vapor deposition or chemical vapor deposition. Then, the lower electrode material layer is patterned using processes such as dry etching or wet etching to obtain the lower electrode layer.

[0245] S230, a piezoelectric layer is formed on a substrate on which a lower electrode layer is formed.

[0246] In step S230, a piezoelectric layer can be formed on the substrate on which the lower electrode layer is formed using a chemical vapor deposition process or an ink printing process.

[0247] S240, an upper electrode layer is formed on the piezoelectric layer, and the upper electrode layer is patterned to obtain a first interdigitated electrode and a second interdigitated electrode. The first interdigitated electrode includes at least two first interdigitated strips, and the second interdigitated electrode includes at least two second interdigitated strips. The first interdigitated strip includes a first non-intercalating portion and a first intercalating portion, and the second interdigitated strip includes a second non-intercalating portion and a second intercalating portion. Along the arrangement direction Y of the first and second interdigitated strips, the first intercalating portion and the second intercalating portion overlap. The distance between the projection of the first non-intercalating portion and the projection of the second interdigitated strip is zero, and the distance between the projection of the second non-intercalating portion and the projection of the first interdigitated strip is zero.

[0248] In one possible implementation, the patterned upper electrode layer obtained by patterning the upper electrode layer satisfies the following conditions: the distance between the orthographic projection of the first non-intercalating portion on the substrate and the orthographic projection of the lower electrode layer on the substrate is greater than or equal to zero, and / or, the distance between the orthographic projection of the second non-intercalating portion on the substrate and the orthographic projection of the lower electrode layer on the substrate is greater than or equal to zero. That is, along the stacking direction Z of the substrate and the piezoelectric layer, the first non-intercalating portion does not overlap with the lower electrode layer, and / or along the stacking direction Z of the substrate and the piezoelectric layer, the second non-intercalating portion does not overlap with the lower electrode layer.

[0249] In one possible implementation, the patterned upper electrode layer obtained by patterning the upper electrode layer satisfies the following: along the stacking direction of the substrate and the piezoelectric layer, the overlapping region of the first non-intercalating portion and the second electrode layer is a first overlapping region, and the maximum width of the first region along the first direction is less than or equal to a first threshold; and / or, along the stacking direction of the substrate and the piezoelectric layer, the overlapping region of the second non-intercalating portion and the lower electrode layer is a second overlapping region, and the maximum width of the second overlapping region along the first direction is less than or equal to a second threshold. Wherein, the first threshold is the first threshold provided in the aforementioned embodiments, and the second threshold is the second threshold provided in the aforementioned embodiments.

[0250] In one possible implementation, the upper electrode layer at the patterned area obtained in S24O can be the first electrode layer provided in any of the foregoing embodiments. The lower electrode layer is the second electrode layer provided in any of the foregoing embodiments.

[0251] In this embodiment, a patterned upper electrode layer is obtained by patterning the upper electrode layer. The patterned upper electrode layer and the lower electrode layer do not overlap or the overlapping area is within a controllable range, which can effectively avoid the generation of parasitic capacitance, thereby avoiding the generation of parasitic bulk acoustic waves and ultimately improving the performance of the resonator.

[0252] This application also provides a filter, which includes the resonator provided in any of the foregoing embodiments, or the resonator prepared using the manufacturing method provided in any of the foregoing embodiments.

[0253] The filter provided in this application embodiment can effectively improve the problems of bulk acoustic wave parasitism and leakage in the field of high-frequency communication, thereby ensuring excellent working performance.

[0254] This application also provides a radio frequency chip, which includes the resonator provided in any of the foregoing embodiments, or the resonator prepared using the manufacturing method provided in any of the foregoing embodiments.

[0255] The radio frequency chip provided in this application embodiment can effectively improve the problems of parasitic and leakage bulk acoustic waves in the field of high-frequency communication, thereby improving energy utilization, reducing power consumption, and ensuring good working performance.

[0256] This application also provides a device that includes a resonator provided in any of the foregoing embodiments, or a resonator fabricated using the manufacturing method provided in any of the foregoing embodiments.

[0257] The device provided in the embodiments of this application can have excellent working performance in the field of high-frequency communication.

Claims

1. A resonator, characterized in that, include: substrate; A first electrode layer is located on one side of the substrate. The first electrode layer includes a first interdigitated electrode and a second interdigitated electrode. The first interdigitated electrode includes at least two first interdigitated strips, and the second interdigitated electrode includes at least two second interdigitated strips. A piezoelectric layer is located on the side of the first electrode layer facing the substrate, and the piezoelectric layer includes a first piezoelectric portion, a second piezoelectric portion, and a first trench; Along a first direction, the first trench is located between the first piezoelectric portion and the second piezoelectric portion. The first direction is perpendicular to the arrangement direction of the first finger strip and the second finger strip, and the first direction is perpendicular to the stacking direction of the substrate and the piezoelectric layer. Along the stacking direction of the substrate and the piezoelectric layer, the first piezoelectric portion and the first finger strip overlap at least partially, and the first piezoelectric portion and the second finger strip overlap at least partially. The minimum distance between the orthographic projection of the second piezoelectric portion on the substrate and the orthographic projection of the first finger strip on the substrate is greater than zero.

2. The resonator according to claim 1, characterized in that, The first interdigitated electrode further includes a first busbar, which is electrically connected to the first interdigitated electrode; The second interdigitated electrode further includes a second busbar, which is electrically connected to the second interdigitated electrode; Along the stacking direction of the substrate and the piezoelectric layer, the second piezoelectric portion overlaps with the first busbar, and the second piezoelectric portion overlaps with the second busbar; The piezoelectric layer includes a plurality of first trenches, the plurality of first trenches including first sub-trenches and / or second sub-trenches; Wherein, the projection of the first sub-groove along the stacking direction of the substrate and the piezoelectric layer is located between the projection of the first finger along the stacking direction of the substrate and the piezoelectric layer and the projection of the second busbar along the stacking direction of the substrate and the piezoelectric layer; Along the first direction, the projection of the second sub-groove along the stacking direction of the substrate and the piezoelectric layer is located between the projection of the second finger along the stacking direction of the substrate and the piezoelectric layer and the projection of the first busbar along the stacking direction of the substrate and the piezoelectric layer.

3. The resonator according to claim 1, characterized in that, The first interdigitated electrode further includes a first busbar, which is electrically connected to the first interdigitated electrode; The second interdigitated electrode further includes a second busbar, which is electrically connected to the second interdigitated electrode; The piezoelectric layer includes a third piezoelectric portion; along the first direction, the second piezoelectric portion is located between the first piezoelectric portion and the third piezoelectric portion; along the stacking direction of the substrate and the piezoelectric layer, the third piezoelectric portion overlaps with the first busbar, the third piezoelectric portion overlaps with the second busbar, and the distance between the projection of the second piezoelectric portion and the projection of the third piezoelectric portion is equal to zero.

4. The resonator according to claim 1, characterized in that, The first interdigitated electrode further includes a first busbar, which is electrically connected to the first interdigitated electrode; The second interdigitated electrode further includes a second busbar, which is electrically connected to the second interdigitated electrode; The piezoelectric layer further includes one or two third piezoelectric portions and a second trench; along the stacking direction of the substrate and the piezoelectric layer, the third piezoelectric portion overlaps with the first busbar, and / or the third piezoelectric portion overlaps with the second busbar; along the first direction, the second piezoelectric portion is located between the first piezoelectric portion and the third piezoelectric portion, and the second trench is located between the second piezoelectric portion and the third piezoelectric portion.

5. The resonator according to claim 1, characterized in that, Along the stacking direction of the substrate and the piezoelectric layer, the first trench penetrates the piezoelectric layer.

6. The resonator according to claim 1, characterized in that, Along the stacking direction of the substrate and the piezoelectric layer, the thickness of the first trench is less than the thickness of the piezoelectric layer.

7. The resonator according to claim 1, characterized in that, The first electrode layer further includes a pseudo-finger electrode and a first spacer groove; the first spacer groove is located on the side of the first trench facing the first electrode layer, and the first spacer groove communicates with the first trench; along the stacking direction of the substrate and the piezoelectric layer, the second piezoelectric portion overlaps at least partially with the pseudo-finger electrode, and the first spacer groove penetrates the first electrode layer.

8. The resonator according to claim 7, characterized in that, The first interdigitated electrode further includes a first busbar, and the second interdigitated electrode further includes a second busbar; The first busbar is electrically connected to the first finger bar, and the second busbar is electrically connected to the second finger bar; The first busbar is electrically insulated from the dummy finger electrode, and the second busbar is electrically insulated from the dummy finger electrode.

9. The resonator according to claim 1, characterized in that, The piezoelectric layer includes multiple first piezoelectric units; The plurality of first piezoelectric parts include a first sub-piezoelectric part and a second sub-piezoelectric part; Wherein, along the stacking direction of the substrate and the piezoelectric layer, the first finger overlaps with the first sub-piezoelectric part, the projection of the second finger is outside the projection of the first sub-piezoelectric part, the second finger overlaps with the second sub-piezoelectric part, and the projection of the first finger is outside the projection of the second sub-piezoelectric part; The piezoelectric layer further includes a third trench; along the arrangement direction of the first and second fingers, the third trench is located between the first sub-piezoelectric part and the second sub-piezoelectric part; the third trench is connected to the first trench.

10. The resonator according to claim 1, characterized in that, Also includes: The second electrode layer is located on the side of the piezoelectric layer facing the substrate; The first finger strip includes a first non-intersecting portion and a first intersecting portion, and the second finger strip includes a second non-intersecting portion and a second intersecting portion. Along the arrangement direction of the first finger strip and the second finger strip, the first intersecting portion and the second intersecting portion overlap. The distance between the projection of the first non-intersecting portion and the projection of the second finger strip is equal to zero, and the distance between the projection of the second non-intersecting portion and the projection of the first finger strip is equal to zero. The distance between the orthographic projection of the first non-intercalating portion on the substrate and the orthographic projection of the second electrode layer on the substrate is greater than or equal to zero, and / or the distance between the orthographic projection of the second non-intercalating portion on the substrate and the orthographic projection of the second electrode layer on the substrate is greater than or equal to zero; or, Along the stacking direction of the substrate and the piezoelectric layer, the overlapping area of ​​the first non-intercalating portion and the second electrode layer is a first overlapping area, and the maximum width of the first overlapping area along the first direction is less than or equal to a first threshold. And / or, along the stacking direction of the substrate and the piezoelectric layer, the overlapping area of ​​the second non-intercalating portion and the second electrode layer is a second overlapping area, and the maximum width of the second overlapping area along the first direction is less than or equal to a second threshold.

11. The resonator according to claim 10, characterized in that, The first electrode layer further includes a pseudo-finger electrode and a first spacer groove; the first spacer groove is located on the side of the first trench facing the first electrode layer, and the first spacer groove communicates with the first trench; along the stacking direction of the substrate and the piezoelectric layer, the second piezoelectric portion overlaps at least partially with the pseudo-finger electrode, and the first spacer groove penetrates the first electrode layer; the distance between the orthographic projection of the pseudo-finger electrode on the substrate and the orthographic projection of the second electrode layer on the substrate is greater than or equal to zero.

12. The resonator according to claim 10, characterized in that, The first electrode layer further includes a pseudo-finger electrode and a first spacer groove; the first spacer groove is located on the side of the first trench facing the first electrode layer, and the first spacer groove communicates with the first trench; along the stacking direction of the substrate and the piezoelectric layer, the second piezoelectric portion at least partially overlaps with the pseudo-finger electrode, and the first spacer groove penetrates the first electrode layer; The first interdigitated electrode further includes a first busbar, which is electrically connected to the first interdigitated electrode; The second interdigitated electrode further includes a second busbar, which is electrically connected to the second interdigitated electrode; The first busbar is electrically insulated from the dummy finger electrode, and the second busbar is electrically insulated from the dummy finger electrode; Along the stacking direction of the substrate and the piezoelectric layer, the pseudo-finger electrode overlaps with the second electrode layer.

13. A resonator, characterized in that, include: substrate; A first electrode layer is located on one side of the substrate. The first electrode layer includes a first interdigitated electrode and a second interdigitated electrode. The first interdigitated electrode includes at least two first interdigitated strips, and the second interdigitated electrode includes at least two second interdigitated strips. A piezoelectric layer is located on the side of the first electrode layer facing the substrate; The second electrode layer is located on the side of the piezoelectric layer facing the substrate; The first finger strip includes a first non-intersecting portion and a first intersecting portion, and the second finger strip includes a second non-intersecting portion and a second intersecting portion. Along the arrangement direction of the first finger strip and the second finger strip, the first intersecting portion and the second intersecting portion overlap. The distance between the projection of the first non-intersecting portion and the projection of the second finger strip is equal to zero, and the distance between the projection of the second non-intersecting portion and the projection of the first finger strip is equal to zero. The distance between the orthographic projection of the first non-intercalating portion on the substrate and the orthographic projection of the second electrode layer on the substrate is greater than or equal to zero, and / or the distance between the orthographic projection of the second non-intercalating portion on the substrate and the orthographic projection of the second electrode layer on the substrate is greater than or equal to zero; or, Along the stacking direction of the substrate and the piezoelectric layer, the overlapping area of ​​the first non-intercalating portion and the second electrode layer is a first overlapping area, and the maximum width of the first area along the first direction is less than or equal to a first threshold. And / or, along the stacking direction of the substrate and the piezoelectric layer, the overlapping area of ​​the second non-intercalating portion and the second electrode layer is a second overlapping area, and the maximum width of the second overlapping area along the first direction is less than or equal to a second threshold.

14. The resonator according to claim 13, characterized in that, The first threshold is the first manufacturing process error, and the first manufacturing process error is related to at least one of the alignment error between the second electrode layer and the first region, the process error of the second electrode layer, and the process error of the first interdigitated electrode. The second threshold is the second manufacturing process error, which is related to at least one of the alignment error between the second electrode layer and the first region, the process error of the second electrode layer, and the process error of the second finger strip.

15. The resonator according to claim 13, characterized in that, The first electrode layer further includes a pseudo-finger electrode; along the stacking direction of the substrate and the piezoelectric layer, the projection of the pseudo-finger electrode is located outside the projection of the second electrode layer.

16. The resonator according to claim 13, characterized in that, The first electrode layer also includes dummy finger electrodes; The first interdigitated electrode further includes a first busbar, which is electrically connected to the first interdigitated electrode; The second interdigitated electrode further includes a second busbar, which is electrically connected to the second interdigitated electrode; The first busbar is electrically insulated from the dummy finger electrode, and the second busbar is electrically insulated from the dummy finger electrode; Along the stacking direction of the substrate and the piezoelectric layer, the pseudo-finger electrode overlaps with the second electrode layer.

17. A method for fabricating a resonator, characterized in that, include: Obtain the substrate; A lower electrode material layer is formed on the substrate, and the lower electrode material layer is patterned to obtain the lower electrode layer. A piezoelectric layer is formed on a substrate on which the lower electrode layer is formed; An upper electrode layer is formed on the piezoelectric layer, and the upper electrode layer is patterned to obtain a first interdigitated electrode and a second interdigitated electrode. The first interdigitated electrode includes at least two first interdigitated strips, and the second interdigitated electrode includes at least two second interdigitated strips. A piezoelectric layer is patterned to obtain a first piezoelectric portion, a second piezoelectric portion, and a first trench; wherein, along a first direction, the first trench is located between the first piezoelectric portion and the second piezoelectric portion, the first direction being perpendicular to the arrangement direction of the first and second fingers, and the first direction being perpendicular to the stacking direction of the substrate and the piezoelectric layer; along the stacking direction of the substrate and the piezoelectric layer, the first piezoelectric portion and the first finger overlap at least partially, and the first piezoelectric portion and the second finger overlap at least partially. Along the stacking direction of the substrate and the piezoelectric layer, the minimum distance between the projection of the second piezoelectric part and the projection of the first finger strip is greater than zero.

18. A filter, characterized in that, Includes the resonator according to any one of claims 1-16.

19. A radio frequency chip, characterized in that, Includes the resonator according to any one of claims 1-16.

20. A device, characterized in that, Includes the resonator according to any one of claims 1-16.

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