Pressure sensor and sensor
By using a Wheatstone bridge and chopper signal mixing technology in the sensor system, combined with a low-pass filter and a hold circuit, the problems of insufficient signal-to-noise ratio and functional monitoring of the sensor system during operation are solved, and real-time and reliable sensor function detection is achieved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- ELMOS SEMICON AG
- Filing Date
- 2021-08-10
- Publication Date
- 2026-05-29
AI Technical Summary
In existing technologies, sensor systems need to be shut down during operation to check functionality, resulting in system unavailability and insufficient signal-to-noise ratio, which affects monitoring results.
Using a Wheatstone bridge as the sensor element, a signal path is designed to suppress 1/f noise through differential signal processing and chopping signal mixing, combined with a low-pass filter and a hold circuit. The reliability of the signal processing is ensured by testing the signal monitoring system.
This enables the reliable monitoring of sensor functions without shutting down the system, improves the signal-to-noise ratio, and ensures the real-time operation and accuracy of the sensor system.
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Figure CN122108445A_ABST
Abstract
Description
[0001] This application is a divisional application of patent application No. 202180058184.5, filed on August 10, 2021, entitled "Method for ISO26262 compliance assessment for pressure sensor signals". Technical Field
[0002] The present invention discloses a method, and related apparatus and method variations for monitoring a sensor system in operation using a sensor element (WB), particularly a piezoresistive Wheatstone bridge (WB) of a pressure sensor. Background Technology
[0003] Automotive applications typically employ a large number of safety-related sensors, and vehicle control systems must usually monitor these sensors during operation to ensure proper functioning. These sensors include, for example, pressure measuring devices in braking systems. Existing technology
[0004] Various chopper methods for improving the signal-to-noise ratio in amplifiers are known in the art. Here, a multiplier upstream of the amplifier multiplies the signal with a chopped signal having the chopper frequency, amplifies it, and then multiplies it again with the chopped signal. In this process, the multiplication amplifies the signal by both up-mixing and down-mixing. Since only the down-mixing portion is of interest, a low-pass filter suppresses signal components with the chopper frequency and all higher frequencies. This typically suppresses 1 / f noise in the amplifier stage.
[0005] This method, combined with sensor elements, results in a low-noise sensor system.
[0006] Therefore, this sensor system implements a method for operating a sensor system, wherein the sensor system has a sensor element that provides an input signal, the input signal having a time progression of its input signal value. This sensor system includes a signal path. At a first position in the signal path, the signal path includes an amplifier having an input terminal and an output terminal. The signal path begins with an input signal from the sensor element and ends with a first output signal of the sensor system. The value of the first output signal, or a value of a signal derived from the first output signal, represents a measured value. In a first step of the prior art method, at a second position in the signal path, the signal in the signal path is first mixed with a chopped signal. Here, the second position in the signal path is located between the input signal from the sensor element at the beginning of the signal path and the input terminal of the amplifier at the first position in the signal path. The chopped signal is typically single-frequency. As a next step, at a third position in the signal path, the signal is second mixed. The second mixing of the signal typically involves down-mixing the signal with the chopped signal to form a first demodulated signal. The third position in the signal path is located between the output terminal of the amplifier at the first position in the signal path and the first output signal of the sensor system at the end of the signal path. At the fourth position in the signal path, a first filtering is performed on the first demodulated signal or the signal derived from the first demodulated signal. The fourth position is located between the third position in the signal path and the output signal of the sensor system at the end of the signal path. The first filtering is performed by applying a first filtering function to the first demodulated signal or the signal derived from the first demodulated signal. The first filtering function describes the relationship between the time progression of the first demodulated signal or the signal derived from the first demodulated signal and the time progression of that signal immediately following the first filtering. The first output signal depends on the signal as a result of the first filtering, or the result of the first filtering.
[0007] The first filter function F1[] is selected so that the filtering result of the chopper signal Cs using the first filter function F1[] basically disappears, that is, F1[Cs]=0, and the filtering of the constant results in F1[1]=β1, where β1 is a real or complex value in the form of a constant.
[0008] The downside is that the control system typically has to shut down these sensor systems during operation to check their functionality. Summary of the Invention
[0009] Task
[0010] Therefore, the objective of this invention is to create a solution that does not have this disadvantage of the prior art and has further advantages.
[0011] Solution
[0012] To address this problem, this paper proposes a method for monitoring a sensor system in operation, wherein the sensor system has a sensor element WB that provides an input signal Si, the input signal Si having a time progression Si(t) of its input signal value. The sensor system has a signal path in which various device elements modify and evaluate the signal. At a first location on the signal path, the signal path includes an amplifier DV having an input and an output. The signal path begins with the input signal Si (i.e., the output signal of the sensor element WB). The signal path ends with a first output signal out1 of the sensor system. The value of the first output signal out1 of the sensor system, or the value of a signal derived from the first output signal (and, where necessary, by amplification, filtering, or other further processing), typically represents a measured value. As an exemplary first step, the proposed method includes performing a first mixing of the signal in the signal path with a chopped signal Cs at a second location on the signal path using a first mixer (e.g., a first multiplier M1), this second location typically differing from the first location where the amplifier DV is located. Therefore, preferably, the mixer or the first multiplier M1 is located at the second location on the signal path. Of course, it is also conceivable to perform this mixing in an amplifier DV by appropriately designing the amplifier DV, in which case, for example, the gain of the amplifier DV will depend on the chopping signal Cs. For this purpose, the amplifier DV may include a Gilbert multiplier as an amplifier stage. However, instead, it has generally proven useful to implement the signal path differentially and implement the first multiplier M1 as a switching switch that swaps the two signals of the differential signal in the signal path according to the chopping signal Cs. It is particularly useful to use a Wheatstone bridge as the sensor element WB, since it already provides the differential signal. The second position for performing the first mixing (e.g., the position of the first multiplier) is typically located in the signal path between the input signal Si (i.e., the output signal of the sensor element) at the beginning of the signal path and the input of the amplifier DV at the first position in the signal path. To ensure reliable suppression of 1 / f noise, the chopping signal Cs is preferably bandwidth-limited or single-frequency. This measure increases the frequency of the chopped signal Cs in the spectrum of the sensor output signal (i.e., the time progression Si(t) of the typically very low-frequency input signal Si). Therefore, subsequent amplifier, analog-to-digital converter, and filter stages only contaminate the frequency range of the frequency-enhanced input signal Si with white noise, thus improving the signal-to-noise ratio. To reuse the amplified, digitized sensor signal, the sensor system must reverse this process. For this purpose, the signal is typically second-mixed with the chopped signal Cs at a third position in the signal path via a second mixer (typically a second multiplier M2) to form the first demodulated signal DM1.Preferably, the third position in the signal path is located between the output of the amplifier DV, which is indeed located at the first position in the signal path, and the first output signal out1 of the sensor system, which is located at the end of the signal path. A first filter is applied to the first demodulated signal DM1 or the signal derived from the first demodulated signal at a fourth position in the signal path, located between the third position in the signal path and the output signal out1 of the sensor system, which is located at the end of the signal path. Typically, the first low-pass filter LP1 performs this first filter using a first filter function F1[]. Therefore, the first low-pass filter LP1 performs the first filter by applying the first filter function F1[] to the first demodulated signal DM1 or the signal derived from the first demodulated signal. Other filters besides the low-pass filter may be considered depending on the application. However, this paper assumes that the measurement value to be determined changes only slowly and unpredictably periodically, and therefore the DC component of the measurement value represents basic information. The first filter function F1[] describes the relationship between the time progression DM1(t) of the first demodulated signal DM1 or the signal derived from the first demodulated signal and the time progression of the signal immediately following the first filter. The first output signal out1 depends on the signal immediately following the first filtering performed using the first filtering function F1[]. However, the first output signal out1 can also be directly the result of the first filtering performed using the first filtering function F1[]. Now, in order to be able to monitor the signal processing device in the signal path at least to a large extent, contrary to the prior art, the sensor system feeds the test signal TSS into the signal path. After the modified test signal TSS passes through the signal path, the sensor system extracts the test signal again from the signal path. The sensor system then evaluates the re-extracted test signal. The first filtering function F1[] and the test signal TSS are preferably designed such that the first output signal out1 no longer contains any significant component of the test signal TSS. Therefore, in the sensor system, the first low-pass filter LP1 used to implement the first filtering function F1[] blocks the transmission of the signal component corresponding to the test signal TSS from its input to its output. In order to perform the injection and extraction of the test signal in the signal path, the proposed method includes additional steps. In particular, this includes adding the quadrature chopper signal Cs90 or the test signal TSS derived from the quadrature chopper signal to the signal in the signal path. This addition occurs at the fifth position in the signal path. Preferably, this fifth position is located between the input signal Si (i.e., the output signal of the sensor element WB) at the beginning of the signal path and the input of the amplifier DV at the first position in the signal path. The chopper signal Cs has a time progression Cs(t), and the quadrature chopper signal Cs90 similarly has a time progression Cs90(t). The time progression Cs(t) of the chopper signal Cs must satisfy certain conditions, which will be given below.As long as these conditions are met, the time progression of the chopper signal Cs can be chosen relatively freely. However, this paper suggests that the bandwidth of the chopper signal should not be too wide, otherwise it may affect the response time of the sensor system. The time progression Cs90(t) of the quadrature chopper signal Cs90 must also satisfy some, but narrower, conditions, which will also be given below. As long as these conditions are met, the time progression of the quadrature chopper signal Cs90 can be chosen relatively freely. However, this paper suggests that the bandwidth of the quadrature chopper signal Cs90 should not be too wide either, otherwise it may also affect the response time of the sensor system in some cases. Relative to the first filter function F1[], except for noise and similar signal errors, the time progression Cs90(t) of the quadrature chopper signal Cs90 at least sometimes essentially has the characteristic F1[Cs90(t)×Cs(t)]=0. This means that the quadrature chopper signal Cs90 is orthogonal to the chopper signal Cs at a generally predetermined time.
[0013] For the sake of explanation, assume that X(t) is the time progression of an arbitrary, undefined signal. As an example, assume that the first filter function F1[X] is the indefinite integral of the time progression of the exemplary signal X(t) over time. Therefore, assume that the following equation holds:
[0014]
[0015] Under these conditions, the following equation holds:
[0016]
[0017] In this example, the first filter function F1[] is the L2 product of the chopper signal Cs and the quadrature chopper signal Cs90. For information on the L2 product, see, for example, https: / / de.wikipedia.org / wiki / Lp-Raum#Der_Hilbertraum_L2, and refer to the section “Der Hilbertraum L²”. The L2 product is a scalar product over L². Another relevant article is Christopher R. Nerz’s lecture “Introduction to Differential Geometry”, S198, definition X.1.5, which can be found at the time of submission of this paper at https: / / www.math.uni-tuebingen.de / de / forschung / gadr / lehre / sose2015 / diffgeo.pdf. For example, it can be envisioned that the chopper signal Cs follows a time sine function, and the quadrature chopper signal Cs90 follows a time cosine function. In this case, it is clear that the condition F1[Cs90(t)xCs(t)]=0 is not always satisfied, but only at certain times. If the first low-pass filter LP1 performs the first filtering function, it is useful that the sensor system is designed such that a hold circuit is placed at the output of the first low-pass filter LP1. As long as the condition F1[Cs90(t)xCs(t)]=0 is satisfied, the hold circuit samples the current value of the first filtering function F1[] of the first low-pass filter LP1. The hold circuit then freezes this current value at its output until the condition F1[Cs90(t)xCs(t)]=0 is satisfied again. This sampling by the hold circuit transforms the indefinite integral of the example into a definite integral.
[0018]
[0019] Here, it is assumed that the chopper signal Cs and the quadrature chopper signal are relative to the common signal period T. p The periodic signal is defined as follows. When orthogonality actually exists (i.e., when the boundary conditions are met), this sampling of the filter output signal should also apply to the following filters and their filtering.
[0020] As a next step, a third mixing is performed. The third mixing mixes the first demodulated signal DM1, or a signal derived from the first demodulated signal, with the quadrature chopper signal CS90, or a signal derived from the quadrature chopper signal CS90. The third mixing generates a second demodulated signal DM2. In this third step, the second filter function F2[] typically further filters the second demodulated signal DM2, or the signal derived from the second demodulated signal, as a second filter to obtain the second output signal out2.
[0021] Typically, a second filter function F2[] is chosen such that the conditions F2[Cs(t)]=0, F2[Cs90(t)]=0, F2[Cs(t)×Cs90(t)]=0, and F2[1]=β2 are substantially true, where β2 is a real or complex value. Furthermore, a first filter function F1[] is typically chosen such that the conditions F1[Cs90(t)]=0, F1[Cs(t)]=0, F1[Cs(t)×Cs90(t)]=0, and F1[1]=β1 are substantially true, where β1 is a real or complex value. Preferably, the filter output signal of the second low-pass filter LP2 using the second filter function F2[] is always sampled when these conditions of the second filter function F2[] are satisfied. Similarly, the filter output signal of the first low-pass filter LP1 using the first filter function F1[] is always sampled when these conditions of the first filter function F1[] are satisfied. Therefore, preferably, the second output signal out2 consists of the sampled value of the sensor system sampling the output value of the second filter function F2[DM2] of the second low-pass filter LP2 when the condition of the second filter function F2[] is satisfied. Therefore, preferably, the first output signal out1 consists of the sampled value of the sensor system sampling the output value of the first filter function F1[DM1] of the first low-pass filter LP1 when the condition of the first filter function F1[] is satisfied.
[0022] To infer the correct function of a device component in the signal path, a first comparison is made between the value of the second output signal out2 or the value of a signal derived from the second output signal and a desired value interval. Furthermore, if the value of the second output signal out2 or the value of the signal derived from the second output signal is outside the desired value interval, a fault is inferred in the device component in the signal path.
[0023] It will be apparent to those skilled in the art that, where necessary, components of the signal path can be implemented in a signal processor and associated signal processor programs. When discussing a signal path herein, in the case of implementation as a program within a signal processor, spatial positioning becomes temporal positioning. Therefore, the position within the signal path is converted into processing time in the sequence of signal processing steps. Thus, even though the claimed subject matter of this invention suggests spatial positioning and arrangement from the description, these subject matters also include temporal positioning and sequence.
[0024] When necessary, the Dicke method for reducing white noise can be supplemented to the proposed method. The basic idea of the Dicke receiver is to compare the DUT placed in a noisy environment with an equivalent noise source.
[0025] Therefore, as a reference noise source, the example of the Wheatstone bridge WB here uses a second Wheatstone bridge (reference Wheatstone bridge RW), and the sensor system is preferably designed such that this reference Wheatstone bridge is identical, and thus its manufacturing method is generally the same. The reference Wheatstone bridge RW may, but preferably does not provide a measurement signal. For example, if the sensor element is a piezoresistive micromechanical pressure sensor, and the Wheatstone bridge with piezoresistive resistors is arranged on a diaphragm above the cavity, then the reference element RW can be a second pressure sensor with a second Wheatstone bridge having the exact same structure and preferably implemented on the same silicon crystal. In the subsequent embodiment, the sensor system generates a second output signal out2, which represents the difference between the output signal of the reference element (hereinafter referred to as the reference signal Rs) and the output signal of the sensor element (here, the input signal Si). When the sensor element WB and the reference element RW are identical, this second output signal out2 should be zero. However, due to manufacturing tolerances and slightly different, though close, operating parameters (e.g., temperature), as well as unavoidable system noise, the second output signal out2 will never actually be exactly zero. Instead, its value must be within the expected value interval that the sensor system can check. This is also true when the reference element cannot provide a measurement value. In the case of an exemplary micromechanical pressure sensor as the sensor element, for example, the reference element RW could also consist only of a reference Wheatstone bridge without a diaphragm and without a cavity, making the influence of pressure significantly smaller. In this example, the reference Wheatstone bridge is made identical (matched) to the Wheatstone bridge. In this example of a piezoresistive pressure sensor, the pressure sensor's Wheatstone bridge, its diaphragm and cavity, and the reference Wheatstone bridge are housed together on a common silicon crystal. In this exemplary case, the reference Wheatstone bridge and the Wheatstone bridge generate noise in the same way, making noise cancellation possible.
[0026] Therefore, the proposed noise reduction method includes, as a first step, providing a reference element RW that provides a reference signal Rs. For example, the reference element RW can be a reference Wheatstone bridge, as exemplified. Similar to the processing of the input signal Si in the signal path, corresponding processing of the reference signal Rs is performed in the reference signal path. Particularly important is that the reference signal path is designed to be identical to the signal path used to process the input signal Si. This means that the reference signal processing position in the reference signal path directly corresponds to the corresponding signal processing position in the signal path. If a device in the reference signal path performs processing at a certain position in the reference signal path, a corresponding device with the same design in the signal path performs the same processing on the signal in the same way. Therefore, the signal processing of the reference signal Rs in the reference signal path and the signal processing of the input signal Si in the signal path are initially spatially parallel processes, wherein the signal processing of the reference signal Rs in the reference signal path is performed in a manner as similar as possible to the signal processing of the input signal Si in the signal path.
[0027] Now, when necessary, as an alternative design, time-division multiplexing can be used instead of spatial multiplexing in certain sections of the signal path. The advantage is that the sensor system uses the same equipment components and processing steps, not just similar ones. This increases the equivalence of the reference signal path and the noise in the signal path compared to spatial multiplexing.
[0028] Here, spatial multiplexing should be understood as parallel processing of signals in time across multiple identical or similar devices. Conversely, time-division multiplexing is understood as serial processing of signals within a single device. In the case of time-division multiplexing, processing occurs within signal packets processed sequentially in time by the device.
[0029] The reference signal path begins at the reference element RW with the reference signal Rs. The reference signal path ends at the second output signal out2.
[0030] However, in order to use the reference element RW, the reference signal path at the beginning of the reference signal path (at the reference signal Rs) must be different from the signal path at the beginning of the signal path (at the input signal Si). In the proposed scheme, at least the amplifier DV should be shared with respect to the reference signal path and the signal path. Therefore, at the first position of the reference signal path, the reference signal path includes the amplifier DV having input and output terminals. Therefore, the first position of the reference signal path including the amplifier DV having input and output terminals is also the first position of the signal path including the amplifier DV having input and output terminals. Therefore, the amplifier DV is a part of the reference signal path at the first position of the reference signal path, and also a part of the signal path at the first position of the signal path. The reference signal Rs is located at the beginning of the reference signal path. The reference signal path has a sixth position in the reference signal path, which is located between the reference signal Rs and the input terminal of the amplifier DV at the first position of the reference signal path. The signal path has a corresponding sixth position, located between the input signal Si at the beginning of the signal path and the input terminal of the amplifier DV (shared by the signal path and the reference signal path) at the first position of the signal path. In the reference signal path and in the signal path, at the sixth position shared by the reference signal path and the signal path, there is a common switch DS, shared by the signal path and the reference signal path, and having a first input terminal and a second input terminal. Therefore, in the reference signal path, the common switch DS is located at the sixth position of the reference signal path. Thus, in the signal path, the common switch DS is located at the corresponding sixth position of the signal path, which is also the common sixth position in both the reference signal path and the signal path.
[0031] The common switching switch DS selects between its first and second input terminals as its valid input terminal based on the second chopping signal Cs2.
[0032] The signal path includes the first input terminal of the changeover switch DS, while the reference signal path includes the second input terminal of the changeover switch DS. Correspondingly, the signal path does not include the second input terminal of the changeover switch DS, and the reference signal path does not include the first input terminal of the changeover switch DS.
[0033] The common transfer switch DS selects its valid input terminal according to the second chopping signal Cs2, and accordingly connects the current value at the valid input terminal of the common transfer switch DS to the output terminal of the common transfer switch DS.
[0034] Therefore, in the section from the output of the common switching switch DS at the sixth position of the reference signal path and the signal path to the input of the amplifier DV at the first position of the reference signal path and the signal path, the reference signal path and the signal path are the same.
[0035] However, the first filter using the first filter function F1[] is excluded here, and explicitly, this first filter is not part of the reference signal path. Typically, the exemplary first low-pass filter TP1 is not part of the reference signal path.
[0036] The third demodulated signal DM3 is generated by a fourth mixing of the first demodulated signal DM1 or a signal derived from the first demodulated signal with the second chopper signal Cs2. This third mixing can be performed in a third mixer (e.g., a third multiplier M3).
[0037] Here, the signal processing ends first by performing a third filter on the third demodulated signal DM3 or the signal derived from the third demodulated signal using the third filter function F3[]. For example, this third filter can be performed in the third low-pass filter LP3 that implements the third filter function F3[].
[0038] The sensor system must ensure clear separation of i) the measurement signal component of the sensor element, ii) the differential signal component obtained by the difference between the measurement signal component of sensor element WB and the reference signal component of reference element RW, and iii) the test signal component. To this end, a) the first filtering function F1[] of the exemplary first low-pass filter LP1, b) the second filtering function F2[] of the exemplary second low-pass filter LP2, and c) the third filtering function F3[] of the exemplary third low-pass filter LP3 must satisfy certain conditions.
[0039] Therefore, the sensor system is designed to select a first filter function F1[] such that the following conditions are basically satisfied:
[0040] F1[Cs(t)]=0 and
[0041] F1[Cs2(t)]=0
[0042] F1[Cs90(t)]=0
[0043] F1[Cs(t)×Cs2(t)]=0
[0044] F1[Cs(t)×Cs90(t)]=0
[0045] F1[Cs2(t)×Cs90(t)]=0
[0046] F1[Cs(t)×Cs2(t)×Cs90(t)]=0
[0047] F1[1]=β1
[0048] Here, β1 is a real or complex value. As mentioned earlier, if unavoidable slight deviations caused by noise and manufacturing errors are ignored, the sensor system's device preferably samples the output of the exemplary first low-pass filter LP1 precisely when these conditions are met. Similarly, the sensor system is designed to select a second filter function F2[] such that the following conditions are substantially satisfied:
[0049] F2[Cs(t)]=0
[0050] F2[Cs2(t)]=0
[0051] F2[Cs90(t)]=0
[0052] F2[Cs(t)×Cs2(t)]=0
[0053] F2[Cs(t)×Cs90(t)]=0
[0054] F2[Cs2(t)×Cs90(t)]=0
[0055] F2[Cs(t)×Cs2(t)×Cs90(t)]=0
[0056] F2[1]=β2
[0057] Here, β2 is a real or complex value. As previously mentioned, the sensor system's device preferably samples the output of the exemplary second low-pass filter LP2 precisely when these conditions are met. In this respect, the technical implications of this paper neglect unavoidable slight deviations caused by noise and manufacturing errors, etc. Similarly, the sensor system is designed to select a third filter function F3[] such that the following conditions are substantially satisfied:
[0058] F3[Cs(t)]=0
[0059] F3[Cs2(t)]=0
[0060] F3[Cs90(t)]=0
[0061] F3[Cs(t)×Cs2(t)]=0
[0062] F3[Cs(t)×Cs90(t)]=0
[0063] F3[Cs2(t)×Cs90(t)]=0
[0064] F3[Cs(t)×Cs2(t)×Cs90(t)]=0
[0065] F3[1]=β3
[0066] Here, β3 is a real or complex value. Preferably, the hold circuit of the sensor system samples the output of the exemplary third low-pass filter LP3 during the sampling time. Therefore, these sampling times are precisely the times when the above conditions are met. In this case, the technical teachings herein ignore unavoidable slight deviations caused by noise and manufacturing errors, etc. To detect defects in the reference element or sensor element, it is preferable to perform a second comparison between the value of the third output signal out3 or the value of the signal derived from the third output signal and a third expected value interval. Furthermore, if the value of the third output signal out3 or the value of the signal derived from the third output signal is outside the third expected value interval, a conclusion that an error exists is drawn. For example, this comparison can be performed by a third comparator and a fourth comparator or by a signal processor, etc. Therefore, when necessary, the third comparator compares the value of the third output signal out3 with a third threshold. When necessary, the fourth comparator compares the value of the third output signal out3 with a fourth threshold.
[0067] The drawback of the above method is that the sensor element (exemplary WB WB in this case) is not part of the signal path tested using the test signal TSS. The proposed method variation now remedies this.
[0068] Therefore, this paper now proposes an improved method for a sensor system in monitoring operation, wherein, as previously described, the sensor system includes a sensor element WB that provides an input signal Si having an input signal value based on a test signal TSS.
[0069] As mentioned earlier, the sensor system has a signal path, which also includes an amplifier DV with input and output at a first location in the signal path.
[0070] As mentioned earlier, the signal path begins with the input signal Si from the sensor element WB and ends with the first output signal out1.
[0071] Here, the value of the output signal out1 also represents the measured value.
[0072] Similarly, at the second position of the signal path, the signal in the signal path is first mixed with the chopped signal Cs. This second position of the signal path is located between the input signal Si from the sensor element at the beginning of the signal path and the input terminal of the amplifier DV at the first position of the signal path.
[0073] Similarly, the chopper signal Cs is bandwidth-limited or single-frequency.
[0074] Similarly, at the third position of the signal path, the signal is mixed with the chopper signal Cs to form the first demodulated signal DM1. The third position of the signal path is located between the output of the amplifier DV at the first position of the signal path and the first output signal out1 of the sensor system at the end of the signal path.
[0075] As previously described, a first filtering of the first demodulated signal DM1 or the signal derived from the first demodulated signal is performed at the fourth position in the signal path, which is located between the third position in the signal path and the first output signal out1 at the end of the signal path. This first filtering is performed by applying a first filtering function F1[] to the first demodulated signal DM1 or the signal derived from the first demodulated signal. The first filtering function F1[] describes the relationship between the time progression DM1(t) of the first demodulated signal DM1 or the signal derived from the first demodulated signal and the time progression of the signal. This signal progression is the progression immediately following the first filtering, that is, typically the progression of the filter output signal. Similarly, the first output signal out1 depends on the signal immediately following the first filtering, or is itself a result of the first filtering.
[0076] However, compared to existing technologies, a test signal TSS is now also generated based on the quadrature chopper signal Cs90. The chopper signal Cs has a time progression Cs(t). Therefore, the quadrature chopper signal Cs90 has a time progression Cs90(t). Therefore, relative to the first filter function F1[], apart from noise and similar signal errors, the time progression Cs90(t) of the quadrature chopper signal Cs90 at least sometimes substantially has the characteristic of F1[Cs90(t)×Cs(t)]=0. At least the time progression Cs90(t) of the quadrature chopper signal Cs90 has these characteristics at the time already discussed.
[0077] Compared with the prior art, a third mixing is performed on the first demodulated signal DM1 or the signal derived from the first demodulated signal and the quadrature chopper signal Cs90 or the signal derived from the quadrature chopper signal, and a second demodulated signal DM2 is further generated.
[0078] The second output signal out2 is generated by using the second filter function F2[] to filter the second demodulated signal DM2 or the signal derived from the second demodulated signal.
[0079] A second filter function F2[] is selected such that F2[Cs(t)]=0, F2[Cs90(t)]=0, F2[Cs(t)×Cs90(t)]=0 and F2[1]=β2 are substantially true, where β2 is a real or complex value. As previously stated, when these conditions are met, the second hold circuit (Sample & Hold) samples the output value of the exemplary second low-pass filter LP2, which preferably implements the second filter function F2[DM2].
[0080] A first filter function F1[] is selected such that F1[Cs(t)]=0, F1[Cs90(t)]=0, F1[Cs(t)×Cs90(t)]=0 and F1[1]=β1 are substantially true, where β1 is a real or complex value. As mentioned above, when these conditions are met, the first hold circuit (Sample & Hold) samples the output value of the exemplary first low-pass filter LP1, which preferably implements the first filter function F1[DM1].
[0081] When necessary, the sensor device may include a first trigger circuit. When the conditions F1[Cs(t)]=0, F1[Cs90(t)]=0, F1[Cs(t)×Cs90(t)]=0 and F1[1]=β1 are met, the first trigger circuit signals the first hold circuit to sample the result of the first filter function F1[]. Here, β1 is a real or complex value. The first hold circuit samples the first demodulated signal DM1. The first hold circuit forms the first output signal out1 through this sampling.
[0082] If necessary, the sensor device may include a second trigger circuit. When the conditions F2[Cs(t)]=0, F2[Cs90(t)]=0, F2[Cs(t)×Cs90(t)]=0 and F2[1]=β2 are met, the second trigger circuit signals the second holding circuit to sample the result of the second filter function F2[]. Here, β2 is a real value or a complex value. The second holding circuit samples the second demodulated signal DM2. The second holding circuit forms the second output signal out2 through this sampling.
[0083] Finally, the value of the second output signal out2, or the value of the signal derived from the second output signal, is compared with the expected value interval. If the value of the second output signal out2, or the value of the signal derived from the second output signal, is outside the expected value interval, an incorrect conclusion is drawn. Refer to the explanation in the previous chapters for further details.
[0084] Similarly, it is meaningful to include the sensor element and the reference element in the signal path under test. In this case, a reference element RW providing the reference signal Rs is also provided. The sensor system processes the reference signal Rs in the reference signal path. Again, the reference signal path is designed to be the same as the signal path used to process the input signal Si. At this point, this document refers to the process already described. The reference signal path also begins with the reference signal Rs and also ends with the second output signal out2.
[0085] As mentioned earlier, the reference signal path at the beginning of the reference signal path (at the reference signal Rs) is different from the signal path at the beginning of the signal path (at the input signal Si).
[0086] As previously stated, the reference signal path at the first position of the reference signal path includes an amplifier DV having input and output terminals. Therefore, as mentioned above, the amplifier DV is also a portion of the reference signal path at the first position of the reference signal path, and simultaneously a portion of the signal path at the first position of the signal path.
[0087] As previously described, the reference signal path has a sixth position within the reference signal path, located between the reference signal Rs at the beginning of the reference signal path and the input terminal of the amplifier DV at the first position of the reference signal path. Similarly, the signal path has a sixth position within the signal path, located between the input signal Si at the beginning of the signal path and the input terminal of the amplifier DV (shared by the signal path and the reference signal path) at the first position of the signal path. Likewise, at this common sixth position of the reference signal path and the signal path, the signal path and the reference signal path include a switching switch DS having a first input terminal and a second input terminal and shared by the reference signal path and the signal path.
[0088] As described above, the switching switch DS, which is shared by the signal path and the reference signal path, selects its valid input terminal between its first input terminal and its second input terminal based on the second chopping signal Cs2.
[0089] Similarly, the signal path includes the first input terminal of the changeover switch DS, but does not include the second input terminal of the changeover switch DS. Accordingly, the reference signal path includes the second input terminal of the changeover switch DS, but does not include the first input terminal of the changeover switch DS.
[0090] The common transfer switch DS selects the valid input terminal based on the second chopping signal Cs2, and connects the value at the valid input terminal of the common transfer switch DS to the output terminal of the common transfer switch DS.
[0091] In the section from the output of the common switching switch DS at the sixth position of the reference signal path and the signal path to the input of the amplifier DV at the first position of the reference signal path and the signal path, the reference signal path and the signal path are the same.
[0092] The first filter using the first filter function F1[] (e.g., the first low-pass filter LP1) is not part of the reference signal path.
[0093] For example, in the third low-pass filter LP3, the third output signal out3 is generated by the third filtering function F3[] on the third demodulated signal DM3 or the signal derived from the third demodulated signal.
[0094] The sensor system must ensure clear separation of i) the measurement signal component of the sensor element, ii) the differential signal component obtained by the difference between the measurement signal component of the sensor element WB and the reference signal component of the reference element RW, and iii) the test signal component. To this end, the first filter function F1[] of the exemplary first low-pass filter LP1, the second filter function F2[] of the exemplary second low-pass filter LP2, and the third filter function F3[] of the exemplary third low-pass filter LP3 must also satisfy certain conditions.
[0095] Therefore, the sensor system is designed to select a first filter function F1[] such that the following conditions are basically satisfied:
[0096] F1[Cs(t)]=0
[0097] F1[Cs2(t)]=0
[0098] F1[Cs90(t)]=0
[0099] F1[Cs(t)×Cs2(t)]=0
[0100] F1[Cs(t)×Cs90(t)]=0
[0101] F1[Cs2(t)×Cs90(t)]=0
[0102] F1[Cs(t)×Cs2(t)×Cs90(t)]=0
[0103] F1[1]=β1
[0104] Here, β1 is a real or complex value. As previously mentioned, the sampling circuit (Sample & Hold) preferably samples the output of the exemplary first low-pass filter LP1 when exactly these conditions are met. In this case, the technical implications of this paper ignore the unavoidable slight deviations caused by noise and manufacturing errors, etc. Similarly, the sensor system is designed to select the second filter function F2[] such that the following conditions are essentially satisfied:
[0105] F2[Cs(t)]=0
[0106] F2[Cs2(t)]=0
[0107] F2[Cs90(t)]=0
[0108] F2[Cs(t)×Cs2(t)]=0
[0109] F2[Cs(t)×Cs90(t)]=0
[0110] F2[Cs2(t)×Cs90(t)]=0
[0111] F2[Cs(t)×Cs2(t)×Cs90(t)]=0
[0112] F2[1]=β2
[0113] Here, β2 is a real or complex value. As mentioned earlier, the sampling circuit (Sample & Hold) preferably samples the output of the exemplary second low-pass filter LP2 precisely when these conditions are met. Here, the technical implications of this paper ignore unavoidable slight deviations caused by noise and manufacturing errors, etc. In the same way, the sensor system is designed to select a third filter function F3[] such that the following conditions are essentially satisfied:
[0114] F3[Cs(t)]=0
[0115] F3[Cs2(t)]=0
[0116] F3[Cs90(t)]=0
[0117] F3[Cs(t)×Cs2(t)]=0
[0118] F3[Cs(t)×Cs90(t)]=0
[0119] F3[Cs2(t)×Cs90(t)]=0
[0120] F3[Cs(t)×Cs2(t)×Cs90(t)]=0
[0121] F3[1]=β3
[0122] Here, β3 is a real or complex value. As previously mentioned, the sampling circuit (Sample & Hold) preferably samples the output of the exemplary third low-pass filter LP3 precisely when these conditions are met. The technical teachings herein ignore unavoidable slight deviations caused by noise and manufacturing errors, etc. Now, in order to detect defects in the reference element or sensor element, it is preferable to perform a second comparison between the value of the third output signal out3 or the value of the signal derived from the third output signal and a third expected value interval. Furthermore, if the value of the third output signal out3 or the value of the signal derived from the third output signal is outside the third expected value interval, it is preferable to conclude that an error exists. For example, a third comparator may compare the value of the third output signal out3 with a third threshold. For example, a fourth comparator may compare the value of the third output signal out3 with a fourth threshold. For example, the second comparison may be performed by the third and fourth comparators or by a signal processor, etc.
[0123] Specialized pressure sensors or sensors are advantageous in order to perform this process.
[0124] Therefore, a pressure sensor for use in a method according to one or more of the foregoing methods is proposed. The proposed pressure sensor comprises a Wheatstone bridge with four piezoresistive resistors R1, R2, R3, R4 and a reference Wheatstone bridge with four reference piezoresistive resistors R5, R6, R7, R8. Preferably, the reference resistors R5, R6, R7, R8 of the reference Wheatstone bridge RW are arranged in the same manner as the resistors R1, R2, R3, R4 of the Wheatstone bridge WB. To achieve good thermal coupling and thus better noise uniformity, the pressure sensor with the Wheatstone bridge WB as the sensor element and the reference Wheatstone bridge RW as the reference element are arranged together on a monolithic crystal. This means they are subjected to substantially the same influences during manufacturing and operation. The identical orientation of the components and the identical arrangement of the components relative to each other maximize this equivalence.
[0125] The pressure sensor includes at least one first cavity, which is closed on at least one side by a first diaphragm and surrounded by a continuous wall. The cavity surface opposite the first diaphragm can be fully or partially opened to allow the entry of a medium in the case of a differential pressure sensor, or closed in the case of an absolute pressure sensor. Preferably, the piezoresistive resistors R1, R2, R3, and R4 of the Wheatstone bridge WB are at least partially arranged on the first diaphragm. In this case, reference is made, for example, to industrial property EP 2 524 389 B1, EP 2 524 390 B1, EP 2 524 198 B1, EP 2 523 896 B1, and EP 2 523 895 B1.
[0126] Currently, the following options are available for the reference sensor element:
[0127] A) The reference sensor element can be designed to provide a reference signal Rs, which should be equal to the input signal Si. In this case, the reference signal Rs and the input signal Si depend equally on the value of a physical quantity that affects the corresponding output signal of the sensor element and the output signal of the reference element. Therefore, a change in the value of this physical quantity then leads to a change in the same value of the input signal Si and the reference signal Rs. In the example of the pressure sensor discussed here, this exemplary physical quantity is pressure.
[0128] B) The reference sensor element can be designed to provide a reference signal Rs. This reference signal should be different from the input signal Si in a predetermined manner. In this case, the input signal Si is provided by the sensor element. In this case, the reference signal Rs and the input signal Si are not equivalently dependent on the values of a physical quantity that affects the corresponding output signal of the sensor element and the output signal of the reference element. Therefore, a change in the value of this physical quantity results in a non-equal change in the input signal Si and a non-zero change in the reference signal Rs. In the example of the pressure sensor discussed here, this exemplary physical quantity is typically pressure.
[0129] C) The reference sensor element can be designed to provide a reference signal Rs, which should differ from the input signal Si in a pre-known manner (i.e., substantially constant). Therefore, preferably here, the reference signal Rs is substantially independent of the value of the physical quantity affecting the corresponding output signal of the sensor element. Conversely, the input signal Si continues to depend on the value of the physical quantity affecting the corresponding output signal of the sensor element, such that a change in the value of this physical quantity causes a change in the input signal Si, while the reference signal Rs has no or only negligible change. In the example of the pressure sensor discussed here, this exemplary physical quantity is pressure.
[0130] Scenario A): The reference element and the sensor element have the same design.
[0131] In the pressure sensor example of scenario A, the pressure sensor includes a reference cavity that is enclosed on at least one side by a second diaphragm and surrounded by a continuous wall. Preferably, the second diaphragm is constructed identically to the first diaphragm. Preferably, the first diaphragm has the same size and shape as the second diaphragm. Preferably, the reference cavity is constructed in the same manner as the first cavity. The cavity surface of the reference cavity opposite the second diaphragm can be fully or partially opened to allow the entry of a medium, or it can be closed. Preferably, when the corresponding cavity surface of the first cavity is closed, the cavity surface of the reference cavity is closed. Preferably, when the corresponding cavity surface of the first cavity is open, the cavity surface of the reference cavity is open, in which case the openings of the corresponding cavity surfaces are made in the same manner. When the cavities are closed, the first cavity and the reference cavity are preferably filled with the same gas at the same pressure or preferably with the same vacuum. Preferably, the piezoresistive reference resistors R5, R6, R7, and R8 of the exemplary reference Wheatstone bridge RW are at least partially arranged on the second diaphragm above the reference cavity. In the best case, the behavior of the first Wheatstone bridge WB interacting with the first diaphragm and the first cavity is consistent with the behavior of the reference Wheatstone bridge RW interacting with the second diaphragm and the reference cavity, such that a non-zero signal other than noise is substantially unmeasurable on the third output signal out3. If a non-zero signal can be measured on the third output out3 outside the third desired value interval, an error exists.
[0132] Scenario B): The reference element and the sensor element are designed differently, and the sensitivity of the reference element to physical quantities is different from that of the sensor element.
[0133] In the pressure sensor example of scenario B, the pressure sensor includes a reference cavity that is closed on at least one side by a second diaphragm and surrounded by a continuous wall. In this case, preferably, the mechanical structure implemented by the reference cavity and the second diaphragm differs from the mechanical structure implemented by the first cavity and the first diaphragm. For example, the second diaphragm can be designed differently from the first diaphragm. For example, it can be thicker, thinner, larger, smaller, different in shape, or different in structure. The shape of the reference cavity differs from the first cavity. For example, the reference cavity can be smaller or larger, deeper or shallower, or different in shape or different in filling. The shape of the cavity surface of the reference cavity facing the second diaphragm can differ from the shape of the cavity surface of the first cavity facing the first diaphragm. One of these cavity surfaces can be closed while the other can be open; or one can be open while the other can be closed. If both are open, the shape, location, and size of the openings within the respective cavities can differ. When the cavities are closed, they can be filled with different gases and / or filled at different pressures, where low pressure is also understood herein to include vacuum. Of course, it is also conceivable that the design of the piezoresistive resistors R1, R2, R3, and R4 in the Wheatstone bridge WB can differ from the design of the reference piezoresistive resistors R5, R6, R7, and R8 in the reference Wheatstone bridge RW. This difference in design may involve variations in resistance value, size, dimensions, design, orientation, doping, etc. In this case, the third output signal out3 and the first output signal out1 together form an output signal vector, the value of which can be limited to a predetermined range. Therefore, it is possible to check whether the two-dimensional output signal vector value matches the expected two-dimensional value range, or to extract two values of two different physical parameters that have different effects on the sensor element and the reference element from the two-dimensional output signal vector value. If the two-dimensional value of the two-dimensional output vector deviates from the expected two-dimensional value range, the sensor system or the higher-level computer system can conclude that an error has occurred.
[0134] Case C): The reference element and the sensor element are different, and the reference element is not sensitive to physical quantities.
[0135] In case C, the pressure sensor preferably does not include a reference cavity. Therefore, the mechanical structure of the reference element in the form of a Wheatstone bridge RW deviates significantly from the mechanical structure of the sensor element in the form of a Wheatstone bridge WB. Ideally, case C is an extreme case of case B. In this extreme case, the reference element then typically no longer has any sensitivity to the physical quantity. In this case, the reference element has the form of a reference Wheatstone bridge RW. Here, the physical quantity is the physical quantity that the sensor system will detect through the sensor element (in this case, the Wheatstone bridge WB form). The reference sensor element RW then typically detects parasitic parameters such as pressure or humidity. The evaluation is similar to that in case B.
[0136] Preferably, in this exemplary case of the micromechanical pressure sensor, the piezoresistive reference resistors R5, R6, R7, and R8 are arranged such that the deflection of the first diaphragm does not affect the reference resistors R5, R6, R7, and R8 of the reference Wheatstone bridge RW. Preferably, for this purpose, the reference resistors R5, R6, R7, and R8 are not located on the first diaphragm.
[0137] The first resistor R1 of the Wheatstone bridge WB is equivalent to the fifth resistor R5 of the reference Wheatstone bridge WB in that they are constructed in the same way.
[0138] The second resistor R2 of the Wheatstone bridge WB is equivalent to the sixth resistor R6 of the reference Wheatstone bridge WB in that they are constructed in the same way.
[0139] The third resistor R3 of the Wheatstone bridge WB is equivalent to the seventh resistor R7 of the reference Wheatstone bridge WB in that they are constructed in the same way.
[0140] The fourth resistor R4 of the Wheatstone bridge WB is equivalent to the eighth resistor R8 of the reference Wheatstone bridge WB in that they are constructed in the same way.
[0141] Then, in this example, the sensor system preferably uses this reference element in the form of a Wheatstone bridge RW as a reference noise source for subsequent signal processing of the input signal Si from the sensor element (in this case, a Wheatstone bridge WB).
[0142] Therefore, this paper proposes a sensor for one of the methods described above. Specifically, the sensor can be a pressure sensor. The proposed sensor includes a first resistor R1 having a first terminal and a second terminal. The proposed sensor includes a second resistor R2 having a first terminal and a second terminal. The proposed sensor includes a third resistor R3 having a first terminal and a second terminal. The proposed sensor includes a fourth resistor R4 having a first terminal and a second terminal. Now, in order to generate a first differential modulation voltage V... mod1The sensor in this embodiment includes a first voltage source V1 having a first terminal and a second terminal, and a second voltage source V2 having a first terminal and a second terminal. The first terminal of the first voltage source V1 is connected to a first power supply voltage line VDD. The second terminal of the first voltage source V1 is connected to a first terminal of a first resistor R1. The second terminal of the first resistor R1 is connected to a first terminal of a second resistor R2. The second terminal of the second resistor R2 is connected to a second power supply voltage line GND. The first terminal of the second voltage source V2 is connected to the first power supply voltage line VDD. The second terminal of the second voltage source V2 is connected to a first terminal of a third resistor R3. The second terminal of the third resistor R3 is connected to a first terminal of a fourth resistor R4. The second terminal of the fourth resistor R4 is connected to the second power supply voltage line GND. The first voltage of the first voltage source V1 depends on a test signal TSS. The second voltage of the second voltage source V2 depends on the test signal TSS in the opposite manner to the first voltage of the first voltage source V1.
[0143] As an alternative to feeding the test signal via voltage sources V1, V2, V1b, V2b, the signal can also be fed via corresponding current source pairs. In this case, the sensor system must not use voltage source pairs [V1, V2], [V1b, V2b], but instead uses current source pairs to excite the Wheatstone bridge WB and the reference Wheatstone bridge RW. Therefore, the Wheatstone bridge WS is assigned a first current source pair. The reference Wheatstone bridge RW is assigned a second current source pair. Each of these current source pairs then consists of two current sources. According to the assignment, the first current source of the current source pair feeds a first current from the current source of the current source pair to the first branch of the Wheatstone bridge WB or the reference Wheatstone bridge RW. According to the assignment, the second current source of the current source pair feeds a second current from the current source of the current source pair to the second branch of the Wheatstone bridge WB or the reference Wheatstone bridge RW. The first and second currents have different signs depending on the test signal TSS. Therefore, the sensor system requires a total of four current sources, and the sensor system is preferably designed such that these four current sources are identical (matched). Since this possibility is obvious to those skilled in the art, no drawings have been made for this purpose.
[0144] As an alternative to feeding the test signal component to the input signal Si via a voltage or current source, the values of resistors R1, R2, R3, and R4 of the Wheatstone bridge WB and the values of reference resistors R5, R6, R7, and R8 of the reference Wheatstone bridge RW can also be modulated. Therefore, as another embodiment, a sensor, particularly a pressure sensor, is proposed herein, which is typically used in methods according to one or more of the above-described methods. The sensor thus includes a first resistor R1 having a first terminal and a second terminal, a second resistor R2 having a first terminal and a second terminal, a third resistor R3 having a first terminal and a second terminal, and a fourth resistor R4 having a first terminal and a second terminal. Furthermore, the sensor includes a first variable resistor RV1 having a first terminal and a second variable resistor RV2 having a first terminal and a second terminal.
[0145] The first terminal of the first variable resistor RV1 is connected to the first power supply voltage line VDD. The second terminal of the first variable resistor RV1 is connected to the first terminal of the first resistor R1. The second terminal of the first resistor R1 is connected to the first terminal of the second resistor R2. The second terminal of the second resistor R2 is connected to the second power supply voltage line GND. The first terminal of the second variable resistor RV2 is connected to the first power supply voltage line VDD. The second terminal of the second variable resistor RV2 is connected to the first terminal of the third resistor R3. The second terminal of the third resistor R3 is connected to the first terminal of the fourth resistor R4. The second terminal of the fourth resistor R4 is connected to the second power supply voltage line GND. The resistance value of the first variable resistor RV1 depends on the test signal TSS, and the resistance value of the second variable resistor RV2 depends on the test signal TSS in the opposite manner to that of the first variable resistor RV1. Preferably, the sensor system is designed to implement the first variable resistor RV1 and the second variable resistor RV2 in the same (matched) manner.
[0146] advantage
[0147] In at least some embodiments, the method and exemplary apparatus shown in the following figures allow for verification of signal paths during operation. However, the advantages are not limited thereto. Attached Figure Description
[0148] These figures illustrate exemplary designs presented herein. They are schematic and simplified.
[0149] Figure 1 A simple exemplary embodiment of the present invention is shown.
[0150] Figure 2 It shows that according to Figure 1 An exemplary waveform of the operation of the device.
[0151] Figure 3 It shows the corresponding Figure 1 The diagram shows that the first adder and the first multiplier have been interchanged.
[0152] Figure 4 Basically showed Figure 2 But now applicable Figure 3 An example signal.
[0153] Figure 5 It shows the basis Figure 3 The illustration.
[0154] Figure 6 It shows that it basically corresponds to Figure 5 The illustrations are shown, but their differences lie in, Figure 6 The excitation voltages of the Wheatstone bridge and the reference Wheatstone single bridge were modulated.
[0155] Figure 7 It shows that it basically corresponds to Figure 6 The illustrations are shown, but their differences lie in, Figure 7 The resistors of the Wheatstone bridge and the reference Wheatstone single bridge were modulated. Specific Implementation
[0156] Figure 1
[0157] Figure 1 A simple exemplary embodiment of the invention is shown. A Wheatstone bridge WB is selected as an exemplary sensor with differential output terminals. The exemplary Wheatstone bridge WB includes a first resistor R1, a second resistor R2, a third resistor R3, and a fourth resistor R4. For example, when used for a piezoresistive pressure sensor, the first resistor R1 is a piezoresistive first resistor R1, the second resistor R2 is a piezoresistive second resistor R2, the third resistor R3 is a piezoresistive third resistor R3, and the fourth resistor R4 is a piezoresistive fourth resistor R4. The first resistor R1 and the second resistor R2 are connected in series between the first power supply voltage line VDD and the second power supply voltage line GND. The third resistor R3 and the fourth resistor R4 are also connected in series between the first power supply voltage line VDD and the second power supply voltage line GND. For example, the sensor system operates the Wheatstone bridge WB using the supply voltage between the first power supply voltage line VDD and the second power supply voltage line GND. Therefore, the Wheatstone bridge WB has a first terminal connected to the power supply voltage line VDD and a second terminal connected to the second power supply voltage line GND. For example, the node between the first resistor R1 and the second resistor R2 forms the negative input signal Sin of the differential input signal Si. For example, the node between the third resistor R3 and the fourth resistor R4 forms the positive input signal Sip of the differential input signal Si.
[0158] As is well known, Wheatstone bridges are used in many sensor systems to convert physical parameters of interest into differential voltage signals between a positive input signal Sip and a negative input signal Sin. For example, a Wheatstone bridge WB can be such a bridge consisting of piezoresistive resistors R1, R2, R3, and R4 in sensor elements such as piezoresistive micromechanical pressure sensors.
[0159] A signal pair consisting of a positive input signal Sip and a negative input signal Sin forms a differential input signal Si. Figure 1 In the example, the first adder A1 adds the differential test signal TSS to the differential input signal Si to form a differential input signal SiT with a test signal component.
[0160] The first multiplier M1 multiplies the differential input signal SiT, which has a test signal component, with the chopped signal Cs, thereby forming a differential product input signal MSiT, which also has a test signal component. Preferably, the chopped signal Cs is a digital signal with two logic values (exemplarily 0 and 1 in this case). For example, the first multiplier M1 can be implemented as a switching device. This design then functions as a switching device, for example, in the following way:
[0161] A) If the value of the chopping signal Cs is logic 0, then the differential product input signal MSiT with the test signal component corresponds to the differential input signal SiT with the test signal component.
[0162] B) If the value of the chopping signal Cs is logic 1, then the differential product input signal MSiT with the test signal component corresponds to the differential input signal SiT with the test signal component in the case of a switched line.
[0163] The differential amplifier DV amplifies the differential product input signal MSiT, which contains the test signal component, into the amplifier output signal VO.
[0164] The analog-to-digital converter (ADC) converts the amplifier output signal VO into the input signal DFI of the digital filter DF. The input signal DFI of the digital filter DF comes from the ADC and is typically a digital signal of the sampled value of the amplifier output signal VO.
[0165] The digital filter DF filters the input signal DFI into the output signal DFO. In this case, the digital filter suppresses any signal components that may be present at the interference frequency. Typically, the digital filter is a decimation filter, used to eliminate conversion artifacts added by sampling using an analog-to-digital converter (ADC).
[0166] An exemplary phase compensator PC corrects the obtained phase error and forms the phase compensator output signal PCO.
[0167] After amplification and digitization, the second multiplier M2 multiplies the phase compensator output signal PCO with the chopper signal Cs to form the first demodulated signal DM1.
[0168] The first low-pass filter LP1 suppresses frequencies in the first demodulated signal DM1 that correspond to frequencies in the signal spectrum of the chopped signal Cs. The first low-pass filter LP1 also suppresses frequencies in the signal spectrum of the quadrature chopped signal Cs90. Furthermore, the first low-pass filter LP1 suppresses mixing frequencies that may be generated by multiplying the chopped signal Cs and the quadrature chopped signal Cs90. The first low-pass filter LP1 suppresses these signal components in the first demodulated signal DM1, except for the DC component. Therefore, the first low-pass filter LP1 forms the first output signal out1, the value of which corresponds to the value of the differential input signal Si.
[0169] The third multiplier M3 mixes the first demodulated signal DM1 with the quadrature chopper signal Cs90 to form the second demodulated signal DM2. The second low-pass filter LP2 suppresses frequencies in the second demodulated signal DM2 that correspond to frequencies in the signal spectrum of the chopper signal Cs. The second low-pass filter LP2 also suppresses frequencies in the signal spectrum of the quadrature chopper signal Cs90. The second low-pass filter LP2 further suppresses mixing frequencies that may result from the multiplication of the chopper signal Cs and the quadrature chopper signal Cs90. The second low-pass filter LP2 suppresses these frequencies in the second demodulated signal DM2, except for the DC component. Therefore, the second low-pass filter LP2 forms the second output signal out2.
[0170] exist Figure 1 In the example, signal generator G1 generates a chopped signal Cs and a quadrature chopped signal Cs90. Preferably, the chopped signal Cs is bandwidth-limited or single-frequency. Preferably, the quadrature chopped signal Cs90 is also bandwidth-limited or single-frequency. Preferably, the quadrature chopped signal Cs90 is different from the chopped signal Cs. The first low-pass filter LP1 has a first filter characteristic of the form of a first filter function F1[], such that: out1 = F1[DM1]. The second low-pass filter LP2 has a filter characteristic of the form of a second filter function F2[], such that: out2 = F2[DM2]. Generally, and very preferably, the first low-pass filter LP1 and the second low-pass filter LP2 have the same filter characteristics and the same filter function F[] = F1[] = F2[].
[0171] The chopping signal Cs and the quadrature chopping signal Cs90 should be orthogonal to each other, relative to the first filter LP1 and relative to the second filter LP2. That is, at least at the preferred time, the following should hold true:
[0172] a) F1[Cs(t)×Cs90(t)]=0
[0173] b) F2[Cs(t)×Cs90(t)]=0
[0174] Here, Cs(t) should represent the time progression of the value of the chopper signal Cs, and Cs90(t) should represent the time progression of the value of the quadrature chopper signal Cs90.
[0175] Furthermore, the first filter function F1[] should preferably be a fundamentally linear filter function. That is, for the sum of any first example signal X1(t) and any second example signal X2(t), and for the real value α, the following should hold:
[0176] A) F1[X1(t)+X2(t)]=F1[X1(t)]+F1[X2(t)]
[0177] B) F1[α×X1(t)]= α×F1[X1]
[0178] Furthermore, the second filter function F2[] should preferably be a fundamentally linear filter function. That is, for the sum of any first example signal X1(t) and any second example signal X2(t), and for the real value α, the following should hold:
[0179] C) F2[X1(t)+X2(t)]=F2[X1(t)]+F2[X2(t)]
[0180] D) F2[α×X1(t)]=α×F2[X1]
[0181] Finally, both the first filter function F1[] and the second filter function F2[] should have low-pass characteristics. In other words, the following should be true:
[0182] F1[1]=β1 and F2[1]=β2, where β1 is a non-zero real constant and β2 is a non-zero real constant.
[0183] For example, the chopping signal Cs can be a single-frequency PWM signal with values of -1 and 1, a 50% duty cycle, and the chopping signal frequency. Then, the quadrature chopping signal Cs90 can be, for example, a + / -90° phase-shift signal with values of -1 and 1 and a 50% duty cycle. Alternatively, the quadrature chopping signal Cs90 can be a single-frequency PWM signal with values of -1 and 1 and a 50% duty cycle, and, for example, a signal frequency that is an integer multiple of the chopping signal frequency. The chopping signal Cs can also be a bandwidth-limited non-single-frequency signal. The only important thing is that the quadrature condition is met. Typically, the chopping signal Cs is periodic, and the quadrature chopping signal Cs90 is periodic. If necessary, it is useful that the first low-pass filter LP1 and the second low-pass filter LP2 can each have a sample and hold circuit at their respective outputs. In this case, it is useful to sample the output of the first low-pass filter LP1 using the first hold circuit of these hold circuits when the quadrature conditions a) and b) are met. The first hold circuit outputs the sampled first value as the value of the first output signal out1 until the quadrature conditions a) and b) are satisfied again. In this case, it is useful to sample the output of the second low-pass filter LP2 using the second hold circuit when the quadrature conditions a) and b) are satisfied. Then, the second hold circuit outputs the sampled second value as the value of the second output signal out2 until the quadrature conditions a) and b) are satisfied again.
[0184] exist Figure 1 In the example, the test signal generator TSG (which can also be part of the signal generator G1) generates the test signal TSS from the quadrature chopping signal Cs90. The test signal generator TSG typically sets the amplitude according to a preset value.
[0185] The design can also be implemented, for example, by digital circuitry or by a signal processor system with appropriate programming, by digital filter DF, phase compensator PC, signal generator G1, test signal generator TSG, second multiplier M2, third multiplier M3, first low-pass filter LP1 and second low-pass filter LP2.
[0186] Preferably, the comparison device (e.g., a cooperating first and second comparator or the signal processor) compares the value of the second output signal with a range of expected values defined by the first and second expected values. If the value of the second output signal is between the first and second expected values (i.e., within the expected value range), it is inferred that the input stage, including the first multiplier M1, differential amplifier DV1, analog-to-digital converter ADC, digital filter DF, phase compensator PC, and second multiplier M2, is operating correctly. Therefore, the sensor system can thus conclude that the inferred function of the input stage is correct.
[0187] Figure 2 It shows that according to Figure 1 The following are exemplary waveforms illustrating the operation of the device. The voltage levels are arbitrarily chosen. Short dashed lines represent their respective zero lines. Long dashed lines should represent their respective average lines.
[0188] Figure 3 In basically corresponding to Figure 1 However, in the signal path from the sensor to the first output signal out1, the order of the first adder A1 and the first multiplier M1 has been interchanged. The advantage of this is that the sensor system is designed to allow easy integration of the first adder A1 into the input stage of the differential amplifier DV. However, the disadvantage is that the test signal TSS no longer jointly tests the first multiplier M1. Furthermore, another multiplier is required in the test signal generator TSG to multiply the quadrature chopper signal Cs90 with the chopper signal Cs and process it into the test signal TSS.
[0189] Figure 4 Basically showed Figure 2 But now it applies Figure 3 An example signal.
[0190] Figure 5 based on Figure 3 .exist Figure 5 In the example, a reference Wheatstone bridge RW is also provided.
[0191] Similarly, a Wheatstone bridge WB is chosen as an example sensor with differential output terminals. The Wheatstone bridge WB includes a first piezoresistive resistor R1, a second piezoresistive resistor R2, a third piezoresistive resistor R3, and a fourth piezoresistive resistor R4. The first resistor R1 and the second resistor R2 are connected in series between the first power supply voltage line VDD and the second power supply voltage line GND. The third resistor R3 and the fourth resistor R4 are also connected in series between the first power supply voltage line VDD and the second power supply voltage line GND. For example, the sensor system operates the Wheatstone bridge WB using the power supply voltage. Therefore, the Wheatstone bridge WB has a first terminal connected to the first power supply voltage line VDD and a second terminal connected to the second power supply voltage line GND. For example, the node between the first resistor R1 and the second resistor R2 forms the negative input signal Sin of the differential input signal Si. For example, the node between the third resistor R3 and the fourth resistor R4 forms the positive input signal Sip of the differential input signal Si.
[0192] Wheatstone bridges are used in many sensor systems to convert relevant physical parameters into differential voltage signals between a positive input signal Sip and a negative input signal Sin. For example, a Wheatstone bridge WB can be such a bridge for the piezoresistive resistors of sensor elements such as piezoresistive micromechanical pressure sensors. In this regard, reference is made, for example, to the following industrial patents as examples of such pressure sensors: EP 2 524 389 B1, EP 2 524 390 B1, EP 2 524 198 B1, EP 2 523896 B1, and EP 2 523 895 B1.
[0193] For example, the reference Wheatstone bridge RW includes a fifth piezoresistive resistor R5, a sixth piezoresistive resistor R6, a seventh piezoresistive resistor R7, and an eighth piezoresistive resistor R8. The fifth resistor R5 and the sixth resistor R6 are connected in series between the first power supply voltage line VDD and the second power supply voltage line GND. The seventh resistor R7 and the eighth resistor R8 are also connected in series between the first power supply voltage line VDD and the second power supply voltage line GND. For example, the sensor system operates the reference Wheatstone bridge RW using the power supply voltage. Therefore, the reference Wheatstone bridge RW is connected to the first power supply voltage line VDD via a first terminal. The reference Wheatstone bridge RW has a second terminal connected to the second power supply voltage line GND. Exemplarily, the node between the fifth resistor R5 and the sixth resistor R6 forms the negative reference signal Rin of the differential reference signal Rs. Exemplarily, the node between the seventh resistor R7 and the eighth resistor R8 forms the positive reference signal Rip of the differential reference signal Rs. Resistors R5, R6, R7, and R8 represent resistors for the reference Wheatstone bridge RW. Resistors R1, R2, R3, and R4 represent resistors for the Wheatstone bridge WB. Preferably, the resistors for the reference Wheatstone bridge RW and the Wheatstone bridge WB are manufactured simultaneously using the same steps in a manufacturing process. For example, the Wheatstone bridge WB can be, for example, the sensing bridge of a piezoresistive micromechanical pressure sensor on a silicon monolith. In this example, the manufacturing method according to this design preferably manufactures the reference Wheatstone bridge RW and the Wheatstone bridge WB together on the same silicon monolith. In this example, the manufacturing method according to this design preferably also manufactures the respective resistors in the same orientation. The technical term for this is "matching". For example, the reference Wheatstone bridge RW can be part of a second pressure sensor that is similar to the pressure sensor of the Wheatstone bridge WB and is manufactured in the same substrate (e.g., in the same semiconductor crystal). In this case, the third output signal out3, which represents the difference between the difference value of the reference signal Rs and the difference value of the differential input signal Si, should be close to zero.
[0194] When the reference Wheatstone bridge RW is the same as the Wheatstone bridge WB, the deviation between the differential value of the reference signal Rs, represented by the value of the third output signal out3, and the differential value of the differential input signal Si should disappear. When the reference Wheatstone bridge is designed to be the same as the Wheatstone bridge WB, a value of the third output signal out3 outside the allowable expected value range near this zero value indicates an error. Furthermore, in this case, the value of the first output signal only represents the average of the signal component based on the value of the input signal Si and the signal component based on the value of the reference signal. In this respect, Figure 5 The drawback of this system is that the sensitivity is typically halved. Only when the reference Wheatstone bridge RW and WB are affected by the same physical parameter in the same way that the Wheatstone bridge WB changes its reference signal Rs according to the value of that physical parameter. Only then will the value of the first output signal out1 at maximum sensitivity correspond to the value of that physical parameter. For example, in the case of a pressure sensor, the physical parameter could be pressure.
[0195] However, when the reference Wheatstone bridge RW differs from the Wheatstone bridge WB, the deviation between the differential value of the reference signal Rs, represented by the value of the third output signal out3, and the differential value of the differential input signal Si no longer disappears. If the reference Wheatstone bridge is substantially insensitive to the physical parameter sensed by the Wheatstone bridge WB, the value of the third output signal out3 typically reflects the value of that physical parameter, and this value is generally adjusted for such influencing factors that affect both the reference Wheatstone bridge RW and the Wheatstone bridge in the same way.
[0196] However, it is also conceivable that, in the example of the micromechanical pressure sensor, the reference Wheatstone bridge RW is not located on the diaphragm. Therefore, in this case, the reference Wheatstone bridge RW should essentially provide a signal independent of pressure. Thus, the measured value... Figure 5 In the example, it appears as the value of the third output signal out3.
[0197] Figure 5 The advantage of this arrangement is that, with good thermal coupling between the reference Wheatstone bridge RW and the Wheatstone bridge WB, the reference Wheatstone bridge RW will generate noise in the same way as the Wheatstone bridge WB itself. This allows the sensor system to reliably suppress 1 / f of the noise of the Wheatstone bridge WB itself, which is... Figure 1 It is impossible in the middle.
[0198] A signal pair consisting of a positive input signal Sip and a negative input signal Sin forms a differential input signal Si. A signal pair consisting of a positive reference signal Rip and a negative reference signal Rin forms a differential reference signal Rs.
[0199] According to the second chopping signal Cs2, the Dicke-Schalter DS switches between the differential input signal S1 and the differential reference signal Rs.
[0200] exist Figure 5 In the example, the first multiplier M1 multiplies the resulting mixed signal of differential input signal Si and differential reference signal Rs by chopping signal Cs to form product input signal MSi.
[0201] like Figure 5 As shown, the first adder A1 adds the differential test signal TSS to the product input signal MSi, forming a differential product input signal MSiT with the test signal component. Preferably, as previously mentioned, the chopping signal Cs is a digital signal with two logic values (exemplarily 0 and 1 in this case).
[0202] The differential amplifier DV amplifies the differential product input signal MSiT, which contains the test signal component, into the amplifier output signal VO.
[0203] The analog-to-digital converter (ADC) converts the amplifier output signal VO into the input signal DFI of the digital filter DF. This input signal DFI of the digital filter DF comes from the ADC and is typically a digital signal of the sampled value of the amplifier output signal VO.
[0204] The digital filter DF filters the input signal DFI to the output signal DFO. In this process, the digital filter DF suppresses any signal components present at interference frequencies. Typically, the digital filter is a decimation filter used to eliminate conversion artifacts added by sampling using an analog-to-digital converter (ADC).
[0205] The phase error obtained by the phase compensator PC is corrected and the phase compensator output signal PCO is generated.
[0206] After amplification and digitization, the second multiplier M2 multiplies the phase compensator output signal PCO with the chopper signal Cs to form the first demodulated signal DM1.
[0207] The first low-pass filter LP1 suppresses frequencies in the first demodulated signal DM1 that correspond to frequencies in the signal spectrum of the chopped signal Cs. The first low-pass filter LP1 also suppresses frequencies corresponding to frequencies in the signal spectrum of the quadrature chopped signal Cs90. Furthermore, the first low-pass filter LP1 suppresses frequencies corresponding to frequencies in the signal spectrum of the second chopped signal Cs2. The first low-pass filter LP1 also suppresses mixing frequencies that may be generated by multiplying the chopped signal Cs with the quadrature chopped signal Cs90 and the second chopped signal Cs2. The first low-pass filter LP1 suppresses these frequencies in the first demodulated signal DM1, excluding the DC component. Therefore, the first low-pass filter LP1 forms the first output signal out1. If the sensor referenced to the Wheatstone bridge RW is the same as the sensor referenced to the Wheatstone bridge WB, the value of the first output signal out1 corresponds to the value of the differential input signal Si.
[0208] The third multiplier M3 mixes the first demodulated signal DM1 with the quadrature chopper signal Cs90 to form the second demodulated signal DM2. The second low-pass filter LP2 suppresses frequencies in the second demodulated signal DM2 that correspond to frequencies in the signal spectrum of the chopper signal Cs. The second low-pass filter LP2 suppresses frequencies that correspond to frequencies in the signal spectrum of the quadrature chopper signal Cs90. The second low-pass filter LP2 suppresses frequencies that correspond to frequencies in the signal spectrum of the second chopper signal Cs2. The second low-pass filter LP2 suppresses mixing frequencies that may be generated by multiplying the chopper signal Cs with the quadrature chopper signal Cs90 and the second chopper signal Cs2. The second low-pass filter LP2 suppresses these frequencies in the second demodulated signal DM2, except for the DC component. Therefore, the second low-pass filter LP2 forms the second output signal out2. As mentioned earlier, the value of the second output signal out2 is a measure of the correct function of the input stage.
[0209] The fourth multiplier M4 mixes the first demodulated signal DM1 with the second chopped signal Cs2 to form the third demodulated signal DM3. The third low-pass filter LP3 suppresses frequencies in the third demodulated signal DM3 that correspond to frequencies in the signal spectrum of the chopped signal Cs. The third low-pass filter LP3 suppresses frequencies that correspond to frequencies in the signal spectrum of the quadrature chopped signal Cs90. The third low-pass filter LP3 suppresses frequencies that correspond to frequencies in the signal spectrum of the second chopped signal Cs2. The third low-pass filter LP3 suppresses mixing frequencies that may be generated by multiplying the chopped signal Cs with the quadrature chopped signal Cs90 and the second chopped signal Cs2. The third low-pass filter LP3 suppresses these frequencies in the third demodulated signal DM3, except for the DC component. Therefore, the third low-pass filter LP3 forms the third output signal out3. If the sensor of the reference Wheatstone bridge RW is the same as the sensor of the Wheatstone bridge WB, the user, a higher-level computer system, or another higher-level system can use the value of this third output signal out3 as a measure of the correct operation of the Wheatstone bridge WB.
[0210] exist Figure 5 In the example, signal generator G1 generates a chopped signal Cs, a quadrature chopped signal Cs90, and a second chopped signal Cs2. Preferably, the chopped signal Cs is bandwidth-limited or single-frequency. Preferably, the second chopped signal Cs2 is bandwidth-limited or single-frequency. Preferably, the quadrature chopped signal Cs90 is bandwidth-limited or single-frequency. Preferably, the quadrature chopped signal Cs90 is different from the chopped signal Cs. Preferably, the second chopped signal Cs2 is different from both the quadrature chopped signal Cs90 and the chopped signal Cs. The first low-pass filter LP1 has filter characteristics of the form of a first filter function F1[], such that out1 = F1[DM1(t)]. The second low-pass filter LP2 has filter characteristics of the form of a second filter function F2[], such that out2 = F2[DM2(t)]. The third low-pass filter LP3 has filter characteristics of the form of a third filter function F3[], such that out3 = F3[DM3(t)]. Typically, the first low-pass filter LP1, the second low-pass filter LP2, and the third low-pass filter LP3 preferably have the same filter characteristics and the same filter function F[]=F1[]=F2[]=F3[].
[0211] The chopper signal Cs, the second chopper signal Cs2, and the quadrature chopper signal Cs90 should be orthogonal to each other with respect to the first filter LP1, the second filter LP2, and the third filter LP3, respectively. In other words, the following should be true:
[0212] i) F1[Cs(t)]=0
[0213] ii) F1[Cs90(t)]=0
[0214] iii) F1[Cs2(t)]=0
[0215] iv) F1[Cs(t)×Cs90(t)]=0
[0216] v) F1[Cs(t)×Cs2(t)]=0
[0217] vi) F1[Cs90(t)×Cs2(t)]=0
[0218] vii) F2[Cs(t)]=0
[0219] viii) F2[Cs90(t)]=0
[0220] ix) F2[Cs2(t)]=0
[0221] x) F2[Cs(t)×Cs90(t)]=0
[0222] xi) F2[Cs(t)×Cs2(t)]=0
[0223] xii) F2[Cs90(t)×Cs2(t)]=0
[0224] xiii) F3[Cs(t)]=0
[0225] xiv) F3[Cs90(t)]=0
[0226] xv) F3[Cs2(t)]=0
[0227] xvi) F3[Cs(t)×Cs90(t)]=0
[0228] xvii) F3[Cs(t)×Cs2(t)]=0
[0229] xviii) F3[Cs90(t)×Cs2(t)]=0
[0230] Here, Cs(t) should represent the time progression of the value of the chopping signal Cs, Cs90(t) should represent the time progression of the value of the quadrature chopping signal Cs90, and Cs2(t) should represent the time progression of the value of the second chopping signal Cs2.
[0231] Furthermore, the first filter function F1[] should preferably be a fundamentally linear filter function. That is, for the sum of the first example signal X1(t) and the second example signal X2(t), and for the real value α, the following should hold:
[0232] A) F1[X1(t)+X2(t)]=F1[X1(t)]+F1[X2(t)]
[0233] B) F1[α×X1(t)]=α×F1[X1]
[0234] Furthermore, the second filter function F2[] should preferably be a fundamentally linear filter function. That is, for the sum of the first example signal X1(t) and the second example signal X2(t), and for the real value α, the following should hold:
[0235] C) F2[X1(t)+X2(t)]=F2[X1(t)]+F2[X2(t)]
[0236] D) F2[α×X1(t)]=α×F2[X1]
[0237] Finally, the third filter function F3[] should preferably be a fundamentally linear filter function. That is, for the sum of the first example signal X1(t) and the second example signal X2(t), and for the real value α, the following should hold:
[0238] E) F3[X1(t)+X2(t)]=F3[X1(t)]+F3[X2(t)]
[0239] F) F3[α×X1(t)]=α×F3[X1]
[0240] Finally, the first filter function F1[], the second filter function F2[], and the third filter function F3[] should each have low-pass characteristics. In other words, the following should be true:
[0241] F1[1]=β1, F2[1]=β2 and F3[1]=β3, where β1 is a non-zero real constant, β2 is a non-zero real constant and β3 is a non-zero real constant.
[0242] For example, the chopping signal Cs can be a single-frequency PWM signal with values of -1 and 1, a 50% duty cycle, and the chopping signal frequency. Then, the quadrature chopping signal Cs90 can be, for example, a + / -90° phase-shift signal with values of -1 and 1, a 50% duty cycle, and the chopping signal frequency. Alternatively, the quadrature chopping signal Cs90 can be a single-frequency PWM signal with values of -1 and 1 and a 50% duty cycle, and a signal frequency that is, for example, an integer multiple of the chopping signal frequency. The chopping signal Cs can also be a bandwidth-limited non-single-frequency signal. The quadrature chopping signal Cs90 can also be a bandwidth-limited non-single-frequency signal. Similarly, the second chopping signal Cs2 can be a bandwidth-limited non-single-frequency signal. The only important thing is that the quadrature conditions i) to xviii) are satisfied. In other respects, the choice of signals is free. Typically, the chopping signal Cs is periodic, and the second chopping signal Cs2 and the quadrature chopping signal Cs90 are periodic. When necessary, it is useful to provide sample and hold circuits for the first low-pass filter LP1, the second low-pass filter LP2, and the third low-pass filter LP3. In this case, it is useful to sample the output of the first low-pass filter LP1 using the first hold circuit when quadrature conditions i) to xviii) are met. Then, the first hold circuit outputs the sampled first value as the value of the first output signal out1 until the next quadrature conditions i) to xviii) are met. Furthermore, it is useful to sample the output of the second low-pass filter LP2 using the second hold circuit when quadrature conditions i) to xviii) are met. Then, the second hold circuit outputs the sampled second value as the value of the second output signal out2 until the next quadrature conditions i) to xviii) are met. Finally, it is useful to sample the output of the third low-pass filter LP3 using the third hold circuit when quadrature conditions i) to xviii) are met. Then, the third holding circuit outputs the third value sampled in this way as the value of the third output signal out3, until the quadrature condition i) to xviii) is satisfied again.
[0243] exist Figure 5 In the example, the test signal generator TSG (which may be part of the signal generator G1) generates the test signal TSS from the quadrature chopping signal Cs90. The test signal generator TSG sets the amplitude according to a preset value.
[0244] The sensor system is designed to implement some circuit components either through digital circuitry or through a signal processor system with appropriate programming. These circuit components specifically involve a digital filter DF, a phase compensator PC, a signal generator G1, a test signal generator TSG, a second multiplier M2, a third multiplier M3, a fourth multiplier M4, a first low-pass filter LP1, a second low-pass filter LP2, and a third low-pass filter LP3.
[0245] Preferably, the comparison device (e.g., a cooperating first and second comparator or the signal processor) compares the value of the second output signal with a range of expected values defined by the first and second expected values. If the value of the second output signal is between the first and second expected values (i.e., within the expected value range), then the input stage comprising the first multiplier M1, the differential amplifier (DV1), the analog-to-digital converter (ADC), the digital filter DF, the phase compensator PC, and the second multiplier M2 is operating correctly. Therefore, the sensor system, the higher-level computer system, or another higher-level device can thus conclude that the input stage is functioning correctly.
[0246] Preferably, the second comparison device (e.g., a cooperating third and fourth comparator or the signal processor) compares the value of the third output signal out3 with a second expected value range defined by the third and fourth expected values. If the value of the third output signal out3 is between the third and fourth expected values (i.e., within the expected value range), then the Wheatstone bridge WB operates correctly relative to the reference Wheatstone bridge RW. Therefore, the sensor system, the higher-level computer system, or another higher-level device can thus conclude that the function of the Wheatstone bridge WB is correct.
[0247] Therefore, the six main operation options are as follows:
[0248]
[0249] Figure 6 To a large extent correspond to Figure 5 However, the difference lies in the fact that the first differential modulation voltage V comes from the first voltage source V1 and the second voltage source V2 and depends on the test signal TSS. mod1 The excitation voltage of the Wheatstone bridge WB is modulated. The voltages of the first voltage source V1 and the second voltage source V2 are preferably determined by the test signal TSS in an opposite manner to each other. Figure 6 and Figure 5 Another difference is that the second differential modulation voltage V comes from the third voltage source V1b and the fourth voltage source V2b and depends on the test signal TSS. mod2The excitation voltage of the reference Wheatstone bridge RW is modulated. The voltages of the third voltage source V1b and the fourth voltage source V2b are preferably determined by the test signal TSS in an opposite manner to each other.
[0250] The modulation of both the differential input signal Si and the differential reference signal Rs is proportional to the test signal TSS. Figure 6 The advantage of this system is that the test signal path includes a Wheatstone bridge WB and a reference Wheatstone bridge RW. The disadvantage is the significant reduction in excitation voltage, and therefore, a significant reduction in the useful signal swing of the input signal Si. The first adder is then omitted. Signal processing is performed in a manner similar to that shown in the preceding figures.
[0251] For example, used to generate the first differential modulation voltage V in the Wheatstone bridge WB. mod1 The differential voltage source consists of a first voltage source V1 and a second voltage source V2. The first voltage source V1 is connected between a first resistor R1 and a first power supply voltage line VDD. The voltage of the first voltage source V1 depends on the test signal TSS. The second voltage source V2 is connected between a third resistor R3 and the first power supply voltage line VDD. The voltage of the second voltage source V2 also depends on the test signal TSS. The voltages of the first voltage source V1 and the second voltage source V2 depend on the test signal TSS in opposite ways. Except for this difference in sign regarding their dependence on the test signal TSS, the first voltage source V1 and the second voltage source V2 are preferably designed identically. They are preferably thermally coupled such that their behavior is substantially the same. Therefore, they are preferably fabricated on the same semiconductor substrate.
[0252] For example, used to generate a second differential modulation voltage V in the reference Wheatstone bridge RW. mod2 The differential voltage sources consist of a third voltage source V1b and a fourth voltage source V2b. The third voltage source V1b is connected between a fifth resistor R5 and the first power supply voltage line VDD. The voltage of the third voltage source V1b depends on the test signal TSS. The fourth voltage source V2b is connected between a seventh resistor R7 and the first power supply voltage line VDD. The voltage of the fourth voltage source V2b also depends on the test signal TSS. Here, the voltages of the third and fourth voltage sources depend on the test signal TSS in opposite ways to each other. Except for this difference in sign regarding their dependence on the test signal TSS, the third and fourth voltage sources V1b are preferably designed identically. They are preferably thermally coupled so that their behavior is substantially the same. Therefore, it is preferable that they are fabricated on the same semiconductor substrate.
[0253] The voltages of the first voltage source V1 and the third voltage source V1b depend on the test signal TSS in the same manner. The voltages of the second voltage source V2 and the fourth voltage source V2b depend on the test signal TSS in the same manner. The first voltage source V1 and the third voltage source V1b are preferably designed identically. The second voltage source V2 and the fourth voltage source V2b are preferably designed identically. Preferably, all four voltage sources are thermally coupled such that they behave substantially identically, except for the symbols stated above. Therefore, preferably, they are fabricated in a matched manner on the same semiconductor substrate.
[0254] Figure 7 To a large extent correspond to Figure 6 However, the difference lies in the fact that it depends on the first differential modulation voltage V of the test signal TSS. mod1 The excitation voltage of the Wheatstone bridge WB is not modulated. Here, the first differential modulation voltage V mod1 This is the differential voltage between the output potential of the first voltage source V1 and the output potential of the second voltage source V2. Preferably, the voltages of the first voltage source V1 and the second voltage source V2 depend on the test signal TSS in opposite ways. Figure 6 In contrast, the second differential modulation voltage V depends on the test signal TSS. mod2 The excitation voltage of the reference Wheatstone bridge RW was not modulated. The second differential modulation voltage V... mod2 It is the differential voltage between the output potential of the third voltage source V1b and the output potential of the fourth voltage source V2b. Preferably, the voltages of the third voltage source V1b and the fourth voltage source V2b depend on the test signal TSS in opposite ways.
[0255] Conversely, the sensor system modulates the values of the first resistor R1 and the third resistor R3 in the Wheatstone bridge WB, and references the values of the fifth resistor R5 and the seventh resistor R7 in the Wheatstone bridge RW.
[0256] exist Figure 7 In this configuration, the sensor system modulates the effective value of the first resistor R1. For this purpose, the first terminal of the first resistor R1 is connected to the second terminal of the first variable resistor RV1. Furthermore, for this purpose, the first terminal of the first variable resistor RV1, instead of the first terminal of the first resistor R1, is connected to the first power supply voltage line VDD. Here, the resistance value of the first variable resistor RV1 depends on the value of the test signal TSS. Figure 7 In the example, the test signal TSS switches a transistor connected in parallel with the resistance value of the first variable resistor RV1. For the purposes of this document, this transistor and the resistance value connected in parallel with it together form the first variable resistor RV1. The transistor of the first variable resistor RV1 is controlled by the test signal TSS, which is inverted by the first inverting amplifier INV1.
[0257] exist Figure 7 In this configuration, the sensor system modulates the effective value of the third resistor R3. For this purpose, the first terminal of the third resistor R3 is connected to the second terminal of the second variable resistor RV2. Furthermore, for this purpose, the first terminal of the second variable resistor RV2, instead of the first terminal of the third resistor R3, is connected to the first power supply voltage line VDD. Here, the resistance value of the second variable resistor RV2 depends on the value of the test signal TSS. Figure 7 In the example, the test signal TSS switches the transistor connected in parallel with the resistance value of the second variable resistor RV2. For the purposes of this document, this transistor and the resistance value connected in parallel with it together form the second variable resistor RV2. Therefore, the test signal TSS controls the transistor of the second variable resistor RV2.
[0258] exist Figure 7 In this configuration, the sensor system modulates the effective value of the fifth resistor R5. For this purpose, the first terminal of the fifth resistor R5 is connected to the second terminal of the third variable resistor RV3. Furthermore, for this purpose, the first terminal of the third variable resistor RV3, instead of the first terminal of the fifth resistor R5, is connected to the first power supply voltage line VDD. Here, the resistance value of the third variable resistor RV3 depends on the value of the test signal TSS. Figure 7 In the example, the test signal TSS switches the transistor connected in parallel with the resistance value of the third variable resistor RV3. For the purposes of this document, this transistor and the resistance value connected in parallel with it together form the third variable resistor RV3. The transistor of the third variable resistor RV3 is controlled by the test signal TSS, which is inverted by the second inverting amplifier INV2.
[0259] exist Figure 7 In this configuration, the sensor system modulates the effective value of the seventh resistor R7. For this purpose, the first terminal of the seventh resistor R7 is connected to the second terminal of the fourth variable resistor RV4. Furthermore, for this purpose, the first terminal of the fourth variable resistor RV4, instead of the first terminal of the seventh resistor R7, is connected to the first power supply voltage line VDD. Here, the resistance value of the fourth variable resistor RV4 depends on the value of the test signal TSS. Figure 7 In the example, the test signal TSS switches the transistor connected in parallel with the resistance value of the fourth variable resistor RV4. For the purposes of this document, this transistor and the resistance value connected in parallel with it together form the fourth variable resistor RV4. Therefore, the test signal TSS controls the transistor of the fourth variable resistor RV4.
[0260] With this exemplary configuration, the test signal TSS proportionally modulates the differential input signal Si and the differential reference signal Rs. Figure 7The advantage of this system is that the test signal path includes a Wheatstone bridge WB and a reference Wheatstone bridge RW. The disadvantage is that it effectively reduces the excitation voltage, and therefore effectively reduces the travel. The first adder is then omitted. Signal processing is performed in a manner similar to that shown in the preceding figures.
[0261] Preferably, the resistance values of the first variable resistor RV1 and the third variable resistor RV3 depend on the test signal TSS in the same way.
[0262] Preferably, the resistance values of the second variable resistor RV2 and the fourth variable resistor RV4 depend on the test signal TSS in the same way.
[0263] Preferably, the resistance values of the first variable resistor RV1 and the second variable resistor RV2 depend on the test signal TSS in an opposite but otherwise identical manner.
[0264] Preferably, the resistance values of the third variable resistor RV3 and the fourth variable resistor RV4 depend on the test signal TSS in an opposite but otherwise identical manner.
[0265] Preferably, the first variable resistor RV1 and the second variable resistor RV2 are designed identically (matched).
[0266] Preferably, the third variable resistor RV3 is designed to be identical (matched) to the fourth variable resistor RV4.
[0267] Preferably, the first variable resistor RV1 and the third variable resistor RV3 are designed identically (matched).
[0268] Preferably, the second variable resistor RV2 is designed identically (matched) to the fourth variable resistor RV4.
[0269] List of reference numerals
[0270] A1 First Adder
[0271] ADC (Analog-to-Digital Converter)
[0272] Cs chopping signal
[0273] Cs2 Second Chopper Signal
[0274] CS90 Quadrature Chopper Signal
[0275] DF digital filter
[0276] The input signal of the DFI digital filter DF
[0277] Output signal of DFO digital filter DF
[0278] DM1 first demodulated signal
[0279] DM2 Second Demodulation Signal
[0280] DM3 Third Demodulation Signal
[0281] DS Dickie Switch
[0282] DV differential amplifier
[0283] G1 signal generator
[0284] GND Second power supply voltage line
[0285] INV1 First Inverting Amplifier or Inverter
[0286] INV2 Second Inverting Amplifier or Inverter
[0287] LP1 First Low-Pass Filter
[0288] LP2 Second Low-Pass Filter
[0289] LP3 Third Low-Pass Filter
[0290] M1 First Multiplier
[0291] M2 Second Multiplier
[0292] M3 Third Multiplication Device
[0293] M4 Fourth Multiplier
[0294] MSi product input signal
[0295] MSiT has a differential product input signal with test signal components.
[0296] out1 First output signal
[0297] out2 Second output signal
[0298] out3 Third output signal
[0299] PC phase compensator
[0300] PCO phase compensator output signal
[0301] R1 is the first resistor.
[0302] R2, the second resistor
[0303] R3 Third resistor
[0304] R4 Fourth resistor
[0305] R5, the fifth resistor
[0306] R6, the sixth resistor
[0307] R7 Seventh Resistor
[0308] R8, the eighth resistor
[0309] Rin negative reference signal
[0310] Rip positive reference signal
[0311] Rs reference signal
[0312] RV1 First Variable Resistor
[0313] RV2 Second Variable Resistor
[0314] RV3 Third Variable Resistor
[0315] RV4 Fourth Variable Resistor
[0316] RW reference Wheatstone bridge
[0317] Si differential input signal
[0318] Sin negative input signal
[0319] Sip positive input signal
[0320] SiT has a differential input signal with a test signal component.
[0321] t time
[0322] TSG Test Signal Generator
[0323] TSS test signal
[0324] WB is a Wheatstone bridge consisting of resistors R1, R2, R3, and R4.
[0325] V1 is the first voltage source;
[0326] V1b is the third voltage source;
[0327] V2 is the second voltage source;
[0328] V2b is the fourth voltage source;
[0329] V mod1 First differential modulation voltage;
[0330] V mod2 Second differential modulation voltage;
[0331] VO amplifier output signal;
[0332] VDD is the first power supply voltage line;
[0333] List of cited references
[0334] EP 2 524 389 B1,
[0335] EP 2 524 390 B1,
[0336] EP 2 524 198 B1,
[0337] EP 2 523 896 B1,
[0338] EP 2523895 B1.
[0339] Non-patent literature
[0340] Christopher R. Nerz's lecture, "Introduction to Differential Geometry".
[0341] Link
[0342] https: / / de.wikipedia.org / wiki / Lp-Raum#Der_Hilbertraum_L2
[0343] https: / / www.math.uni-tuebingen.de / de / forschung / gadr / lehre / sose2015 / diffgeo.pdf
Claims
1. A pressure sensor, in, The pressure sensor includes a sensor element (WB) in the form of a Wheatstone bridge and has four piezoresistive resistors (R1, R2, R3, R4). The pressure sensor includes a reference element (RW), which is in the form of a Wheatstone bridge and has four piezoresistive reference resistors (R5, R6, R7, R8). The reference resistors (R5, R6, R7, R8) of the reference Wheatstone bridge (RW) are arranged in the same manner as the resistors (R1, R2, R3, R4) of the Wheatstone bridge (WB), and The pressure sensor is mounted on a monolithic crystal, and The pressure sensor includes a cavity enclosed on one side by a diaphragm, and In this embodiment, the resistors (R1, R2, R3, R4) of the Wheatstone bridge (WB) are at least partially arranged on the diaphragm, and In this case, the reference resistors (R5, R6, R7, R8) of the reference Wheatstone bridge (RW) are not arranged on the diaphragm, and The first resistor (R1) of the Wheatstone bridge (WB) is similar to the fifth resistor (R5) of the reference Wheatstone bridge (RW) in that they are constructed in the same manner, and The second resistor (R2) of the Wheatstone bridge (WB) is similar to the sixth resistor (R6) of the reference Wheatstone bridge (RW) in that they are constructed in the same manner, and The third resistor (R3) of the Wheatstone bridge (WB) is similar to the seventh resistor (R7) of the reference Wheatstone bridge (RW) in that they are constructed in the same manner, and The fourth resistor (R4) of the Wheatstone bridge (WB) is similar to the eighth resistor (R8) of the reference Wheatstone bridge (RW) in that they are constructed in the same manner, and The reference Wheatstone bridge (RW) is used as a reference noise source for subsequent signal processing.
2. A pressure sensor, in, The pressure sensor includes a sensor element (WB) in the form of a Wheatstone bridge and has four piezoresistive resistors (R1, R2, R3, R4). The pressure sensor includes a reference element (RW), which is in the form of a Wheatstone bridge and has four piezoresistive reference resistors (R5, R6, R7, R8). The reference resistors (R5, R6, R7, R8) of the reference Wheatstone bridge (RW) are arranged in the same manner as the resistors (R1, R2, R3, R4) of the Wheatstone bridge (WB), and The pressure sensor is mounted on a monolithic crystal, and The pressure sensor includes a first cavity enclosed on a first side by a first diaphragm, and The first cavity has a cavity surface opposite to the first side of the first cavity, and The pressure sensor includes a reference cavity enclosed on the second side by a second diaphragm, and The reference cavity has a cavity surface opposite to the second side of the reference cavity, and In this embodiment, the resistors (R1, R2, R3, R4) of the Wheatstone bridge (WB) are at least partially arranged on the first diaphragm, and In this embodiment, the reference resistors (R5, R6, R7, R8) of the reference Wheatstone bridge (RW) are at least partially arranged on the second diaphragm, and The first resistor (R1) of the Wheatstone bridge (WB) is similar to the fifth resistor (R5) of the reference Wheatstone bridge (RW) in that they are constructed in the same manner, and The second resistor (R2) of the Wheatstone bridge (WB) is similar to the sixth resistor (R6) of the reference Wheatstone bridge (RW) in that they are constructed in the same manner, and The third resistor (R3) of the Wheatstone bridge (WB) is similar to the seventh resistor (R7) of the reference Wheatstone bridge (RW) in that they are constructed in the same manner, and The fourth resistor (R4) of the Wheatstone bridge (WB) is similar to the eighth resistor (R8) of the reference Wheatstone bridge (RW) in that they are constructed in the same manner, and The reference Wheatstone bridge (RW) serves as a reference noise source for subsequent signal processing, and Wherein, the first diaphragm is designed differently from the second diaphragm, and / or Wherein, the first cavity is designed differently from the reference cavity, and / or Wherein, the cavity surface of the first cavity opposite to the first side of the first cavity is constructed differently from the cavity surface of the reference cavity opposite to the second side of the reference cavity, and / or The first cavity and the reference cavity are respectively filled with fluid, wherein the fluid in the first cavity is different from the fluid in the reference cavity, or the fluid in the first cavity and the fluid in the reference cavity are in different states, wherein vacuum is considered as fluid.
3. A sensor, in, The sensor includes a first resistor (R1) having a first terminal and a second terminal, and The sensor includes a second resistor (R2) having a first terminal and a second terminal, and The sensor includes a third resistor (R3) having a first terminal and a second terminal, and The sensor includes a fourth resistor (R4) having a first terminal and a second terminal, and The sensor includes a first voltage source (V1) having a first terminal and a second terminal, and The sensor includes a second voltage source (V2) having a first terminal and a second terminal, and Wherein, the first terminal of the first voltage source (V1) is connected to the first power supply voltage line (VDD), and The second terminal of the first voltage source (V1) is connected to the first terminal of the first resistor (R1). Wherein, the second terminal of the first resistor (R1) is connected to the first terminal of the second resistor (R2), and The second terminal of the second resistor is connected to the second power supply voltage line (GND), and Wherein, the first terminal of the second voltage source (V2) is connected to the first power supply voltage line (VDD), and The second terminal of the second voltage source (V2) is connected to the first terminal of the third resistor (R3). The second terminal of the third resistor (R3) is connected to the first terminal of the fourth resistor (R4), and The second terminal of the fourth resistor (R4) is connected to the second power supply voltage line (GND), and Wherein, the first voltage of the first voltage source (V1) depends on the test signal (TSS), and The second voltage of the second voltage source (V2) depends on the test signal (TSS) in a manner opposite to the first voltage of the first voltage source (V1).
4. The sensor according to claim 3, in, The sensor is a pressure sensor.
5. A sensor, in, The sensor includes a first resistor (R1) having a first terminal and a second terminal, and The sensor includes a second resistor (R2) having a first terminal and a second terminal, and The sensor includes a third resistor (R3) having a first terminal and a second terminal, and The sensor includes a fourth resistor (R4) having a first terminal and a second terminal, and The sensor includes a first variable resistor (RV1) having a first terminal and a second terminal, and The sensor includes a second variable resistor (RV2) having a first terminal and a second terminal, and Wherein, the first terminal of the first variable resistor (RV1) is connected to the first power supply voltage line (VDD), and The second terminal of the first variable resistor (RV1) is connected to the first terminal of the first resistor (R1). Wherein, the second terminal of the first resistor (R1) is connected to the first terminal of the second resistor (R2), and The second terminal of the second resistor is connected to the second power supply voltage line (GND), and Wherein, the first terminal of the second variable resistor (RV2) is connected to the first power supply voltage line (VDD), and The second terminal of the second variable resistor (RV2) is connected to the first terminal of the third resistor (R3). The second terminal of the third resistor (R3) is connected to the first terminal of the fourth resistor (R4). The second terminal of the fourth resistor (R4) is connected to the second power supply voltage line (GND), and The resistance value of the first variable resistor (RV1) depends on the test signal (TSS), and The resistance value of the second variable resistor (RV2) depends on the test signal (TSS) in a manner opposite to that of the first variable resistor (RV1).
6. The sensor according to claim 5, in, The sensor is a pressure sensor.