Self-aligned die-to-wafer bonding architecture

By using surface preparation in a self-aligned die-to-wafer bonding process, accurate alignment of semiconductor dies and wafers is achieved through liquid capillary force, solving the alignment problem of small-sized interconnects and improving bonding quality and assembly efficiency.

CN122138738APending Publication Date: 2026-06-02SANDISK TECHNOLOGIES LLC
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
SANDISK TECHNOLOGIES LLC
Filing Date
2025-04-22
Publication Date
2026-06-02

AI Technical Summary

Technical Problem

As semiconductor dies and packages become smaller, the size and spacing of interconnects decrease, making it difficult to accurately align and couple interconnects during semiconductor package assembly, impacting assembly time and yield.

Method used

The self-aligned die-to-wafer bonding process is adopted, which forms hydrophilic and hydrophobic regions on the wafer and semiconductor die through surface preparation process. The accurate alignment and bonding of interconnects are achieved by using liquid capillary force. This includes forming mesa on the wafer, covering with hydrophobic layer and polymer film, removing impurities and performing hydrophilic treatment and deoxidation.

Benefits of technology

It improves bonding alignment accuracy, enhances the bonding quality and assembly efficiency of interconnects, reduces assembly time, and increases the yield and throughput of semiconductor packages.

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Abstract

A semiconductor package assembly process that uses a self-aligned die-to-wafer bonding process that aligns interconnects of a semiconductor die with corresponding interconnects of a wafer. A surface preparation process assists in the accurate alignment of the die and the wafer. The surface preparation process serves to define a liquid confinement region that helps ensure accurate alignment. Additionally, the surface preparation process helps ensure that the bonding surfaces of the wafer and the die are smooth and free of debris, which enhances the quality of the bonds between the interconnects of each component. When the surfaces of the wafer and the die have been prepared, the self-aligned die-to-wafer bonding process utilizes surface tension to align the interconnects of the die with the interconnects of the wafer.
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