Uvm verification platform automatic generation system and method based on generative artificial intelligence
By using a generative AI dynamic anchoring module, an LLM-VCS self-feedback verification module, and a conflict detection and correction module, the context window limitation and component coupling conflict in the construction of the UVM platform are resolved, enabling the automated generation of an efficient and adaptive UVM verification platform, thereby improving the automation level and code quality of chip verification.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- NANJING UNIV
- Filing Date
- 2026-03-31
- Publication Date
- 2026-06-23
AI Technical Summary
Existing technologies suffer from low efficiency, poor flexibility, and insufficient adaptability in UVM platform construction. Furthermore, large language models face context window limitations and component coupling conflicts when generated on the UVM platform, making it difficult to adapt to the diverse verification needs of different RTL designs.
It employs a generative AI dynamic anchoring module, an LLM-VCS self-feedback verification module, and a conflict detection and correction module. Through anchor file selection, dependency analysis, and dynamic sorting, a closed-loop system is formed to automatically generate the UVM platform in collaboration with the EDA toolchain. It also resolves interface inconsistencies and logical errors through iterative detection and correction mechanisms.
It improves the automation level of the UVM verification platform, enhances the collaborative capabilities and stability of generated code, reduces manual intervention, and improves the efficiency and quality of UVM verification.
Smart Images
Figure CN122262002A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of automatic UVM generation and verification. Specifically, it proposes an automated generation system and method for a UVM verification platform based on generative artificial intelligence. Background Technology
[0002] In the field of chip design, the importance of verification work is increasingly prominent, and its workload often exceeds that of the design itself. Universal Verification Methodology (UVM), as the mainstream digital circuit functional verification method in the industry, requires experienced engineers to invest significant time and effort in building its platform. Traditional UVM platform construction methods suffer from problems such as low efficiency, poor flexibility, and insufficient adaptability.
[0003] In recent years, the development of generative artificial intelligence, especially large language models, has provided new possibilities for the automation of verification platforms. However, directly applying large language models to UVM platform generation faces many challenges: First, as the complexity of design code increases, the scale of UVM platforms continues to expand, directly conflicting with the limited context window of large language models. The multi-turn dialogue mechanism of large models also leads to a reduction in the already limited context window capacity. Second, there are highly coupled dependencies between UVM platform components, which can easily lead to interface mismatches and logical errors during the generation process. If there are deviations in learning historical information during multi-turn dialogue, it will result in incorrect coupling information between UVM platform components generated by large language models. In addition, although existing methods such as UVM² have solved some of the coupling problems between UVM platform components, they adopt a fixed structure, making it difficult to adapt to the diverse verification needs of different RTL designs.
[0004] Therefore, there is an urgent need to propose an automated generation scheme for a UVM verification platform that can adapt to different RTL verification requirements, break through the limitations of large model context windows, resolve component coupling conflicts, and have self-feedback repair capabilities, so as to improve the automation level and verification efficiency of chip verification work. Summary of the Invention
[0005] Purpose of the invention: To address the shortcomings of existing technologies, this invention provides an automated system and method that can adapt to different verification requirements and efficiently generate a high-quality UVM verification platform, thereby reducing labor costs and improving the degree of automation in chip verification work.
[0006] Technical Solution: The present invention discloses an automated generation system for a UVM verification platform based on generative artificial intelligence, comprising: a generative AI dynamic anchoring module, an LLM-VCS self-feedback verification module, and a conflict detection and correction module; the generative AI dynamic anchoring module is used to solve the context window limitation problem of large language models by marking key components in the UVM platform as anchor files and generating subsequent files based on dependency priority; the LLM-VCS self-feedback verification module enables large language models to work collaboratively with the EDA toolchain, forming a closed-loop system from specification input to UVM platform generation, simulation, and debugging; the conflict detection and correction module is used to detect and correct interface inconsistencies and logical errors between generated files.
[0007] Furthermore, the generative AI dynamic anchoring module includes an anchor file selection unit, a dependency analysis unit, and a dynamic sorting unit; the anchor file selection unit selects core components as anchor files based on the importance and coupling of UVM components; the dependency analysis unit analyzes the dependencies between UVM components and derives an adapted dependency network; the dynamic sorting unit dynamically sorts the generation order of UVM files according to the criticality of dependencies.
[0008] Furthermore, the LLM-VCS self-feedback verification module includes an input parsing layer, a generation execution layer, and a result feedback layer. Different layers are generated using a dedicated large language model. The input parsing layer receives design specifications, RTL code, and verification plans, and completes the parsing and structured processing of the input information. The generation execution layer automatically generates UVM platform code based on the processing results of the input parsing layer and the pre-processing information from the generative AI dynamic anchoring module. The result feedback layer automatically calls the VCS simulation tool through a Python script to perform simulation, collects the simulation-generated error information, warnings, and simulation logs, and feeds them back to the large language model for targeted code correction.
[0009] Furthermore, the EDA toolchain uses the Synopsys VCS simulation tool, and the simulation process, error information collection, and feedback are all automated through Python scripts.
[0010] Furthermore, the conflict detection and correction module adopts a dual mechanism of iterative detection and dynamic sorting detection. First, it prioritizes the detection of UVM files on the critical path based on the importance of file dependencies. Then, it performs pairwise comparisons on the generated UVM files to achieve full detection. When a conflict is detected, it is automatically corrected by the large language model. If a conflict still exists after a file reaches a preset iteration limit, the file is excluded and marked as an abnormal file.
[0011] Furthermore, the system also includes a manual intervention mechanism. When the automatic correction of the LLM-VCS self-feedback verification module fails to resolve the error or the error cannot converge after a preset number of iterations, or when the conflict detection and correction module still has unrepairable file conflicts after iterative detection, the system automatically pauses and exports a complete problem package including error information, simulation logs, abnormal files, and dependency networks.
[0012] Furthermore, the core anchor files selected by the anchor file selection unit include transaction, interface, driver, monitor, and agent components; the core anchor files are generated first and provide context for the generation of subsequent sub-files.
[0013] The present invention discloses an automated generation method for a UVM verification platform based on generative artificial intelligence, comprising the following steps:
[0014] (1) Input the chip design specification, RTL design file, standard UVM platform reference code and verification plan into the dedicated large language model of the input parsing layer to complete the parsing and structured processing of the input information;
[0015] (2) The dependency relationship of UVM components adapted to the current RTL design is derived by the generative AI dynamic anchoring module, the dynamic sorting of file generation order is completed, the core anchor file is determined, and the UVM platform pre-information is generated.
[0016] (3) Generate a dedicated large language model for the execution layer. Based on the prior information, generate the core anchor file first, and then generate subsequent sub-files in sequence based on the anchor file and dependency priority to form the complete UVM verification platform code.
[0017] (4) The conflict detection and correction module performs dynamic sorting priority detection and full pairwise iterative detection on the generated UVM files. After a conflict is detected, the large model automatically corrects it until there is no conflict or the iteration limit is reached.
[0018] (5) The VCS simulation tool is automatically called through the Python script to simulate the UVM code. If the simulation is successful, the verification log and coverage report are output and the process ends. If the simulation fails, the code is corrected by the large model and the process is returned to this step to re-simulate.
[0019] (6) If the error still does not converge after the self-feedback correction in step (5) reaches the preset number of iterations, or if there is an unrepairable file conflict in step (4), the system exports a complete problem package for manual correction. After the manual correction is completed, return to step (5) to re-simulate until the simulation passes and the verification result is output.
[0020] Beneficial effects: Compared with the prior art, the beneficial effects of the present invention are: The present invention proposes a generative AI dynamic anchoring method specifically for the UVM platform, which effectively solves the contradiction between the context window limitation of large language models and the scale expansion of the UVM platform, and enhances the collaborative capability of UVM platform code generated in stages;
[0021] This invention constructs a self-feedback verification framework that integrates LLM and EDA toolchains, realizing an automated platform from design specifications to UVM verification, and further improving the automation level of UVM verification. This invention introduces an intelligent conflict detection mechanism, which significantly improves the quality and stability of generated code through dynamic sorting and iterative correction, and reduces the problem of VCS errors failing to converge and requiring manual intervention. Attached Figure Description
[0022] Figure 1 This is a schematic diagram of the operating architecture of the present invention;
[0023] Figure 2 This is a traditional UVM structure diagram;
[0024] Figure 3 This is a schematic diagram of the AI dynamic anchor point method module of the present invention;
[0025] Figure 4 This is a schematic diagram of the file conflict detection mechanism of the present invention;
[0026] Figure 5 This is a flowchart of the LLM-VCS self-feedback operation of the present invention;
[0027] Figure 6 This is a schematic diagram illustrating the selection of recommended anchor files and recommended sub-files according to the present invention. Detailed Implementation
[0028] The present invention will now be described in further detail with reference to the accompanying drawings.
[0029] like Figure 1 As shown, this invention proposes an automated generation system for a UVM verification platform based on generative artificial intelligence, specifically including a generative AI dynamic anchoring module, an LLM-VCS self-feedback verification framework, and a conflict detection and correction module.
[0030] The generative AI dynamic anchoring module addresses the context window limitation problem of large language models by marking key components in the UVM platform as anchor files and generating them based on dependency priority. It includes an anchor file selection unit, a dependency analysis unit, and a dynamic sorting unit. The anchor file selection unit selects core components as anchor files based on the importance and coupling of UVM components. The dependency analysis unit analyzes the dependencies between UVM components and derives an adapted dependency network. The dynamic sorting unit dynamically sorts the UVM files according to dependency criticality.
[0031] The core anchor files selected by the anchor file selection unit include transaction, interface, driver, monitor, and agent components; these core anchor files are generated first and provide context for the generation of subsequent sub-files.
[0032] The generative AI dynamic anchoring module, tailored to the characteristics of the UVM platform, analyzes the dependencies between UVM components, marks key highly coupled files as "anchor files," and generates them based on dependency priority. Each generated anchor file provides context for subsequent generation, ensuring consistency within a limited context window. Since the context window of a large language model is limited, and learning historical information further compresses the effective context window size, prioritizing the generation of anchor files based on the dependencies between UVM platform components enhances the code collaboration capabilities of the UVM platform.
[0033] The LLM-VCS self-feedback verification module integrates the large language model with EDA toolchains such as Synopsys VCS, forming a closed-loop system from specification input to UVM platform generation, simulation, and debugging. This system can automatically correct the generated code based on VCS simulation results. The UVM platform code generated by the large language model is run on VCS, a process automatically completed via Python calls. Error messages returned by VCS are then passed back to the large language model for repair, thus achieving automatic error correction. When VCS encounters convergence issues, manual intervention is required to resolve the errors. The specific LLM-VCS self-feedback verification module includes an input parsing layer, a generation execution layer, and a result feedback layer. Different layers are generated using a dedicated large language model. The input parsing layer receives design specifications, RTL code, and verification plans, and completes the parsing and structured processing of the input information. The generation execution layer automatically generates UVM platform code based on the processing results of the input parsing layer and the pre-processing information from the generative AI dynamic anchoring module. The result feedback layer automatically calls the VCS simulation tool through a Python script to perform simulation, collects the simulation error information, warnings, and simulation logs, and feeds them back to the large language model, which then performs targeted code correction.
[0034] The conflict detection and correction module is used to detect and correct interface inconsistencies and logical errors between generated files. It employs a dual mechanism of iterative detection and dynamic sorting detection. First, it prioritizes UVM files on critical paths based on the importance of file dependencies. Then, it performs pairwise comparisons on the generated UVM files to achieve full detection. When a conflict is detected, the large language model automatically corrects it. If a file still has conflicts after reaching a preset iteration limit, it is excluded and marked as an abnormal file. This module uses a dynamic sorting mechanism, prioritizing the detection of file conflicts on critical paths, and verifying and repairing them through the large language model to ensure interface consistency and platform stability. When the large language model generates UVM platform errors, problems such as syntactically correct but component misalignment may occur. To improve the convergence capability of VCS error repair, after the large language model generates UVM platform code, it dynamically sorts the code according to the LLM large language model to fix coupling issues, perform file conflict detection, and reduce component misalignment problems.
[0035] The UVM verification platform's automated generation system also includes a manual intervention mechanism. When the automatic correction of the LLM-VCS self-feedback verification module fails to resolve errors or converge after a preset number of iterations, or when file conflicts remain unresolved after iterative detection by the conflict detection and correction module, the system automatically pauses and exports a complete problem package including error information, simulation logs, abnormal files, and dependency networks.
[0036] This invention also proposes an automated generation method for a UVM verification platform based on generative artificial intelligence, comprising the following steps:
[0037] (1) Input the chip design specification, RTL design file, standard UVM platform reference code and verification plan into the dedicated large language model of the input parsing layer to complete the parsing and structuring of the input information.
[0038] First, the chip design specification and the pre-designed RTL file are imported into the large model for test planning and file directory generation. Then, the standardized UVM platform reference code is also imported into the dedicated large model as prompts and prerequisite information. The UVM code is generated using the UVM-based AI dynamic anchoring method. The generated code is then automatically called to VCS for error detection and verification. If successful, the running log and coverage file are returned. If an error occurs, the large model first repairs the error itself. If it cannot be repaired, manual intervention is required for code inspection.
[0039] (2) The dependency relationship of UVM components adapted to the current RTL design is derived by the generative AI dynamic anchoring module, the dynamic sorting of file generation order is completed, the core anchor file is determined, and the UVM platform pre-information is generated.
[0040] like Figure 2The diagram shown is a traditional UVM structure diagram. The UVM platform consists of multiple components with certain dependencies. Due to the adaptability of different projects, there are various variations of the components, making it impossible to completely determine the dependencies between UVM components. Therefore, our UVM-based AI dynamic anchoring method first analyzes the large language model, designs an adapted UVM platform for specific tasks, and derives the dependencies between the adapted UVM components, thereby improving the effectiveness of the generated UVM test platform.
[0041] (3) Generate a dedicated large language model for the execution layer. Based on the prior information, generate the core anchor file first, and then generate subsequent sub-files in sequence based on the anchor file and dependency priority to form the complete UVM verification platform code.
[0042] like Figure 3 The diagram shown illustrates the principle of the UVM-based AI dynamic anchor method of this invention. This method combines the factory mechanism of UVM, taking the chip design specification, RTL design file, reference UVM component dependencies, and reference standard UVM platform prompts as input to a large language model. The large model sequentially generates test plans, file structures, dependency importance ranking information, and other UVM platform-generated pre-information. Then, based on the pre-information, anchor files are first constructed, and sub-files are generated based on the anchor files. File conflict detection is performed using these sub-files to reduce errors in the coordination between UVM components.
[0043] (4) The conflict detection and correction module performs dynamic sorting priority detection and full pairwise iterative detection on the generated UVM files. After a conflict is detected, the large model automatically corrects it until there is no conflict or the iteration limit is reached.
[0044] like Figure 4 The diagram shown illustrates the principle of the file conflict detection mechanism of this invention. This mechanism uses pairwise file conflict detection to reduce the problem of poor generation of direct file coupling relationships. However, since pairwise conflict detection of all files takes too long, file conflict detection needs to be performed again after each modification. By using a large language model to prioritize the importance of file dependencies, file conflicts with more important dependencies are detected first, reducing the time for file conflict detection while ensuring better file adaptation.
[0045] (5) The VCS simulation tool is automatically called by the Python script to simulate the UVM code. If the simulation is successful, the verification log and coverage report will be output and the process will end. If the simulation fails, the code will be corrected by the large model and the process will be returned to this step to re-simulate.
[0046] (6) If the error still does not converge after the self-feedback correction in step (5) reaches the preset number of iterations, or if there is an unrepairable file conflict in step (4), the system exports a complete problem package for manual correction. After the manual correction is completed, return to step (5) to re-simulate until the simulation passes and the verification result is output.
[0047] like Figure 5 The diagram shows the LLM-VCS self-feedback error repair flowchart of this invention. The RTL design file requiring UVM verification, along with the UVM platform already generated by the UVM-based AI dynamic anchor module, is imported into the VCS for simulation. When an error occurs, it is transferred to a large language model dedicated to self-feedback error detection for code modification, and the VCS simulation is run again. Once the error is completely resolved and a correct result is returned, a verification log and coverage report are returned to the user. If the large language model cannot correctly resolve the error, or if the same error cannot be corrected correctly after multiple attempts, an error message is returned, requiring manual intervention to resolve the issue.
[0048] like Figure 6 The diagram illustrates the selection of recommended anchor files and sub-files according to the present invention. Based on the dependencies of the UVM verification platform, errors typically occur primarily in the transaction module, driver module, and monitor module used for transmission. As the lowest-level units, these modules have a higher probability of errors, making large language model repair more difficult. To better generate the UVM verification platform, prioritizing the generation of these files as anchor files will result in a better UVM platform generation effect.
[0049] The preferred embodiments of the present invention have been described in detail above. However, the present invention is not limited to the specific details in the above embodiments. Within the scope of the technical concept of the present invention, various equivalent transformations can be made to the technical solutions of the present invention, and these equivalent transformations all fall within the protection scope of the present invention.
Claims
1. An automated generation system for a UVM verification platform based on generative artificial intelligence, characterized in that... include: Generative AI dynamic anchoring module, LLM-VCS self-feedback verification module and conflict detection and correction module; The generative AI dynamic anchoring module is used to solve the context window limitation problem of large language models by marking key components in the UVM platform as anchor files and generating subsequent files based on dependency priority; the LLM-VCS self-feedback verification module enables large language models to work in tandem with the EDA toolchain to form a closed-loop system from specification input to generation, simulation and debugging on the UVM platform; the conflict detection and correction module is used to detect and correct interface inconsistencies and logical errors between generated files.
2. The automated generation system for the UVM verification platform based on generative artificial intelligence according to claim 1, characterized in that, The generative AI dynamic anchoring module includes an anchor file selection unit, a dependency analysis unit, and a dynamic sorting unit; the anchor file selection unit selects the core component as the anchor file based on the importance and coupling degree of the UVM component. The dependency analysis unit analyzes the dependencies between UVM components and derives an adapted dependency network; the dynamic sorting unit dynamically sorts the UVM file generation order based on dependency criticality.
3. The automated generation system for the UVM verification platform based on generative artificial intelligence according to claim 1, characterized in that, The LLM-VCS self-feedback verification module includes an input parsing layer, a generation execution layer, and a result feedback layer. Different layers are generated using a dedicated large language model. The input parsing layer receives the design specifications, RTL code, and verification plan, and completes the parsing and structured processing of the input information. The generation execution layer automatically generates UVM platform code based on the processing results of the input parsing layer and the pre-processing information of the generative AI dynamic anchoring module. The result feedback layer automatically calls the VCS simulation tool through Python scripts to perform simulation, collects the error information, warnings and simulation logs generated by the simulation and feeds them back to the large language model, which then performs targeted code correction.
4. The automated generation system for the UVM verification platform based on generative artificial intelligence according to claim 1, characterized in that, The EDA toolchain uses the Synopsys VCS simulation tool, and the simulation process, error information collection and feedback are all automated through Python scripts.
5. The automated generation system for the UVM verification platform based on generative artificial intelligence according to claim 1, characterized in that, The conflict detection and correction module adopts a dual mechanism of iterative detection and dynamic sorting detection. First, it prioritizes the detection of UVM files on the critical path based on the importance of file dependencies. Then, it performs pairwise comparisons on the generated UVM files to achieve full detection. When a conflict is detected, the large language model automatically corrects it. If a conflict still exists after a file reaches a preset iteration limit, the file is excluded and marked as an abnormal file.
6. The automated generation system for the UVM verification platform based on generative artificial intelligence according to claim 1, characterized in that, The system also includes a manual intervention mechanism. If the automatic correction of the LLM-VCS self-feedback verification module fails to resolve the error or the error cannot be converged after a preset number of iterations; If file conflicts that cannot be fixed still exist after iterative detection by the conflict detection and correction module, the system will automatically pause and export a complete problem package including error messages, simulation logs, abnormal files, and dependency networks.
7. The automated generation system for the UVM verification platform based on generative artificial intelligence according to claim 2, characterized in that, The core anchor files selected by the anchor file selection unit include transaction, interface, driver, monitor, and agent components; the core anchor files are generated first and provide context for the generation of subsequent sub-files.
8. An automated generation method for a UVM verification platform based on generative artificial intelligence, employing the system described in any one of claims 1 to 7, characterized in that, Includes the following steps: (1) Input the chip design specification, RTL design file, standard UVM platform reference code and verification plan into the dedicated large language model of the input parsing layer to complete the parsing and structured processing of the input information; (2) The dependency relationship of UVM components adapted to the current RTL design is derived by the generative AI dynamic anchoring module, the dynamic sorting of file generation order is completed, the core anchor file is determined, and the UVM platform pre-information is generated. (3) Generate a dedicated large language model for the execution layer. Based on the prior information, generate the core anchor file first, and then generate subsequent sub-files in sequence based on the anchor file and dependency priority to form the complete UVM verification platform code. (4) The conflict detection and correction module performs dynamic sorting priority detection and full pairwise iterative detection on the generated UVM files. After a conflict is detected, the large model automatically corrects it until there is no conflict or the iteration limit is reached. (5) The VCS simulation tool is automatically called through the Python script to simulate the UVM code. If the simulation is successful, the verification log and coverage report are output and the process ends. If the simulation fails, the code is corrected by the large model and the process is returned to this step to re-simulate. (6) If the error still does not converge after the self-feedback correction in step (5) reaches the preset number of iterations, or if there is an unrepairable file conflict in step (4), the system exports a complete problem package for manual correction. After the manual correction is completed, return to step (5) to re-simulate until the simulation passes and the verification result is output.