Processor cluster system and control method thereof

Abstract

The application provides a processor cluster system and a control method thereof. The processor cluster system comprises a first optical switch, a network controller, optical cables and a plurality of computing resource disks. Each computing resource disk comprises one or more optical modules and one or more graphic processors, and each graphic processor is electrically connected to the one or more optical modules. The optical modules are optically connected to the first optical switch through the optical cables. The network controller is communicatively connected to the first optical switch and the computing resource disks. The network controller is configured to control the first optical switch to switch an optical path according to data exchange requirements of the graphic processors. The first optical switch is configured to connect the optical module of any first graphic processor in a plurality of graphic processors specified by an instruction to the optical module of any second graphic processor according to the instruction of the network controller, so as to transmit a load data optical signal. Based on this, optical interconnection between any two graphic processors in the cluster can be realized, and the data transmission efficiency is improved.

Description

Technical Field

[0001] This application relates to the field of optical fiber communication technology, and in particular to a processor cluster system and its control method. Background Technology

[0002] Existing processor cluster systems typically include multiple graphics processing units (GPUs) and electrical switches (ESUs). The GPUs are connected to the ESUs via active copper cables. The ESUs enable information exchange between different GPUs by transmitting electrical signals. On one hand, the transmission rate of electrical signals is relatively slow, affecting the efficiency of information exchange between GPUs. Furthermore, as the single-channel communication rate increases, active cables can no longer meet the requirements. On the other hand, as the number of GPUs in a processor cluster increases exponentially, the limited number of ESU ports necessitates doubling the number of ESUs, leading to a significant increase in cost and power consumption. This also increases the transmission distance between GPUs, resulting in increased latency. Summary of the Invention

[0003] This application provides a processor cluster system and its control method to solve the problem that the interconnection method of the processor cluster in the prior art is difficult to meet the interconnection requirements when the number of graphics processors in the processor cluster increases.

[0004] In a first aspect, this application provides a processor cluster system, the system comprising a first optical switch, a network controller, multiple optical cables, and multiple computing resource disks; wherein each computing resource disk includes one or more optical modules and one or more graphics processors, and each graphics processor is electrically connected to one or more optical modules; the optical modules are optically connected to the first optical switch via the optical cables, and the optical modules are configured to convert load data electrical signals sent by the graphics processors into load data optical signals and transmit them to the first optical switch, and to convert load data optical signals received from the first optical switch into load data electrical signals and transmit them to the graphics processors; the network controller is communicatively connected to the first optical switch and the computing resource disks respectively; the network controller is configured to control the first optical switch to switch optical paths according to the data exchange requirements of the graphics processors; the first optical switch is an all-optical switch, configured to connect the optical paths between the optical modules of any one of the multiple graphics processors specified by the network controller and the optical modules of any one of the second graphics processors, in order to transmit the load data optical signals. In some implementations, the first optical switch has multiple optical input ports and multiple optical output ports; each optical module has an optical transmitting port and an optical receiving port; the optical cable includes at least two optical fibers, the optical transmitting port of each optical module is optically connected to a corresponding optical input port on the first optical switch through one of the optical fibers, and the optical receiving port is optically connected to a corresponding optical output port on the first optical switch through the other optical fiber; the first optical switch is configured to switch the load data optical signal received at a specified optical input port to a specified optical output port according to the optical path switching command sent by the network controller.

[0005] In some implementations, the first optical switch has multiple optical input ports and multiple optical output ports; each optical module has an optical transmitting port and an optical receiving port; the optical cable includes at least two optical fibers, the optical transmitting port of each optical module is optically connected to a corresponding optical input port on the first optical switch through one of the optical fibers, and the optical receiving port is optically connected to a corresponding optical output port on the first optical switch through the other optical fiber; the first optical switch is configured to transmit the load data optical signal received at a specified optical input port to a specified optical output port according to the instruction sent by the network controller.

[0006] In some implementations, an optical transmitter port and a corresponding optical receiver port of the same optical module constitute a first duplex optical interface; an optical input port and an optical output port of the same optical module connected on the first optical switch constitute a second duplex optical interface; and the two optical fibers connecting the first duplex optical interface and the second duplex optical interface form a duplex fiber patch cord.

[0007] In some implementations, multiple optical input ports of the first optical switch are located on the first side of the first optical switch, and multiple optical output ports are located on the second side of the first optical switch.

[0008] In some implementations, the system further includes a second optical switch, wherein the first optical switch is a primary all-optical switch and the second optical switch is a secondary all-optical switch, and multiple first optical switches are optically connected to the second optical switch respectively; the second optical switch is communicatively connected to the network controller and configured to connect the optical path between a specified port of a specified first optical switch and a specified port of another specified first optical switch according to the instructions sent by the network controller.

[0009] In some implementations, the computing resource disk further includes a circuit board and a pluggable electrical interface. The graphics processor and the pluggable electrical interface are located on the circuit board and are both electrically connected to the circuit board. The optical module is electrically connected to the circuit board and the graphics processor through the pluggable electrical interface.

[0010] In some implementations, the optical module is an LPO optical module, including an optical transmitter and an optical receiver. The optical transmitter includes an optical transmitter port, a wavelength division multiplexer, an optical modulator, a linear driver, and a light source; the optical receiver includes an optical receiver port, a wavelength division multiplexer, a photodetector, and a transimpedance amplifier.

[0011] The linear driver is used to drive the optical modulator to modulate the received load data electrical signal onto the light beam emitted by the light source to convert it into a load data optical signal. The wavelength division multiplexer is used to multiplex multiple load data optical signals into a single composite load data optical signal, which is then output from the optical emission port.

[0012] The wave demultiplexer is used to demultiplex a single composite load data optical signal received by the optical receiving port into multiple load data optical signals, and transmit them to the corresponding photodetectors respectively. The photodetectors convert the received load data optical signals into load data electrical signals, which are then processed by the transimpedance amplifier and output to the graphics processor.

[0013] In some implementations, the computing resource disk further includes a circuit board, on which the graphics processor is disposed and electrically connected; the optical module is disposed on the circuit board in a co-package form.

[0014] In some implementations, each optical module is configured to transmit and receive load data optical signals at a rate of at least 1.6 Tb / s; each graphics processor is configured with four of the optical modules.

[0015] In some implementations, each computing resource disk is configured with at least two of the graphics processors; the first optical switch includes at least 144 optical input ports and at least 144 optical output ports, which are respectively connected to at least 36 of the graphics processors.

[0016] Secondly, this application proposes a control method for a processor cluster system, the method being applied to the processor cluster system described in any of the above implementations; the plurality of graphics processors each have their own graphics processor identifier, the first optical switch has a plurality of optical input ports and a plurality of optical output ports, the plurality of optical input ports having corresponding input port identifiers, and the plurality of optical output ports having corresponding output port identifiers; the network controller pre-stores a mapping relationship between each of the graphics processor identifiers and the input port identifiers and output port identifiers of the first optical switch;

[0017] The method includes:

[0018] The network controller obtains a data transmission instruction, which indicates that a first graphics processor and a second graphics processor need to be interconnected to transmit data. The first graphics processor and the second graphics processor are graphics processors located in two different computing resource disks.

[0019] The network controller determines the interconnection path according to the data transmission instruction and the mapping relationship, generates an optical path switching instruction based on the interconnection path and sends it to the first optical switch, and generates a data transmission instruction based on the data transmission instruction and sends it to the first graphics processor; wherein, determining the interconnection path includes determining the first optical module corresponding to the first graphics processor, the first optical input port and the first optical output port of the first optical switch connected to the first optical module, the second optical module corresponding to the second graphics processor, and the second optical input port and the second optical output port of the first optical switch connected to the second optical module;

[0020] The first optical switch receives the optical path switching command and connects the optical path between the first optical input port and the second optical output port, as well as the optical path between the first optical output port and the second optical input port, according to the optical path switching command, so as to connect the optical path between the first optical module and the second optical module;

[0021] The first graphics processor receives and executes the data transmission command, and sends the load data electrical signal carrying the data to the first optical module;

[0022] The first optical module receives the load data electrical signal, converts the load data electrical signal into a load data optical signal, and sends it to the first optical switch. The load data optical signal is then transmitted to the second optical module via the first optical switch.

[0023] The second optical module receives the load data optical signal, converts the load data optical signal into a load data electrical signal, and transmits the load data electrical signal to the second graphics processor;

[0024] The second graphics processor receives the load data electrical signal, extracts the data from the load data electrical signal, and processes the data.

[0025] In some implementations, the method further includes:

[0026] Before generating the optical path switching command, the network controller determines the communication status of the first graphics processor and the second graphics processor;

[0027] Based on the communication status, determine whether there is a communicable interconnect path between the first graphics processor and the second graphics processor.

[0028] If so, generate an optical path switching command;

[0029] If not, determine the service sequence for accessing the first graphics processor and the second graphics processor based on the communication status, and wait for the generation of an optical path switching instruction.

[0030] In some implementations, the communication state includes whether all optical modules corresponding to the first graphics processor are in a occupied state, and whether all optical modules corresponding to the second graphics processor are in a occupied state.

[0031] In some implementations, the method further includes:

[0032] Before generating the optical path switching command, the network controller determines whether there is any communication link node blockage after adding the optical connection between the first graphics processor and the second graphics processor;

[0033] If it is determined that there is no communication link node blockage, an optical path switching command is generated;

[0034] If a communication link node is found to be blocked, wait for the first time threshold, and then check again whether there is a communication link node blockage, until there is no communication link node blockage.

[0035] This application can achieve the following beneficial effects: This application uses a first optical switch in the processor cluster to perform all-optical switching, realizing arbitrary optical interconnection between each graphics processor, which can effectively improve the signal transmission rate, reduce the signal transmission delay, and meet higher single-channel communication rates, reduce the number of cables, and reduce the complexity of interconnection; in addition, the optical switch has a smaller size and more optical ports, which can meet the optical interconnection of a larger number of graphics processors, thereby reducing the power consumption and cost of the processor cluster system. Attached Figure Description

[0036] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the structures shown in these drawings without creative effort.

[0037] Figure 1 A schematic diagram of the structure of a processor cluster system provided for an embodiment of this application;

[0038] Figure 2 A schematic diagram of the structure of a first optical switch provided for an embodiment of this application;

[0039] Figure 3 A schematic diagram of the structure of a processor cluster system provided for an embodiment of this application;

[0040] Figure 4 A schematic diagram of the structure of an optical module provided for an embodiment of this application;

[0041] Figure 5 A schematic diagram of the structure of a processor cluster system provided for an embodiment of this application;

[0042] Figure 6 A schematic diagram of the structure of a processor cluster system provided for an embodiment of this application;

[0043] Figure 7 A schematic diagram of the structure of a processor cluster system provided for an embodiment of this application;

[0044] Figure 8A schematic diagram of the structure of a processor cluster system provided for an embodiment of this application;

[0045] Figure 9 A flowchart illustrating a control method for a processor cluster system provided in an embodiment of this application;

[0046] Figure 10 This is a schematic diagram of the structure of a processor cluster system provided for an embodiment of this application.

[0047] Figure label:

[0048] 1-First optical switch, 11-Optical input port, 12-Optical output port, 13-Extended optical input port, 14-Extended optical output port, 2-Network controller, 3-Optical cable, 31-Fiber optic cable, 4-Computing resource disk, 41-Optical module, 411-Optical transmit port, 412-Optical receive port, 42-Graphics processor, 43-Circuit board, 44-Pluggable electrical interface, 5-Second optical switch, 413-Wavelength divider / multiplexer, 414-Photodetector, 415-Transimpedance amplifier, 416-Wavelength division multiplexer, 417-Optical modulator, 418-Linear driver, 419-Light source. Detailed Implementation

[0049] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. The components of the embodiments of this application described and shown in the accompanying drawings can generally be arranged and designed in various different configurations.

[0050] Therefore, the following detailed description of the embodiments of this application provided in the accompanying drawings is not intended to limit the scope of the claimed application, but merely to illustrate selected embodiments of the application. All other embodiments obtained by those skilled in the art based on the embodiments of this application without inventive effort are within the scope of protection of this application.

[0051] It should be noted that similar reference numerals and letters in the following figures indicate similar items; therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures. Furthermore, in the description of this application, terms such as "first," "second," etc., are used only to distinguish descriptions and should not be construed as indicating or implying relative importance.

[0052] It should be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0053] In the description of this application, it should also be noted that, unless otherwise expressly specified and limited, the terms "set" and "connection" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in the application based on the specific circumstances.

[0054] To achieve larger processor cluster systems and meet rapidly growing data processing demands, this application proposes a processor cluster system and its control method to address the problem that existing interconnection methods for processor clusters are insufficient to meet the interconnection requirements as the number of graphics processors in the processor cluster increases.

[0055] The following detailed description of some embodiments of this application is provided in conjunction with the accompanying drawings. Unless otherwise specified, the following embodiments and features can be combined with each other.

[0056] This application provides a processor cluster system, see reference. Figure 1As shown, the system includes a first optical switch 1, a network controller 2, multiple optical cables 3, and multiple computing resource disks 4. Each computing resource disk 4 includes one or more optical modules 41 and one or more graphics processors 42. Each graphics processor 42 is electrically connected to one or more optical modules 41. The optical modules 41 are optically connected to the first optical switch 1 via optical cables 3. The optical modules 41 are configured to convert the load data electrical signals sent by the graphics processors 42 into load data optical signals and transmit them to the first optical switch 1, and to convert the load data optical signals received from the first optical switch 1 into load data electrical signals and transmit them to the graphics processors 42. The network controller 2 is communicatively connected to the first optical switch 1 and the computing resource disks 4. The network controller 2 is configured to control the first optical switch 1 to switch optical paths according to the data exchange requirements of the graphics processors 42. The first optical switch 1 is an all-optical switch, configured to connect the optical paths between any one of the first graphics processors 42 and any one of the second graphics processors 42, as specified by the network controller 2, to transmit load data optical signals.

[0057] Specifically, in this embodiment, see [reference]. Figure 1 As shown, the first optical switch 1 has multiple optical input ports 11 and multiple optical output ports 12; each optical module 41 has an optical transmitting port 411 and an optical receiving port 412; the optical cable 3 includes at least two optical fibers 31, the optical transmitting port 411 of each optical module 41 is optically connected to a corresponding optical input port 11 on the first optical switch 1 through one of the optical fibers, and the optical receiving port 412 is optically connected to a corresponding optical output port 12 on the first optical switch 1 through the other optical fiber; the first optical switch 1 is configured to transmit the load data optical signal received by a designated optical input port 11 to a designated optical output port 12 according to the instruction sent by the network controller 2.

[0058] Based on the above embodiments, during operation, the first optical switch 1 performs optical path switching according to the optical path switching command of the network controller 2 to optically connect the two optical modules corresponding to any two graphics processors that need to be interconnected. One graphics processor 42 transmits the load data electrical signal to the optical module 41 connected to it. The optical module 41 converts the load data electrical signal into a load data optical signal and transmits it to the first optical switch 1. Through the optical path of the first optical switch 1, the load data optical signal is transmitted to the optical module 41 of the other graphics processor 42. The optical module 41 of the other graphics processor 42 converts the load data optical signal into a load data electrical signal and transmits it to the graphics processor 42 connected to it.

[0059] In this embodiment, the network controller 2 communicates with the first optical switch 1 and each computing resource disk 4 via electrical cable connections to transmit control electrical signals, such as data transmission commands, data sending commands, and optical path switching commands, between the network controller 2 and the first optical switch 1 and each computing resource disk 4. In some embodiments, the network controller 2 can also communicate with the first optical switch 1 and each computing resource disk 4 via optical fiber connections. For example, at the command transmitting end, the control electrical signals to be transmitted are converted into optical signals by an optical module, and when transmitted to the command receiving end, the optical signals are converted back into electrical signals by an optical module and uploaded to the command receiving end device.

[0060] This processor cluster system uses a first optical switch 1 for all-optical switching between the various graphics processors 42, enabling arbitrary optical interconnection between the graphics processors 42. Control electrical signals are transmitted through separate transmission cables, ensuring no crossover and guaranteeing the efficiency of the all-optical network. Direct all-optical switching within the first optical switch 1 eliminates the need for any photoelectric conversion, effectively improving signal transmission rates, reducing signal transmission latency, and supporting higher single-channel communication rates while reducing the number of cables and interconnection complexity. Furthermore, the first optical switch 1 has a smaller size and more optical ports, allowing for optical interconnection of a larger number of graphics processors, thereby reducing the power consumption and cost of the processor cluster system and facilitating the implementation of larger-scale processor cluster systems. Moreover, when increasing the system's data transmission rate, only the optical module 41 and the graphics processor 42 need to be updated, without upgrading the first optical switch 1, thus reducing system upgrade costs.

[0061] In some embodiments, the optical module 41 may have a pair of optical transmitting ports 411 and optical receiving ports 412, or it may have multiple pairs of optical transmitting ports 411 and optical receiving ports 412. Based on this embodiment, multiple pairs of optical transmitting ports 411 and optical receiving ports 412 are respectively connected to the optical input port 11 and the optical output port 12, which can also achieve a higher signal transmission rate.

[0062] In this embodiment, an optical transmitter port 411 and a corresponding optical receiver port 412 of the same optical module 41 constitute a first duplex optical interface. An optical input port 11 and an optical output port 12 of the same optical module 41 connected to the first optical switch 1 constitute a second duplex optical interface. The two optical fibers 31 connecting the first and second duplex optical interfaces form a duplex fiber optic patch cord. Specifically, the first duplex optical interface can be a dual LC interface (Lucent Connector) or a dual CS interface (Subscriber Connector), and the second duplex optical interface can be a dual LC interface or a dual CS interface. Based on this embodiment, the complexity of wiring can be reduced.

[0063] In some embodiments, see Figure 2 As shown, compared to Figure 1 The optical input port 11 and the optical output port 12 can be located on different sides of the first optical switch 1. Specifically, multiple optical input ports 11 of the first optical switch 1 are located on the first side of the first optical switch 1, and multiple optical output ports 12 are located on the second side of the first optical switch 1. The optical transmit port 411 and the optical receive port 412 of the optical module 41 are respectively connected to the optical input port 11 and the optical output port 12 of the first optical switch 1 via two independent optical fiber patch cables. Based on this embodiment, it is advantageous for the optical module 41 to be more flexibly deployed above or below the first optical switch 1.

[0064] In some embodiments, see Figure 3 As shown, the computing resource disk 4 also includes a circuit board 43 and a pluggable power interface 44. The graphics processor 42 and the pluggable power interface 44 are located on the circuit board 43 and are both electrically connected to the circuit board 43. The optical module 41 is electrically connected to the circuit board 43 and the graphics processor 42 through the pluggable power interface 44. The use of a pluggable power interface facilitates the replacement of the optical module and makes system maintenance and upgrades easier.

[0065] In some embodiments, see Figure 4 As shown, the aforementioned optical module 41 can be an LPO (Linear-drive Pluggable Optics) optical module, including an optical transmitter and an optical receiver. The optical transmitter includes an optical transmitter port 411, a wavelength division multiplexer 416, an optical modulator 417, a linear driver 418, and a light source 419; the optical receiver includes an optical receiver port 412, a wavelength division multiplexer 413, a photodetector 414, and a transimpedance amplifier 415; the linear driver 418 is used to drive the optical modulator 417 to modulate the received load data electrical signal onto the light beam emitted by the light source 419 to convert it into load data optical light. The wavelength division multiplexer 416 is used to multiplex multiple load data optical signals into a single composite load data optical signal, which is output from the optical transmitter port 411. The wavelength division demultiplexer 413 is used to demultiplex the single composite load data optical signal received by the optical receiver port 412 into multiple load data optical signals, which are then transmitted to the corresponding photodetectors 414. The photodetectors 414 convert the received load data optical signals into load data electrical signals, which are then processed by the transimpedance amplifier 415 and output to the graphics processor 42. Using an LPO optical module can effectively reduce the cost of the optical module, thereby reducing the system upgrade and maintenance costs. In some embodiments, conventional pluggable optical modules or silicon photonics modules can also be used.

[0066] In some embodiments, the computing resource disk 4 further includes a circuit board 43, on which a graphics processor 42 is disposed and electrically connected; and an optical module 41 is disposed on the circuit board 43 in a co-packaged form. The co-packaged form of the optical module 41 and the graphics processor 42 on the same circuit board 43 effectively shortens the transmission distance between the optical module 41 and the graphics processor 42, improves high-frequency performance, and further enhances the transmission rate. In the co-packaged design, the light source 419 can be disposed outside the optical module 41 or disposed together with the optical module 41 on the circuit board 43.

[0067] In some embodiments, a graphics processor 42 can be connected to multiple optical modules 41. When the graphics processor 42 needs to interact with other graphics processors, it can convert its output load data electrical signal into load data optical signal and transmit it to the first optical switch 1 through any optical module 41. Simultaneously, it can convert the received load data optical signal into load data electrical signal and transmit it to the connected graphics processor 42 through the same optical module 41. The same graphics processor 42 may be interconnected with multiple graphics processors 42 simultaneously through multiple optical modules 41. Simultaneous transmission by multiple optical modules 41 can achieve a higher signal transmission rate.

[0068] Specifically, in this embodiment, see [reference]. Figure 5 As shown, each graphics processor 42 is configured with four optical modules 41, each optical module 41 being configured to transmit and receive load data optical signals at a rate of at least 1.6 Tb / s. In other embodiments, the number of optical modules 41 configured in each graphics processor 42 can be designed according to actual needs, and the rate of the optical modules 41 can also be configured according to actual usage requirements.

[0069] In this embodiment, see Figure 5 As shown, a rack is configured with 18 computing resource disks 4, each computing resource disk 4 is configured with two graphics processors 42, and each graphics processor is configured with four optical modules, for a total of 144 optical modules in the rack. An optical switch 1, including 144 optical input ports 11 and 144 optical output ports 12, can be used to achieve arbitrary optical interconnection of 36 graphics processors within the rack. Each optical input port 11 and optical output port 12 of the optical switch 1 is connected to one of the 36 graphics processors 42 within the rack. (See reference...) Figure 6 As shown, by using a first optical switch 1 with 288 optical input ports 11 and 288 optical output ports 12, arbitrary optical interconnection of 72 graphics processors 42 in two cabinets (cabinet 01 and cabinet 02) can be realized, which can effectively reduce the complexity of cable connection and reduce the number of switches used.

[0070] In some embodiments, a first optical switch 1, including 512 optical input ports 11 and 512 optical output ports 12, can be used to simultaneously connect more graphics processors 42, enabling arbitrary optical interconnection of more graphics processors 42 and forming a larger processor cluster. With the maturity of optical switching chip technology, a single optical switch may also have more optical input ports 11 and optical output ports 12, allowing for the simultaneous connection of more graphics processors 42. The number of ports on the optical switch is not limited here.

[0071] In current graphics processing unit (GPU) clusters, the GPUs are connected via electrical switches. To achieve arbitrary interconnection between 72 GPUs in two racks, 1296 400G active copper cables, 1296 400G optical modules, and 36 electrical switching chips are required, resulting in an excessive number of cables and complex wiring. In the GPU cluster system of this application, as described in the above embodiment, achieving arbitrary interconnection between 72 GPUs in two racks requires only one 288x288 port optical switching chip, 288 1.6Tb / s optical modules, and 288 full-duplex fiber optic patch cords or 576 optical fibers. For the same scale GPU cluster system, the solution in this application reduces both the number of switching chips and cables by more than half compared to existing technologies. This effectively reduces cost and system power consumption, and also simplifies cable connection complexity, facilitating the implementation of larger GPU cluster systems.

[0072] In some embodiments, the number of computing resource disks configured in each rack, the number of graphics processors configured in each computing resource disk, the number of optical modules configured in each graphics processor, and the transmission rate configured in each optical module can all be configured according to actual usage requirements. Each first optical switch 1 can connect to one or more graphics processors 42 in one rack.

[0073] In some embodiments, see Figure 7 As shown, the processor cluster system also includes a second optical switch 5. The first optical switch 1 is a first-level all-optical switch, and the second optical switch 5 is a second-level all-optical switch. Multiple first optical switches 1 are optically connected to the second optical switch 5 respectively. The second optical switch 5 is communicatively connected to the network controller 2 and configured to connect the optical path between a specified port of a specified first optical switch and a specified port of another specified first optical switch according to the instructions sent by the network controller 2.

[0074] For details, please refer to Figure 8As shown, the second optical switch 5 includes multiple optical input ports 11 and multiple optical output ports 12; the first optical switch 1 includes multiple extended optical input ports 13 and multiple extended optical output ports 14; the extended optical input ports 13 are configured to be optically connected to the optical output ports 12 of the second optical switch 5, and the extended optical output ports 14 are configured to be optically connected to the optical input ports 11 of the second optical switch 5. The second optical switch 5, according to the instructions sent by the network controller 2, switches the load data optical signal received by the optical input port 11 of one designated second optical switch 5 to the optical output port 12 of another designated second optical switch 5, thereby realizing optical transmission between the two first optical switches 1.

[0075] Based on the above embodiments, by cascading the second optical switch 5 with the first optical switch 1, or by expanding their interconnection, a more-ported all-optical switching mechanism can be formed, enabling a larger graphics processor cluster system. For example, one second optical switch 5 can be cascaded with two first optical switches 1 to achieve arbitrary optical interconnection of 144 graphics processors 42 in the four racks, or even arbitrary optical interconnection of graphics processors 42 in more racks. That is, when arbitrary interconnection of graphics processors 42 in more racks is required, only optical switches need to be added, without the need to invest in optical modules 41.

[0076] This application proposes a control method for a processor cluster system, see reference. Figure 9 As shown, the method is applied to the processor cluster system described in any of the above embodiments; multiple graphics processors 42 each have their own graphics processor identifier, the first optical switch 1 has multiple optical input ports 11 and multiple optical output ports 12, the multiple optical input ports 11 have corresponding input port identifiers, and the multiple optical output ports 12 have corresponding output port identifiers; the network controller 2 pre-stores the mapping relationship between each graphics processor identifier and the input port identifiers and output port identifiers of the first optical switch 1. In specific implementation, the method may include the following:

[0077] S101: Network controller 2 obtains a data transmission instruction, which indicates that the first graphics processor and the second graphics processor need to be interconnected to transmit data. The first graphics processor and the second graphics processor are graphics processors located in two different computing resource disks 4.

[0078] For example, a data transfer instruction indicates a need to transfer data generated by a first graphics processor to a second graphics processor; the data transfer instruction carries the graphics processor identifier of the first graphics processor, the graphics processor identifier of the second graphics processor, and the data transfer request.

[0079] S102: Network controller 2 determines the interconnection path according to the data transmission command and the mapping relationship, and generates an optical path switching command according to the interconnection path and sends it to the first optical switch 1, and generates a data transmission command according to the data transmission command and sends it to the first graphics processor; wherein, determining the interconnection path includes determining the first optical module corresponding to the first graphics processor, the first optical input port and the first optical output port of the first optical switch connected to the first optical module, the second optical module corresponding to the second graphics processor, and the second optical input port and the second optical output port of the first optical switch connected to the second optical module.

[0080] Specifically, the first optical module is any optical module connected to the first graphics processor, and the second optical module is any optical module connected to the second graphics processor. The aforementioned optical path switching command carries: the input port identifier corresponding to the first optical input port, the input port identifier corresponding to the second optical input port, the output port identifier corresponding to the first optical output port, and the output port identifier corresponding to the second optical output port.

[0081] S103: The first optical switch 1 receives the optical path switching command and connects the optical path between the first optical input port and the second optical output port, as well as the optical path between the first optical output port and the second optical input port, according to the optical path switching command, so as to connect the optical path between the first optical module and the second optical module.

[0082] Specifically, when transmitting data from the first optical module to the second optical module, the optical path between the first optical input port and the second optical output port is used to transmit the load data optical signal. The optical path between the first optical output port and the second optical input port is used to transmit feedback information, such as providing packet loss alarm information in the event of packet loss.

[0083] S104: The first graphics processor receives and executes the data transmission command, and sends the load data electrical signal carrying the data to the first optical module.

[0084] S105: The first optical module receives the load data electrical signal, converts the load data electrical signal into a load data optical signal, and sends it to the first optical switch 1. The load data optical signal is then transmitted to the second optical module via the first optical switch 1.

[0085] Specifically, the first optical module transmits the load data optical signal to the first optical input port through an optical cable connected to its optical transmitting port. The load data optical signal is output from the second optical output port through the optical path between the first optical input port and the second optical output port, and is sent to the optical receiving port of the second optical module through an optical cable connected to the second optical output port, thereby realizing all-optical transmission between the first optical module of the first graphics processor and the second optical module of the second graphics processor.

[0086] S106: The second optical module receives the load data optical signal, converts the load data optical signal into a load data electrical signal, and transmits the load data electrical signal to the second graphics processor.

[0087] S107: The second graphics processor receives the load data electrical signal, extracts the data from the load data electrical signal, and processes the data.

[0088] Based on the above embodiments, using all-optical switches to achieve arbitrary optical interconnection between various graphics processors can improve data transmission rates, reduce latency, and reduce the number of cables, thereby reducing cabling complexity. Between the first optical switch 1 and the network controller 2, and between the graphics processor 42 and the network controller 2, control signals such as data transmission commands, optical path switching commands, and data transmission commands are transmitted in the form of electrical signals. Since the transmission rate of control signals is not high and the transmission distance is not long, using electrical signals for transmission is relatively low-cost. Furthermore, the control signals and the load data between each graphics processor are transmitted separately and do not intersect, ensuring the transmission efficiency of the all-optical network between the graphics processors.

[0089] In some embodiments, with Figure 10 The above mapping relationship is illustrated using the connection relationship shown as an example. In this example, two graphics processors are used, each connected to two optical modules. The port identifiers of the first optical switch include input port identifiers I1, I2, I3, I4 and output port identifiers O1, O2, O3, O4. The two graphics processors are identified as B1 and B2. The optical module identifiers include M1, M2, M3, and M4, and the module port identifiers include transmit port identifiers (corresponding to optical transmit ports) and receive port identifiers (corresponding to optical receive ports). Specifically, the transmit port identifiers include TX1, TX2, TX3, TX4, and the receive port identifiers include RX1, RX2, RX3, RX4. The mapping relationship between the graphics processor identifiers, optical module identifiers, module port identifiers, and the port identifiers of the first optical switch is shown in Table 1.

[0090] Table 1

[0091]

[0092]

[0093] In some embodiments, the method further includes:

[0094] S1: Before generating the optical path switching command, the network controller 2 determines the communication status of the first graphics processor and the second graphics processor;

[0095] S2: Based on the communication status, determine whether there is a communicable interconnect path between the first graphics processor and the second graphics processor;

[0096] S3: If so, generate an optical path switching command;

[0097] S4: If not, determine the service sequence for accessing the first graphics processor and the second graphics processor based on the communication status, and wait for the generation of optical path switching instructions.

[0098] In some embodiments, the communication state includes whether all optical modules corresponding to the first graphics processor are in an occupied state, and whether all optical modules corresponding to the second graphics processor are in an occupied state. If at least one optical module 41 of the first graphics processor is in an idle and available state, and at least one optical module of the second graphics processor is in an idle and available state, then it is determined that there is a communicable interconnection path (i.e., communication is possible) between the first and second graphics processors. An idle and available optical module of the first graphics processor is designated as the first optical module, and an idle and available optical module of the second graphics processor is designated as the second optical module, and an optical path switching command is generated. The transmission of optical signals can be realized promptly using the optical modules in the idle state.

[0099] If all optical modules of the first graphics processor are occupied, or all optical modules of the second graphics processor are occupied, then it is determined that there is no communicable interconnection path between the first and second graphics processors (i.e., communication is not possible). Then, other processors that will communicate with the first graphics processor are further identified, and a service sequence for the first graphics processor is generated according to the communication time order; other processors that will communicate with the second graphics processor are identified, and a service sequence for the second graphics processor is generated according to the communication time order; these two service sequences are then queued, and corresponding optical path switching instructions are generated sequentially.

[0100] In some embodiments, when the processor cluster system is large, it may be necessary to use two-stage all-optical switches for interconnection. For example, a second optical switch may be used to connect multiple first optical switches, and the first optical switches may connect multiple graphics processors. This cluster connects more graphics processors, resulting in a large data transmission volume. When the first and second graphics processors that need to be interconnected are connected to different first optical switches 1, data transmission between different first optical switches is prone to communication link node congestion. There are various reasons for communication link node congestion, including network congestion, equipment failure, and configuration errors. For example, when the first optical switch 1 or the second optical switch 5 cannot select the optimal path, the load data optical signal may easily circulate continuously in the processor cluster system, leading to node congestion and data loss, seriously affecting the efficiency and stability of network communication. Based on this, the method further includes:

[0101] S1: Before generating the optical path switching command, the network controller 2 determines whether there is a communication link node blockage after adding the optical connection between the first graphics processor and the second graphics processor;

[0102] S2: If it is determined that there is no communication link node blockage, generate an optical path switching command;

[0103] S3: If it is determined that there is a communication link node blockage, wait for the first time threshold, and then determine whether there is a communication link node blockage again until there is no communication link node blockage.

[0104] In some embodiments, the specific methods for determining whether there is a communication link node blockage include:

[0105] S1: Determine whether there is an optical path that conflicts with the optical connection of other graphics processors in the optical connection between the first graphics processor and the second graphics processor, and obtain the first result;

[0106] S2: Determine whether there is a breakpoint channel in the optical connection between the first graphics processor and the second graphics processor, and obtain the second result;

[0107] S3: Detect whether there is a failure alarm in the first optical module and obtain the third result;

[0108] S4: Detect whether there is a failure alarm in the first optical module and obtain the fourth result;

[0109] S5: If the first, second, third, and fourth results are all "no", it is determined that there is no communication link node blockage.

[0110] S6: If at least one of the above first, second, third, and fourth results is "yes", it is determined that there is a communication link node blockage.

[0111] In some embodiments, the first time threshold can be set to 1 second, 5 seconds, 10 seconds, etc., and this application does not limit it.

[0112] The above description is merely a preferred embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in the present invention should be included within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

Claims

1. A processor cluster system, characterized by, The system includes a first optical switch (1), a network controller (2), multiple optical cables (3), and multiple computing resource disks (4); wherein, Each of the computing resource disks (4) includes one or more optical modules (41) and one or more graphics processors (42), and each of the graphics processors (42) is electrically connected to one or more of the optical modules (41); The optical module (41) is optically connected to the first optical switch (1) via the optical cable (3). The optical module (41) is configured to convert the load data electrical signal sent by the graphics processor (42) into a load data optical signal and transmit it to the first optical switch (1), and to convert the load data optical signal received from the first optical switch (1) into a load data electrical signal and transmit it to the graphics processor (42). The network controller (2) is communicatively connected to the first optical switch (1) and the computing resource disk (4); the network controller (2) is configured to control the first optical switch (1) to switch optical paths according to the data exchange requirements of the graphics processor (42); The first optical switch (1) is an all-optical switch, configured to connect the optical path between the optical module (41) of any one of the plurality of graphics processors (42) specified by the instruction of the network controller (2) and the optical module (41) of any one of the second graphics processors (42) according to the instruction, so as to transmit the load data optical signal.

2. The system of claim 1, wherein, The first optical switch (1) has multiple optical input ports (11) and multiple optical output ports (12); Each of the optical modules (41) has an optical transmitting port (411) and an optical receiving port (412); The optical cable (3) includes at least two optical fibers (31). The optical transmitting port (411) of each optical module (41) is optically connected to a corresponding optical input port (11) on the first optical switch (1) through one of the optical fibers, and the optical receiving port (412) is optically connected to a corresponding optical output port (12) on the first optical switch (1) through the other optical fiber. The first optical switch (1) is configured to transmit the load data optical signal received at a designated optical input port (11) to a designated optical output port (12) according to the instruction sent by the network controller (2).

3. The system according to claim 2, characterized in that, An optical transmitter port (411) of the same optical module (41) and its corresponding optical receiver port (412) constitute a first duplex optical interface; The first optical switch (1) has an optical input port (11) and an optical output port (12) connected to the same optical module (41) to form a second duplex optical interface; The two optical fibers (31) connecting the first duplex optical interface and the second duplex optical interface are a duplex optical fiber (31) patch cord.

4. The system according to claim 2, characterized in that, The first optical switch (1) has multiple optical input ports (11) located on the first side of the first optical switch (1) and multiple optical output ports (12) located on the second side of the first optical switch (1).

5. The system according to claim 2, characterized in that, The system also includes a second optical switch (5). The first optical switch (1) is a first-level all-optical switch, and the second optical switch (5) is a second-level all-optical switch. Multiple first optical switches (1) are optically connected to the second optical switch (5) respectively. The second optical switch (5) is communicatively connected to the network controller (2) and configured to connect the optical path between a specified port of a specified first optical switch (1) and a specified port of another specified first optical switch (1) according to the instructions sent by the network controller (2).

6. The system according to claim 1, characterized in that, The computing resource disk (4) also includes a circuit board (43) and a pluggable electrical interface (44). The graphics processor (42) and the pluggable electrical interface (44) are located on the circuit board (43) and are both electrically connected to the circuit board (43). The optical module (41) is electrically connected to the circuit board (43) and the graphics processor (42) through the pluggable electrical interface (44).

7. The system according to claim 6, characterized in that, The optical module (41) is an LPO optical module (41), including an optical transmitter and an optical receiver. The optical transmitter includes an optical transmitter port (411), a wavelength division multiplexer (416), an optical modulator (417), a linear driver (418), and a light source (419). The optical receiver includes an optical receiver port (412), a wavelength division multiplexer (413), a photodetector (414), and a transimpedance amplifier (415). The linear driver (418) is used to drive the optical modulator (417) to modulate the received load data electrical signal onto the light beam emitted by the light source (419) to convert it into a load data optical signal. The wavelength division multiplexer (416) is used to multiplex multiple load data optical signals into a composite load data optical signal and output it from the optical transmission port (411). The wave demultiplexer (413) is used to demultiplex the composite load data optical signal received by the optical receiving port (412) into multiple load data optical signals, and transmit them to the corresponding photodetectors (414). The photodetectors (414) convert the received load data optical signals into load data electrical signals, which are then processed by the transimpedance amplifier (415) and output to the graphics processor (42).

8. The system according to claim 1, characterized in that, The computing resource disk (4) also includes a circuit board (43), the graphics processor (42) is disposed on the circuit board (43) and electrically connected to the circuit board (43); the optical module (41) is disposed on the circuit board (43) in a co-package form.

9. The system according to claim 1, characterized in that, Each optical module (41) is configured to transmit and receive load data optical signals at a rate of at least 1.6 Tb / s; each graphics processor (42) is configured with four of the optical modules (41).

10. The system according to claim 9, characterized in that, Each computing resource disk (4) is configured with at least two of the graphics processors (42); The first optical switch (1) includes at least 144 optical input ports (11) and at least 144 optical output ports (12), which are respectively connected to at least 36 of the graphics processors (42).

11. A control method for a processor cluster system, characterized in that, The method is applied to a processor cluster system as described in any one of claims 1 to 10; the plurality of graphics processors (42) each have their own graphics processor identifier, the first optical switch (1) has a plurality of optical input ports (11) and a plurality of optical output ports (12), the plurality of optical input ports (11) have corresponding input port identifiers, and the plurality of optical output ports (12) have corresponding output port identifiers; the network controller (2) pre-stores a mapping relationship between each of the graphics processor identifiers and the input port identifiers and output port identifiers of the first optical switch (1); The method includes: The network controller (2) obtains a data transmission instruction, which indicates that a first graphics processor and a second graphics processor need to be interconnected to transmit data. The first graphics processor and the second graphics processor are graphics processors located in two different computing resource disks (4). The network controller (2) determines the interconnection path according to the data transmission instruction and the mapping relationship, generates an optical path switching instruction according to the interconnection path and sends it to the first optical switch (1), and generates a data transmission instruction according to the data transmission instruction and sends it to the first graphics processor; wherein, determining the interconnection path includes determining the first optical module corresponding to the first graphics processor, the first optical input port and the first optical output port of the first optical switch connected to the first optical module, the second optical module corresponding to the second graphics processor, and the second optical input port and the second optical output port of the first optical switch connected to the second optical module; The first optical switch (1) receives the optical path switching instruction and connects the optical path between the first optical input port and the second optical output port, and connects the optical path between the first optical output port and the second optical input port according to the optical path switching instruction, so as to connect the optical path between the first optical module and the second optical module. The first graphics processor receives and executes the data transmission command, and sends the load data electrical signal carrying the data to the first optical module; The first optical module receives the load data electrical signal, converts the load data electrical signal into a load data optical signal, and sends it to the first optical switch (1). The load data optical signal is then transmitted to the second optical module via the first optical switch (1). The second optical module receives the load data optical signal, converts the load data optical signal into a load data electrical signal, and transmits the load data electrical signal to the second graphics processor; The second graphics processor receives the load data electrical signal, extracts the data from the load data electrical signal, and processes the data.

12. The method according to claim 11, characterized in that, The method further includes: Before generating the optical path switching command, the network controller (2) determines the communication status of the first graphics processor and the second graphics processor; Based on the communication status, determine whether there is a communicable interconnect path between the first graphics processor and the second graphics processor. If so, generate an optical path switching command; If not, determine the service sequence for accessing the first graphics processor and the second graphics processor based on the communication status, and wait for the generation of an optical path switching instruction.

13. The method according to claim 12, characterized in that, The communication status includes whether all optical modules corresponding to the first graphics processor are in a occupied state, and whether all optical modules corresponding to the second graphics processor are in a occupied state.

14. The method according to claim 11, characterized in that, The method further includes: Before generating the optical path switching command, the network controller (2) determines whether there is a communication link node blockage after adding the optical connection between the first graphics processor and the second graphics processor; If it is determined that there is no communication link node blockage, an optical path switching command is generated; If a communication link node is found to be blocked, wait for the first time threshold, and then check again whether there is a communication link node blockage, until there is no communication link node blockage.

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