Filter switching circuit

Abstract

Provided is a filter switching circuit capable of reducing power loss of a wireless frequency signal. The filter switching circuit includes: a first node to which a first amplified signal is supplied in a first mode; a second node to which a second amplified signal is supplied in the first mode and to which a third amplified signal is supplied in a second mode; a semiconductor switching element that switches between electrical connection and non-connection between a first terminal and a second terminal thereof; a first semiconductor switching circuit that switches between electrical connection and non-connection between a first common terminal and M first independent terminals; a second semiconductor switching circuit that switches between electrical connection and non-connection between a second common terminal and M second independent terminals and a third independent terminal; M first filters each provided to an M first wiring; and a second filter provided to a second wiring, wherein M is an integer of 2 or more.

Description

Technical Field

[0001] This invention relates to a filter switching circuit. Background Technology

[0002] A wireless device exists that includes a power amplifier, a switch multiplexer, a filter, and an antenna interface circuit (see, for example, Patent Document 1). In the wireless device described in Patent Document 1, the switch multiplexer includes multiple switches connected to the output of the power amplifier. A portion of the multiple switches is connected to the antenna interface circuit through multiple filters. Another portion of the multiple switches is connected to the antenna interface circuit through a bypass path configured in parallel with the multiple filters.

[0003] Existing technical documents

[0004] Patent documents

[0005] Patent Document 1: Japanese Patent Publication No. 2015-508268 Summary of the Invention

[0006] The problem the invention aims to solve

[0007] In the structure of the wireless device described in Patent Document 1, the radio frequency (RF) signal output from the power amplifier is transmitted to a filter or bypass path via a switch included in a switching multiplexer. Power loss occurs when the RF signal passes through the switch; therefore, a structure capable of suppressing power loss is preferred.

[0008] The present invention was made in view of the following circumstances, and its object is to provide a filter switching circuit that can reduce the power loss of wireless frequency signals.

[0009] Solution for solving the problem

[0010] A filter switching circuit according to one aspect of the present invention comprises: a first node, wherein in a first mode, the first node is supplied with a first amplified signal of a first wireless frequency band; a second node, wherein in the first mode, the second node is supplied with a second amplified signal of the first wireless frequency band having a phase equal to that of the first amplified signal, and in a second mode, the second node is supplied with a third amplified signal of a second wireless frequency band; a semiconductor switching element having a first terminal connected to the first node and a second terminal connected to the second node, the semiconductor switching element switching between an electrical connection and a non-connection between the first terminal and the second terminal; and a first semiconductor switching circuit having a first common terminal connected to the second node, and M( The circuit comprises (2 or more integers) first independent terminals, wherein the first semiconductor switching circuit switches the electrical connection and non-connection between the first common terminal and the M first independent terminals; a second semiconductor switching circuit having a second common terminal connected to a first output terminal, M second independent terminals connected to the M first independent terminals respectively via M first wirings, and a third independent terminal connected to the first node via second wirings, wherein the second semiconductor switching circuit switches the electrical connection and non-connection between the second common terminal and the M second independent terminals and the third independent terminal; M first filters respectively disposed on the M first wirings; and a second filter disposed on the second wirings.

[0011] Another aspect of the present invention relates to a filter switching circuit comprising: a first node, wherein in a first mode, the first node is supplied with a first amplified signal of a first wireless frequency band; a second node, wherein in the first mode, the second node is supplied with a second amplified signal of the first wireless frequency band having a phase equal to that of the first amplified signal, and in a second mode, the second node is supplied with a third amplified signal of a second wireless frequency band; a semiconductor switching element having a first terminal connected to the first node and a second terminal connected to the second node, the semiconductor switching element switching between an electrical connection and a non-connection between the first terminal and the second terminal; and a first semiconductor switching circuit having a first common terminal connected to the second node and M (an integer greater than 2) first independent terminals, the first semiconductor switching circuit switching between the first common terminal and the second node. The system switches between the common terminal and the M first independent terminals for electrical connection and disconnection; a second semiconductor switching circuit has a fourth common terminal connected to a third wiring, M second independent terminals connected to the M first independent terminals via M first wiring, a third independent terminal connected to the first node via a second wiring, and a fifth common terminal connected to a fourth wiring. The second semiconductor switching circuit switches between the fourth common terminal and the M second independent terminals for electrical connection and disconnection, and switches between the fifth common terminal and at least one of the M second independent terminals and the third independent terminal for electrical connection and disconnection; M first filters are respectively disposed on the M first wirings; and a second filter is disposed on the fourth wiring.

[0012] Another aspect of the present invention relates to a filter switching circuit comprising: a first node, wherein in a first mode, the first node is supplied with a first amplified signal of a first wireless frequency band; a second node, wherein in the first mode, the second node is supplied with a second amplified signal of the first wireless frequency band having a phase equal to that of the first amplified signal, and in a second mode, the second node is supplied with a third amplified signal of a second wireless frequency band; a semiconductor switching element having a first terminal connected to the first node and a second terminal connected to the second node, the semiconductor switching element switching between an electrical connection and a non-connection between the first terminal and the second terminal; and a first semiconductor switching circuit having a first common terminal connected to the second node and M (an integer greater than 2) first independent terminals, the first semiconductor switching circuit switching between the first common terminal and the M first independent terminals. The circuit switches between electrical connections and non-connections between the first output terminal and the second semiconductor switching circuit, which has a seventh common terminal connected to the first output terminal, M second independent terminals connected to M first independent terminals via M first wirings, a third independent terminal connected to the first node via second wirings, a sixth independent terminal, and an eighth common terminal connected to the sixth independent terminal via a fifth wiring. The second semiconductor switching circuit switches between electrical connections and non-connections between the seventh common terminal and the M second independent terminals and the sixth independent terminal, and switches between electrical connections and non-connections between the eighth common terminal and at least one of the M second independent terminals and the third independent terminal; M first filters are respectively disposed on the M first wirings; and a second filter is disposed on the fifth wiring.

[0013] The effects of the invention

[0014] According to the present invention, a filter switching circuit capable of reducing power loss of wireless frequency signals can be provided. Attached Figure Description

[0015] Figure 1 This is the circuit diagram of power amplifier circuit 101.

[0016] Figure 2 This is a diagram showing an example of the connection state of each semiconductor switching circuit when the power amplifier circuit 101 operates in the power mode M1.

[0017] Figure 3 This is a diagram showing an example of the connection state of each semiconductor switching circuit when the power amplifier circuit 101 operates in efficiency-focused mode M2.

[0018] Figure 4 This is the circuit diagram of power amplifier circuit 102.

[0019] Figure 5 This is a diagram showing an example of the connection state of each semiconductor switching circuit when the power amplifier circuit 102 operates in the power mode M1.

[0020] Figure 6 This is a diagram showing an example of the connection state of each semiconductor switching circuit when the power amplifier circuit 102 operates in efficiency-focused mode M2.

[0021] Figure 7 This is the circuit diagram of power amplifier circuit 103.

[0022] Figure 8 This is a diagram showing an example of the connection state of each semiconductor switching circuit when the power amplifier circuit 103 operates in the power mode M1.

[0023] Figure 9 This is a diagram showing an example of the connection state of each semiconductor switching circuit when the power amplifier circuit 103 operates in efficiency-focused mode M2.

[0024] Figure 10 This is a diagram showing an example of the connection state of each semiconductor switching circuit when the power amplifier circuit 103 operates in efficiency-focused mode M2.

[0025] Figure 11 This is a diagram illustrating an example of the simulation results of the amplification characteristics of the power amplifier circuit 103.

[0026] Figure 12 It is Figure 11 The magnified graph shows the amplification characteristics from 0 GHz to 1.5 GHz in the simulation results.

[0027] Figure 13 This is the circuit diagram of power amplifier circuit 104.

[0028] Figure 14 This is a diagram showing an example of the connection state of each semiconductor switching circuit when the power amplifier circuit 104 operates in the power mode M1.

[0029] Figure 15 This is a diagram showing an example of the connection state of each semiconductor switching circuit when the power amplifier circuit 104 operates in efficiency-focused mode M2.

[0030] Figure 16 This is a diagram showing an example of the connection state of each semiconductor switching circuit when the power amplifier circuit 104 operates in efficiency-focused mode M2. Detailed Implementation

[0031] The embodiments of the present invention will now be described in detail with reference to the accompanying drawings. Furthermore, the same reference numerals will be used to label the same elements, and repetitive descriptions will be omitted as much as possible.

[0032] [First Implementation]

[0033] The power amplifier circuit 101 according to the first embodiment will be described. Figure 1 This is the circuit diagram of power amplifier circuit 101. (For example...) Figure 1 As shown, the power amplifier circuit 101 is located in the front-end module. It is an amplifier circuit that amplifies the input signal supplied to the input terminal (not shown) and outputs the output signal RFout from the output terminal 32a (first output terminal). The output terminal 32a is, for example, an antenna terminal connected to an antenna.

[0034] The input signals supplied to the input terminals are, for example, RF signals from the radio frequency band (first radio frequency band) (hereinafter sometimes referred to as the 2G band) specified by the communication standard of the second-generation mobile communication system (2G) and RF signals from the radio frequency band (second radio frequency band) (hereinafter sometimes referred to as the 5G band) specified by the communication standard of the fifth-generation mobile communication system (5G). Furthermore, the second radio frequency band is not limited to the radio frequency band specified by the communication standard of the fifth-generation mobile communication system (5G), but may also be the radio frequency band specified by the communication standard of the fourth-generation mobile communication system (4G) or the radio frequency band specified by the communication standard of the sixth-generation mobile communication system (6G).

[0035] When a 2G band RF signal is supplied to the input terminal, the power amplifier circuit 101 operates in power-focused mode M1 (first mode). On the other hand, when a 5G band RF signal is supplied to the input terminal, the power amplifier circuit 101 operates in efficiency-focused mode M2 ​​(second mode).

[0036] The RF signal bands of 2G and 5G frequencies, for example, are included in the low frequency band (LB) from 660MHz to 920MHz.

[0037] The power amplifier circuit 101 (filter switching circuit) includes balanced-to-unbalanced converters 41 and 42, capacitors 61 and 62, semiconductor switching circuit 71, differential pairs 151 and 152, semiconductor switching circuits 201 (first semiconductor switching circuit) and 202a (second semiconductor switching circuit), M (an integer of 2 or more) filter circuits 251 (first filter), filter circuit 252 (second filter), and nodes N1 (first node) and N2 (second node).

[0038] In this embodiment, M is 3. Furthermore, M can be 2 or an integer greater than 4. Hereinafter, the M (e.g., 3) filter circuits 251 will sometimes be referred to as filter circuits 251a, 251b, and 251c, respectively.

[0039] Filter circuit 251 is, for example, a bandpass filter for RF signals in the 5G band. Filter circuit 252 is, for example, a low-pass filter for attenuating higher harmonics of RF signals in the 2G band.

[0040] Differential pair 151 includes power stage amplifiers 51a and 51b. Differential pair 152 includes power stage amplifiers 52a and 52b.

[0041] In this embodiment, power stage amplifiers 51a, 51b, 52a, and 52b are constructed, for example, of bipolar transistors such as heterojunction bitpolar transistors (HBTs). Alternatively, these amplifiers can also be constructed of other transistors such as metal-oxide-semiconductor field-effect transistors (MOSFETs). In this case, the base, collector, and emitter can be replaced with the gate, drain, and source, respectively.

[0042] Amplified signals RF11 and RF12, serving as balancing signals, are supplied to terminals 31a and 31b, respectively. Amplified signals RF13 and RF14, serving as balancing signals, are supplied to terminals 31c and 31d, respectively.

[0043] The phase difference between the amplified signal RF11 and the amplified signal RF12 is approximately 180°. However, due to factors such as uneven wiring lengths in the circuit, the phase difference between the amplified signal RF11 and the amplified signal RF12 can sometimes be significantly different from 180°.

[0044] The phase difference between the amplified signal RF13 and the amplified signal RF14 is approximately 180°. However, due to factors such as uneven wiring lengths in the circuit, the phase difference between the amplified signal RF13 and the amplified signal RF14 can sometimes be significantly different from 180°.

[0045] The phase of amplified signal RF11 is approximately the same as the phase of amplified signal RF13. However, due to imbalances in the wiring length of the circuit, the phase difference between amplified signal RF11 and amplified signal RF13 can sometimes be significantly different from 0°.

[0046] The phase of amplified signal RF12 is approximately the same as the phase of amplified signal RF14. However, due to imbalances in the wiring length of the circuit, the phase difference between amplified signal RF12 and amplified signal RF14 can sometimes be significantly different from 0°.

[0047] Amplified signals RF11, RF12, RF13 and RF14 are generated based on the input signals supplied to the input terminals.

[0048] Specifically, for example, the input signal is amplified using a driver stage amplifier (not shown), thereby generating an unbalanced signal. The unbalanced signal is converted, for example, into amplified signals RF11 and RF12 as balanced signals, and amplified signals RF13 and RF14 as balanced signals, by a balun.

[0049] In differential pair 151, power stage amplifiers 51a and 51b operate in power-priority mode M1 and efficiency-priority mode M2, respectively. Specifically, in power-priority mode M1 and efficiency-priority mode M2, a bias voltage higher than the threshold voltage is applied to each base of power stage amplifiers 51a and 51b, and power stage amplifiers 51a and 51b are turned on.

[0050] The power stage amplifier 51a amplifies the amplified signal RF11 supplied through the power supply terminal 31a based on the power supply voltage VCC applied from the power supply terminal 33a through the balun 41 and outputs the amplified signal RF21.

[0051] The power stage amplifier 51b amplifies the amplified signal RF12 supplied through terminal 31b based on the power supply voltage VCC applied from the power supply terminal 33a through the balun 41 and outputs the amplified signal RF22.

[0052] In differential pair 152, power stage amplifiers 52a and 52b operate in power-priority mode M1, but not in efficiency-priority mode M2. Specifically, in efficiency-priority mode M2, the bias voltage applied to the bases of power stage amplifiers 52a and 52b is approximately zero volts, and power stage amplifiers 52a and 52b are in the off state. On the other hand, in power-priority mode M1, a bias voltage higher than the threshold voltage is applied to the bases of power stage amplifiers 52a and 52b, and power stage amplifiers 52a and 52b are in the on state.

[0053] The power stage amplifier 52a amplifies the amplified signal RF13 supplied through terminal 31c based on the power supply voltage VCC applied from the power supply terminal 33b through the balun 42 and outputs the amplified signal RF23.

[0054] The power stage amplifier 52b amplifies the amplified signal RF14 supplied through terminal 31d based on the power supply voltage VCC applied from the power supply terminal 33b through the balun 42 and outputs the amplified signal RF24.

[0055] In power-priority mode M1, the balun 41 generates an amplified signal RF2 (second amplified signal) as an unbalanced signal based on the amplified signals RF21 and RF22, which are balanced signals. In efficiency-priority mode M2, the balun 41 generates an amplified signal RF3 (third amplified signal) as an unbalanced signal based on the amplified signals RF21 and RF22, which are balanced signals.

[0056] In detail, the balun 41 includes inductors 41a and 41b. Inductor 41a has: a first terminal connected to the output terminal of power stage amplifier 51a, the first terminal being supplied with an amplified signal RF21; a center tap connected to the power supply terminal 33a and grounded through capacitor 61; and a second terminal connected to the output terminal of power stage amplifier 51b, the second terminal being supplied with an amplified signal RF22.

[0057] Inductor 41b is electromagnetically coupled to inductor 41a. Inductor 41b has a first terminal connected to node N2 and a second terminal grounded. In power-focused mode M1, the first terminal outputs an amplified signal RF2, and in efficiency-focused mode M2, the first terminal outputs an amplified signal RF3.

[0058] In power-priority mode M1, the balun 42 generates an amplified signal RF1 (first amplified signal) as an unbalanced signal based on the amplified signals RF23 and RF24, which are balanced signals. On the other hand, in efficiency-priority mode M2, the balun 42 does not output a signal.

[0059] In detail, the balun 42 includes inductors 42a and 42b. Inductor 42a has: a first terminal connected to the output terminal of power stage amplifier 52a, the first terminal being supplied with an amplified signal RF23; a center tap connected to the power supply terminal 33b and grounded through capacitor 62; and a second terminal connected to the output terminal of power stage amplifier 52b, the second terminal being supplied with an amplified signal RF24.

[0060] Inductor 42b is electromagnetically coupled to inductor 42a. Inductor 42b has a first terminal connected to node N1 and a second terminal grounded, wherein, in power mode M1, the first terminal outputs an amplified signal RF1.

[0061] The semiconductor switching circuit 71 includes a semiconductor switching element 71a. The semiconductor switching element 71a has a first terminal connected to node N1 and a second terminal connected to node N2.

[0062] The semiconductor switching element 71a switches between electrical connection and non-connection between the first terminal and the second terminal.

[0063] The semiconductor switching circuit 201 has a common terminal 401 (first common terminal) connected to node N2, and M (e.g., 3) independent terminals 451 (first independent terminals). Hereinafter, the three independent terminals 451 will sometimes be referred to as independent terminals 451a, 451b and 451c respectively.

[0064] The semiconductor switching circuit 201 switches the electrical connection and non-connection between the common terminal 401 and the independent terminals 451a, 451b and 451c.

[0065] The semiconductor switching circuit 202a has a common terminal 402 (second common terminal) connected to the output terminal 32a, M independent terminals 452 (second independent terminals) connected to M independent terminals 451 via M (e.g., 3) transmission lines 351 (first wiring), and an independent terminal 453 (third independent terminal) connected to node N1 via transmission lines 352 (second wiring).

[0066] Hereinafter, for example, three transmission lines 351 will sometimes be referred to as transmission lines 351a, 351b and 351c respectively. For example, three independent terminals 452 will sometimes be referred to as independent terminals 452a, 452b and 452c respectively.

[0067] In this embodiment, the independent terminals 452a, 452b and 452c are connected to the independent terminals 451a, 451b and 451c in the semiconductor switching circuit 201 via transmission lines 351a, 351b and 351c respectively.

[0068] The semiconductor switching circuit 202a switches the electrical connection and non-connection between the common terminal 402 and the independent terminals 452a, 452b, 452c and 453.

[0069] M (e.g., 3) filter circuits 251 are respectively disposed on M transmission lines 351. Hereinafter, for example, the 3 filter circuits 251 are sometimes referred to as filter circuits 251a, 251b and 251c respectively.

[0070] In this embodiment, filter circuits 251a, 251b, and 251c are respectively disposed on transmission lines 351a, 351b, and 351c. Filter circuit 252 is disposed on transmission line 352.

[0071] Figure 2 This diagram illustrates an example of the connection state of each semiconductor switching circuit when the power amplifier circuit 101 operates in the power-intensive mode M1. (See diagram for example.) Figure 2 As shown, in the power-intensive mode M1, the semiconductor switching element 71a electrically connects the first terminal to the second terminal.

[0072] In the power-intensive mode M1, semiconductor switching circuits 201 and 202a do not electrically connect the common terminal 401 to the common terminal 402.

[0073] In detail, the semiconductor switch circuit 201 can also be in a non-connected state where the common terminal 401 is not electrically connected to the independent terminals 451a, 451b and 451c, and the semiconductor switch circuit 202a can also be in a non-connected state where the common terminal 402 is not electrically connected to the independent terminals 452a, 452b and 452c, or both semiconductor switch circuits 201 and 202a can be in a non-connected state.

[0074] In the power-intensive mode M1, the semiconductor switching circuit 202a electrically connects the common terminal 402 to the independent terminal 453.

[0075] Therefore, the amplified signal RF1 supplied from the first terminal of inductor 42b and the amplified signal RF2 supplied from the first terminal of inductor 41b through semiconductor switching element 71a are combined at node N1. The combined amplified signal is then output from output terminal 32a to subsequent circuitry, such as an antenna, through filter circuit 252, independent terminal 453 in semiconductor switching circuit 202a, and common terminal 402.

[0076] Figure 3 This diagram illustrates an example of the connection state of each semiconductor switching circuit when the power amplifier circuit 101 operates in efficiency-focused mode M2. (See diagram for example.) Figure 3 As shown, in efficiency-focused mode M2, the semiconductor switching element 71a does not electrically connect the first terminal to the second terminal. This prevents the amplified signal RF3 from being transmitted through node N1 to inductor 42b and independent terminal 453.

[0077] In efficiency-focused mode M2, semiconductor switching circuits 201 and 202a electrically connect common terminal 401 and common terminal 402 through any one of M (e.g., 3) transmission lines 351.

[0078] In this embodiment, in semiconductor switch circuit 201, common terminal 401 is electrically connected to independent terminal 451c, and common terminal 401 is not electrically connected to independent terminals 451a and 451b. In semiconductor switch circuit 202a, common terminal 402 is electrically connected to independent terminal 452c, and common terminal 402 is not electrically connected to independent terminals 452a, 452b, and 453.

[0079] Thus, the amplified signal RF3 supplied from the first end of the inductor 41b is output from the output terminal 32a to the subsequent circuit, such as the antenna, through the common terminal 401 and independent terminal 451c in the semiconductor switching circuit 201, the filter circuit 251c, and the independent terminal 452c and common terminal 402 in the semiconductor switching circuit 202a.

[0080] In the power amplifier circuit 101, under the power mode M1, the 2G band amplified signal obtained by combining the amplified signals RF1 and RF2 can be output to the output terminal 32a through the dedicated filter circuit 252 but not through the semiconductor switch circuit 201.

[0081] In addition, in the power amplifier circuit 101, under the efficiency-focused mode M2, the 5G band amplified signal RF3 can be output to the output terminal 32a through the filter circuit 251 in the filter circuits 251a, 251b and 251c that corresponds to the frequency band of the amplified signal RF3.

[0082] Furthermore, in the power amplifier circuit 101, the same amplifier can amplify RF signals from the 2G band and the 5G band, which have different communication standards, thus reducing the size of the power amplifier circuit 101.

[0083] Furthermore, the structure in which common terminal 401 and common terminal 402 are electrically connected through filter circuit 251c has been described, but it is not limited to this. The structure in which common terminal 401 and common terminal 402 are electrically connected through filter circuit 251a or 251b is also possible.

[0084] [Second Implementation]

[0085] The power amplifier circuit 102 according to the second embodiment will be described. From the second embodiment onwards, descriptions of matters that are the same as in the first embodiment will be omitted, and only the differences will be described. In particular, the same effects obtained based on the same structure will not be described one by one in each embodiment.

[0086] Figure 4 This is the circuit diagram of power amplifier circuit 102. (For example...) Figure 4As shown, the power amplifier circuit 102 in the second embodiment differs from the power amplifier circuit 101 in the first embodiment in that it can output an output signal RFout from either of the output terminals 32a and 32b (second output terminals).

[0087] Power amplifier circuit 102 (filter switching circuit) and Figure 1 Compared to the power amplifier circuit 101 shown, a semiconductor switch circuit 202b (second semiconductor switch circuit) is provided instead of semiconductor switch circuit 202a.

[0088] Semiconductor switch circuit 202b and Figure 1 Compared to the semiconductor switch circuit 202a shown, it also has a common terminal 403 (third common terminal) connected to the output terminal 32b.

[0089] Semiconductor switch circuit 202b and Figure 1 Compared to the semiconductor switch circuit 202a shown, it also switches the electrical connection and non-connection between the common terminal 403 and M (e.g., 3) independent terminals 452 and independent terminals 453.

[0090] Figure 5 This diagram illustrates an example of the connection state of each semiconductor switching circuit when the power amplifier circuit 102 operates in the power-intensive mode M1. (See diagram for example.) Figure 5 As shown, in the power-intensive mode M1, the semiconductor switching element 71a electrically connects the first terminal to the second terminal.

[0091] In the power-intensive mode M1, semiconductor switching circuits 201 and 202b do not electrically connect common terminal 401 to common terminals 402 and 403.

[0092] In the power-intensive mode M1, the semiconductor switching circuit 202b electrically connects either of the common terminals 402 and 403 to the independent terminal 453.

[0093] In this embodiment, under the power-intensive mode M1, the semiconductor switching circuit 202b electrically connects the common terminal 403 to the independent terminal 453.

[0094] Therefore, the amplified signal obtained at node N1 is output from output terminal 32b to subsequent circuits such as antennas through the filter circuit 252, the independent terminal 453 and the common terminal 403 in the semiconductor switch circuit 202b.

[0095] In addition, in the power mode M1, the semiconductor switching circuit 202b can also electrically connect the common terminal 402 to the independent terminal 453 instead of electrically connecting the common terminal 403 to the independent terminal 453.

[0096] Therefore, the destination of the output signal RFout can be selected as either output terminal 32a or 32b, and thus the output signal RFout can be supplied to an antenna that is suitable for the characteristics of the output signal RFout.

[0097] Figure 6 This diagram illustrates an example of the connection state of each semiconductor switching circuit when the power amplifier circuit 102 operates in efficiency-focused mode M2. (See diagram for example.) Figure 6 As shown, in efficiency-focused mode M2, the semiconductor switching element 71a does not electrically connect the first terminal to the second terminal.

[0098] In efficiency-focused mode M2, semiconductor switching circuits 201 and 202b electrically connect the common terminal 401 to either of the common terminals 402 and 403 via any one of the M (e.g., 3) transmission lines 351.

[0099] In this embodiment, in semiconductor switch circuit 201, only the common terminal 401 and the independent terminal 451c are electrically connected. In semiconductor switch circuit 202b, only the common terminal 403 and the independent terminal 452c are electrically connected.

[0100] Thus, the amplified signal RF3 supplied from the first end of the inductor 41b is output from the output terminal 32b to a subsequent circuit, such as an antenna, through the common terminal 401 and independent terminal 451c in the semiconductor switching circuit 201, the filter circuit 251c, and the independent terminal 452c and common terminal 403 in the semiconductor switching circuit 202b.

[0101] Furthermore, in efficiency-focused mode M2, the semiconductor switching circuit 202b can also electrically connect the common terminal 402 to the independent terminal 452c instead of electrically connecting the common terminal 403 to the independent terminal 452c.

[0102] [Third Implementation]

[0103] The power amplifier circuit 103 according to the third embodiment will be described. Figure 7 This is the circuit diagram of power amplifier circuit 103. (For example...) Figure 7 As shown, in the power amplifier circuit 103 of the third embodiment, the difference from the power amplifier circuit 101 of the first embodiment is that the amplified signal RF3 that has passed through the filter circuit 251 can further pass through the filter circuit 252.

[0104] Power amplifier circuit 103 (filter switching circuit) and Figure 1Compared to the power amplifier circuit 101 shown, a semiconductor switch circuit 202c (second semiconductor switch circuit) is provided instead of semiconductor switch circuit 202a, and a semiconductor switch circuit 203 (third semiconductor switch circuit) is also provided.

[0105] Semiconductor switching circuit 202c and Figure 1 Compared to the semiconductor switch circuit 202a shown, the common terminal 402 is replaced by a common terminal 404 (fourth common terminal) connected to the transmission line 353 (third wiring) and a common terminal 405 (fifth common terminal) connected to the transmission line 354 (fourth wiring).

[0106] The semiconductor switching circuit 202c switches the electrical connection and non-connection between the common terminal 404 and M (e.g., 3) independent terminals 452, and switches the electrical connection and non-connection between the common terminal 405 and at least one of the M independent terminals 452 and independent terminal 453.

[0107] In this embodiment, the semiconductor switching circuit 202c switches the electrical connection and non-connection between the common terminal 404 and the independent terminals 452a, 452b and 452c, and switches the electrical connection and non-connection between the common terminal 405 and the independent terminals 452c and 453.

[0108] Furthermore, the semiconductor switching circuit 202c is not limited to a structure that switches the electrical connection and non-connection between the common terminal 405 and the independent terminals 452c and 453. The semiconductor switching circuit 202c can also be a structure that switches the electrical connection and non-connection between the common terminal 405 and some or all of the independent terminals 452a to 452c and the independent terminal 453.

[0109] The semiconductor switch circuit 203 is disposed between the semiconductor switch circuit 202c and the output terminal 32a.

[0110] The semiconductor switch circuit 203 has: a common terminal 406 (sixth common terminal) connected to the output terminal 32a, an independent terminal 454 (fourth independent terminal) connected to the common terminal 404 via the transmission line 353, and an independent terminal 455 (fifth independent terminal) connected to the common terminal 405 (fifth common terminal) via the transmission line 354.

[0111] Semiconductor switching circuit 203 switches the electrical connection and non-connection between common terminal 406 and independent terminals 454 and 455. Filter circuit 252 is disposed on transmission line 354.

[0112] Figure 8This diagram illustrates an example of the connection state of each semiconductor switching circuit when the power amplifier circuit 103 operates in the power-intensive mode M1. (See diagram for example.) Figure 8 As shown, in the power-intensive mode M1, the semiconductor switching element 71a electrically connects the first terminal to the second terminal.

[0113] In the power-intensive mode M1, semiconductor switching circuits 201 and 202c do not electrically connect common terminal 401 to common terminal 404 and common terminal 405.

[0114] In the power-intensive mode M1, semiconductor switching circuits 202c and 203 electrically connect the common terminal 406 to the independent terminal 453 via transmission line 354.

[0115] Therefore, the amplified signal synthesized at node N1 is output from output terminal 32a to subsequent circuits such as antennas via independent terminals 453 and common terminal 405 in semiconductor switching circuit 202c, filter circuit 252, and independent terminals 455 and common terminal 406 in semiconductor switching circuit 203.

[0116] Figure 9 This diagram illustrates an example of the connection state of each semiconductor switching circuit when the power amplifier circuit 103 operates in efficiency-focused mode M2. (See diagram for example.) Figure 9 As shown, in efficiency-focused mode M2, the semiconductor switching element 71a does not electrically connect the first terminal to the second terminal.

[0117] In efficiency-focused mode M2, semiconductor switching circuits 201, 202c, and 203 electrically connect common terminal 401 to common terminal 406 via any one of M (e.g., 3) transmission lines 351, and either transmission line 353 or 354.

[0118] exist Figure 9 In the examples shown, in semiconductor switch circuit 201, only the common terminal 401 and the independent terminal 451c are electrically connected. In semiconductor switch circuit 202c, only the common terminal 404 and the independent terminal 452c are electrically connected. In semiconductor switch circuit 203, only the common terminal 406 and the independent terminal 454 are electrically connected.

[0119] Thus, the amplified signal RF3 supplied from the first end of the inductor 41b is output from the output terminal 32a to the subsequent circuit, such as an antenna, through the common terminal 401 and independent terminal 451c in the semiconductor switching circuit 201, the filter circuit 251c, the independent terminal 452c and common terminal 404 in the semiconductor switching circuit 202c, and the independent terminal 454 and common terminal 406 in the semiconductor switching circuit 203.

[0120] Figure 10 This is a diagram showing an example of the connection state of each semiconductor switching circuit when the power amplifier circuit 103 operates in efficiency-focused mode M2.

[0121] like Figure 10 As shown, in semiconductor switch circuit 201, only the common terminal 401 and the independent terminal 451c are electrically connected. In semiconductor switch circuit 202c, only the common terminal 405 and the independent terminal 452c are electrically connected. In semiconductor switch circuit 203, only the common terminal 406 and the independent terminal 455 are electrically connected.

[0122] Thus, the amplified signal RF3 supplied from the first end of the inductor 41b is output from the output terminal 32a to a subsequent circuit, such as an antenna, through the common terminal 401 and independent terminal 451c in the semiconductor switching circuit 201, the filter circuit 251c, the independent terminal 452c and common terminal 405 in the semiconductor switching circuit 202c, the filter circuit 252, and the independent terminal 455 and common terminal 406 in the semiconductor switching circuit 203.

[0123] Figure 11 This is a graph illustrating an example of the simulation results of the amplification characteristics of the power amplifier circuit 103. Furthermore, the vertical axis represents the gain in dB, and the horizontal axis represents the frequency in Hz.

[0124] Figure 12 It is Figure 11 The magnified graph shows the amplification characteristics from 0 GHz to 1.5 GHz in the simulation results. Furthermore, Figure 12 Observation methods and Figure 11 same.

[0125] like Figure 11 and Figure 12 As shown, curve Glpf represents the output signal RF3 when it is output to output terminal 32b via filter circuit 252, which acts as a low-pass filter (refer to...). Figure 10 The frequency change of the gain.

[0126] The curve Gbp represents the output signal RF3 when it is output to the output terminal 32b via the transmission line 353, which serves as a bypass path (refer to...). Figure 9 The frequency change of the gain.

[0127] Regarding the amplified signal RF3 in the 5G band, under the requirement of suppressing higher harmonics, it can be achieved by setting it to... Figure 10The switch connection state shown allows the amplified signal RF3 to pass through the filter circuit 252 for RF signals in the 2GHz band. As a result, as shown by the curve Glpf, the gain in the higher harmonic band, i.e., around 1.75GHz, can be reduced. That is, the power of higher harmonics can be suppressed.

[0128] Additionally, regarding the amplified signal RF3 in the 5G band, without requiring power suppression of higher harmonics, it can be set to... Figure 9 The switch connection state shown allows the amplified signal RF3 to pass through transmission line 353 but bypass filter circuit 252. Thus, as shown by curve Gbp, the low-frequency band (LB) of 660MHz~920MHz can be suppressed (see reference). Figure 12 The gain in the signal is reduced. That is, the amplified signal RF3 can be output to the output terminal 32a efficiently.

[0129] Furthermore, in this embodiment, the structure of the amplified signal RF3 passing through either the transmission line 353 or the filter circuit 252 has been described, but it is not limited to this. The structure could also be that the amplified signal RF3 passes through both the transmission line 353 and the filter circuit 252.

[0130] [Fourth Implementation]

[0131] The power amplifier circuit 104 according to the fourth embodiment will be described. Figure 13 This is the circuit diagram of power amplifier circuit 104. (For example...) Figure 13 As shown, the power amplifier circuit 104 according to the fourth embodiment differs from the power amplifier circuit 103 according to the third embodiment in that the semiconductor switching circuits 202c and 203 are integrated into a single semiconductor switching circuit.

[0132] Power amplifier circuit 104 (filter switching circuit) and Figure 7 Compared to the power amplifier circuit 103 shown, a semiconductor switch circuit 202d (second semiconductor switch circuit) is provided to replace semiconductor switch circuits 202c and 203.

[0133] Semiconductor switching circuit 202d and Figure 7 Compared to the semiconductor switch circuit 202c shown, the common terminal 404 and common terminal 405 are replaced by a common terminal 407 (seventh common terminal) connected to the output terminal 32a, an independent terminal 456 (sixth independent terminal), and a common terminal 408 (eighth common terminal) connected to the independent terminal 456 via a transmission line 355 (fifth wiring). A filter circuit 252 is disposed on the transmission line 355.

[0134] The semiconductor switching circuit 202d switches the electrical connection and non-connection between the common terminal 407 and M (e.g., 3) independent terminals 452 and independent terminals 456, and switches the electrical connection and non-connection between the common terminal 408 and at least one of the M independent terminals 452 and independent terminals 453.

[0135] In this embodiment, the semiconductor switching circuit 202d switches the electrical connection and non-connection between the common terminal 407 and the independent terminals 452a, 452b, 452c and 456, and switches the electrical connection and non-connection between the common terminal 408 and the independent terminals 452c and 453.

[0136] Furthermore, the semiconductor switching circuit 202d is not limited to a structure that switches the electrical connection and non-connection between the common terminal 408 and the independent terminals 452c and 453. The semiconductor switching circuit 202d can also be a structure that switches the electrical connection and non-connection between the common terminal 408 and some or all of the independent terminals 452a~452c and the independent terminal 453.

[0137] Figure 14 This diagram illustrates an example of the connection state of each semiconductor switching circuit when the power amplifier circuit 104 operates in power-intensive mode M1. (See diagram for example.) Figure 14 As shown, in the power-intensive mode M1, the semiconductor switching element 71a electrically connects the first terminal to the second terminal.

[0138] In the power-intensive mode M1, semiconductor switching circuits 201 and 202d do not electrically connect common terminal 401 to common terminal 407 and common terminal 408.

[0139] In the power-intensive mode M1, the semiconductor switching circuit 202d electrically connects the common terminal 407 to the independent terminal 453 via the transmission line 355.

[0140] Specifically, in the semiconductor switching circuit 202d, there is only electrical connection between the common terminal 407 and the independent terminal 456, and between the common terminal 408 and the independent terminal 453.

[0141] Therefore, the amplified signal synthesized at node N1 is output from output terminal 32a to subsequent circuits such as antennas via independent terminals 453 and common terminal 408 in semiconductor switching circuit 202d, filter circuit 252, and independent terminals 456 and common terminal 407 in semiconductor switching circuit 202d.

[0142] Figure 15 This diagram illustrates an example of the connection state of each semiconductor switching circuit when the power amplifier circuit 104 operates in efficiency-focused mode M2. (See diagram for example.) Figure 15 As shown, in efficiency-focused mode M2, the semiconductor switching element 71a does not electrically connect the first terminal to the second terminal.

[0143] In efficiency-focused mode M2, semiconductor switching circuits 201 and 202d electrically connect common terminal 401 and common terminal 407 through any one of M (e.g., 3) transmission lines 351 but not through transmission line 355.

[0144] exist Figure 15 In the examples shown, in semiconductor switch circuit 201, only the common terminal 401 and the independent terminal 451c are electrically connected. In semiconductor switch circuit 202d, only the common terminal 407 and the independent terminal 452c are electrically connected.

[0145] Thus, the amplified signal RF3 supplied from the first end of the inductor 41b is output from the output terminal 32a to the subsequent circuit, such as an antenna, through the common terminal 401 and independent terminal 451c in the semiconductor switching circuit 201, the filter circuit 251c, and the independent terminal 452c and common terminal 407 in the semiconductor switching circuit 202d.

[0146] In other words, with Figure 9 Compared to the example shown, the number of switches through which the amplified signal RF3 passes can be reduced, thus suppressing the decrease in the power of the amplified signal RF3. Furthermore, compared to... Figure 7 Compared to the power amplifier circuit 103 shown, the number of semiconductor switching circuits can be reduced. Since the semiconductor switching circuits are formed on an IC chip, the power amplifier circuit 104 can be miniaturized.

[0147] Figure 16 This is a diagram showing an example of the connection state of each semiconductor switching circuit when the power amplifier circuit 104 operates in efficiency-focused mode M2.

[0148] like Figure 16 As shown, in efficiency-focused mode M2, semiconductor switching circuits 201 and 202d electrically connect the common terminal 401 and the common terminal 407 through any one of the M transmission lines 351 and transmission line 355.

[0149] exist Figure 16 In the example shown, in semiconductor switch circuit 201, only the common terminal 401 and the independent terminal 451c are electrically connected. In semiconductor switch circuit 202d, only the common terminal 407 and the independent terminal 456, and the common terminal 408 and the independent terminal 452c are electrically connected.

[0150] Thus, the amplified signal RF3 supplied from the first end of the inductor 41b is output from the output terminal 32a to a subsequent circuit, such as an antenna, through the common terminal 401 and independent terminal 451c in the semiconductor switching circuit 201, the filter circuit 251c, the independent terminal 452c and common terminal 408 in the semiconductor switching circuit 202d, the filter circuit 252, and the independent terminal 456 and common terminal 407 in the semiconductor switching circuit 202d.

[0151] Furthermore, in this embodiment, the structure of the amplified signal RF3 passing through any one of the filter circuits 251a, 251b, and 251c has been described, but it is not limited to this. The amplified signal RF3 may also pass through any two or more of the filter circuits 251a, 251b, and 251c.

[0152] Furthermore, in this embodiment, a structure with differential pairs 151 and 152 provided before nodes N1 and N2 has been described, but it is not limited to this. A structure with Doherty amplifiers provided before nodes N1 and N2 is also possible.

[0153] The exemplary embodiments of the present invention have been described above. In power amplifier circuits 101 and 102, in power-focused mode M1, a 2 GHz amplified signal RF1 is supplied to node N1. In power-focused mode M1, a 2 GHz amplified signal RF2 with the same phase as the amplified signal RF1 is supplied to node N2. In efficiency-focused mode M2, a 5 GHz amplified signal RF3 is supplied to node N2. Semiconductor switching element 71a has a first terminal connected to node N1 and a second terminal connected to node N2, and switches the electrical connection and disconnection between the first terminal and the second terminal. Semiconductor switching circuit 201 has a common terminal 401 connected to node N2 and M (an integer of 2 or more) independent terminals 451, and switches the electrical connection and disconnection between the common terminal 401 and the M independent terminals 451. Semiconductor switching circuits 202a and 202b have a common terminal 402 connected to output terminal 32a, M independent terminals 452 connected to M independent terminals 451 via M transmission lines 351, and independent terminals 453 connected to node N1 via transmission lines 352. Semiconductor switching circuits 202a and 202b switch the electrical connection and disconnection between the common terminal 402 and the M independent terminals 452 and 453. M filter circuits 251 are respectively disposed on the M transmission lines 351. Furthermore, filter circuits 252 are disposed on the transmission lines 352.

[0154] With this structure, a signal path can be established from node N2 through semiconductor switch circuit 201, at least one of the M filter circuits 251, and semiconductor switch circuit 202a to output terminal 32a. Alternatively, a signal path can be established from node N1 through dedicated filter circuit 252 and semiconductor switch circuit 202a to output terminal 32a without passing through semiconductor switch circuit 201. Therefore, power loss of the amplified signal when passing through semiconductor switch circuit 201 can be suppressed in the signal path from node N1 to output terminal 32a. Consequently, power loss of the radio frequency signal can be reduced.

[0155] Furthermore, in the power amplifier circuit 101, under the power-priority mode M1, the semiconductor switching element 71a electrically connects the first terminal to the second terminal. Under the power-priority mode M1, the semiconductor switching circuits 201 and 202a do not electrically connect the common terminal 401 to the common terminal 402. Moreover, under the power-priority mode M1, the semiconductor switching circuit 202a electrically connects the common terminal 402 to the independent terminal 453.

[0156] With this structure, in power mode M1, amplified signals RF1 and RF2 can be combined at node N1, and the combined amplified signal is output to output terminal 32a through filter circuit 252 and semiconductor switch circuit 202a. Furthermore, it prevents amplified signal RF2 from being supplied to output terminal 32a through semiconductor switch circuits 201 and 202a.

[0157] Furthermore, in the power amplifier circuit 101, under the efficiency-focused mode M2, the semiconductor switching element 71a does not electrically connect the first terminal to the second terminal. Moreover, under the efficiency-focused mode M2, the semiconductor switching circuits 201 and 202a electrically connect the common terminal 401 to the common terminal 402 through any one of the M transmission lines 351.

[0158] With this structure, in efficiency-focused mode M2, the output destination of the amplified signal RF3 can be switched to the filter circuit 251 among the M filter circuits 251 that corresponds to the frequency band of the amplified signal RF3 via the semiconductor switching circuit 201. Furthermore, by not electrically connecting the first and second terminals of the semiconductor switching element 71a, the amplified signal RF3 can be prevented from being supplied to the output terminal 32a via the filter circuit 252 and the semiconductor switching circuit 202a.

[0159] Furthermore, in the power amplifier circuit 102, the semiconductor switching circuit 202b also has a common terminal 403 connected to the output terminal 32b. Moreover, the semiconductor switching circuit 202b also switches the electrical connection and non-connection between the common terminal 403 and the M independent terminals 452 and 453.

[0160] With this structure, the output destination of the amplified signal input to the semiconductor switching circuit 202a through at least one of the M filter circuits 251 and 252 can be selected as either output terminal 32a or 32b. Thus, for example, the amplified signal can be supplied to an antenna corresponding to the frequency band and communication standard of the amplified signal.

[0161] Furthermore, in the power amplifier circuit 103, in the power-priority mode M1, a 2GHz amplified signal RF1 is supplied to node N1. In the power-priority mode M1, a 2GHz amplified signal RF2 with the same phase as the amplified signal RF1 is supplied to node N2. In the efficiency-priority mode M2, a 5GHz amplified signal RF3 is supplied to node N2. The semiconductor switching element 71a has a first terminal connected to node N1 and a second terminal connected to node N2, and switches between the electrical connection and disconnection between the first and second terminals. The semiconductor switching circuit 201 has a common terminal 401 connected to node N2 and M (an integer greater than 2) independent terminals 451, and switches between the electrical connection and disconnection between the common terminal 401 and the M independent terminals 451. The semiconductor switching circuit 202c has a common terminal 404 connected to the transmission line 353, M independent terminals 452 connected to M independent terminals 451 via M transmission lines 351, independent terminals 453 connected to node N1 via transmission lines 352, and a common terminal 405 connected to the transmission line 354. The semiconductor switching circuit 202c switches the electrical connection and non-connection between the common terminal 404 and the M independent terminals 452, and switches the electrical connection and non-connection between the common terminal 405 and at least one of the M independent terminals 452 and independent terminal 453. M filter circuits 251 are respectively disposed on the M transmission lines 351. Moreover, the filter circuits 252 are disposed on the transmission line 354.

[0162] With this structure, a signal path can be established from node N2 through semiconductor switch circuit 201, at least one of the M filter circuits 251, and semiconductor switch circuit 202c to transmission line 353 and at least one of the dedicated filter circuits 252. Furthermore, a signal path can be established from node N1 through semiconductor switch circuit 202c to the dedicated filter circuit 252 without passing through semiconductor switch circuit 201. Therefore, power loss of the amplified signal when passing through semiconductor switch circuit 201 can be suppressed in the signal path from node N1 to filter circuit 252. Thus, power loss of the radio frequency signal can be reduced.

[0163] Furthermore, in the power amplifier circuit 103, a semiconductor switching circuit 203 is disposed between the semiconductor switching circuit 202c and the output terminal 32a. The semiconductor switching circuit 203 has a common terminal 406 connected to the output terminal 32a, an independent terminal 454 connected to the common terminal 404 via a transmission line 353, and an independent terminal 455 connected to the common terminal 405 via a transmission line 354. Moreover, the semiconductor switching circuit 203 switches the electrical connection and disconnection between the common terminal 406 and the independent terminals 454 and 455.

[0164] With this structure, signal paths can be established from common terminals 404 and 405 through transmission line 353 and filter circuit 252 respectively to output terminal 32a. Thus, regardless of whether the amplified signal is transmitted through transmission line 353 or filter circuit 252, the amplified signal can be supplied to one output terminal 32a.

[0165] Furthermore, in the power amplifier circuit 102, under the power-priority mode M1, the semiconductor switching element 71a electrically connects the first terminal to the second terminal. Under the power-priority mode M1, semiconductor switching circuits 201 and 202c do not electrically connect the common terminal 401 to the common terminals 404 and 405. Moreover, under the power-priority mode M1, semiconductor switching circuits 202c and 203 electrically connect the common terminal 406 to the independent terminal 453 via the transmission line 354.

[0166] With this structure, in power mode M1, amplified signals RF1 and RF2 can be combined at node N1, and the combined amplified signal is output to output terminal 32a through semiconductor switch circuit 202c, filter circuit 252, and semiconductor switch circuit 203. Furthermore, it prevents amplified signal RF2 from being supplied to output terminal 32a through semiconductor switch circuits 201 and 202c.

[0167] Furthermore, in the power amplifier circuit 103, under the efficiency-focused mode M2, the semiconductor switching element 71a does not electrically connect the first terminal to the second terminal. Moreover, under the efficiency-focused mode M2, the semiconductor switching circuits 201, 202c, and 203 electrically connect the common terminal 401 to the common terminal 406 via any one of the M transmission lines 351, and either transmission lines 353 or 354.

[0168] With this structure, in efficiency-focused mode M2, the output destination of the amplified signal RF3 can be switched via the semiconductor switching circuit 201 to the filter circuit 251 among the M filter circuits 251 that corresponds to the frequency band of the amplified signal RF3. Furthermore, the amplified signal RF3, having passed through the filter circuit 251, can be further output to the output terminal 32a via the filter circuit 252 or via the transmission line 353 that bypasses the filter circuit 252. Additionally, by not electrically connecting the first and second terminals of the semiconductor switching element 71a, the amplified signal RF3 can be prevented from being supplied to the output terminal 32a via the semiconductor switching circuit 202c, the filter circuit 252, and the semiconductor switching circuit 203.

[0169] Furthermore, in the power amplifier circuit 104, in the power-priority mode M1, a 2GHz amplified signal RF1 is supplied to node N1. In the power-priority mode M1, a 2GHz amplified signal RF2 with the same phase as the amplified signal RF1 is supplied to node N2. In the efficiency-priority mode M2, a 5GHz amplified signal RF3 is supplied to node N2. The semiconductor switching element 71a has a first terminal connected to node N1 and a second terminal connected to node N2, and switches between the electrical connection and disconnection between the first and second terminals. The semiconductor switching circuit 201 has a common terminal 401 connected to node N2 and M (an integer greater than 2) independent terminals 451, and switches between the electrical connection and disconnection between the common terminal 401 and the M independent terminals 451. The semiconductor switching circuit 202d has a common terminal 407 connected to the output terminal 32a, M independent terminals 452 connected to M independent terminals 451 via M transmission lines 351, independent terminals 453 and 456 connected to node N1 via transmission lines 352, and a common terminal 408 connected to the independent terminals 456 via transmission line 355. The semiconductor switching circuit 202d switches the electrical connection and disconnection between the common terminal 407 and the M independent terminals 452 and 456, and switches the electrical connection and disconnection between the common terminal 408 and at least one of the M independent terminals 452 and 453. M filter circuits 251 are respectively disposed on the M transmission lines 351. Furthermore, the filter circuits 252 are disposed on the transmission lines 355.

[0170] With this structure, a signal path can be established from node N2 through semiconductor switch circuit 201, at least one of the M filter circuits 251, and semiconductor switch circuit 202d to output terminal 32a. Alternatively, a signal path can be established from node N1 through semiconductor switch circuit 202d, a dedicated filter circuit 252, and semiconductor switch circuit 202d to output terminal 32a without passing through semiconductor switch circuit 201. Therefore, power loss of the amplified signal when passing through semiconductor switch circuit 201 can be suppressed in the signal path from node N1 to output terminal 32a. Consequently, power loss of the radio frequency signal can be reduced.

[0171] Furthermore, in the power amplifier circuit 104, in the power-priority mode M1, the semiconductor switching element 71a electrically connects the first terminal to the second terminal. In the power-priority mode M1, the semiconductor switching circuits 201 and 202d do not electrically connect the common terminal 401 to the common terminals 407 and 408. Moreover, in the power-priority mode M1, the semiconductor switching circuit 202d electrically connects the common terminal 407 to the independent terminal 453 via the transmission line 355.

[0172] With this structure, in power mode M1, amplified signals RF1 and RF2 can be combined at node N1, and the combined amplified signal is output to output terminal 32a through semiconductor switch circuit 202d, filter circuit 252, and semiconductor switch circuit 202d. Furthermore, it prevents amplified signal RF2 from being supplied to output terminal 32a through semiconductor switch circuits 201 and 202d.

[0173] Furthermore, in the power amplifier circuit 104, under the efficiency-focused mode M2, the semiconductor switching element 71a does not electrically connect the first terminal to the second terminal. Under the efficiency-focused mode M2, the semiconductor switching circuits 201 and 202d electrically connect the common terminal 401 to the common terminal 407 through any one of the M transmission lines 351 but not through transmission line 355.

[0174] With this structure, in efficiency-focused mode M2, the output destination of the amplified signal RF3 can be switched via the semiconductor switching circuit 201 to the filter circuit 251 among the M filter circuits 251 that corresponds to the frequency band of the amplified signal RF3. Furthermore, the amplified signal RF3, having passed through the filter circuit 251, can bypass the filter circuit 252 in the semiconductor switching circuit 202d and be output to the output terminal 32a. Additionally, by not electrically connecting the first and second terminals of the semiconductor switching element 71a, the amplified signal RF3 can be prevented from being supplied to the output terminal 32a via the semiconductor switching circuit 202d, the filter circuit 252, and the semiconductor switching circuit 202d.

[0175] Furthermore, in the power amplifier circuit 104, under the efficiency-focused mode M2, the semiconductor switching element 71a does not electrically connect the first terminal to the second terminal. Moreover, under the efficiency-focused mode M2, the semiconductor switching circuits 201 and 202d electrically connect the common terminal 401 to the common terminal 407 through any one of the M transmission lines 351 and transmission line 355.

[0176] With this structure, in efficiency-focused mode M2, the output destination of the amplified signal RF3 can be switched via semiconductor switch circuit 201 to filter circuit 251 among the M filter circuits 251 that corresponds to the frequency band of the amplified signal RF3. Furthermore, path switching via semiconductor switch circuit 202d allows the amplified signal RF3, having passed through filter circuit 251, to be further output to output terminal 32a via filter circuit 252. Additionally, by not electrically connecting the first and second terminals of semiconductor switch element 71a, the amplified signal RF3 can be prevented from being supplied to output terminal 32a via semiconductor switch circuit 202d, filter circuit 252, and semiconductor switch circuit 202d.

[0177] Furthermore, the embodiments described above are intended to facilitate understanding of the present invention and are not intended to limit the scope of the invention. The present invention can be modified / improved without departing from its spirit, and the present invention also includes its equivalents. That is, embodiments obtained by those skilled in the art through appropriate design changes to the embodiments are also included within the scope of the present invention as long as they possess the features of the present invention. For example, the elements, their configurations, materials, conditions, shapes, dimensions, etc., of each embodiment are not limited to the illustrated cases and can be appropriately modified. In addition, the embodiments are illustrative, and it is self-evident that partial substitutions or combinations of the structures shown in different embodiments are possible; these substitutions or combinations, as long as they contain the features of the present invention, are also included within the scope of the present invention.

[0178] <1>

[0179] A filter switching circuit, comprising:

[0180] In the first mode, the first node is supplied with a first amplified signal in the first wireless frequency band;

[0181] In the first mode, the second node is supplied with a second amplified signal of the first wireless frequency band having the same phase as the first amplified signal; in the second mode, the second node is supplied with a third amplified signal of the second wireless frequency band.

[0182] A semiconductor switching element having a first end connected to the first node and a second end connected to the second node, the semiconductor switching element switching between an electrical connection and a non-connection between the first end and the second end;

[0183] A first semiconductor switching circuit has a first common terminal connected to the second node and M (an integer greater than 2) first independent terminals, and the first semiconductor switching circuit switches the electrical connection and non-connection between the first common terminal and the M first independent terminals.

[0184] The second semiconductor switching circuit has a second common terminal connected to the first output terminal, M second independent terminals connected to M first independent terminals respectively through M first wirings, and a third independent terminal connected to the first node through second wirings. The second semiconductor switching circuit switches the electrical connection and non-connection between the second common terminal and the M second independent terminals and the third independent terminal.

[0185] M first filters, wherein the M first filters are respectively disposed on the M first wirings; and

[0186] A second filter is disposed on the second wiring.

[0187] <2>

[0188] according to <1> The filter switching circuit, wherein,

[0189] In the first mode, the semiconductor switching element electrically connects the first terminal to the second terminal.

[0190] In the first mode, the first semiconductor switching circuit and the second semiconductor switching circuit do not electrically connect the first common terminal to the second common terminal.

[0191] In the first mode, the second semiconductor switching circuit electrically connects the second common terminal to the third independent terminal.

[0192] <3>

[0193] according to <1> or <2> The filter switching circuit, wherein,

[0194] In the second mode, the semiconductor switching element does not electrically connect the first terminal to the second terminal.

[0195] In the second mode, the first semiconductor switching circuit and the second semiconductor switching circuit electrically connect the first common terminal and the second common terminal through any one of the M first wirings.

[0196] <4>

[0197] according to <1> to <3> The filter switching circuit described in any one of the above, wherein,

[0198] The second semiconductor switching circuit also has a third common terminal connected to the second output terminal, and the second semiconductor switching circuit also switches the electrical connection and non-connection between the third common terminal and the M second independent terminals and the third independent terminal.

[0199] <5>

[0200] A filter switching circuit, comprising:

[0201] In the first mode, the first node is supplied with a first amplified signal in the first wireless frequency band;

[0202] In the first mode, the second node is supplied with a second amplified signal of the first wireless frequency band having the same phase as the first amplified signal; in the second mode, the second node is supplied with a third amplified signal of the second wireless frequency band.

[0203] A semiconductor switching element having a first end connected to the first node and a second end connected to the second node, the semiconductor switching element switching between an electrical connection and a non-connection between the first end and the second end;

[0204] A first semiconductor switching circuit has a first common terminal connected to the second node and M (an integer greater than 2) first independent terminals, and the first semiconductor switching circuit switches the electrical connection and non-connection between the first common terminal and the M first independent terminals.

[0205] The second semiconductor switching circuit has a fourth common terminal connected to a third wiring, M second independent terminals connected to M first independent terminals via M first wiring, a third independent terminal connected to the first node via a second wiring, and a fifth common terminal connected to the fourth wiring. The second semiconductor switching circuit switches the electrical connection and non-connection between the fourth common terminal and the M second independent terminals, and switches the electrical connection and non-connection between the fifth common terminal and at least one of the M second independent terminals and the third independent terminal.

[0206] M first filters, wherein the M first filters are respectively disposed on the M first wirings; and

[0207] The second filter is disposed in the fourth wiring.

[0208] <6>

[0209] according to <5> The filter switching circuit, wherein,

[0210] The filter switching circuit further includes a third semiconductor switching circuit disposed between the second semiconductor switching circuit and the first output terminal. The third semiconductor switching circuit has a sixth common terminal connected to the first output terminal, a fourth independent terminal connected to the fourth common terminal via the third wiring, and a fifth independent terminal connected to the fifth common terminal via the fourth wiring. The third semiconductor switching circuit switches the electrical connection and non-connection between the sixth common terminal and the fourth independent terminal and the fifth independent terminal.

[0211] <7>

[0212] according to <6> The filter switching circuit, wherein,

[0213] In the first mode, the semiconductor switching element electrically connects the first terminal to the second terminal.

[0214] In the first mode, the first semiconductor switching circuit and the second semiconductor switching circuit do not electrically connect the first common terminal to the fourth common terminal and the fifth common terminal.

[0215] In the first mode, the second semiconductor switching circuit and the third semiconductor switching circuit electrically connect the sixth common terminal to the third independent terminal through the fourth wiring.

[0216] <8>

[0217] according to <6> or <7> The filter switching circuit, wherein,

[0218] In the second mode, the semiconductor switching element does not electrically connect the first terminal to the second terminal.

[0219] In the second mode, the first semiconductor switch circuit, the second semiconductor switch circuit, and the third semiconductor switch circuit electrically connect the first common terminal to the sixth common terminal through any one of the M first wirings, and any one of the third wirings and the fourth wirings.

[0220] <9>

[0221] A filter switching circuit, comprising:

[0222] In the first mode, the first node is supplied with a first amplified signal in the first wireless frequency band;

[0223] In the first mode, the second node is supplied with a second amplified signal of the first wireless frequency band having the same phase as the first amplified signal; in the second mode, the second node is supplied with a third amplified signal of the second wireless frequency band.

[0224] A semiconductor switching element having a first end connected to the first node and a second end connected to the second node, the semiconductor switching element switching between an electrical connection and a non-connection between the first end and the second end;

[0225] A first semiconductor switching circuit has a first common terminal connected to the second node and M (an integer greater than 2) first independent terminals, and the first semiconductor switching circuit switches the electrical connection and non-connection between the first common terminal and the M first independent terminals.

[0226] The second semiconductor switching circuit has a seventh common terminal connected to a first output terminal, M second independent terminals connected to M first independent terminals via M first wirings, a third independent terminal and a sixth independent terminal connected to the first node via second wirings, and an eighth common terminal connected to the sixth independent terminal via a fifth wiring. The second semiconductor switching circuit switches the electrical connection and non-connection between the seventh common terminal and the M second independent terminals and the sixth independent terminal, and switches the electrical connection and non-connection between the eighth common terminal and at least one of the M second independent terminals and the third independent terminal.

[0227] M first filters, wherein the M first filters are respectively disposed on the M first wirings; and

[0228] The second filter is disposed in the fifth wiring.

[0229] <10>

[0230] according to <9> The filter switching circuit, wherein,

[0231] In the first mode, the semiconductor switching element electrically connects the first terminal to the second terminal.

[0232] In the first mode, the first semiconductor switching circuit and the second semiconductor switching circuit do not electrically connect the first common terminal to the seventh common terminal and the eighth common terminal.

[0233] In the first mode, the second semiconductor switching circuit electrically connects the seventh common terminal to the third independent terminal via the fifth wiring.

[0234] <11>

[0235] according to <9> or <10> The filter switching circuit, wherein,

[0236] In the second mode, the semiconductor switching element does not electrically connect the first terminal to the second terminal.

[0237] In the second mode, the first semiconductor switching circuit and the second semiconductor switching circuit electrically connect the first common terminal to the seventh common terminal through any one of the M first wirings but not through the fifth wiring.

[0238] <12>

[0239] according to <9> to <11> The filter switching circuit described in any one of the above, wherein,

[0240] In the second mode, the semiconductor switching element does not electrically connect the first terminal to the second terminal.

[0241] In the second mode, the first semiconductor switching circuit and the second semiconductor switching circuit electrically connect the first common terminal to the seventh common terminal through any one of the M first wirings and the fifth wiring.

[0242] <13>

[0243] according to <1> to <12> The filter switching circuit described in any one of the above, wherein,

[0244] The first mode is a power-focused mode, and the second mode is an efficiency-focused mode.

[0245] Explanation of reference numerals in the attached figures

[0246] 31a, 31b, 31c, 31d: Terminals; 32a, 32b: Output terminals; 33a, 33b: Power supply terminals; 41, 42: Balanced-to-unbalanced converters; 41a, 41b, 42a, 42b: Inductors; 51a, 51b, 52a, 52b: Power amplifier stages; 61, 62: Capacitors; 71: Semiconductor switching circuit; 71a: Semiconductor switching element; 101, 102, 103, 104: Power amplifier circuits; 151, 152: Differential pairs; 201, 202a, 202b, 202c 202d, 203: Semiconductor switching circuits; 251, 251a, 251b, 251c, 252: Filter circuits; 351, 351a, 351b, 351c, 352, 353, 354, 355: Transmission lines; 401, 402, 403, 404, 405, 406, 407, 408: Common terminals; 451, 451a, 451b, 451c, 452, 452a, 452b, 452c, 453, 454, 455, 456: Independent terminals; N1, N2: Nodes.

Claims

1. A filter switching circuit, comprising: In the first mode, the first node is supplied with a first amplified signal in the first wireless frequency band; In the first mode, the second node is supplied with a second amplified signal of the first wireless frequency band having the same phase as the first amplified signal; in the second mode, the second node is supplied with a third amplified signal of the second wireless frequency band. A semiconductor switching element having a first end connected to the first node and a second end connected to the second node, the semiconductor switching element switching between an electrical connection and a non-connection between the first end and the second end; A first semiconductor switching circuit has a first common terminal connected to the second node and M first independent terminals. The first semiconductor switching circuit switches the electrical connection and non-connection between the first common terminal and the M first independent terminals. The second semiconductor switching circuit has a second common terminal connected to the first output terminal, M second independent terminals connected to M first independent terminals respectively through M first wirings, and a third independent terminal connected to the first node through second wirings. The second semiconductor switching circuit switches the electrical connection and non-connection between the second common terminal and the M second independent terminals and the third independent terminal. M first filters, wherein the M first filters are respectively disposed on the M first wirings; and A second filter is disposed in the second wiring. Where M is an integer greater than or equal to 2.

2. The filter switching circuit according to claim 1, wherein, In the first mode, the semiconductor switching element electrically connects the first terminal to the second terminal. In the first mode, the first semiconductor switching circuit and the second semiconductor switching circuit do not electrically connect the first common terminal to the second common terminal. In the first mode, the second semiconductor switching circuit electrically connects the second common terminal to the third independent terminal.

3. The filter switching circuit according to claim 1 or 2, wherein, In the second mode, the semiconductor switching element does not electrically connect the first terminal to the second terminal. In the second mode, the first semiconductor switching circuit and the second semiconductor switching circuit electrically connect the first common terminal and the second common terminal through any one of the M first wirings.

4. The filter switching circuit according to any one of claims 1 to 3, wherein, The second semiconductor switching circuit also has a third common terminal connected to the second output terminal, and the second semiconductor switching circuit also switches the electrical connection and non-connection between the third common terminal and the M second independent terminals and the third independent terminal.

5. A filter switching circuit, comprising: In the first mode, the first node is supplied with a first amplified signal in the first wireless frequency band; In the first mode, the second node is supplied with a second amplified signal of the first wireless frequency band having the same phase as the first amplified signal; in the second mode, the second node is supplied with a third amplified signal of the second wireless frequency band. A semiconductor switching element having a first end connected to the first node and a second end connected to the second node, the semiconductor switching element switching between an electrical connection and a non-connection between the first end and the second end; A first semiconductor switching circuit has a first common terminal connected to the second node and M first independent terminals. The first semiconductor switching circuit switches the electrical connection and non-connection between the first common terminal and the M first independent terminals. The second semiconductor switching circuit has a fourth common terminal connected to a third wiring, M second independent terminals connected to M first independent terminals via M first wiring, a third independent terminal connected to the first node via a second wiring, and a fifth common terminal connected to the fourth wiring. The second semiconductor switching circuit switches the electrical connection and non-connection between the fourth common terminal and the M second independent terminals, and switches the electrical connection and non-connection between the fifth common terminal and at least one of the M second independent terminals and the third independent terminal. M first filters, wherein the M first filters are respectively disposed on the M first wirings; and The second filter is disposed in the fourth wiring. Where M is an integer greater than or equal to 2.

6. The filter switching circuit according to claim 5, wherein, The filter switching circuit further includes a third semiconductor switching circuit disposed between the second semiconductor switching circuit and the first output terminal. The third semiconductor switching circuit has a sixth common terminal connected to the first output terminal, a fourth independent terminal connected to the fourth common terminal via the third wiring, and a fifth independent terminal connected to the fifth common terminal via the fourth wiring. The third semiconductor switching circuit switches the electrical connection and non-connection between the sixth common terminal and the fourth independent terminal and the fifth independent terminal.

7. The filter switching circuit according to claim 6, wherein, In the first mode, the semiconductor switching element electrically connects the first terminal to the second terminal. In the first mode, the first semiconductor switching circuit and the second semiconductor switching circuit do not electrically connect the first common terminal to the fourth common terminal and the fifth common terminal. In the first mode, the second semiconductor switching circuit and the third semiconductor switching circuit electrically connect the sixth common terminal to the third independent terminal through the fourth wiring.

8. The filter switching circuit according to claim 6 or 7, wherein, In the second mode, the semiconductor switching element does not electrically connect the first terminal to the second terminal. In the second mode, the first semiconductor switch circuit, the second semiconductor switch circuit, and the third semiconductor switch circuit electrically connect the first common terminal to the sixth common terminal through any one of the M first wirings, and any one of the third wirings and the fourth wirings.

9. A filter switching circuit, comprising: In the first mode, the first node is supplied with a first amplified signal in the first wireless frequency band; In the first mode, the second node is supplied with a second amplified signal of the first wireless frequency band having the same phase as the first amplified signal; in the second mode, the second node is supplied with a third amplified signal of the second wireless frequency band. A semiconductor switching element having a first end connected to the first node and a second end connected to the second node, the semiconductor switching element switching between an electrical connection and a non-connection between the first end and the second end; A first semiconductor switching circuit has a first common terminal connected to the second node and M first independent terminals. The first semiconductor switching circuit switches the electrical connection and non-connection between the first common terminal and the M first independent terminals. The second semiconductor switching circuit has a seventh common terminal connected to a first output terminal, M second independent terminals connected to M first independent terminals via M first wirings, a third independent terminal and a sixth independent terminal connected to the first node via second wirings, and an eighth common terminal connected to the sixth independent terminal via a fifth wiring. The second semiconductor switching circuit switches the electrical connection and non-connection between the seventh common terminal and the M second independent terminals and the sixth independent terminal, and switches the electrical connection and non-connection between the eighth common terminal and at least one of the M second independent terminals and the third independent terminal. M first filters, wherein the M first filters are respectively disposed on the M first wirings; and The second filter is disposed in the fifth wiring. Where M is an integer greater than or equal to 2.

10. The filter switching circuit according to claim 9, wherein, In the first mode, the semiconductor switching element electrically connects the first terminal to the second terminal. In the first mode, the first semiconductor switching circuit and the second semiconductor switching circuit do not electrically connect the first common terminal to the seventh common terminal and the eighth common terminal. In the first mode, the second semiconductor switching circuit electrically connects the seventh common terminal to the third independent terminal via the fifth wiring.

11. The filter switching circuit according to claim 9 or 10, wherein, In the second mode, the semiconductor switching element does not electrically connect the first terminal to the second terminal. In the second mode, the first semiconductor switching circuit and the second semiconductor switching circuit electrically connect the first common terminal to the seventh common terminal through any one of the M first wirings but not through the fifth wiring.

12. The filter switching circuit according to any one of claims 9 to 11, wherein, In the second mode, the semiconductor switching element does not electrically connect the first terminal to the second terminal. In the second mode, the first semiconductor switching circuit and the second semiconductor switching circuit electrically connect the first common terminal to the seventh common terminal through any one of the M first wirings and the fifth wiring.

13. The filter switching circuit according to any one of claims 1 to 12, wherein, The first mode is a power-focused mode, and the second mode is an efficiency-focused mode.

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