Nitride epitaxial structure and preparation method and application thereof

Abstract

This invention discloses a nitride epitaxial structure, its preparation method, and its applications. The nitride epitaxial structure includes a substrate with atomic steps, on which a nucleation layer with a striped pattern is grown; and on the striped patterned nucleation layer, a transition layer, a first semiconductor layer, and a second semiconductor layer epitaxial structure are grown. The nitride epitaxial structure of this invention achieves a high-crystal-quality GaN epitaxial layer within an ultrathin thickness range. This epitaxial layer possesses the characteristics of ultrathinness and high crystal quality, which can effectively improve the heat dissipation characteristics, voltage withstand characteristics, and trapping effects of device structures. Especially when applied to high-frequency, high-power devices, the improvement in heat dissipation, voltage withstand, and trapping effects helps to enhance the power characteristics and linearity of the device.

Description

Technical Field

[0001] This invention relates to the field of semiconductors, and particularly to nitride epitaxial structures for use in the radio frequency field, their preparation methods, and applications. Background Technology

[0002] In the wave of advanced 5G / 6G mobile communications, power amplifier architectures are constantly evolving along with GaN technology to meet increasingly stringent system-level requirements, particularly in terms of efficiency, power levels, and modulation bandwidth linearity. GaN-based high electron mobility transistors (GaN HEMTs) utilize the strong piezoelectric polarization effect of AlGaN / GaN heterojunctions to form a high-mobility, high-density two-dimensional electron gas (2DEG) at the interface, thereby achieving high-frequency signal processing and transmission capabilities under high-power conditions. GaN HEMTs are well-suited for high-power and high-frequency applications, such as base station applications. GaN HEMTs play a crucial role due to their excellent power density. However, GaN HEMTs are still plagued by a phenomenon, especially when reducing device size: trapping effects, such as current collapse, reduce current density. This affects output power density, power-added efficiency (PAE) of the RF power amplifier, small-signal gain, and ultimately, the improvement of the linearity of the power amplifier (PA) architecture.

[0003] SiC-based GaN epitaxial materials are ideal for high-power radio frequency devices due to their excellent material properties and heat dissipation characteristics. However, due to the lattice mismatch between GaN and the SiC substrate, GaN easily generates a large number of mismatch dislocations during epitaxy. The traditional solution is to use a thick buffer layer as a transition layer to allow the mismatch dislocations to bend and annihilate during epitaxial growth, thereby improving the crystal quality of the material. The problem is that although the GaN quality can be improved, the heat dissipation effect deteriorates due to the increase in epitaxial layer thickness. Furthermore, as the GaN epitaxial layer thickness increases, doping is required to suppress leakage current, leading to a deterioration of the device's trapping effect. Summary of the Invention

[0004] To address the above problems, this invention provides nitride epitaxial structures, their preparation methods, and applications, in order to achieve high-performance HEMT devices with superior semiconductor epitaxial performance and faster current recovery speed.

[0005] To achieve the above objectives, the present invention provides a nitride epitaxial structure, comprising a substrate, a nucleation layer disposed on the substrate, a transition layer disposed on the nucleation layer, a first semiconductor layer disposed on the transition layer, and a second semiconductor layer disposed on the first semiconductor layer; the band gap of the second semiconductor layer is greater than the band gap of the first semiconductor layer; a heterojunction having a two-dimensional electron gas region is formed between the second semiconductor layer and the first semiconductor layer; the substrate is a silicon carbide substrate, the substrate has an atomically stepped surface morphology, the upper surface of the substrate includes a plurality of atomic mesa and atomic steps on adjacent atomic mesa; the nucleation layer exhibits a striped pattern; and the transition layer is a gallium-containing nitride.

[0006] In one specific embodiment, the width of the atomic mesa is L, where L ≥ 10 nm. The value of L ranges from 100 nm.

[0007] ~500nm.

[0008] In one specific embodiment, the height difference between adjacent atomic mesa is the step height, the step height is d1, and d1≥0.1nm; the silicon carbide substrate is 4H-SiC or 6H-SiC; the oblique cutting angle of the substrate is a; the value of a ranges from 0°<a≤0.2°.

[0009] In one specific embodiment, the value of d1 ranges from 0.4nm to 0.8nm.

[0010] In one specific embodiment, the thickness of the nucleation layer is d2, and the value of d2 ranges from 10nm to 20nm.

[0011] In one specific embodiment, the height difference between adjacent atomic mesa is the step height, the step height is d1, and the width of the atomic mesa is L, where 250d1≤L≤625d1.

[0012] In one specific embodiment, the height difference between adjacent atomic mesa is the step height, the step height is d1, and the thickness of the nucleation layer is d2, where 12.5d1≤d2≤25d1.

[0013] In one specific embodiment, the thickness of the transition layer is d3, where 50nm ≤ d3 ≤ 100nm.

[0014] In one specific embodiment, the C element content in the transition layer is ≥1E18 atoms / cm3.

[0015] In one specific embodiment, the first semiconductor layer is an unintentionally doped GaN layer, and the C content in the first semiconductor layer is ≤1E17 atoms / cm3; the C content in the transition layer is greater than 10 times the C content of the first semiconductor layer.

[0016] Corresponding to the above-described nitride epitaxial structure, the present invention also provides a semiconductor device comprising the above-described nitride epitaxial structure; the thickness of the first semiconductor layer is d4, where d4 < 500 nm.

[0017] Corresponding to the above-mentioned semiconductor device, the present invention also provides a method for fabricating a semiconductor device, comprising the following steps:

[0018] (1) A substrate is provided; the substrate has an atomic-level stepped surface morphology; (2) A nucleation layer is grown on the substrate, and the formed nucleation layer presents a striped pattern; (3) A GaN epitaxial layer is grown on the striped patterned nucleation layer, the GaN epitaxial layer including a transition layer and a first semiconductor layer, the first semiconductor layer being a GaN layer.

[0019] Furthermore, in the above-mentioned semiconductor device fabrication method, a nucleation layer is grown on the substrate, the nucleation layer is an AlN layer, the growth pressure is less than or equal to 100 mbar, the growth temperature is controlled at 1000℃~1200℃, and the growth rate of the AlN layer does not exceed 0.1 μm / h.

[0020] Furthermore, in the above-mentioned semiconductor device fabrication method, a transition layer is grown on the striped patterned nucleation layer, wherein the transition layer is Al. x Ga 1-x N, 0≤x<1, growth temperature between 1050℃ and 1100℃, growth pressure between 50mbar and 300mbar, the transition layer contains C element, and the C element content is ≥1E18atoms / cm3.

[0021] Furthermore, in the above-mentioned method for fabricating semiconductor devices, a first semiconductor is grown on the transition layer. The first semiconductor layer is an unintentionally doped GaN layer, the C content of the first semiconductor layer is ≤1E17 atoms / cm3, and the thickness of the first semiconductor layer is less than 500nm.

[0022] Accordingly, the present invention also provides a radio frequency amplifier comprising the above-described semiconductor device.

[0023] Accordingly, the present invention also provides a communication device comprising the above-described radio frequency amplifier.

[0024] The nitride epitaxial structure provided by this invention is characterized by a GaN epitaxial layer thickness on the order of hundreds of nanometers and excellent crystal quality. This invention achieves a high-crystal-quality GaN epitaxial layer within an ultrathin thickness range. This nitride epitaxial structure, with its ultrathin and high crystal quality characteristics, can effectively improve the heat dissipation characteristics, voltage withstand characteristics, and trapping effects of device structures. In particular, when applied to high-frequency, high-power devices, the improvement in heat dissipation, voltage withstand, and trapping effects helps to enhance the power characteristics and linearity of the devices. Attached Figure Description

[0025] Figure 1 This is a cross-sectional schematic diagram of the substrate according to Embodiment 1 of the present invention;

[0026] Figure 2 This is a top view schematic diagram of the substrate according to Embodiment 1 of the present invention;

[0027] Figure 3 This is a cross-sectional schematic diagram of a substrate having a nucleation layer in Embodiment 1 of the present invention;

[0028] Figure 4 This is a schematic diagram showing the 3D material grown on the nucleation layer of the GaN epitaxial layer in Embodiment 2 of the present invention, with the atomic steps of adjacent nucleation atomic mesa combined.

[0029] Figure 5 This is a schematic diagram of the lateral growth of 3D material in the GaN epitaxial layer grown on the nucleation layer in Embodiment 2 of the present invention;

[0030] Figure 6 This is a schematic diagram of a barrier layer formed on a GaN epitaxial layer according to Embodiment 2 of the present invention;

[0031] Figure 7 These are atomic force microscope (AFM) photographs of silicon carbide substrates in a specific embodiment of the present invention, as shown in Example 2.

[0032] Figure 8 This is an atomic force microscope (AFM) photograph of a nucleation layer (AlN layer) formed on a silicon carbide substrate in a specific embodiment of the present invention.

[0033] Figure 9 These are atomic force microscopy (AFM) photographs of the nitride epitaxial structure of a semiconductor device in a specific embodiment of the present invention, as shown in Example 2.

[0034] Figure 10 The figure shows the test results of the half-peak width of the rocking curve of GaN(002) surface as a comparative example.

[0035] Figure 11 The figure shows the test results of the half-peak width of the rocking curve of GaN(102) surface as a comparative example.

[0036] Figure 12This is a graph showing the half-peak width test results of the GaN(002) surface rocking curve in a specific embodiment of Example 2;

[0037] Figure 13 The graph shows the half-peak width test results of the GaN(102) surface rocking curve in a specific embodiment of Example 2. Detailed Implementation

[0038] The present invention will be further explained below with reference to the accompanying drawings and specific embodiments.

[0039] In the description of this invention, it should be noted that the terms "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, or the orientation or positional relationship commonly used when the product of this invention is in use. They are used only for the convenience of describing the invention and for simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the invention. Furthermore, the terms "first," "second," and "third," etc., are used only to distinguish descriptions and should not be construed as indicating or implying relative importance. The accompanying drawings in this specification are only illustrative; it should be understood that the dimensions of the various parts shown in the drawings are not drawn to actual scale.

[0040] Example 1

[0041] This invention provides a semiconductor device employing a nitride epitaxial structure, with a source (not shown), drain (not shown), and gate (not shown) disposed on the epitaxial layer. The nitride epitaxial structure, such as... Figure 6 The system includes a substrate 100; an epitaxial layer disposed on the substrate, the substrate having an atomically stepped surface morphology; the epitaxial layer includes a nucleation layer 200, a transition layer 300, a first semiconductor layer 400, and a second semiconductor layer 500 disposed sequentially; the first semiconductor layer 400 is a gallium nitride layer; the band gap of the second semiconductor layer is greater than the band gap of the first semiconductor layer; and a heterojunction with a two-dimensional electron gas region is formed between the second semiconductor layer and the first semiconductor layer.

[0042] The substrate 100 has an atomically stepped surface morphology; the substrate is a silicon carbide substrate, specifically 4H-SiC or 6H-SiC. The silicon carbide substrate is fabricated with its bevel angle α controlled at the same time. Figure 1 , 2 As shown, a surface morphology with atomic steps is formed. The upper surface of the substrate includes a plurality of atomic mesa 10 and atomic steps 11 on adjacent atomic mesa. The width of the atomic mesa is L; the height difference between adjacent atomic mesa is the step height, and the step height is d1.

[0043] Preferably, the step height d1 is greater than or equal to 0.1 nm. This is because during nucleation layer growth, nucleation is preferably performed at atomic step 11 and grain growth occurs at atomic mesa 10. If the step height d1 is too small, the nucleation layer can easily cover the step morphology of the substrate, making it impossible to form a striped patterned nucleation layer. If the nucleation layer is an AlN layer with d1 < 0.1 nm, and the AlN layer is on substrate 100, a striped patterned AlN layer cannot be formed.

[0044] When the step height d1 is less than 0.1 nm, a nucleation layer is grown on the substrate. The material of the nucleation layer is usually AlN, and the lattice parameter along the c-axis (i.e., the direction perpendicular to the substrate) is about 0.498 nanometers (nm). After the formation of the AlN layer, it is difficult for the AlN layer to inherit the surface morphology of the atomic steps of the substrate. When the step height d1 is greater than 0.1 nm, the AlN layer can inherit the surface morphology of the atomic steps of the substrate better.

[0045] In a further preferred embodiment, the step height d1 ranges from 0.4 nm to 0.8 nm. Within this step height range, the mesa width can be controlled within the range of 100 nm to 500 nm. Within this mesa width range, the nucleation layer grains can easily completely cover the atomic mesa, avoiding the situation where an excessively wide mesa width would make it difficult for AlN grains to merge, leading to additional dislocations. When the mesa width L > 500 nm, AlN grains are difficult to merge, resulting in an excessively high dislocation density in the epitaxial layer formed.

[0046] The (0001) crystal plane of 4H-SiC and 6H-SiC, also known as the C plane or basal plane, has a bevel angle α, which is the angle between the substrate bevel line and the (0001) plane. The substrate surface is not completely parallel to the (0001) crystal plane, but is slightly inclined, with a bevel angle of α. The main purpose of introducing the bevel angle is to control the step morphology of the substrate, so that the substrate has atomic mesa of appropriate width.

[0047] In some embodiments, preferably, a ≤ 0.2°. The larger the bevel angle, the narrower the mesa width, i.e., the smaller the value of L. When a > 0.2°, the mesa width of the substrate atomic steps is too narrow, the number of steps increases, and the nucleation layer tends to grow over the atomic steps. The morphology of the overlying steps is difficult to effectively inherit the atomic step morphology of the substrate.

[0048] In some embodiments, 0°<a≤0.2° can effectively control the width of the atomic steps on the substrate, reduce the number of atomic steps, and help reduce the interface caused by crystal merging and improve crystal quality.

[0049] In a preferred embodiment, 0.1°≤a≤0.2° can control the width of the atomic step mesa within the range of 100nm to 500nm, which is beneficial for the atomic step morphology of the nucleation layer inheriting the substrate.

[0050] In some embodiments, when L ≤ 500 nm, the nucleation layer (AlN layer) can grow along the mesa, inheriting the atomic step morphology. When L > 500 nm, the width of the substrate mesa is too large. On the one hand, the nucleation layer will nucleate at multiple points on the mesa, increasing the interface for grain merging. On the other hand, Al atoms are difficult to migrate laterally during growth, and an excessively wide mesa is not conducive to lateral merging between nucleation layer grains. Both of these factors are detrimental to improving the crystal quality of the material.

[0051] In other embodiments, L ≥ 100 nm, the width and number of substrate atomic steps are conducive to the growth of the nucleation layer (AlN layer) along the mesa, forming a stepped morphology. When L < 100 nm, the substrate mesa width becomes narrower and the number of steps increases, the number of nucleation points during AlN layer growth increases, leading to an increase in the number of penetrating dislocations caused by the increased grain merging interface, which is not conducive to improving crystal quality.

[0052] In a preferred embodiment, 100nm≤L≤500nm and 0.1°≤a≤0.2° can effectively balance the atomic step width and the number of atomic steps within a suitable range, ensuring that the half-width at half maximum (WHM) of the GaN crystal (002) plane of the first semiconductor layer is stably controlled within the range of <300arcsec, without the phenomenon of significant deterioration of crystal quality due to the substrate atomic mesa being too narrow.

[0053] In some embodiments, L≥250d1. When L<250d1, it is not conducive to the growth of AlN layers along the mesa, and the nucleation layer is difficult to form a step-like morphology.

[0054] In some embodiments, L≤625d1. When L>625d1, it is not conducive to the growth of AlN layers along the mesa, and it is difficult for the nucleation layer to form a stepped morphology.

[0055] In a further preferred embodiment, 250d1≤L≤625d1, the nucleation layer can form a better step morphology.

[0056] In one embodiment, the nucleation layer 200 is an AlN layer with a thickness of d2, where d2 ≥ 5 nm. More preferably, d2 is 10 nm to 20 nm. With the d2 thickness controlled within this range, the AlN layer can effectively inherit the atomic step morphology of the substrate, forming a striped AlN patterned substrate. When d2 < 5 nm, the AlN is essentially granular, which is not conducive to forming a striped AlN patterned substrate.

[0057] The nucleation layer 200 inherits the atomic-level stepped surface morphology of the substrate 100. The nucleation layer 200 includes nucleation atomic mesa 20 and nucleation atomic steps 21. The nucleation layer exhibits a striped pattern. Specifically, after the nucleation layer is formed on the substrate, the surface morphology of the nucleation layer is observed in a top view. From the measured photographs, it appears as follows... Figure 8 The nucleation layer exhibits a striped pattern, with boundaries formed at the nucleation atomic steps 21 on adjacent nucleation atomic platforms 20.

[0058] In some embodiments, d2≥12.5d1. When d2<12.5d1, the nucleation layer (AlN layer) is too thin, and AlN exists basically in the grain state with poor coverage of the substrate. During the subsequent growth of the GaN layer, a large number of through dislocations will be generated, resulting in poor crystal quality.

[0059] In some embodiments, d2 ≤ 25d1. Increasing the thickness of the nucleation layer (AlN layer) increases the probability of AlN lateral merging; when d2 > 25d1, the substrate step morphology inherited by AlN gradually disappears with increasing growth thickness, and the function of AlN patterned substrate is weakened.

[0060] In a further preferred embodiment, 12.5d1≤d2≤25d1, within which AlN can form a better striped pattern, which is beneficial to exert the basic function of the pattern.

[0061] In this embodiment of the invention, the first semiconductor layer 400 of the semiconductor device is a GaN layer, and a transition layer 300 is provided between the nucleation layer 200 and the first semiconductor layer. The transition layer is a gallium nitride, such as gallium nitride or aluminum gallium nitride. x Ga 1-x N, where 0 ≤ x < 1, and the thickness of the transition layer is d3. In some specific embodiments, d3 is 50 nm to 100 nm, and the transition layer is doped with C element, the C element content being 1E18 atoms / cm³. 3 The first semiconductor layer 400 is an unintentionally doped GaN layer with a thickness of d4, which is less than 500 nm. In a preferred embodiment, d4 is greater than 100 nm. In embodiments with even better performance, the value of d4 ranges from 150 nm to 400 nm. The nitride epitaxial structure of the present invention achieves a high crystal quality nitride epitaxial structure within an ultrathin thickness range (especially within the range of hundreds of nanometers). This epitaxial layer has the characteristics of being ultrathin and having high crystal quality, which can effectively improve the heat dissipation characteristics, voltage withstand characteristics, and trapping effects of the device structure. In particular, when applied to high-frequency, high-power devices, the improvement in heat dissipation, voltage withstand, and trapping effects helps to improve the power characteristics and linearity of the device.

[0062] In this embodiment of the invention, the second semiconductor layer 500 of the semiconductor device is Al. y Ga 1-y In practical applications, the second semiconductor layer 500 can also be AlN or In. 1-z Al z N or In k Al j Ga 1-j-k N; 80% ≤ z ≤ 100%; 0 < k ≤ 20%, 10% ≤ j < 80%. The thickness of the second semiconductor layer 500 is d5, and the value of d5 ranges from 10 to 40 nm.

[0063] It should be noted that, in actual application, an insertion layer, such as an AlN insertion layer, can be provided between the first semiconductor layer 400 and the second semiconductor layer of a semiconductor device; a cap layer, such as a GaN cap layer or a SiN cap layer, can also be provided on the second semiconductor layer.

[0064] Example 2

[0065] This invention provides a method for fabricating a semiconductor device, comprising the following steps:

[0066] (1) A substrate 100 is provided, the substrate 100 having an atomic step morphology; the substrate is a silicon carbide substrate, the silicon carbide substrate being 4H-SiC or 6H-SiC. The oblique cutting angle α of the silicon carbide substrate is controlled during the fabrication process, and the silicon carbide substrate is as follows... Figure 1 , 2 The atomic step morphology is formed, including atomic mesa 10 and atomic steps 11. The height difference between adjacent atomic mesa is the step height d1. Preferably, the step height d1 is greater than 0.1 nm, and the width of the atomic mesa 10 is the mesa width L.

[0067] (2) A nucleation layer (AlN layer) is grown on the substrate. The formed nucleation layer exhibits a striped pattern, as shown in the schematic diagram. Figure 3 As shown, a nucleation layer, which is an AlN layer, is grown on the substrate. The growth pressure is less than or equal to 100 mbar, and the growth temperature is controlled between 1000℃ and 1200℃. Preferably, the growth rate of the AlN layer does not exceed 0.1 μm / h to ensure that the AlN layer can inherit the step morphology of the substrate.

[0068] In some embodiments, the nucleation layer has a thickness of ≥5nm and grows along the atomic step mesa of the SiC substrate, inheriting the atomic step morphology of the SiC substrate. The key to the growth of the nucleation layer that inherits the atomic step morphology of the SiC substrate lies in the control of the growth pressure, temperature and growth thickness of the nucleation layer.

[0069] The substrate 100 includes a first substrate atomic mesa, a first substrate atomic step, a second substrate atomic mesa, a third substrate atomic step, and so on. The nucleation layer inherits the atomic step morphology of the substrate and also includes a first nucleation atomic mesa, a first nucleation atomic step, a second nucleation atomic mesa, a third nucleation atomic step, and so on.

[0070] (3) A GaN epitaxial layer is grown on the striped patterned nucleation layer, the GaN epitaxial layer comprising a transition layer and a first semiconductor layer. The transition layer is a gallium-containing nitride, such as gallium nitride or aluminum gallium nitride. x Ga 1-x N, where 0 ≤ x < 1, the C concentration of the transition layer is 1E18 atoms / cm² 3 The above. Preferably, the C concentration in the transition layer is less than 1E19 atoms / cm. 3 Within this layer, the first semiconductor layer is a GaN layer. In some embodiments, the first semiconductor layer is an unintentionally doped GaN layer with a C doping concentration of less than 1E17 atoms / cm². 3 .

[0071] The striped nucleation layer acts as a mask, upon which a transition layer grows. This transition layer preferentially nucleates and grows at the step junctions (nucleation atom steps) of the striped nucleation layer (AlN layer), such as... Figure 4 As shown, it is necessary to control the growth conditions of the transition layer to promote an increase in the lateral growth rate of the transition layer. The transition layer grains grow along the AlN mesa and merge at the step junction. The beneficial effect is that by utilizing the lateral growth of the patterned substrate and the transition layer, the interface of grain merging is basically controlled at the step junction (the atomic step of adjacent nucleation atomic mesa). Through dislocations basically only extend upward at the step junction. In the region outside the step junction, due to the fewer grain interfaces and the lateral growth of the transition layer, the number of through dislocations is greatly reduced.

[0072] During epitaxial growth, it is necessary to control the growth pressure and temperature of the transition layer to promote the lateral migration of Ga atoms and achieve rapid lateral merging growth of GaN. Figure 5 As shown; and with a growth temperature between 1050℃ and 1100℃, a growth pressure between 50 mbar and 300 mbar, the C doping concentration of this transition layer is greater than 1E18 atoms / cm. 3 The first semiconductor layer is then grown on the transition layer, and the first semiconductor layer shown is a GaN layer.

[0073] In this embodiment, the transition layer is aluminum gallium nitride; the typical thickness is 50 nm; the growth temperature of this transition layer is between 1050-1100℃, and the growth pressure is between 50 mbar and 100 mbar; its C doping concentration needs to be controlled to be >1E18 atoms / cm 3 .

[0074] A first semiconductor layer is grown on the transition layer. The thickness of the first semiconductor layer, d4, is less than 500 nm. The first semiconductor layer is an unintentionally doped GaN layer, and its C doping concentration is controlled at 1E17 atoms / cm². 3 Within this range, better crystal quality can be obtained. More preferably, the thickness d4 of the first semiconductor layer is controlled within 150nm to 400nm to obtain even better crystal quality.

[0075] (4) Growing a barrier layer on the GaN epitaxial layer, such as Figure 6 As shown.

[0076] (5) Form the source, drain and gate.

[0077] The semiconductor device fabricated by the above steps includes a nitride epitaxial structure, as described in Example 1. Utilizing the patterned morphology of the substrate and the nucleation layer (AlN layer), the GaN epitaxial layer can achieve superior GaN epitaxial layer crystal quality within an ultra-thin thickness range, such as a first semiconductor layer thickness d4 less than 500 nm, and even better, a first semiconductor layer thickness d4 controlled within 150 nm to 400 nm. This improved GaN epitaxial layer crystal quality effectively mitigates material-induced trapping effects and improves device linearity. Furthermore, the ultra-thin GaN epitaxial layer facilitates improved heat dissipation. Additionally, with a GaN epitaxial layer thickness in the hundreds of nanometers range, the nucleation layer (AlN layer) acts as a back barrier, significantly improving the device's breakdown voltage characteristics. Therefore, the material employing this nitride epitaxial structure can effectively improve the device's linearity, heat dissipation characteristics, and breakdown voltage characteristics.

[0078] Comparative Example

[0079] The comparative example nitride epitaxial structure includes a substrate, a nucleation layer, a first semiconductor layer, and a second semiconductor layer. The substrate is a 4H-SiC silicon carbide substrate with a thickness of 500 μm; the bevel angle of the silicon carbide substrate is 0.3°. The substrate mesa width is 50 nm, and the substrate step height is 0.8 nm; the nucleation layer is an AlN layer with a thickness of 18 nm; the first semiconductor layer is GaN with a thickness of 200 nm; and the second semiconductor layer is an AlGaN barrier layer with a thickness of 20 nm. The comparative example has no transition layer. Figure 10 The diagram shows the half-width at half-maximum (FWHM) test results of the GaN (002) surface rocking curve, which is 1350 arcsec (arcseconds) on the (002) surface of the first semiconductor layer. Figure 11The figure shows the half-peak width test results of the swing curve of GaN (102) surface as a comparative example; (102) surface, its FWHM = 935 arcsec (arcseconds); where the X-axis is the arcsecond in radians and the Y-axis is the signal strength.

[0080] In one specific embodiment, the nitride epitaxial structure includes a substrate, a nucleation layer, a transition layer, a first semiconductor layer, and a second semiconductor layer sequentially disposed. The substrate is a 4H-SiC silicon carbide substrate with a thickness of 500 μm; the bevel angle of the silicon carbide substrate is 0.1°. The substrate mesa width is 200 nm, and the substrate step height is 0.8 nm; the nucleation layer is an AlN layer with a thickness of 18 nm; the transition layer is GaN with a thickness of 50 nm; the first semiconductor layer is GaN with a thickness of 150 nm; the second semiconductor layer is an AlGaN barrier layer with a thickness of 20 nm. The measured substrate image is shown below. Figure 7 As shown, an AlN layer is grown on the substrate, and the measured image is as follows. Figure 8 As shown; the measured image after the growth of the barrier layer in the first semiconductor layer is as follows. Figure 9 As shown. Figure 12 The graph shows the half-width at half-maximum (FWHM) test results of the GaN (002) plane rocking curve in a specific embodiment of Example 2. Specifically, on the (002) plane of the first semiconductor layer, the FWHM is 168.7 arcsec (arcseconds). Figure 13 The image shows the half-width at half-maximum (FWHM) test results of the GaN (102) plane rocking curve in a specific embodiment of Example 2. The (102) plane has an FWHM of 459.5 arcsec (arcseconds); where the X-axis is in arcseconds and the Y-axis is the signal strength. Compared with the comparative example, the nitride epitaxial structure (without a second semiconductor layer) of this embodiment of the present invention has superior crystal quality.

[0081] It should be noted that, in practical applications, the substrate of the semiconductor device in the embodiments of the present invention can be further reduced in thickness through a thinning process. For example, if the silicon carbide substrate has a thickness of 500 μm, it can be further thinned to 100 μm after the semiconductor device fabrication process through a thinning process.

[0082] Accordingly, this invention also provides a radio frequency (RF) amplifier, which includes a semiconductor device comprising a nitride epitaxial structure, as described in Embodiment 1. The RF amplifier can be applied in communication equipment such as microwave systems, radar, wireless communication modules, and network devices.

[0083] Accordingly, embodiments of the present invention also provide a communication device, which includes the aforementioned radio frequency amplifier. The communication device may be a microwave system, radar, wireless communication module, network equipment, etc.

[0084] Any simple modifications, equivalent changes, and alterations made to the above embodiments based on the technical essence of this invention shall fall within the protection scope of this invention.

Claims

1. A nitride epitaxial structure, characterized in that, It includes a substrate, a nucleation layer disposed on the substrate, a transition layer disposed on the nucleation layer, a first semiconductor layer disposed on the transition layer, and a second semiconductor layer disposed on the first semiconductor layer; The band gap of the second semiconductor layer is larger than that of the first semiconductor layer; A heterojunction with a two-dimensional electron gas region is formed between the second semiconductor layer and the first semiconductor layer; The substrate is a silicon carbide substrate, which has an atomic-level stepped surface morphology. The upper surface of the substrate includes a plurality of atomic mesa and atomic steps on adjacent atomic mesa; the nucleation layer is patterned in a striped pattern. The transition layer is a gallium-containing nitride.

2. The nitride epitaxial structure according to claim 1, characterized in that, The width of the atomic mesa is L, where L ≥ 10 nm.

3. The nitride epitaxial structure according to claim 2, characterized in that, The value of L ranges from 100nm to 500nm.

4. The nitride epitaxial structure according to claim 1, characterized in that, The height difference between adjacent atomic mesa is the step height, and the step height is d1, where d1 ≥ 0.1 nm; the silicon carbide substrate is 4H-SiC or 6H-SiC; the oblique cutting angle of the substrate is a; the value of a ranges from 0° to 0.2°.

5. The nitride epitaxial structure according to claim 4, characterized in that, The value of d1 ranges from 0.4nm to 0.8nm.

6. The nitride epitaxial structure according to claim 1, characterized in that, The thickness of the nucleation layer is d2, and the value of d2 ranges from 10nm to 20nm.

7. The nitride epitaxial structure according to claim 1, characterized in that, The height difference between adjacent atomic mesa is the step height, the step height is d1, and the width of the atomic mesa is L, where 250d1≤L≤625d1.

8. The nitride epitaxial structure according to claim 1, characterized in that, The height difference between adjacent atomic platforms is the step height, the step height is d1, and the thickness of the nucleation layer is d2, where 12.5d1≤d2≤25d1.

9. The nitride epitaxial structure according to claim 1, characterized in that, The thickness of the transition layer is d3, where 50nm ≤ d3 ≤ 100nm.

10. The nitride epitaxial structure according to claim 1, characterized in that, The C content in the transition layer is ≥1E18 atoms / cm³ 3 .

11. The nitride epitaxial structure according to claim 10, characterized in that, The first semiconductor layer is an unintentionally doped GaN layer, and the C element content in the first semiconductor layer is ≤1E17 atoms / cm³. 3 The C content in the transition layer is greater than 10 times the C content in the first semiconductor layer.

12. A semiconductor device, characterized in that, It includes the nitride epitaxial structure as described in any one of claims 1 to 11; the thickness of the first semiconductor layer is d4, where d4 < 500 nm.

13. A method for fabricating a semiconductor device, characterized in that, Includes the following steps: (1) A substrate is provided; the substrate has an atomically stepped surface morphology; (2) A nucleation layer is grown on the substrate, and the formed nucleation layer presents a striped pattern; (3) A GaN epitaxial layer is grown on a striped patterned nucleation layer, wherein the GaN epitaxial layer includes a transition layer and a first semiconductor layer, wherein the first semiconductor layer is a GaN layer.

14. The method for fabricating a semiconductor device according to claim 13, characterized in that, A nucleation layer is grown on a substrate. The nucleation layer is an AlN layer. The growth pressure is less than or equal to 100 mbar, the growth temperature is controlled between 1000℃ and 1200℃, and the growth rate of the AlN layer does not exceed 0.1 μm / h.

15. The method for fabricating a semiconductor device according to claim 13, characterized in that, A transition layer is grown on the striped patterned nucleation layer, wherein the transition layer is Al. x Ga 1-x N, 0≤x<1, growth temperature between 1050℃ and 1100℃, growth pressure between 50mbar and 300mbar, the transition layer contains carbon element, and its carbon element content is ≥1E18 atoms / cm 3 .

16. The method for fabricating a semiconductor device according to claim 13, characterized in that, A first semiconductor layer is grown on the transition layer. The first semiconductor layer is an unintentionally doped GaN layer, and the carbon content of the first semiconductor layer is ≤1E17 atoms / cm². 3 The thickness of the first semiconductor layer is less than 500 nm.

17. A radio frequency amplifier, characterized in that, Including the semiconductor device as described in claim 12.

18. A communication device, characterized in that, Includes the radio frequency amplifier as described in claim 17.

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