Rc oscillator, electronic device, and chip

Abstract

Embodiments of the present disclosure disclose an RC oscillator, an electronic device and a chip. The RC oscillator comprises: a current generation circuit comprising a transistor and a resistor, configured to output a bias current according to a power supply voltage, an inter-electrode voltage of the transistor and a resistance value of the resistor; a charging and discharging control circuit comprising a capacitor and connected to the current generation circuit, configured to charge the capacitor by the power supply voltage or discharge the capacitor by the bias current; and a logic control circuit connected to the current generation circuit and the charging and discharging control circuit, configured to compare a capacitor voltage of the capacitor with a voltage threshold determined based on the inter-electrode voltage, and control the charging and discharging control circuit to switch to a first stage or a second stage. The present disclosure does not need to design a complex voltage reference and current reference circuit, greatly simplifies the overall circuit structure, and saves chip area and power consumption.

Description

Technical Field

[0001] This disclosure relates to the field of integrated circuit technology, and more particularly to an RC oscillator, electronic device, and chip. Background Technology

[0002] In integrated circuits, RC oscillators are often used as clock sources for on-chip systems due to their simple structure and ease of integration. Traditional high-precision RC oscillators typically use an internal voltage reference to generate a bias current (e.g., I = VREF / R) that is independent of the power supply voltage. This bias current charges or discharges a capacitor, and a comparator monitors the capacitor voltage. Combined with logic control circuitry, an oscillation loop is formed, thereby generating an oscillation frequency determined solely by the external resistor R and capacitor C.

[0003] However, to obtain an accurate and stable reference voltage VREF, this approach requires the design and integration of complex bandgap reference circuits. This not only significantly increases chip area and manufacturing costs but also leads to higher static power consumption. Furthermore, the reference circuit itself can become a noise source, interfering with the normal operation of the oscillator and affecting the overall noise immunity of the system.

[0004] Therefore, there is an urgent need for an RC oscillator circuit that can generate a stable oscillation frequency that is independent of the power supply voltage and determined solely by the RC time constant, without relying on a complex internal voltage reference. Summary of the Invention

[0005] In view of this, this disclosure provides an RC oscillator, electronic device, and chip to solve the problems of complex circuit structure, large chip area, and high power consumption caused by reliance on an internal voltage reference in the prior art.

[0006] According to a first aspect of this disclosure, an RC oscillator is provided, comprising: a current generating circuit including a transistor and a resistor, configured to output a bias current based on a power supply voltage, an inter-electrode voltage of the transistor, and a resistance value of the resistor; a charge / discharge control circuit including a capacitor, the charge / discharge control circuit being connected to the current generating circuit and configured to charge the capacitor with the power supply voltage in a first stage and discharge the capacitor with the bias current in a second stage; and a logic control circuit for connecting the current generating circuit and the charge / discharge control circuit, configured to compare a capacitor voltage of the capacitor with a voltage threshold determined based on the inter-electrode voltage of the transistor, and control the charge / discharge control circuit to switch to either the first stage or the second stage based on the comparison result.

[0007] According to a second aspect of this disclosure, an electronic device is provided, including an RC oscillator as described in the first aspect.

[0008] According to a third aspect of this disclosure, a chip is provided, including an RC oscillator as described in the first aspect.

[0009] The RC oscillator circuits provided in this disclosure cleverly utilize capacitor discharge to offset the influence of power supply voltage and device threshold on the oscillation frequency without requiring the design of an internal voltage reference. This greatly simplifies the circuit and the overall circuit structure, saving chip area and reducing the system's static power consumption. Furthermore, this disclosure eliminates the need for an internal reference voltage, thus avoiding interference from the oscillator to the reference circuit and offering significant advantages in anti-interference performance. Attached Figure Description

[0010] To more clearly illustrate the technical solutions in the embodiments of this disclosure or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in the embodiments of this disclosure. For those skilled in the art, other drawings can be obtained based on these drawings.

[0011] Figure 1 This is a structural block diagram of an RC oscillator that is an exemplary embodiment of the present disclosure.

[0012] Figure 2 This is a structural block diagram of an RC oscillator as another exemplary embodiment of the present disclosure.

[0013] Figures 3A to 4D For corresponding Figure 2 Structural diagrams of different embodiments of the RC oscillator.

[0014] Figure 5 This is a structural block diagram of an RC oscillator as another exemplary embodiment of the present disclosure.

[0015] Figures 6A to 6B For corresponding Figure 5 A schematic diagram of an embodiment of the current generation circuit.

[0016] Component designation: 10. RC Oscillator 12. Current generating circuit 122. Transistor 124. Field-Effect Transistor 124a, First NMOS transistor 124b, First PMOS transistor 126. Bipolar Junction Transistor 126a, NPN bipolar junction transistor 126b, PNP type bipolar junction transistor 128. Resistance 14. Charge and discharge control circuit 142. Capacitor 16. Logic control circuit 162A, First Comparator 162B, Second Comparator 164. Second NMOS transistor 166. Second PMOS transistor VDD, power supply voltage GND, grounding terminal Ib, bias current VGS, gate-source voltage VBE, base-emitter voltage S1, First Switch S2, Second Switch S3, Third Switch S4, Fourth Switch A1, First Node A2, Second Node Detailed Implementation To enable those skilled in the art to better understand the technical solutions in the embodiments of this disclosure, the technical solutions in the embodiments of this disclosure will be clearly and thoroughly described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this disclosure, and not all embodiments. Based on the embodiments of this disclosure, all other embodiments obtained by those skilled in the art should fall within the protection scope of this disclosure.

[0017] Reference is made to the accompanying drawings, which form part of the detailed description and illustrate exemplary embodiments. Furthermore, it should be understood that other embodiments may be utilized, and structural and / or logical changes may be made without departing from the scope of the claimed subject matter. It should also be noted that orientations and references (e.g., up, down, top, bottom, etc.) may be used merely to facilitate the description of features in the drawings. Therefore, the following detailed description is not to be construed in a limiting sense, and the scope of the claimed subject matter is defined only by the appended claims and their equivalents.

[0018] Numerous details are set forth in the following description. However, it will be apparent to those skilled in the art that the embodiments described herein can be practiced without these specific details. In some instances, well-known methods and apparatus are shown in block diagram form rather than in detail to avoid obscuring the embodiments described herein. Throughout this specification, references to “embodiment,” “one embodiment,” or “some embodiments” mean that a particular feature, structure, function, or characteristic described in connection with that embodiment is included in at least one embodiment herein. Therefore, the phrases “in an embodiment,” “in one embodiment,” or “some embodiments” appearing throughout this specification do not necessarily refer to the same embodiment. Furthermore, in one or more embodiments, particular features, structures, functions, or characteristics can be combined in any suitable manner. For example, a first embodiment can be combined with a second embodiment in any way that does not mutually exclude particular features, structures, functions, or characteristics associated with two embodiments.

[0019] As used in the description and appended claims, the singular forms “a” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will also be understood that the term “and / or” as used herein refers to and includes any and all possible combinations of one or more of the associated listed items.

[0020] The terms “coupling” and “connection”, along with their derivatives, are used herein to describe functional or structural relationships between components. It should be understood that these terms are not intended to be synonyms for each other. Rather, in certain embodiments, “connection” can be used to indicate that two or more elements are in direct physical, optical, or electrical contact with each other. “Coupling” can be used to indicate that two or more elements are in direct or indirect physical or electrical contact with each other (with other intermediary elements between them), and / or that two or more elements cooperate or interact with each other (e.g., as in a causal relationship).

[0021] As described throughout this document and in the claims, a list of items connected by the terms “at least one of” or “one or more of” may mean any combination of the listed items. For example, the phrase “at least one of A, B, or C” may mean A; B; C; A and B; A and C; B and C; or A, B, and C.

[0022] The terms "circuit" or "unit" can refer to one or more passive and / or active components arranged to cooperate with each other to provide a desired function. The term "signal" can refer to at least one current signal, voltage signal, or magnetic signal. The terms "substantially," "close to," "approximately," "near," and "about" generally refer to within ±10% of the target value.

[0023] An RC oscillator (Resistor-Capacitor Oscillator) is a circuit structure that generates periodic signals based on the charging and discharging principle of resistors and capacitors. Due to its simple structure and low cost, it is widely used in integrated circuits as a basic functional module such as a clock source and timer.

[0024] Traditional RC oscillators typically rely on an internally integrated reference voltage (such as a bandgap reference voltage) and a reference current source. A capacitor is charged to the reference voltage threshold using a constant current, and a comparator and logic control circuit are then used to generate an oscillation frequency determined solely by the RC time constant. While this architecture can achieve frequency stability to some extent, its design has several significant limitations.

[0025] First, because high-precision voltage and current reference modules must be integrated, the overall circuit structure is complex and the number of modules is large, which not only significantly increases the chip's area footprint but also contradicts the current trend of miniaturization and low power consumption in integrated circuits. Second, this type of reference circuit is inherently sensitive to power supply noise, process variations, and environmental interference, which can easily couple these disturbances into the oscillation circuit, thereby introducing additional frequency jitter and weakening the oscillator's anti-interference capability and the purity of the output signal.

[0026] Furthermore, the reference circuits used in traditional RC oscillators often have high static power consumption. For example, bandgap references typically need to maintain microamplitude or even milliamps of bias current to ensure temperature compensation performance, which poses a significant disadvantage in battery-powered or energy-efficient applications such as the Internet of Things (IoT) and wearable devices. In addition, if the temperature drift of the reference circuit is poorly controlled, the charging current or threshold voltage will drift with temperature changes, directly affecting the RC charge-discharge cycle and ultimately causing instability in the oscillation frequency.

[0027] To address the various problems existing in the design of existing RC oscillator circuits, the embodiments of this disclosure provide a simplified RC oscillator circuit structure that eliminates the need for complex internal voltage references (such as bandgap references) and current reference circuits, effectively saving chip area and power consumption, and improving anti-interference capability.

[0028] The specific implementations of the embodiments of this disclosure will be described in detail below with reference to the accompanying drawings: RC oscillator Figure 1 A simplified structural diagram of an RC oscillator as an exemplary embodiment of this disclosure.

[0029] like Figure 1 As shown, according to some embodiments of this disclosure, the RC oscillator 10 may mainly include: a current generation circuit 12, a charge / discharge control circuit 14, and a logic control circuit 16.

[0030] The current generation circuit 12 includes a transistor 122 and a resistor 128, and is configured to output a bias current Ib based on the power supply voltage VDD, the inter-electrode voltage of the transistor 122 and the resistance value R of the resistor 128.

[0031] In some embodiments, a low-temperature drift resistor may be used to improve the frequency stability of the RC oscillator over the entire temperature range. The bias current is adjusted by adjusting the resistance value of the 128 resistor to effectively counteract the effect of the resistor process angle on the oscillation frequency.

[0032] The charge / discharge control circuit 14 includes a capacitor 142. The charge / discharge control circuit 14 is connected to the current generation circuit 12 and configured to acquire the bias current Ib of the current generation circuit 12. In the first stage, the capacitor 142 is charged using the power supply voltage VDD. In the second stage, the capacitor 142 is discharged using the bias current Ib. Therefore, the discharge time of the capacitor 142 is determined by the magnitude of the bias current Ib (which can be understood as being determined by the resistance value R of the resistor 128).

[0033] In some embodiments, the charge / discharge control circuit 14 can charge capacitor 142 with power supply voltage VDD in the first stage (e.g., by controlling capacitor 142 to conduct power supply voltage VDD and ground terminal GND), causing the capacitor voltage of capacitor 142 to rise to power supply voltage VDD; in the second stage, it controls capacitor 142 to conduct current generation circuit 12, and discharges capacitor 142 with bias current Ib output by current generation circuit 12, causing the capacitor voltage of capacitor 142 to drop from power supply voltage VDD to the inter-electrode voltage of transistor 122. By clearly defining the start and end voltages of capacitor charging and discharging operations, the consistency of each oscillation cycle can be guaranteed, thereby improving the accuracy of the output frequency.

[0034] The logic control circuit 16 is used to connect the current generation circuit 12 and the charge / discharge control circuit 14, and is configured to compare the capacitor voltage of the capacitor 142 with the voltage threshold Vth determined based on the inter-electrode voltage of the transistor 122, and control the charge / discharge control circuit 14 to switch to the first stage or the second stage based on the comparison result.

[0035] In this embodiment, the logic control circuit 16 is configured to output a flipping logic control signal when it detects that the capacitor voltage has dropped to a voltage threshold, so as to control the charge and discharge control circuit 14 to switch between the first stage and the second stage.

[0036] Therefore, the RC oscillator 10 in this embodiment does not require the design of complex circuit structures such as a bandgap reference, significantly reducing chip area and power consumption. Furthermore, since it does not rely on an internal reference circuit, the oscillator itself will not interfere with other reference circuits within the system, significantly improving the overall stability of the system.

[0037] Furthermore, in this embodiment, the logic control circuit outputs a flip control signal when it detects that the capacitor voltage has dropped to the voltage threshold. Therefore, the oscillation frequency of the oscillator is controlled based on the discharge time of the capacitor, so that the oscillation period of the oscillator is determined only by the resistor R and the capacitor C, and is not significantly affected by power supply voltage fluctuations.

[0038] The current generation circuit 12 in this disclosure can be implemented using various types of transistors 122. The charge / discharge control circuit 14 and logic control circuit 16 included in the RC oscillator 10 can be adaptively adjusted according to the specific type of transistor 122 selected, thereby flexibly constructing RC oscillators 10 with different structural forms. The following will describe in detail the different implementation methods and their corresponding circuit architectures with reference to the accompanying drawings.

[0039] refer to Figure 2 In some embodiments, transistor 122 includes field-effect transistor 124, the gate of which is shorted to the drain. Current generation circuit 12 can generate bias current Ib based on power supply voltage VDD, gate-source voltage VGS of field-effect transistor 124, and resistance value of resistor 128.

[0040] In this embodiment, the bias current Ib output by the current generation circuit 12 satisfies the following formula 1: (Formula 1) In Formula 1, Indicates bias current Ib, Indicates the power supply voltage. This represents the gate-source voltage of the field-effect transistor 124. The resistance value is 128.

[0041] By configuring the field-effect transistor 124 as a diode connection and combining it with the resistor 128 and the power supply voltage VDD, the current generation circuit 12 constructs a simple, self-biased current source with good PVT robustness, providing a precise and controllable bias current for the discharge phase of the RC oscillator. It is a key basic module for realizing a high-stability, low-power on-chip clock.

[0042] In some embodiments, reference Figure 3A The current generation circuit 12A shown includes a field-effect transistor 124 (transistor 122) comprising a first NMOS transistor 124a, the drain of the first NMOS transistor 124a being connected to the power supply voltage VDD via a resistor 128, and the source of the first NMOS transistor 124a being grounded.

[0043] refer to Figure 3B and Figure 3C , corresponding to Figure 3AThe current generating circuit 12A and the charge / discharge control circuit 14 may include a first switch S1 and a second switch S2. The first terminal of capacitor 142 is grounded, the first switch S1 is connected between the second terminal of capacitor 142 and the power supply voltage VDD, and the second switch S2 is connected between the second terminal of capacitor 142 and the current generating circuit 12A.

[0044] refer to Figure 3B In the first stage (i.e., the charging stage), the charge / discharge control circuit 14 closes the first switch S1 and opens the second switch S2. At this time, the first terminal of capacitor 142 is grounded, and the second terminal is connected to the power supply voltage through the closed first switch S1, thereby forming a low-impedance "power supply-capacitor-ground" charging path. In this path, the power supply voltage VDD rapidly charges capacitor 142 until the voltage across capacitor 142 stabilizes at the power supply voltage VDD.

[0045] refer to Figure 3C In the second stage (i.e., the discharge stage), the charge / discharge control circuit 14 is used to disconnect the first switch S1 and close the second switch S2. At this time, the first terminal of the capacitor 142 remains grounded, and the second terminal is no longer connected to the power supply voltage VDD, but is connected to the current generating circuit 12 through the closed second switch S2, thus forming a discharge loop of "capacitor-current generating circuit 12-ground". Under this configuration, the charge stored in the capacitor 142 begins to be released through this discharge loop.

[0046] refer to Figure 3B and Figure 3C The logic control circuit 16 may include a first comparator 162A. The first comparator 162A is connected to the second terminal of the capacitor 142 and the first NMOS transistor 124a, and is configured to: take the capacitor voltage VCT of the capacitor 142 as a positive feedback input, take the gate-source voltage VGS of the first NMOS transistor 124a as a negative feedback input, and output a logic control signal VOUT to control the charging and discharging control circuit 14 to switch between a first stage and a second stage.

[0047] Specifically, the core function of the first comparator 162A is to monitor the voltage state of capacitor 142 in real time and generate a switching signal accordingly to coordinate the orderly transition of the charge / discharge control circuit 14 between the charging stage (first stage) and the discharging stage (second stage). The non-inverting input (+) of the first comparator 162A is connected to the second terminal of capacitor 142 to sample the instantaneous capacitor voltage VCT on capacitor 142; the inverting input (+) of the first comparator 162A... The gate-source node of the first NMOS transistor 124a is connected to obtain the gate-source voltage VGS of the first NMOS transistor 124a as a reference threshold. This configuration enables the first comparator 162A to dynamically compare the relative magnitudes of the capacitor voltage VCT and the gate-source voltage VGS, and output the corresponding digital logic level (such as a high level "1" or a low level "0") as a control signal. This control signal is fed back to the charge-discharge control circuit 14 to determine the on / off state of the first switch S1 and the second switch S2, thereby realizing closed-loop control of the oscillation period.

[0048] refer to Figure 3D In some embodiments, the logic control circuit 16 may include a second NMOS transistor 164. The source of the second NMOS transistor 164 is grounded; the gate of the second NMOS transistor 164 is connected to the second terminal of the capacitor 142 to obtain the capacitor voltage VCT of the capacitor 142; the drain of the second NMOS transistor 164 is connected to the current generation circuit 12 via a first node A1, so as to output a logic control signal VOUT through the first node A1 to control the charge / discharge control circuit 14 to switch to the first stage or the second stage.

[0049] It is worth noting that when the comparator 162 is replaced by the second NMOS transistor 164, the length, width and current density of the second NMOS transistor 164 and the first NMOS transistor 124a in the current generation circuit 12A need to be matched to achieve current mirroring.

[0050] Depend on Figures 3A to 3D It can be seen that during the discharge phase of capacitor 142 (i.e. Figure 3CDuring the discharge phase, the voltage change of capacitor 142 is: ΔV = VDD - VGS, where VDD is the power supply voltage and VGS is the gate-source voltage of the first NMOS transistor 124a. The discharge current of capacitor 142 is Idisc = bias current Ib = (VDD - VGS) / R, and the discharge time of capacitor 142 is C × ΔV / Idisc = C × (VDD - VGS) / (VDD - VGS) / R = C × R. From this derivation formula for the discharge time, it can be seen that the power supply voltages VDD and VGS are completely canceled out, so the final discharge time of capacitor 142 depends only on the product of capacitance C and resistance R, i.e., the classic RC time constant. This means that fluctuations in the power supply voltage VDD (such as voltage drops under battery power) will not affect the discharge time; changes in VGS caused by the threshold voltage of the first NMOS transistor 124a or process variations will also be canceled out as long as they remain consistent within the same branch. Therefore, the stability of the oscillation period of the RC oscillator 10 no longer depends on the absolute voltage level, but is dominated by the matching accuracy and temperature coefficient of the passive components R and C. This ingenious circuit topology achieves a self-compensation mechanism for VDD and VGS, significantly improving the frequency stability of the RC oscillator over a wide voltage range, under different process angles, and with varying temperatures.

[0051] In other embodiments, reference is made to Figure 4A The current generation circuit 12B shown includes a field-effect transistor 124 (transistor 122) comprising a first PMOS transistor 124b, the source of which is connected to the power supply voltage, and the drain of which is grounded via a resistor 128.

[0052] refer to Figure 4B and Figure 4C , corresponding to Figure 4A The current generating circuit 12B and the charge / discharge control circuit 14 may include a third switch S3 and a fourth switch S4. The first terminal of capacitor 142 is connected to the power supply voltage VDD, the third switch S3 is connected between the second terminal of capacitor 142 and the ground terminal, and the fourth switch S4 is connected between the second terminal of capacitor 142 and the current generating circuit 12B.

[0053] refer to Figure 4B In the first stage (i.e., the charging stage), the charge / discharge control circuit 14 closes the third switch S3 and opens the fourth switch S4. At this time, the first terminal of capacitor 142 is connected to the power supply voltage VDD, and the second terminal is grounded through the closed third switch S3, thus forming a low-impedance "power supply-capacitor-ground" charging path. In this path, the power supply voltage VDD charges capacitor 142 rapidly until the voltage across capacitor 142 stabilizes at the power supply voltage VDD.

[0054] refer to Figure 4CIn the second stage (i.e., the discharge stage), the charge / discharge control circuit 14 is used to disconnect the third switch S3 and close the fourth switch S4. At this time, the first terminal of the capacitor is still connected to the power supply voltage VDD, and the second terminal is no longer grounded, but is coupled to the current generating circuit 12 through the closed fourth switch S4. Thus, the capacitor 142 and the current generating circuit 12 form a controllable discharge loop, in which the charge stored on the capacitor 142 is actively extracted by a constant bias current Ib.

[0055] refer to Figure 4B and Figure 4C The logic control circuit 16 may include a second comparator 162B. The second comparator 162B is connected to the second terminal of the capacitor 142 and the first PMOS transistor 124b, and is configured to: take the capacitor voltage VCB of the capacitor 142 as a negative feedback input, take the reference voltage (i.e., VDD-VGS) determined by the difference between the power supply voltage VDD and the gate-source voltage VGS of the first PMOS transistor 124b as a positive feedback input, and output a logic control signal to control the charging and discharging control circuit 14 to switch between the first stage and the second stage.

[0056] Specifically, the inverting input of the second comparator 162B ( A signal is connected to the second terminal of capacitor 142 to sample the instantaneous capacitor voltage VCB on capacitor 142; the positive input (+) of the second comparator 162B receives a reference voltage (i.e., VDD-VGS) determined by the power supply voltage VDD and the gate-source voltage VGS of the first PMOS transistor 124b. The second comparator 162B dynamically compares the relative magnitudes of the capacitor voltage VCB and the reference voltage (VDD-VGS) to output a corresponding digital logic level (such as a high level "1" or a low level "0") as a control signal. This control signal is fed back to the charge / discharge control circuit 14 to determine the on / off state of the third switch S3 and the fourth switch S4, thereby realizing closed-loop control of the oscillation cycle.

[0057] refer to Figure 4D In some embodiments, the logic control circuit 16 may include a second PMOS transistor 166. Wherein, The source of the second PMOS transistor 166 is connected to the power supply voltage VDD; the gate of the second PMOS transistor 166 is connected to the second terminal of the capacitor 142 to obtain the capacitor voltage VCB of the capacitor 142; the drain of the second PMOS transistor 166 is connected to the current generation circuit 12B via the second node A2, so as to output a logic control signal VOUT through the second node A2 to control the charging and discharging control circuit 14 to switch to the first stage or the second stage.

[0058] It is worth noting that when the second PMOS transistor 166 is used to replace the second comparator 162B, the length, width and current density of the second PMOS transistor 166 and the first PMOS transistor 124b in the current generation circuit 12B need to be matched.

[0059] Depend on Figures 4A to 4D As can be seen, in this embodiment, the discharge time of capacitor 142 also depends on the product of capacitor C and resistor R. Therefore, fluctuations in power supply voltage VDD (such as voltage drop under battery power) will not affect the discharge time. The oscillation period stability of RC oscillator 10 no longer depends on the absolute voltage level, but is dominated by the matching accuracy and temperature coefficient of passive components R and C, which significantly improves the frequency stability of RC oscillator under wide voltage range, different process angles and temperature changes.

[0060] refer to Figure 5 In some embodiments, transistor 122 includes a bipolar junction transistor (BJT) 126, with its base and collector shorted. Current generation circuit 12 generates a bias current Ib based on the power supply voltage VDD, the base-emitter voltage VBE of BJT 126, and the resistance R of resistor 128.

[0061] In this embodiment, the bias current Ib output by the current generation circuit 12 satisfies the following formula 2: (Formula 2) In Formula 2, Indicates bias current Ib, Indicates the power supply voltage. This represents the base-emitter voltage of the bipolar junction transistor 126. The resistance value is 128.

[0062] The current generation circuit 12 is constructed using a bipolar junction transistor 126 with its base and collector shorted. This not only has a simple structure and reliable self-starting, but also provides a reference current with high matching and good temperature characteristics for the RC oscillator through the inherent correlation between VBE and the bias current Ib. It is one of the effective solutions for realizing a high-stability, low-power on-chip oscillator.

[0063] In some embodiments, reference Figure 6AThe current generation circuit 12C shown includes a bipolar junction transistor 126, comprising an NPN bipolar junction transistor 126a. The emitter of the NPN bipolar junction transistor 126a is grounded, and its base and collector are shorted. The collector is connected to the power supply voltage VDD via a resistor 128. In this configuration, the current flowing through resistor 128 is the bias current Ib set by the VBE characteristics of the NPN bipolar junction transistor 126a itself. Due to the good device matching and predictable temperature characteristics of VBE, this structure can provide a stable discharge current for capacitor 142.

[0064] It is worth noting that this current generation circuit 12C is similar to the one described above. Figures 3A to 3C While the MOS transistor-based implementations differ topologically, they are highly functionally compatible. Both aim to generate a precise bias current that works in conjunction with the RC time constant and provide a discharge or charge path for the RC oscillator. Therefore, those skilled in the art can use them... Figures 3A to 3C The disclosed charging and discharging timing logic, switching control strategy, and comparator threshold setting method are used to adaptively adjust the charging and discharging control circuit 14 and the logic control circuit 16.

[0065] In some embodiments, reference Figure 6B The current generation circuit 12D shown includes a bipolar junction transistor 126, which comprises a PNP bipolar junction transistor 126b. The emitter of the PNP bipolar junction transistor 126b is connected to the power supply voltage VDD; the collector of the PNP bipolar junction transistor 126b is grounded via a resistor 128. In practical applications, based on the topological characteristics of this current generation circuit 12D, those skilled in the art can... Figures 4A to 4D The disclosed oscillator architecture, switching timing logic, and comparison threshold setting method are adapted to the charging / discharging control circuit 14 and logic control circuit 16. Given that such adjustments are conventional techniques in the field and do not deviate from the core concept of this invention, specific implementation details will not be elaborated upon herein.

[0066] It should be noted that the transistor 122 in the current generation circuit 12 is not limited to conventional MOSFETs or bipolar junction transistors (BJTs), but can also be implemented using power transistors with special structures and performance advantages, such as lateral double-diffused metal-oxide semiconductors (LDMOS).

[0067] In some embodiments, the current generation circuit 12 further includes a current mirror circuit (not shown), which can be connected to the transistor 122 for scaling up or down the bias current Ib. For example, the current mirror circuit can be directly coupled to the bias node of the transistor 122 and configured to precisely scale the bias current Ib generated by the current generation circuit 12, thereby achieving scaling up or down the bias current.

[0068] In summary, by introducing a current mirror circuit, this embodiment not only provides the current generation circuit 12 with a more powerful current ratio control capability, but also enhances the robustness, flexibility and scalability of the system, enabling it to adapt to the needs of various application scenarios, from high-frequency communication to ultra-low power sensing.

[0069] electronic devices Another embodiment of this disclosure provides an electronic device including the RC oscillator described in the above embodiments, used to achieve precise control of the oscillation frequency. By adopting the above-described RC oscillator architecture with high stability, low power consumption and good process compatibility, the electronic device can generate a reliable and adjustable clock signal without the need for an external crystal oscillator or complex calibration circuit, thereby meeting its clock reference requirements in applications such as microcontrollers, power management units, sensor interfaces, and wireless communication modules.

[0070] chip Another embodiment of this disclosure also provides a chip including the RC oscillator described in the above embodiments, for achieving precise control of the oscillation frequency.

[0071] Specific embodiments of the subject matter have now been described. Other embodiments are within the scope of the appended claims. In some cases, the actions described in the claims can be performed in a different order and still achieve the desired result. Furthermore, the processes depicted in the drawings do not necessarily require a specific or sequential order to achieve the desired result. In some embodiments, multitasking and parallel processing can be advantageous.

[0072] The various embodiments in this specification are described in a progressive manner. Similar or identical parts between embodiments can be referred to mutually. Each embodiment focuses on describing the differences from other embodiments. In particular, the system embodiments are basically similar to the method embodiments, so the description is relatively simple; relevant parts can be referred to the descriptions of the method embodiments.

[0073] The above are merely embodiments of this application and are not intended to limit the scope of this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the scope of the claims of this application.

Claims

1. An RC oscillator (10), comprising: A current generating circuit (12) includes a transistor (122) and a resistor (128) and is configured to output a bias current (Ib) based on a power supply voltage, the inter-electrode voltage of the transistor (122) and the resistance value of the resistor (128). A charge / discharge control circuit (14) includes a capacitor (142), the charge / discharge control circuit (14) is connected to the current generation circuit (12) and is configured to charge the capacitor (142) with the power supply voltage in a first stage and discharge the capacitor (142) with the bias current (Ib) in a second stage. A logic control circuit (16) is used to connect the current generation circuit (12) and the charge / discharge control circuit (14), and is configured to compare the capacitor voltage of the capacitor (142) with a voltage threshold determined based on the inter-electrode voltage of the transistor (122), and control the charge / discharge control circuit (14) to switch to the first stage or the second stage based on the comparison result.

2. The RC oscillator (10) according to claim 1, wherein, The charge / discharge control circuit (14) is configured as follows: In the first stage, the capacitor (142) is charged by the power supply voltage, so that the capacitor voltage of the capacitor (142) is raised to the power supply voltage; In the second stage, the capacitor (142) is controlled to turn on the current generation circuit (12), and the capacitor (142) is discharged by the bias current (Ib), so that the capacitor voltage of the capacitor (142) drops from the power supply voltage to the inter-electrode voltage of the transistor (122).

3. The RC oscillator (10) according to claim 1, wherein, The transistor (122) includes a field-effect transistor (124): The gate and drain of the field-effect transistor (124) are shorted; The current generation circuit (12) is configured to generate the bias current (Ib) based on the power supply voltage, the gate-source voltage (VGS) of the field-effect transistor (124) and the resistance value of the resistor (128). The bias current (Ib) satisfies the following formula: in, This represents the bias current (Ib). This indicates the power supply voltage. This represents the gate-source voltage of the field-effect transistor (124). The resistance value of the resistor (128) is given.

4. The RC oscillator (10) according to claim 3, wherein, The field-effect transistor (124) includes a first NMOS transistor (124a); The drain of the first NMOS transistor (124a) is connected to the power supply voltage via the resistor (128); The source of the first NMOS transistor (124a) is grounded.

5. The RC oscillator (10) according to claim 4, wherein, The charging and discharging control circuit (14) includes a first switch (S1) and a second switch (S2); The first terminal of the capacitor (142) is grounded; The first switch (S1) is connected between the second terminal of the capacitor (142) and the power supply voltage; The second switch (S2) is connected between the second terminal of the capacitor (142) and the current generating circuit (12); The charge / discharge control circuit (14) is configured as follows: In the first stage, the first switch (S1) is closed and the second switch (S2) is opened. In the second stage, the first switch (S1) is disconnected and the second switch (S2) is closed.

6. The RC oscillator (10) according to claim 5, wherein, The logic control circuit (16) includes a first comparator (162A); The first comparator (162A) is connected to the second terminal of the capacitor (142) and the first NMOS transistor (124a), and is configured as follows: The capacitor voltage of the capacitor (142) is used as a positive feedback input, and the gate-source voltage (VGS) of the first NMOS transistor (124a) is used as a negative feedback input. A logic control signal is output to control the charging and discharging control circuit (14) to switch to the first stage or the second stage.

7. The RC oscillator (10) according to claim 5, wherein, The logic control circuit (16) includes a second NMOS transistor (164) and the current generation circuit (12). The source of the second NMOS transistor (164) is grounded; The gate of the second NMOS transistor (164) is connected to the second terminal of the capacitor (142); The drain of the second NMOS transistor (164) is connected to the current generation circuit (12) via the first node (A1); The logic control circuit (16) is configured to output a logic control signal through the first node (A1) to control the charge / discharge control circuit (14) to switch to the first stage or the second stage.

8. The RC oscillator (10) according to claim 3, wherein, The field-effect transistor (124) includes a first PMOS transistor (124b); The source of the first PMOS transistor (124b) is connected to the power supply voltage; The drain of the first PMOS transistor (124b) is grounded via the resistor (128).

9. The RC oscillator (10) according to claim 8, wherein, The charge and discharge control circuit (14) includes a third switch (S3) and a fourth switch (S4). The first terminal of the capacitor (142) is connected to the power supply voltage; The third switch (S3) is connected between the second terminal of the capacitor (142) and the ground terminal; The fourth switch (S4) is connected between the second terminal of the capacitor (142) and the current generating circuit (12); The charge / discharge control circuit (14) is configured as follows: In the first stage, the third switch (S3) is closed and the fourth switch (S4) is opened. In the second stage, the third switch (S3) is disconnected and the fourth switch (S4) is closed.

10. The RC oscillator (10) according to claim 9, wherein, The logic control circuit (16) includes a second comparator (162B); The second comparator (162B) is connected to the second terminal of the capacitor (142) and the first PMOS transistor (124b), and is configured to: The capacitor voltage of the capacitor (142) is used as a negative feedback input, and the reference voltage determined by the difference between the power supply voltage and the gate-source voltage (VGS) of the first PMOS transistor (124b) is used as a positive feedback input. A logic control signal is output to control the charging and discharging control circuit (14) to switch to the first stage or the second stage.

11. The RC oscillator (10) according to claim 9, wherein, The logic control circuit (16) includes a second PMOS transistor (166). The source of the second PMOS transistor (166) is connected to the power supply voltage; The gate of the second PMOS transistor (166) is connected to the second terminal of the capacitor (142); The drain of the second PMOS transistor (166) is connected to the current generation circuit (12) via the second node. The logic control circuit (16) is configured to output a logic control signal through the second node to control the charge / discharge control circuit (14) to switch to the first stage or the second stage.

12. The RC oscillator (10) according to claim 1, wherein, The transistor (122) includes a bipolar junction transistor (126): The base and collector of the bipolar junction transistor (126) are shorted; The current generation circuit (12) is configured to generate the bias current (Ib) based on the power supply voltage, the base-emitter voltage (VBE) of the bipolar junction transistor (126) and the resistance value of the resistor (128). The bias current (Ib) satisfies the following formula: in, This represents the bias current (Ib). This indicates the power supply voltage. This represents the base-emitter voltage of the bipolar junction transistor (126). The resistance value of the resistor (128) is given.

13. The RC oscillator (10) according to claim 12, wherein, The bipolar junction transistor (126) includes an NPN bipolar junction transistor (126a); The emitter of the NPN bipolar junction transistor (126a) is grounded; The collector of the NPN bipolar junction transistor (126a) is connected to the power supply voltage via the resistor (128).

14. The RC oscillator (10) according to claim 12, wherein, The bipolar junction transistor (126) includes a PNP bipolar junction transistor (126b); The emitter of the PNP bipolar junction transistor (126b) is connected to the power supply voltage; The collector of the PNP bipolar junction transistor (126b) is grounded via the resistor (128).

15. The RC oscillator (10) according to claim 1, wherein, The current generating circuit (12) further includes: A current mirror circuit, connected to the transistor (122), is configured to amplify or reduce the bias current (Ib).

16. An electronic device comprising an RC oscillator (10) as claimed in any one of claims 1 to 15.

17. A chip comprising an RC oscillator (10) as described in any one of claims 1 to 15.

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