Microelectromechanical package and method of manufacturing the same

Abstract

A microelectromechanical package includes a first substrate, an interconnect layer, a getter structure, a microelectromechanical element layer, and a second substrate. The interconnect layer is disposed on the first substrate, and the getter structure is disposed in the interconnect layer and the first substrate. The getter structure includes a plurality of trenches that pass through the interconnect layer and extend downward into the first substrate, and a getter layer disposed within the trenches and on the interconnect layer. The microelectromechanical element layer is bonded to the interconnect layer, and the second substrate includes a cavity and is bonded to the microelectromechanical element layer.

Description

Technical Field

[0001] This invention relates to microelectromechanical system (MEMS) packaging, and more particularly to a microelectromechanical package including a gas-absorbing structure and a method for manufacturing the same. Background Technology

[0002] Microelectromechanical systems (MEMS) components are miniature devices that integrate mechanical and electrical components to sense physical quantities and / or interact with their surroundings. MEMS components, such as accelerometers, gyroscopes, pressure sensors, and microphones, are widely used in many modern electronic products, such as tablet computers, automobiles, and smartphones. MEMS components, such as gyroscopes, typically require high-vacuum packaging to achieve a high Q factor. In MEMS packaging, high vacuum can be achieved by creating cavities deeper than 100 μm in the cover wafer, or by using getters to absorb gases released from the MEMS component. However, in current MEMS packaging, the cavity depth and getters cannot fully meet the requirements of MEMS components for high vacuum and optimal performance. Summary of the Invention

[0003] In view of this, the present invention provides a microelectromechanical system (MEMS) package and a method for manufacturing the same, which increases the getter area of ​​the getter structure without increasing the cavity depth in the cover wafer. The getter structure has a high aspect ratio and can be integrated into the interconnect layer and the complementary metal-oxide-semiconductor (CMOS) wafer. This getter structure increases the absorption area of ​​the getter to meet the high vacuum requirements of MEMS devices such as gyroscopes.

[0004] According to an embodiment of the present invention, a microelectromechanical package (MEMS) is provided, comprising a first substrate, an interconnect layer, a getter structure, a MEMS element layer, and a second substrate. The interconnect layer is disposed on the first substrate, and the getter structure is disposed in the interconnect layer and the first substrate. The getter structure includes a plurality of trenches and a getter layer, the trenches extending through the interconnect layer and downward into the first substrate, the getter layer being disposed oriented within the trenches and on the interconnect layer. The MEMS element layer is bonded to the interconnect layer, and the second substrate includes a cavity and is bonded to the MEMS element layer.

[0005] According to an embodiment of the present invention, a method for manufacturing a microelectromechanical package (MEMS) is provided, comprising the following steps: providing a first substrate and forming an interconnect layer on the first substrate; forming a suction structure in the interconnect layer and the first substrate; providing a second substrate having a cavity formed therein; forming a microelectromechanical component layer and bonding the microelectromechanical component layer to the second substrate to cover the cavity; and bonding the microelectromechanical components to the interconnect layer.

[0006] To make the features of the present invention clear and easy to understand, embodiments are provided below, along with accompanying drawings, for detailed explanation. Attached Figure Description

[0007] To facilitate understanding of the following text, reference should be made to the accompanying drawings and their detailed description while reading this invention. Specific embodiments of the invention are explained in detail through reference to the corresponding drawings, which illustrate the working principles of these embodiments. Furthermore, for clarity, features in the drawings may not be drawn to scale, and therefore the dimensions of some features in certain drawings may be intentionally enlarged or reduced. Figure 1 This is a cross-sectional schematic diagram of a microelectromechanical (MEMS) package according to an embodiment of the present invention. Figure 2 This is a top view schematic diagram of an air intake structure in a MEMS package, as illustrated in some embodiments of the present invention. Figure 3 , Figure 4 , Figure 5 , Figure 6 , Figure 7 and Figure 8 This is a cross-sectional schematic diagram illustrating some stages of a MEMS packaging manufacturing method according to an embodiment of the present invention. Detailed Implementation

[0008] This invention provides several different embodiments for implementing various features of the invention. For the sake of simplicity, examples of specific components and arrangements are also described. These embodiments are provided for illustrative purposes only and are not intended to be limiting. For example, the following description of "a first feature forming on or above a second feature" can mean "the first feature and the second feature are in direct contact," or it can mean "there are other features between the first feature and the second feature," such that the first feature and the second feature are not in direct contact. Furthermore, various embodiments of this invention may use repeated reference numerals and / or textual annotations. The use of these repeated reference numerals and annotations is for the purpose of making the description more concise and clear, and not to indicate any correlation between different embodiments and / or configurations.

[0009] Furthermore, for the purposes of this invention, spatially related terms such as "below," "low," "under," "above," "above," "upper," "top," "bottom," and similar terms are used to describe the relative relationship between one element or feature and another (or more) elements or features in the accompanying drawings. In addition to the orientation shown in the drawings, these spatially related terms are also used to describe the possible orientations of the MEMS package during use, manufacturing, and operation. As the orientation of the MEMS package varies (rotation 90 degrees or other orientations), the spatially related descriptions used to describe its orientation should be interpreted in a similar manner.

[0010] Although this invention uses terms such as first, second, third, etc., to describe various elements, components, regions, layers, and / or blocks, it should be understood that these elements, components, regions, layers, and / or blocks should not be limited by such terminology. Such terminology is only used to distinguish one element, component, region, layer, and / or block from another, and does not in itself imply or represent any prior ordinal number of the element, nor does it represent the arrangement order of one element with another, or the order of manufacturing methods. Therefore, without departing from the scope of the specific embodiments of this invention, the first element, component, region, layer, or block discussed below may also be named using the terms second element, component, region, layer, or block.

[0011] The terms "about" or "substantially" as used in this invention generally mean within 20% of a given value or range, preferably within 10%, and even more preferably within 5%, or within 3%, or within 2%, or within 1%, or within 0.5%. It should be noted that the quantities provided in the specification are approximate quantities; that is, the meaning of "about" or "substantially" may be implied even without specific mention of it.

[0012] The terms "coupled," "coupled," and "electrically connected" as used in this invention include any direct or indirect means of electrical connection. For example, if the text describes a first component coupled to a second component, it means that the first component can be directly electrically connected to the second component, or indirectly electrically connected to the second component through other means of connection.

[0013] Although the invention is described below by way of specific embodiments, the inventive principles of the invention can also be applied to other embodiments. Furthermore, in order to avoid obscuring the spirit of the invention, certain details have been omitted; these omitted details fall within the scope of knowledge of those skilled in the art.

[0014] This invention relates to microelectromechanical systems (MEMS) packaging and its manufacturing method. The MEMS package includes a getter structure with a high aspect ratio greater than 5. This getter structure increases the surface area of ​​the getter material to effectively absorb gases during getter activation, thereby meeting the high vacuum requirements of MEMS components. This getter structure includes multiple trenches and a getter layer. These trenches are formed by etching, penetrating the interconnect layer and extending downwards into the complementary metal-oxide-semiconductor (CMOS) wafer, thus achieving the high aspect ratio. The getter layer is oriented oriented within these trenches and on the interconnect layer, thereby increasing the getter absorption area to achieve high vacuum for MEMS components such as gyroscopes.

[0015] Figure 1 This is a cross-sectional schematic diagram of a microelectromechanical system (MEMS) package 100 according to an embodiment of the present invention. The MEMS package 100 includes a first substrate 102, an interconnect layer 110, a getter structure 130, a MEMS component layer 120, and a second substrate 104. The first substrate 102 is, for example, a silicon wafer, and may have multiple CMOS transistors or other electronic components formed therein. The interconnect layer 110 is disposed on the first substrate 102, and the interconnect layer 110 includes multiple metal layers, multiple inter-metal dielectric (IMD) layers, and multiple vias formed in these IMD layers to connect any two metal layers.

[0016] In the interconnect layer 110, the metal layers include at least a top metal layer 111 and a penultimate metal layer 113. The inter-metal dielectric (IMD) layers include at least a first IMD layer 112 and a second IMD layer 114. The first IMD layer 112 is disposed on the first substrate 102, and the penultimate metal layer 113 is formed on the first IMD layer 112. A number of vias 115 are formed in the first IMD layer 112 and electrically connected to the CMOS transistors and the penultimate metal layer 113 in the first substrate 102. The second IMD layer 114 is formed on the first IMD layer 112 and covers the penultimate metal layer 113. The top metal layer 111 is formed on the second IMD layer 114, and the second IMD layer 114 is located between the top metal layer 111 and the penultimate metal layer 113. Several other vias 115 are formed in the second IMD layer 114 to electrically connect to the top metal layer 111 and the penultimate metal layer 113. Therefore, the interconnect layer 110 can be electrically coupled to CMOS transistors in the first substrate 102. Furthermore, the interconnect layer 110 also includes a protective layer 116 disposed on the top metal layer 111. The protective layer 116 has openings to expose portions of the top metal layer 111, thereby providing sealing ring bonding, serving as bonding pads, and corresponding to MEMS elements.

[0017] like Figure 1 As shown, the MEMS element layer 120 is bonded to the interconnect layer 110. The MEMS element layer 120 includes a sealing ring 122, which is bonded to the top metal layer 111 via a eutectic bonding material 124. The sealing ring 122 is a standoff structure projecting toward the interconnect layer 110 and is integrated into the MEMS element layer 120, having the same composition as the MEMS element layer 120. In some embodiments, the composition of the MEMS element layer 120 is, for example, doped silicon or doped polycrystalline silicon. The eutectic bonding material 124 may comprise germanium (Ge) and aluminum (Al). Furthermore, the MEMS element layer 120 includes features such as trenches, cantilever beams, thin films, and proof masses to form a microelectromechanical (MEMS) element 126, such as a gyroscope or other MEMS element requiring a high vacuum.

[0018] The second substrate 104 is bonded to the MEMS device layer 120 via a bonding layer 107, such as a silicon oxide layer. The second substrate 104 is, for example, a silicon wafer, having a front side 104F and a back side 104B. A cavity 105 is formed within the second substrate 104 near the front side 104F and is located directly above the MEMS device 126. The bonding layer 107 is disposed between the MEMS device layer 120 and the second substrate 104, and the bonding layer 107 can also extend unidirectionally into the cavity 105. Furthermore, a metal layer 109, such as an aluminum layer, can be formed on the back side 104B of the second substrate 104. The metal layer 109 can be used for electromagnetic wave shielding (e.g., radio frequency (RF) shielding) and / or for electrical grounding.

[0019] According to an embodiment of the present invention, a getter structure 130 is disposed in an interconnect layer 110 and a first substrate 102. The getter structure 130 includes a plurality of trenches 132 and a getter layer 134. The trenches 132 are formed by etching, and these trenches 132 pass through the interconnect layer 110 and extend downward into the first substrate 102, thereby achieving trenches 132 having a high aspect ratio, for example, 5 to 20. In some embodiments, the depth of the trenches 132 may be about 5 μm to about 10 μm. The getter layer 134 is formed oriented in the trenches 132 and on the interconnect layer 110, and the getter layer 134 is a continuous thin film in the getter structure 130. In some embodiments, the thickness of the getter layer 134 may be about 1 μm to about 2 μm. Therefore, the getter structure 130 has a substantially the same aspect ratio as the trenches 132, for example, about 5 to 20. The getter structure 130 with a high aspect ratio can increase the area of ​​the getter, thereby more effectively absorbing gases during the activation of the getter. Gases released from the MEMS element layer 120, interconnect layer 110 and first substrate 102, as well as gases in the cavity 105, can be effectively absorbed by the getter structure 130, thereby improving the vacuum level of the MEMS element 126 during use to meet the application requirements of MEMS packaging.

[0020] In some embodiments, the getter layer 134 comprises Ti, Ti-based alloys, Zr-based alloys, Zr-V-based alloys, Zr-Co-based alloys, or other materials suitable for absorbing gases in the MEMS package 100. The getter material of the getter layer 134 can be selected according to the vacuum requirements of the MEMS element 126 in the application. Specifically, Ti-based alloys are, for example, Ti-Zr, Ti-Mo, or Ti-Zr-V; Zr-based alloys are, for example, Zr-Al, Zr-C, or Zr-Fe; Zr-V-based alloys are, for example, Zr-V-Fe or Zr-V-Mn; and Zr-Co-based alloys are, for example, Zr-Co, Zr-Co-Ce, or Zr-Co-La, but are not limited thereto. During the manufacturing process of the MEMS package, the getter layer 134 is activated to absorb gases, such as H2, N2, CO, CO2, or H2O, in the MEMS package 100. Furthermore, the MEMS element layer 120 is bonded to the interconnect layer 110 at a bonding temperature, and the getter activation temperature of the getter structure 130 is lower than or equal to the bonding temperature. For example, the MEMS element layer 120 can be bonded to the interconnect layer 110 via eutectic bonding at a bonding temperature of approximately 450°C, and the getter structure 130 can be activated at a temperature of approximately 150°C to approximately 450°C. Therefore, the getter structure 130 can be activated simultaneously during the bonding process of the MEMS element layer 120 to the interconnect layer 110.

[0021] like Figure 1As shown, the getter structure 130 is located directly below the MEMS element 126 (e.g., a gyroscope) requiring high vacuum packaging. Furthermore, the getter structure 130 is located directly below the cavity 105 of the second substrate 104. After the MEMS element layer 120 is bonded to the interconnect layer 110, the getter structure 130 is activated to absorb gas within the cavity 105, thereby reducing the pressure within the cavity 105 and thus providing a high vacuum for the MEMS element 126. Additionally, the getter layer 134 is activated to absorb gas released from the MEMS element 126, the interconnect layer 110, and the first substrate 102. Because the getter structure 130 has a high aspect ratio, it increases the absorption area of ​​the getter, thereby more effectively absorbing gas in the MEMS package 100 to provide a high vacuum, which is beneficial for applications requiring high vacuum, such as gyroscopes.

[0022] Figure 2 The illustration shows top views of several suction structures 130A, 130B, 130C, and 130D in a MEMS package 100 according to some embodiments of the present invention. In one embodiment, suction structure 130A includes a plurality of concentrically arranged annular grooves 132. In another embodiment, suction structure 130B includes a plurality of strip grooves 132, the major axes of which extend along a first direction (e.g., the Y-axis), and the grooves 132 are spaced apart from each other along a second direction (e.g., the X-axis). In another embodiment, suction structure 130C includes a plurality of strip grooves 132 arranged in a plurality of intersecting rows and columns. In another embodiment, suction structure 130D includes a plurality of short grooves 132 arranged in an alternating layout at different locations. These getter structures 130A, 130B, 130C, and 130D all contain a getter layer 134 formed oriented in the trench 132 and on a region of the interconnecting layer 110, and the getter layer 134 is a continuous thin film in the getter structures 130A, 130B, 130C, and 130D. The arrangement of the trenches 132 in the above-described getter structures is only illustrative and is not limited thereto. The getter structure 130 may have multiple trenches 132, or multiple openings of other shapes and / or other arrangements to increase the absorption area of ​​the getter.

[0023] In addition, such as Figure 1As shown, a getter structure 130 is formed in a region of the interconnect layer 110. In one embodiment, this region of the interconnect layer 110 contains multiple IMD layers without any metal layers. For example, in this region, the first IMD layer 112 and the second IMD layer 114 are directly stacked, without a top metal layer 111 and a penultimate metal layer 113. In one embodiment, the getter structure 130 is formed in the interconnect layer 110, passing through the IMD layers but not through any metal layers. In another embodiment, the getter structure 130 is formed in the interconnect layer 110, passing through the IMD layers and the top metal layer, but not through any other metal layers. Furthermore, the getter layer 134 may directly contact the top metal layer 111 immediately adjacent to the getter structure 130, such that the getter structure 130 can be electrically connected to the interconnect structure 110 via the top metal layer 111.

[0024] Figure 3 , Figure 4 , Figure 5 , Figure 6 , Figure 7 and Figure 8 This is a cross-sectional schematic diagram illustrating some stages of a manufacturing method for a MEMS package 100 according to an embodiment of the present invention. (See also...) Figure 3 In step S101, firstly, a second substrate 104, such as a silicon wafer, is provided as a handle wafer, and the front side 104F and back side 104B of the second substrate 104 are polished. Then, a patterning and etching process is performed on the back side 104B of the second substrate 104 to form a plurality of alignment marks 106. Next, a patterning and etching process is performed on the front side 104F of the second substrate 104 to form a plurality of cavities 105 in the second substrate 104, the depth of which can be approximately 18 μm to approximately 22 μm. Afterwards, a bonding layer 107 is formed oriented in the second substrate 104 and within the cavities 105, the bonding layer 107 encapsulating the second substrate 104. The composition of the bonding layer 107 is, for example, silicon oxide, and the bonding layer 107 can be formed by thermal oxidation or deposition, the thickness of which can be approximately 1.0 μm to approximately 1.2 μm.

[0025] See also Figure 3 In step S103, a device wafer 119, such as a silicon wafer, is provided, and the front side 119F of the device wafer 119 is polished. In one embodiment, the device wafer 119 may be heavily doped with boron to achieve a resistivity of approximately 0.008 to 0.02 ohm-cm. Then, the edges of the front side 119F of the device wafer 119 are trimmed, and the device wafer 119 is bonded to the second substrate 104 via a bonding layer 107 using fusion bonding to cover the cavity 105 without plasma treatment. Next, see... Figure 3In step S105, the back surface 119B of the device wafer 119 is polished to thin the device wafer 119, thereby forming a MEMS device layer 120, and a chemical-mechanical polishing (CMP) process is performed on the MEMS device layer 120. After the CMP process, the thickness of the MEMS device layer 120 is approximately 29.5 μm to approximately 34.5 μm.

[0026] Next, refer to Figure 4 In step S107, the MEMS element layer 120 is patterned using photolithography and etching processes to form a sealing ring 122, which is a support structure with a height of approximately 2.15 μm to approximately 2.55 μm. See still for further details. Figure 4 In step S109, a bonding material 123, such as germanium (Ge), is formed on the sealing ring 122 via deposition, patterning, and etching processes. Then, still referring to... Figure 4 In step S111, the MEMS element layer 120 is patterned using photolithography and etching processes to form a MEMS element 126. The MEMS element 126 is surrounded by a sealing ring 122 and is located directly above the cavity 105. In some embodiments, the MEMS element 126 is, for example, a gyroscope or other MEMS element requiring a high vacuum, and the MEMS element layer 120 in step S111 may also be referred to as an actuator layer. Furthermore, pre-cut lines 128 are formed in the MEMS element layer 120 using an etching process, which are located between adjacent MEMS elements 126.

[0027] Please see Figure 5In step S201, a first substrate 102, such as a CMOS wafer, is provided, wherein a plurality of CMOS transistors are formed therein. Then, an interconnect layer 110 is formed on the first substrate 102. In one embodiment, the interconnect layer 110 includes a first IMD layer 112, a penultimate metal layer 113, a second IMD layer 114, a top metal layer 111, and a protective layer 116 stacked sequentially from bottom to top. Furthermore, a plurality of vias 115 are formed in the first IMD layer 112 and the second IMD layer 114. In some embodiments, the top metal layer 111 and the penultimate metal layer 113 are, for example, aluminum (Al) layers, and are formed by deposition and patterning processes. The first IMD layer 112 and the second IMD layer 114 are, for example, silicon oxide layers, and are formed by deposition. The vias 115 are, for example, tungsten (W), and are formed by etching and filling processes. The protective layer 116 is, for example, a silicon nitride layer, formed by deposition and etching processes. The protective layer 116 has multiple openings to expose portions of the top metal layer 111, which can be used for sealing ring bonding, as bonding pads, and corresponding to the MEMS element 126. In addition, the interconnect layer 110 is electrically coupled to the CMOS transistor in the first substrate 102.

[0028] See also Figure 5In step S203, a patterned mask 141 is formed on the interconnect layer 110. The patterned mask 141 has a plurality of openings 142 corresponding to predetermined formation regions of a plurality of trenches 132 in the getter structure. Then, using a deep reactive ion etching (DRIE) process, a plurality of trenches 132 are formed in the interconnect layer 110 and the first substrate 102 via the openings 142 of the patterned mask 141. In one embodiment, the region of the interconnect layer 110 in which the trenches 132 are formed includes a top metal layer 111, a second IMD layer 114, and a first IMD layer 112, but does not include a penultimate metal layer 113. These trenches 132 are formed by etching through the top metal layer 111, the second IMD layer 114, and the first IMD layer 112, and extend downward into the first substrate 102. The aspect ratio of each trench 132 is approximately 5 to 20, and the depth of the trench 132 is approximately 5 μm to approximately 10 μm. The aforementioned deep reactive ion etching (DRIE) process can use etching gases such as SF6 and Cl2 to etch the silicon oxide of these IMD layers, the silicon of the first substrate 102, and the aluminum of the top metal layer 111. The patterned mask 141 is composed of, for example, photoresist, metal, or silicon nitride. Subsequently, the patterned mask 141 is removed using a stripping or ashing process. In one embodiment, some portions of the top metal layer 111 located between the trenches 132 can be removed together with the patterned mask 141. In another embodiment, some portions of the top metal layer 111 located between the trenches 132 can be retained on the second IMD layer 114.

[0029] Next, refer to Figure 6 In step S205, a patterned negative photoresist 143 with openings 144 is formed on the interconnect layer 110 to expose the trenches 132 and a region of the interconnect layer 110. Then, a getter material 133, such as titanium (Ti), is oriented to be deposited on the patterned negative photoresist 143, on this region of the interconnect layer 110, and within the trenches 132 using a vapor deposition process. The thickness of the getter material 133 is, for example, from about 1 μm to about 2 μm. The patterned negative photoresist 143 has an undercut profile, and the openings 144 have a trapezoidal cross-section. Therefore, the getter material 133 is not deposited on the sidewalls of the openings 144, nor on any portion of the interconnect layer 110 covered by the patterned negative photoresist 143. A portion 133A of the getter material 133 is deposited on the patterned negative photoresist 143, while another portion 133B of the getter material 133 is deposited oriented on the sidewalls and bottom surfaces of the trenches 132, and oriented on a portion of the interconnect layer 110.

[0030] See also Figure 6In step S207, an exfoliation process is performed using N-methyl-2-pyrrolidone (NMP) solvent to simultaneously remove a portion 133A of the patterned negative photoresist 143 and the getter material 133. The remaining portion 133B of the getter material 133 remains as the getter layer 134, allowing the getter layer 134 of the getter structure to be formed by a lift-off process. These trenches 132 and the getter layer 134 constitute a getter structure 130 with a high aspect ratio (e.g., 5 to 20), thereby increasing the absorption area of ​​the getter structure.

[0031] See Figure 7 In step S301, Figure 4 In step S111, the structure is flipped, and the sealing ring 122 of the MEMS element layer 120 is bonded to the interconnect layer 110 via the eutectic bonding material 124 at a bonding temperature of approximately 450°C. In one embodiment, the eutectic bonding material 124 comprises germanium (Ge) from the bonding material 123 and aluminum (Al) from the top metal layer 111. After the MEMS element layer 120 is bonded to the interconnect layer 110, the getter structure 130 is located directly below the MEMS element 126 and the cavity 105. The getter material of the getter structure 130 has a getter activation temperature of approximately 150°C to approximately 450°C, which is lower than or equal to the bonding temperature of the eutectic bonding material 124. When the MEMS element layer 120 is bonded to the interconnect layer 110, the getter structure 130 is simultaneously activated to absorb gas within the cavity 105, thereby reducing the pressure in the cavity 105 and thus providing a high vacuum for the MEMS element 126, such as a gyroscope. Furthermore, the getter layer 134 is activated to absorb gases released from the MEMS element 126, the interconnect layer 110, and the first substrate 102. The high aspect ratio of the getter structure 130 increases the absorption surface area of ​​the getter, thereby more effectively absorbing gases to meet the high vacuum requirements of the MEMS element 126.

[0032] See also Figure 7 In step S303, firstly, the structure from step S301 is flipped over, and the back surface 102B of the first substrate 102 is ground, reducing the thickness of the first substrate 102 to approximately 280 μm to approximately 300 μm. Then, this structure is flipped over again, and the back surface 104B of the second substrate 104 is ground to reduce its thickness. Simultaneously, the bonding layer 107 on the back surface 104B and part of the sidewalls of the second substrate 104 is also removed through this grinding process. At this point, the overall thickness of the second substrate 104 and the MEMS element layer 120 can be approximately 200 μm to approximately 220 μm.

[0033] Next, refer to Figure 8In step S305, the edges of the second substrate 104 are first trimmed so that the bonding layer 107 on the sidewall of the second substrate 104 is removed. Then, a metal layer 109, such as an aluminum layer, is deposited on the back surface 104B of the second substrate 104. The metal layer 109 can be used for radio frequency (RF) shielding and / or electrical grounding. In some embodiments, the thickness of the metal layer 109 can be from about 0.7 μm to about 0.9 μm.

[0034] Next, refer to Figure 8 In step S307, a portion of the second substrate 104 and a portion of the MEMS element layer 120 located at the cutting track SL are removed using a cutting saw. Then, the interconnect layer 110 and the first substrate 102 are cut at the cutting track SL to complete the process. Figure 1 MEMS package 100.

[0035] According to some embodiments of the present invention, a MEMS package includes a getter structure with a high aspect ratio (approximately 5 to 20), thereby increasing the absorption area of ​​the getter to meet the high vacuum requirements of MEMS devices. In the MEMS package of the present invention, the high vacuum requirements of MEMS devices can be met without increasing the cavity depth in the second substrate (cover wafer). Furthermore, the getter structure includes multiple trenches formed by etching, which penetrate the interconnect layer and extend downward into the first substrate, thereby achieving a high aspect ratio. Additionally, the getter layer can be formed via a deposition and lift-off process, deposited oriented within these trenches and on the interconnect layer, thereby more effectively absorbing gases released from the MEMS package. The formation of the getter structure of the present invention is compatible with the fabrication of the interconnect layer and the CMOS wafer, and the getter structure can be integrated into the interconnect layer and the first substrate (CMOS wafer), which further facilitates electrode gap control in the MEMS package.

[0036] Furthermore, the activation temperature of the getter in the getter structure is lower than or equal to the bonding temperature of the MEMS element layer to the interconnect layer. Therefore, the activation of the getter structure can be compatible with the bonding process of MEMS packaging, thereby reducing the number of process steps in MEMS packaging. The above description is only a preferred embodiment of the present invention. All equivalent changes and modifications made within the scope of the claims of the present invention should be included within the scope of the present invention. Explanation of reference numerals in the attached figures

[0037] 100: Microelectromechanical Package 102: First substrate 104: Second substrate 104F: Front 104B: Back 105: Cavity 106: Alignment Mark 107: Bonding layer 109: Metal layer 110: Interconnection Layer 111: Top metal layer 112: First intermetallic dielectric layer 113: Second to last metal layer 114: Second intermetallic dielectric layer 115: Through hole 116: Protective layer 119: Component Wafer 119F: Front 119B: Back 120: Microelectromechanical Components Layer 122: Sealing ring 123: Bonding materials 124: Eutectic Bonding Materials 126: Microelectromechanical components 128: Pre-cut line 130, 130A, 130B, 130C, 130D: Inhalation structure 132: Trench 133: Air-absorbing material 133A, 133B: Part 134: Breathing layer 141: Patterned Masking 142: Opening 143: Patterned negative photoresist 144: Opening SL: Cutting Track S101, S103, S105, S107, S109, S111, S201, S203, S205, S207, S301, S303, S305, S307: Steps

Claims

1. A microelectromechanical package, characterized in that, include: First substrate; An interconnect layer is disposed on the first substrate; A suction structure is disposed in the interconnect layer and the first substrate, the suction structure comprising: Multiple trenches pass through the interconnect layer and extend downward into the first substrate; as well as An air-absorbing layer is disposed oriented in the plurality of trenches and on the interconnect layer; A microelectromechanical component layer, bonded to the interconnect layer; and A second substrate, including a cavity, is bonded to the microelectromechanical component layer.

2. The microelectromechanical package as described in claim 1, characterized in that, The microelectromechanical component layer includes a gyroscope, and the air intake structure is located directly below the gyroscope.

3. The microelectromechanical package as described in claim 1, characterized in that, The air intake structure has a depth-to-width ratio of 5 to 20.

4. The microelectromechanical package as described in claim 1, characterized in that, The depth of the plurality of trenches is from 5 μm to 10 μm.

5. The microelectromechanical package as described in claim 1, characterized in that, The air intake structure is located in a region of the interconnect layer, and the air intake layer is continuous in that region.

6. The microelectromechanical package as described in claim 5, characterized in that, The region of the interconnect layer includes a plurality of inter-metal dielectric layers, and the plurality of trenches pass through the plurality of inter-metal dielectric layers.

7. The microelectromechanical package as described in claim 1, characterized in that, The interconnect layer includes a top metal layer, and the air-absorbing layer is in direct contact with the top metal layer.

8. The microelectromechanical package as described in claim 1, characterized in that, The composition of the getter layer includes Ti, Ti-based alloys, Zr-based alloys, Zr-V-based alloys, or Zr-Co-based alloys.

9. The microelectromechanical package as described in claim 1, characterized in that, The air intake structure is located directly below the cavity of the second substrate.

10. The microelectromechanical package as described in claim 1, characterized in that, The first substrate includes a plurality of complementary metal-oxide-semiconductor transistors therein, and the interconnect layer is electrically coupled to the plurality of complementary metal-oxide-semiconductor transistors.

11. A method for manufacturing a microelectromechanical package, characterized in that, include: Provide a first substrate; An interconnect layer is formed on the first substrate; A suction structure is formed in the interconnect layer and the first substrate; A second substrate is provided, having a cavity formed therein; A microelectromechanical component layer is formed, bonded to the second substrate, and covers the cavity; and The microelectromechanical component layer is bonded to the interconnect layer.

12. The method for manufacturing a microelectromechanical package as described in claim 11, characterized in that, The air intake structure has a depth-to-width ratio of 5 to 20.

13. The method for manufacturing a microelectromechanical package as described in claim 11, characterized in that, The formation of the intake structure includes: A plurality of trenches are formed, passing through the interconnect layer and extending downward into the first substrate; and An air-absorbing layer is formed oriented in the plurality of trenches and on the interconnect layer.

14. The method for manufacturing a microelectromechanical package as described in claim 13, characterized in that, Forming the plurality of trenches includes: A patterned mask is formed on the interconnect layer; and The interconnect layer and the first substrate are etched using a deep reactive ion etching process through a plurality of openings in the patterned mask.

15. The method for manufacturing a microelectromechanical package as described in claim 13, characterized in that, The air intake layer is formed by a lifting process, including: A patterned negative photoresist is formed on the interconnect layer to expose the plurality of trenches and a region of the interconnect layer; A getter material is deposited oriented in the patterned negative photoresist, in the region of the interconnect layer, and within the plurality of trenches; and Remove the patterned negative photoresist and the getter material on the patterned negative photoresist.

16. The method for manufacturing a microelectromechanical package as described in claim 15, characterized in that, The getter material includes Ti, Ti-based alloys, Zr-based alloys, Zr-V-based alloys, or Zr-Co-based alloys.

17. The method for manufacturing a microelectromechanical package as described in claim 11, characterized in that, The microelectromechanical component layer is bonded to the interconnect layer at a bonding temperature, and the getter structure has an getter activation temperature that is lower than or equal to the bonding temperature.

18. The method for manufacturing a microelectromechanical package as described in claim 11, characterized in that, The microelectromechanical component layer is patterned using etching to form a gyroscope, with the air intake structure located directly below the gyroscope.

19. The method for manufacturing a microelectromechanical package as described in claim 11, characterized in that, The air intake structure is located directly below the cavity of the second substrate, and after the microelectromechanical component layer is bonded to the interconnect layer, the pressure inside the cavity is reduced by activating the air intake structure.

20. The method for manufacturing a microelectromechanical package as described in claim 11, characterized in that, The first substrate includes a plurality of complementary metal-oxide-semiconductor transistors formed therein, and the interconnect layer is electrically coupled to the plurality of complementary metal-oxide-semiconductor transistors.

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