Solder paste printing quality analysis method and device, electronic equipment and storage medium

Abstract

Embodiments of the present application provide a tin paste printing quality analysis method and device, electronic equipment and storage medium. The method comprises obtaining a Gerber file and a tin paste image of a target circuit board, analyzing the Gerber file to obtain a Gerber mask, and performing image processing on the tin paste image to obtain a tin paste mask; performing feature extraction on the Gerber mask to obtain first structure features, and performing feature extraction on the tin paste mask to obtain second structure features, and matching the first structure features and the second structure features based on local shape similarity, adjacent pad arrangement and topological offset to obtain a feature matching pair; calculating a coordinate conversion matrix between the Gerber mask and the tin paste mask based on the feature matching pair, and converting the Gerber mask to a coordinate system in which the tin paste image is located based on the coordinate conversion matrix to obtain a Gerber aligned mask; and determining the tin paste printing quality corresponding to the tin paste image based on the Gerber aligned mask. The method can improve detection accuracy.

Description

Technical Field

[0001] This application relates to the field of data processing, and in particular to a method, apparatus, electronic device and storage medium for analyzing solder paste printing quality. Background Technology

[0002] Surface Mount Technology (SMT) is a component assembly process for circuit boards. Solder paste is applied to the corresponding pad areas of the PCB stencil mask through solder paste printing, and then the components are mounted and reflow soldered. In this process, defects such as coating misalignment, insufficient solder, and solder bridging in the solder paste printing process can directly lead to poor soldering and short circuits in the finished SMT product.

[0003] Solder Paste Inspection (SPI) is a dedicated quality control inspection process following the solder paste printing process in SMT production lines. It is used to inspect the height, area, volume, position, and shape of the solder paste before placement, preventing defects from flowing into the reflow soldering process and causing batch soldering defects. However, the current accuracy of SPI inspection is not high. Summary of the Invention

[0004] The main objective of this application is to provide a method, apparatus, electronic device, and storage medium for analyzing solder paste printing quality, in order to improve the accuracy of detection.

[0005] To achieve the above objectives, this application proposes a method for analyzing solder paste printing quality, comprising: The Gerber file and solder paste image of the target circuit board are obtained. The Gerber file is parsed to obtain the Gerber mask, and the solder paste image is processed to obtain the solder paste mask. Feature extraction is performed on the Gerber mask to obtain the first structural feature, and feature extraction is performed on the solder paste mask to obtain the second structural feature. The first and second structural features are then matched based on local shape similarity, adjacent pad arrangement, and topological offset to obtain feature matching pairs. The coordinate transformation matrix between the Gerber mask and the solder paste mask is calculated based on feature matching pairs, and the Gerber mask is transformed to the coordinate system of the solder paste image based on the coordinate transformation matrix to obtain the Gerber alignment mask. The solder paste printing quality corresponding to the solder paste image is determined based on the Gerber alignment mask.

[0006] Optionally, in one embodiment, matching the first structural feature and the second structural feature based on local shape similarity, adjacent pad arrangement, and topological offset to obtain feature matching pairs includes: The outline length and width, number of corner points and edge gradient of each pad in the first structural feature and the second structural feature are extracted respectively to calculate the local shape similarity; The relative spacing and included angle of the surrounding pads within the preset neighborhood of a single pad in the first structural feature and the second structural feature are extracted respectively to determine the arrangement of adjacent pads; Based on the topology connection graphs corresponding to the first and second structural features, the topology offset is determined. Based on local shape similarity, adjacent pad arrangement, and topological offset, the first structural feature and the second structural feature are matched to obtain feature matching pairs.

[0007] Optionally, in one embodiment, after transforming the Gerber mask to the coordinate system of the solder paste image based on the coordinate transformation matrix to obtain the Gerber alignment mask, the method further includes: The reprojection error is determined based on the pixel distance between the Gerber alignment mask and the solder paste image. The pixel overlap ratio is determined based on the percentage of overlap between the Gerber alignment mask and the solder paste image. Obtain the number of feature matching pairs between the Gerber alignment mask and the solder paste image, as well as the pad layout differences between the Gerber alignment mask and the Gerber mask. When coordinate transformation anomalies are determined based on reprojection error, pixel overlap rate, number of matches, and pad layout differences, manually input adjustment parameters are obtained, and the coordinate transformation matrix is ​​adjusted based on the adjustment parameters to update the Gerber alignment mask.

[0008] Optionally, in one embodiment, determining the solder paste printing quality corresponding to the solder paste image based on the Gerber alignment mask includes: The Erber alignment mask and solder paste image are differentially processed to obtain a differential image, and the solder paste area coverage and pad center plane offset are determined based on the differential image. Obtain the 3D height map corresponding to the solder paste image, and identify 3D defects in the solder paste based on the 3D contour of the 3D height map; The solder paste printing quality corresponding to the solder paste image is determined based on the solder paste area coverage, pad center plane offset, and solder paste three-dimensional defects.

[0009] Optionally, in one embodiment, the method further includes: Traverse the candidate pad primitives in the Gerber alignment mask and determine the matching relationship between each candidate pad primitive and the pad primitives in the solder paste mask. When a target matching relationship indicates that there is no match, the target pad element corresponding to the target matching relationship will be highlighted in the visualization interface.

[0010] Optionally, in one embodiment, the target circuit board is divided into multiple pad areas, and the weights of local shape similarity, adjacent pad arrangement, and topological offset are different in different pad areas. The first structural feature and the second structural feature are matched based on local shape similarity, adjacent pad arrangement, and topological offset to obtain feature matching pairs, including: The first and second structural features are matched based on the weights corresponding to the local shape similarity, adjacent pad arrangement, and topological offset in each pad area to obtain feature matching pairs for each pad area.

[0011] Optionally, in one embodiment, the method further includes: Obtain historical solder paste printing quality data and analyze it to obtain solder paste defect distribution data. When the solder paste defect distribution data indicates that there is a target area with an abnormal number exceeding the threshold, the manual instructions for obtaining the target area are used to adjust the parameters of the target area in the Gerber file.

[0012] Another aspect of this application provides a solder paste printing quality analysis device, comprising: The acquisition unit is used to acquire the Gerber file and solder paste image of the target circuit board, parse the Gerber file to obtain the Gerber mask, and perform image processing on the solder paste image to obtain the solder paste mask. The matching unit is used to extract features from the Gerber mask to obtain the first structural feature and to extract features from the solder paste mask to obtain the second structural feature. The first structural feature and the second structural feature are matched based on local shape similarity, adjacent pad arrangement and topological offset to obtain feature matching pairs. The transformation unit is used to calculate the coordinate transformation matrix between the Gerber mask and the solder paste mask based on the feature matching pair, and transform the Gerber mask to the coordinate system where the solder paste image is located based on the coordinate transformation matrix to obtain the Gerber aligned mask. The determination unit is used to determine the solder paste printing quality corresponding to the solder paste image based on the Gerber alignment mask.

[0013] Another aspect of this application provides an electronic device, comprising: Memory, transceiver, processor, and bus system; The memory is used to store programs; The processor is used to execute programs in memory, including methods for performing the aspects mentioned above; Bus systems are used to connect memory and processor to enable communication between them.

[0014] Another aspect of this application provides a computer-readable storage medium storing instructions that, when executed on a computer, cause the computer to perform the methods described above.

[0015] As can be seen from the above technical solutions, the embodiments of this application have the following advantages: This method generates a standard Gerber mask by parsing the circuit board Gerber file, processes the actual solder paste image to obtain the solder paste mask, and simultaneously extracts the structural features of the two types of masks. Under multiple constraints of local shape similarity of pads, arrangement rules of adjacent pads, and global topology of the entire board, it collaboratively selects feature matching pairs, which can effectively suppress feature confusion caused by high-density array pads and components with repetitive specifications, and significantly reduce the number of mismatched feature points. Based on the feature matching pairs, the coordinate transformation matrix between the Gerber mask and the solder paste mask is solved, and then the standard template is used to complete the spatial transformation to the coordinate system of the actual image to generate a Gerber aligned mask. Finally, the solder paste printing status is judged based on the standard pad template after coordinate alignment. According to the alignment result with high matching accuracy, various planar and three-dimensional solder paste printing defects can be accurately identified. It reduces the interference of registration error on quality inspection results from the source of feature matching and improves the accuracy of detection. Attached Figure Description

[0016] Figure 1 This is a schematic diagram of the application architecture of the solder paste printing quality analysis method provided in the embodiments of this application; Figure 2 This is a flowchart illustrating the solder paste printing quality analysis method provided in the embodiments of this application; Figure 3 This is a schematic diagram of Gerber alignment based on solder paste segmentation provided in an embodiment of this application; Figure 4 This is a schematic diagram of the solder paste printing quality analysis device provided in the embodiments of this application; Figure 5 This is a schematic diagram of the structure of the electronic device provided in the embodiments of this application. Detailed Implementation

[0017] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0018] It should be noted that although functional modules are divided in the device schematic diagram and a logical order is shown in the flowchart, in some cases, the steps shown or described may be performed in a different order than the module division in the device or the order in the flowchart. The terms "first," "second," etc., in the specification, claims, and the aforementioned drawings are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence.

[0019] The term “exemplary” as used herein means “serving as an example, embodiment, or illustration.” Any embodiment illustrated herein as “exemplary” is not necessarily to be construed as superior to or better than other embodiments.

[0020] In the embodiments of this application, the terms "module" or "unit" refer to a computer program or part of a computer program that has a predetermined function and works with other related parts to achieve a predetermined goal, and can be implemented wholly or partially using software, hardware (such as processing circuitry or memory), or a combination thereof. Similarly, a processor (or multiple processors or memory) can be used to implement one or more modules or units. Furthermore, each module or unit can be part of an overall module or unit that includes the functionality of that module or unit.

[0021] Furthermore, to better illustrate this application, numerous specific details are provided in the following detailed embodiments. Those skilled in the art should understand that this application can be implemented without certain specific details. In some instances, methods, means, components, and circuits well-known to those skilled in the art have not been described in detail in order to highlight the main points of this application.

[0022] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing embodiments of this application only and is not intended to limit this application.

[0023] In the complete SMT production process, the solder paste printing process is arranged before the component placement and reflow soldering processes. During production, the solder paste is evenly applied to the PCB pad surface through the opening of the stencil. The forming quality of the solder paste printing stage directly determines the mechanical connection strength and electrical connection stability of the subsequent solder joints. The industry generally uses SPI solder paste inspection equipment to complete the solder paste index inspection before the placement operation. The equipment can quantitatively collect data on solder paste height, coating area, overall volume, planar position and contour shape. Among them, insufficient solder can easily cause open circuit and insufficient mechanical strength of solder joints. Excessive solder and solder bridging are very likely to cause short circuits. Solder paste misalignment, edge spikes, and copper leakage on the pads will also significantly reduce the final soldering quality.

[0024] While existing traditional SPI devices support importing Gerber files corresponding to stencils and parsing them to generate theoretical pads or stencil opening geometry templates, Gerber files only record the standard theoretical graphic structure in the PCB design coordinate system. They cannot directly correspond to the actual distribution position and contour shape of solder paste in the image of the board captured by the camera. Furthermore, the Gerber layer contains silkscreen lines, auxiliary positioning lines, Mark reference points, and various non-closed invalid primitives. At the same time, there are inherent local imaging deviations between the PCB design coordinate system and the industrial camera imaging pixel coordinate system caused by translation, rotation, scaling, mirror transformation, and substrate deformation. Therefore, the theoretical template and the actual captured image cannot be directly superimposed and matched. Traditional SPI alignment methods typically rely on fixed image processing rules such as grayscale thresholding, color thresholding, edge detection, and image morphological operations to segment solder paste areas from real-world images. Operators then manually load Gerber templates and repeatedly adjust translation, rotation, scaling, and mirroring parameters to achieve layer overlay alignment. This fixed-rule segmentation method is highly susceptible to interference from environmental factors such as PCB substrate background color, silkscreen printing, optical reflection, shooting shadows, solder paste thickness differences, and printing deformation. This often results in problems like broken solder paste areas, adhesion between adjacent solder paste areas, missed extraction of solder paste areas, and incorrect extraction of non-solder paste areas. Furthermore, some traditional SPI solutions rely on selecting specific positioning components and Mark reference points for coarse positioning of the entire board. After importing Gerber data, manual selection of the entire board inspection window and verification of Mark point recognition are still required. If the solder paste segmentation results fluctuate, or if there are deviations in direction, size, or mirror matching between the Gerber and real-world images, operators must continuously manually correct the alignment parameters. Overall, the automation level is low, and the registration stability is poor, severely restricting the efficiency of solder paste inspection and the accuracy of defect identification on SMT production lines.

[0025] Based on this, this application provides a method for analyzing solder paste printing quality, which can solve the above-mentioned technical problems.

[0026] System architecture and scenario description used in the embodiments of this application: Figure 1 This is a system architecture diagram of the solder paste printing quality analysis method according to an embodiment of this application. It includes a terminal 140, an Internet 130, a gateway 120, a server 110, etc.

[0027] Terminal 140 includes various forms of devices with display screens, such as desktop computers, laptops, PDAs (personal digital assistants), mobile phones, in-vehicle terminals, home theater terminals, dedicated terminals, intelligent voice interaction devices, smart home appliances, or aircraft. Furthermore, it can be a single device or a collection of multiple devices. Terminal 140 can communicate with the Internet 130 via wired or wireless means to exchange data.

[0028] Server 110 refers to a computer system that can provide certain services to terminal 140. Compared to ordinary terminal 140, server 110 has higher requirements in terms of stability, security, and performance. Server 110 can be a single high-performance computer in a network platform, a cluster of multiple high-performance computers, a portion of a single high-performance computer (e.g., a virtual machine), or a combination of portions of multiple high-performance computers (e.g., virtual machines).

[0029] Gateway 120, also known as an internetwork connector or protocol converter, is a computer system or device that acts as a translator, enabling network interconnection at the transport layer. It bridges the gap between two systems using different communication protocols, data formats, languages, or even completely different architectures. Gateways can also provide filtering and security functions. Messages sent from terminal 140 to server 110 are forwarded to the corresponding server 110 via gateway 120. Messages sent from server 110 to terminal 140 are also forwarded to the corresponding terminal 140 via gateway 120.

[0030] The solder paste printing quality analysis method provided in this application embodiment can be implemented separately in terminal 140, separately in server 110, or partially in terminal 140 and partially in server 110.

[0031] When the solder paste printing quality analysis method provided in this application embodiment is implemented alone in terminal 140, terminal 140 acquires the Gerber file and solder paste image of the target circuit board, parses the Gerber file to obtain a Gerber mask, and performs image processing on the solder paste image to obtain a solder paste mask; terminal 140 performs feature extraction on the Gerber mask to obtain a first structural feature, and performs feature extraction on the solder paste mask to obtain a second structural feature, and matches the first structural feature and the second structural feature based on local shape similarity, adjacent pad arrangement, and topological offset to obtain a feature matching pair; terminal 140 calculates the coordinate transformation matrix between the Gerber mask and the solder paste mask based on the feature matching pair, and transforms the Gerber mask to the coordinate system where the solder paste image is located based on the coordinate transformation matrix to obtain a Gerber alignment mask; terminal 140 determines the solder paste printing quality corresponding to the solder paste image based on the Gerber alignment mask.

[0032] The solder paste printing quality analysis method provided in the embodiments of this application will be described below with reference to the accompanying drawings. The execution subject of the solder paste printing quality analysis method described below is a terminal device, which can be implemented by the terminal device by running the various computer programs mentioned above. Of course, based on the understanding of the following text, it is not difficult to see that the solder paste printing quality analysis method provided in the embodiments of this application can also be implemented by the terminal device and the server in collaboration.

[0033] Please see Figure 2 ,like Figure 2 The diagram shown is a flowchart of a solder paste printing quality analysis method provided in this embodiment. The method includes: Step 201: Obtain the Gerber file and solder paste image of the target circuit board, parse the Gerber file to obtain the Gerber mask, and perform image processing on the solder paste image to obtain the solder paste mask.

[0034] Gerber files are standard vector graphics files commonly used in the PCB industry. They consist of standardized drawing instructions and store the geometric coordinates and graphic outlines of each layer of PCB circuitry, pads, stencil openings, and silkscreen printing. They are the original theoretical data output from the PCB design end and can be used as vector graphics drawings of the dedicated layers of stencil pads on the target PCB to be tested. They carry the theoretical reference data of the standard dimensions and coordinates of each pad.

[0035] Gerber masks can be used to divide the effective graphic area and blank background using black and white binary pixels, which is used to limit the effective area for calculation and recognition. In other words, vector format Gerber drawings are converted into pixelated binary standard templates that match the resolution of solder paste images. White pixels represent standard pad areas, and black pixels represent blank substrates.

[0036] The solder paste image is captured by an SPI device to show the actual image of the target circuit board after the solder paste printing is completed. It records the actual planar grayscale distribution of the substrate, solder paste, and silkscreen, and carries the actual printing position and outline of the solder paste.

[0037] A solder paste mask can be a binary image segmented from the original solder paste image, showing the actual area covered by the solder paste. White pixels represent the actual solder paste, and black pixels represent blank areas on the substrate, serving as a reference for comparison with the physical object. For example, grayscale thresholding, reflective shadow noise reduction, morphological opening and closing operations, and edge closure processing are sequentially performed on the original solder paste image to remove interference pixels such as substrate silkscreen, dust, and light spots, thus separating the pure solder paste area and generating a binary solder paste mask.

[0038] Step 202: Extract features from the Gerber mask to obtain the first structural feature, and extract features from the solder paste mask to obtain the second structural feature. Match the first and second structural features based on local shape similarity, adjacent pad arrangement and topological offset to obtain feature matching pairs.

[0039] Structural features can be abstract information used to characterize the shape and spatial location of image targets. By extracting contour corner points, edge gradients, and geometric dimensions, the association and matching of similar targets in different images can be achieved. The first structural feature is the set of contour key points, length and width dimensions, and edge gradients extracted from all standard pads within the Gerber mask, representing the geometric identifier of the theoretical pads; the second structural feature is the set of contour key points of the same type extracted from the actual solder paste area within the solder paste mask, representing the geometric identifier of the physical solder paste.

[0040] Local shape can refer to the unique shape, size, and contour attributes of a single closed graphic, distinguishing different specifications of independent graphics based on differences in shape. That is, the geometric shape parameters of a single pad itself. Local shape similarity can quantify the degree of similarity between the shape of the pad with the first structural feature on the Gerber mask side and the pad with the second structural feature on the solder paste mask side, and is used to initially screen candidate feature point pairs with similar shapes.

[0041] The arrangement of adjacent pads can be based on a single target graphic as the center, with the relative spatial position constraints formed by the surrounding neighboring graphics. The surrounding reference objects can be used to eliminate matching ambiguities caused by the repetition of the shape of a single graphic.

[0042] Topology offset can be the coordinate deviation between the global distribution of the pads of the first structural feature on the Gerber mask side and the pads of the second structural feature on the solder paste mask side.

[0043] Feature matching pairs can be pairs of corresponding feature points in two images that belong to the same real object. That is, a one-to-one combination of first structural feature and second structural feature points, representing the corresponding key points of the same pad in the theoretical template and the real object image.

[0044] Understandably, the process involves first extracting pad features from the Gerber mask and solder paste mask, respectively, and outputting the first structural feature representing the theoretical standard and the second structural feature representing the physical solder paste. Then, candidate pairs with similar shapes are first screened based on the local shape similarity of a single pad. Next, candidate pairs with contradictory local arrangements are eliminated by verifying the relative spacing and angle of neighboring pads indicated by the arrangement of adjacent pads. Then, pairs that conform to the global spatial rules are screened based on the topological offset. After multiple constraints are used to filter out incorrect matching points, the final set of accurate feature matching pairs is output.

[0045] Step 203: Calculate the coordinate transformation matrix between the Gerber mask and the solder paste mask based on feature matching pairs, and transform the Gerber mask to the coordinate system of the solder paste image based on the coordinate transformation matrix to obtain the Gerber alignment mask.

[0046] A coordinate transformation matrix refers to the mapping relationship between two independent pixel coordinate systems, enabling unified mathematical operations such as image translation, rotation, scaling, mirroring, and perspective distortion. Specifically, it's a transformation matrix that maps the Gerber mask theory pixel coordinate system to the actual pixel coordinate system of the solder paste image, unifying the coordinate references of the two images and eliminating the inherent coordinate deviations between the design drawings and the actual images.

[0047] Gerber alignment mask can refer to a standard binary template image after coordinate space mapping transformation. After the original Gerber mask is generated by global pixel mapping through coordinate transformation matrix, all standard pad coordinates and solder paste image physical coordinates are in the same pixel space, and can be directly compared pixel by pixel with solder paste mask.

[0048] Step 204: Determine the solder paste printing quality corresponding to the solder paste image based on the Gerber alignment mask.

[0049] Solder paste printing quality can be determined by comprehensively considering solder paste planar distribution, three-dimensional morphology indicators to distinguish between acceptable and unacceptable results, as well as various printing defects. It is used to judge whether the current PCB can proceed to the surface mount and reflow soldering processes. In other words, it is a comprehensive judgment of the solder paste coating status of each pad on the target circuit board, quantifying various indicators and comparing them with the corresponding pad process thresholds to comprehensively determine the printing quality.

[0050] Using the Gerber alignment mask after coordinate alignment as the standard reference, the pixel difference between the alignment template and the solder paste mask is used to calculate the solder paste printing quality of each pad. All quantitative indicators are compared with the preset process threshold of the corresponding pad to distinguish various defects such as no defects, insufficient solder, excessive solder overflow, offset, solder spikes, and solder bridging. The overall solder paste printing quality judgment result of the entire circuit board is output.

[0051] The pad printing quality analysis method provided in this application generates a standard Gerber mask by parsing the circuit board Gerber file, processes the actual solder paste image to obtain the solder paste mask, and simultaneously extracts the structural features of the two types of masks. Under multiple constraints of local shape similarity of pads, arrangement rules of adjacent pads and global topology of the whole board, feature matching pairs are collaboratively screened. This can effectively suppress feature confusion caused by high-density array pads and components with repetitive specifications, and significantly reduce the number of mismatched feature points. The coordinate transformation matrix between the Gerber mask and the solder paste mask is solved according to the feature matching pair. Then, the spatial transformation from the standard template to the coordinate system of the actual image is completed with the help of this matrix to generate a Gerber aligned mask. Finally, the solder paste printing status is judged based on the standard pad template after coordinate alignment. According to the alignment result with high matching accuracy, various planar and three-dimensional solder paste printing defects can be accurately identified. The interference of registration error on the quality inspection result is reduced from the source of feature matching, and the detection accuracy is improved.

[0052] In one implementation, matching of a first structural feature and a second structural feature is performed based on local shape similarity, adjacent pad arrangement, and topological offset to obtain feature matching pairs, including: The outline length and width, number of corner points and edge gradient of each pad in the first structural feature and the second structural feature are extracted respectively to calculate the local shape similarity; The relative spacing and included angle of the surrounding pads within the preset neighborhood of a single pad in the first structural feature and the second structural feature are extracted respectively to determine the arrangement of adjacent pads; Based on the topology connection graphs corresponding to the first and second structural features, the topology offset is determined. Based on local shape similarity, adjacent pad arrangement, and topological offset, the first structural feature and the second structural feature are matched to obtain feature matching pairs.

[0053] In this embodiment, the outline length and width can be dimensional parameters describing the horizontal and vertical pixel span of the bounding rectangle of the closed geometric figure, used to intuitively distinguish the size specifications of the figure, that is, the horizontal length and vertical width of the bounding rectangle of the closed outline of the theoretical pad of the Gerber mask and the actual solder paste area of ​​the solder paste mask. The length and width values ​​can be obtained by traversing all outline pixels of a single pad, calculating the extreme values ​​of the horizontal and vertical coordinates of the pixels, and performing a difference operation.

[0054] The number of corner points can be the total number of feature points with abrupt curvature changes and edge turns within the image contour, that is, the total number of corner feature points identified on the complete contour of a single pad. It is used to distinguish between rectangular, circular, and irregular BGA pads. It can be obtained by traversing the edge pixels of the pad and counting the number of effective corner points.

[0055] Edge gradient can be the rate of change of image pixel grayscale along the edge normal direction, reflecting the sharpness of the graphic edge and the trend of contour change. It is the average grayscale gradient at each position along the pad contour edge, characterizing the morphological features of the pad contour edge. It can be obtained by calculating the grayscale gradient operator on the pad edge pixel matrix and then calculating the average gradient of the entire pad edge. The contour length and width, number of corner points, and edge gradient are combined into a shape feature vector, and the local shape similarity is calculated using a cosine similarity algorithm.

[0056] The preset neighborhood range can be a circular / square pixel region with a fixed radius centered on the target pixel point, used to extract local surrounding pixel information. That is, the surrounding pad retrieval area is defined with the center point of any single pad feature as the center and a preset pixel radius, used to extract the arrangement information of adjacent pads.

[0057] The relative spacing can be the Euclidean pixel distance between two feature points in a planar coordinate system, that is, the straight-line pixel distance between a pad and each of the surrounding pad feature points in the neighborhood.

[0058] The included angle can be the plane angle formed by the line connecting two adjacent pads with the center pad as the vertex.

[0059] The arrangement of adjacent pads can be a combination of relative spatial positions formed by the surrounding adjacent patterns of a single pattern, that is, the combination features of the spacing and angle of all surrounding pads in the neighborhood of the pad, which is used to verify the local spatial consistency of candidate matching pairs; a neighborhood arrangement feature sequence can be generated by summarizing all relative spacing and angle in the neighborhood.

[0060] A topology connection graph can be an undirected spatial network graph constructed with all target graphic feature points as vertices and graphic spatial relationships as edges, representing the global point distribution pattern of the entire image. Here, global spatial network graphs are constructed separately for all pads of the Gerber mask and all solder paste feature points of the solder paste mask, representing the global distribution information of the pads on the entire board. The overall coordinate deviation reference value obtained after comparing the two sets of topology connection graphs can be called the topology offset.

[0061] Understandably, each pad is traversed for the first structural feature corresponding to the Gerber mask and the second structural feature corresponding to the solder paste mask. Three types of shape parameters—length, width, number of corner points, and edge gradient—are extracted from the single pad outline and combined into vectors to calculate local shape similarity. Based on the similarity values, candidate feature pairs with similar shapes are initially selected, completing the first layer of single pad shape constraint verification. Subsequently, using the pad feature points within each candidate pair as a benchmark, all surrounding pad feature points are extracted within a preset pixel neighborhood. The relative distance and planar angle between the central pad and surrounding pads are calculated one by one, forming a standardized arrangement of adjacent pads. The feature sequence is compared with the deviation between the theoretical and physical arrangement sequences to eliminate candidate pairs with local spatial arrangement conflicts. Then, complete board pad topology connection diagrams are generated according to the first and second structural features respectively. Based on the candidate pairing points retained in the two sets of topology diagrams, the unified topology offset of the whole board is fitted to determine whether the candidate pairing conforms to the global unified spatial transformation law of the whole board and eliminate conflicting pairings that violate the global distribution characteristics. Finally, the points that simultaneously meet the criteria of local shape similarity, adjacent pad arrangement deviation within the allowable range, and global topology offset are selected and output to obtain the final reliable feature matching pairs.

[0062] First, the candidate pairing range is narrowed down by using the shape of the pads. Then, the matching ambiguity caused by the similarity of the shape of the single pads is eliminated by using the relative spatial relationship of the surrounding pads. Finally, the global consistency verification is performed based on the global pad distribution topology of the entire circuit board. Invalid pairings are filtered layer by layer from three dimensions: single point, local and global. The number of erroneous matching points is reduced step by step. The fitting error of the coordinate transformation matrix is ​​reduced from the source of feature matching. This effectively solves the industry defects of high mismatch rate and poor registration robustness of traditional matching algorithms in high-density repeated pad scenarios.

[0063] In one implementation, after transforming the Gerber mask to the coordinate system of the solder paste image based on the coordinate transformation matrix to obtain the Gerber alignment mask, the method further includes: The reprojection error is determined based on the pixel distance between the Gerber alignment mask and the solder paste image. The pixel overlap ratio is determined based on the percentage of overlap between the Gerber alignment mask and the solder paste image. Obtain the number of feature matching pairs between the Gerber alignment mask and the solder paste image, as well as the pad layout differences between the Gerber alignment mask and the Gerber mask. When coordinate transformation anomalies are determined based on reprojection error, pixel overlap rate, number of matches, and pad layout differences, manually input adjustment parameters are obtained, and the coordinate transformation matrix is ​​adjusted based on the adjustment parameters to update the Gerber alignment mask.

[0064] In this embodiment, the pixel distance can be the Euclidean distance between two points in a planar pixel coordinate system, measured in pixels, that is, the pixel straight-line distance between the Gerber aligned mask feature points after matrix mapping and the corresponding matching feature points in the solder paste image.

[0065] Reprojection error can be a quantitative indicator used in the fields of 3D reconstruction and image registration to measure the deviation of feature point mapping. It represents the degree of deviation between the transformed point position and the real point position. Here, it can be the average of the pixel distances of all matched feature points. The larger the pixel distance of a single point, the worse the point alignment accuracy.

[0066] The overlap area ratio is the ratio of the number of overlapping pixels in two binary images to the total number of effective pixels in the target image, used to measure the degree of overlap between the images. Specifically, it is the percentage obtained by dividing the total number of overlapping pixels between the standard pad pixel area of ​​the Gerber alignment mask and the solder paste area of ​​the solder paste image by the total area of ​​all pad pixels in the Gerber alignment mask. This overlap area ratio indicates the pixel overlap rate between the Gerber alignment mask and the solder paste image.

[0067] The number of matching feature pairs can refer to the total number of valid feature point pairs that correspond one-to-one in two images.

[0068] Pad layout difference can refer to the overall deviation of the relative arrangement, spacing, and angle of pads on the entire board before and after the transformation. That is, by comparing the relative positions, spacing, and angles of all pads in the original Gerber mask and the Gerber alignment mask, the global layout deformation deviation value is calculated.

[0069] An abnormal coordinate transformation can refer to a situation where any one of the four indicators—reprojection error, pixel overlap rate, number of matches, and pad layout difference—failes to reach the preset acceptable threshold.

[0070] The manually input adjustment parameters can be matrix fine-tuning correction parameters manually entered through the interface, used to compensate and correct the original coordinate transformation matrix.

[0071] Understandably, after mapping the original Gerber mask coordinates and generating the Gerber alignment mask based on the coordinate transformation matrix, the feature points mapped by the Gerber alignment mask are first extracted and matched with the feature points of the solder paste image. The pixel distance between the two sets of points is calculated and the average value is used as the reprojection error. The average value of single-point offset directly reflects the key point matching accuracy. Secondly, the Gerber alignment mask and the solder paste image are pixel-overlayed, and the proportion of pixels in the overlapping area of ​​the two pads to the total number of pixels of the standard pads is calculated to obtain the pixel overlap rate to evaluate the overall alignment effect at the whole board area level. At the same time, the total number of feature matching pairs is counted to determine whether there are enough reference points for matrix fitting. Then, the original Gerber image is compared with the model. The system quantifies the global pad layout differences by measuring the relative spacing and angles of multiple sets of dispersed pads in the mask and Gerber alignment mask, and judges whether there is unreasonable stretching or deformation of the entire board. The system compares four indicators, namely reprojection error, pixel overlap rate, matching quantity, and pad layout difference, with preset process thresholds. If any indicator fails to meet the qualification standard, it is determined that there is a coordinate transformation anomaly in the current coordinate transformation matrix. At this time, the human-machine interaction channel is opened to receive translation, rotation, and scaling adjustment parameters manually entered by the operator. The original coordinate transformation matrix is ​​compensated and corrected using the manual adjustment parameters, and then the corrected new matrix is ​​applied to the original Gerber mask to complete the pixel coordinate remapping and generate an updated Gerber alignment mask.

[0072] By simultaneously integrating multiple dimensions such as single-point feature point error, full-board area overlap, effective matching point base, and global pad topology layout for joint verification, misjudgments caused by single verification indicators are avoided, significantly improving the rigor of coordinate transformation matrix reliability judgment. After determining that the matrix registration has failed, the existing matrix is ​​compensated and corrected by manual fine-tuning of parameters and the alignment mask is updated, shortening the correction and debugging time. It can not only meet the requirements of fully automatic alignment, but also adapt to complex working conditions, improving the adaptability of the entire solder paste detection algorithm to different types of circuit boards and different imaging environments. It ensures that a high-precision alignment template is always used when judging the quality of subsequent solder paste printing, avoiding false alarms and missed detections caused by registration deviations.

[0073] In one implementation, determining the solder paste printing quality corresponding to a solder paste image based on a Gerber alignment mask includes: The Erber alignment mask and solder paste image are differentially processed to obtain a differential image, and the solder paste area coverage and pad center plane offset are determined based on the differential image. Obtain the 3D height map corresponding to the solder paste image, and identify 3D defects in the solder paste based on the 3D contour of the 3D height map; The solder paste printing quality corresponding to the solder paste image is determined based on the solder paste area coverage, pad center plane offset, and solder paste three-dimensional defects.

[0074] In this embodiment, the differential image can be a difference visualization image output after differential operation of two images, used to intuitively present the location of regional differences, characterize the pixel area where the standard pad does not match the actual solder paste, and generate differential pixel markers in the image for missing solder paste and solder overflow areas.

[0075] Solder paste area coverage can be the ratio of the actual pixel area covered by solder paste to the total area of ​​standard pad pixels within the Gerber alignment mask, representing the sufficiency of solder paste filling the standard pads.

[0076] The offset of the center plane of the solder pad can be a pixel offset distance that represents the center of the physical target and the standard reference center. That is, the plane Euclidean distance between the standard geometric center coordinates of a single solder pad and the centroid coordinates of the actual solder paste area, reflecting the degree of offset of the overall solder paste coating.

[0077] A 3D height map can be stereoscopic imaging data generated by 3D structured light or laser scanning equipment. Each pixel is accompanied by XY plane coordinates and Z-axis height values, recording the stereoscopic height of solder paste at various locations and restoring the true stereoscopic shape of solder paste.

[0078] The 3D contour can be the set of Z-axis heights of all pixels in the corresponding area of ​​a single pad within a 3D height map, which can restore the shape of solder paste protrusions, depressions, and extensions.

[0079] Solder paste three-dimensional defects can be undesirable forms in which the three-dimensional shape of the solder paste does not conform to the process standards. For example, abnormal solder paste height, excessive or insufficient volume, solder paste edge spikes, solder paste connection between adjacent pads, etc., are three-dimensional printing defects that cannot be identified by relying solely on planar images.

[0080] Understandably, the process begins by performing pixel-by-pixel differential operations on the Gerber alignment mask and the corresponding binary solder paste mask to generate a differential image. Based on the pixel distribution within the differential image, the ratio of the actual solder paste coverage area of ​​a single pad to the area of ​​the standard pad is calculated to obtain the solder paste area coverage rate. Simultaneously, the pixel spacing between the center of the standard pad and the center of gravity of the solder paste is calculated to obtain the pad center plane offset, thus completing the quantification of solder paste coating defects in the planar dimension. Simultaneously, the 3D height map acquired in conjunction with the solder paste image is retrieved, and the complete 3D contour height data of the corresponding area for each pad is read. By analyzing abrupt changes in contour height and the height connectivity between adjacent areas, 3D defects such as solder paste spikes, solder bridging, and abnormal height and volume are identified. Finally, the two planar quantification indicators—solder paste area coverage rate and pad center plane offset—are integrated with all the 3D defect information obtained from the 3D height map. All indicators are compared one by one with the process thresholds of the corresponding pad specifications to comprehensively distinguish various printing defects such as no defects, insufficient solder, excessive solder, offset, spikes, and solder bridging, and the complete solder paste printing quality judgment result for each pad on the entire circuit board is output.

[0081] Pixel-level planar defect quantification is achieved through differential imaging, outputting solder paste filling rate and planar offset values. Simultaneously, a synchronously acquired 3D height map is introduced to supplement the three-dimensional dimension detection, taking into account both planar coating deviation and three-dimensional morphological defects. Planar and three-dimensional indicators complement and verify each other, reducing the workload of manual visual inspection, intercepting various types of defective printed circuit boards in advance, and preventing defects from flowing into the component mounting and reflow soldering processes, causing batch soldering failures, and reducing production line scrap and rework costs.

[0082] In one embodiment, the method further includes: Traverse the candidate pad primitives in the Gerber alignment mask and determine the matching relationship between each candidate pad primitive and the pad primitives in the solder paste mask. When a target matching relationship indicates that there is no match, the target pad element corresponding to the target matching relationship will be highlighted in the visualization interface.

[0083] In this embodiment, the candidate pad primitive can refer to the connected area of ​​all pads remaining after all screening, silkscreen, auxiliary lines and Mark points have been removed in the Gerber alignment mask.

[0084] The matching relationship can be a marker indicating whether the standard pads in the Gerber alignment mask have spatial overlap and contour matching in the corresponding solder paste areas in the solder paste mask. It is divided into two categories: matching and non-matching. The corresponding markers can be generated by comparing the pixel overlap range and feature association results of the candidate pad primitives and the solder paste pad primitives.

[0085] The target matching relationship can refer to the set of pad association data that is determined to be unmatched, which is used to locate the target pad unit that does not have corresponding solder paste.

[0086] The visualization interface serves as the graphical display terminal for the inspection system. It can overlay and render Gerber standard pads, real-world solder paste images, and highlight mark layers, simultaneously loading and rendering all image data in real time. Unmatched standard pad elements are individually filled with special high-contrast pixel colors for highlighting, creating a visual distinction from correctly matched pads.

[0087] Understandably, the system iterates through all the selected candidate standard pad primitives within the Gerber alignment mask. For each candidate pad primitive, the system compares its pixel coordinate coverage with the spatial overlap area and feature matching results of all solder paste pad primitives within the solder paste mask. This generates a corresponding matching relationship identifier for each standard pad, thus distinguishing whether the standard pad has a corresponding physical solder paste area. After the traversal is complete, all unmatched target matching relationships are retrieved, and the target pad primitive corresponding to that entry in the Gerber alignment mask is located in reverse. Subsequently, an independent marker layer is overlaid on the entire circuit board imaging layer in the device visualization display interface, and the target pad primitive is filled with high-contrast color values ​​for highlight rendering, enabling operators to intuitively and quickly locate the position of pads without solder paste coverage.

[0088] By using a visual highlight layer to directly mark mismatched solder pads on real circuit board images, abstract coordinate data is transformed into intuitive graphic markers, significantly reducing the time cost for operators to find missing solder defects and avoiding missed detection problems caused by manual verification.

[0089] In one embodiment, the target circuit board is divided into multiple pad areas. The weights of local shape similarity, adjacent pad arrangement, and topological offset differ in different pad areas. First structural features and second structural features are matched based on local shape similarity, adjacent pad arrangement, and topological offset to obtain feature matching pairs, including: The first and second structural features are matched based on the weights corresponding to the local shape similarity, adjacent pad arrangement, and topological offset in each pad area to obtain feature matching pairs for each pad area.

[0090] In this implementation, the pad area can be a functional partition defined at the PCB design level based on component arrangement, used to distinguish the mounting positions of different components. That is, it is an independent sub-region pre-defined by the Gerber alignment mask and solder paste mask based on pad density and component type, such as BGA dense pin area, independent high-power pad area, flexible board edge deformation area, and conventional resistor-capacitor array area. The partitioning can be automatically clustered and divided by the program based on pad coordinates and spacing within the Gerber file, or the operator can manually define the partition boundaries in advance.

[0091] Local shape similarity weight can be a weighting coefficient assigned to the shape similarity calculation item in the matching algorithm; adjacent pad arrangement weight can be a weighting coefficient assigned to the neighborhood spacing and angle arrangement feature items in the matching algorithm; topology offset weight can be a weighting coefficient assigned to the global topology coordinate offset verification item in the matching algorithm. Each weight is used to adjust the degree of influence of the individual indicator on the final comprehensive score, and different pad areas are configured with differentiated coefficient combinations.

[0092] Understandably, the entire target circuit board is pre-divided into multiple pad areas with different attributes. For each type of pad area, specific weight coefficients are pre-configured for three constraints: local shape similarity, adjacent pad arrangement, and topology offset. When performing feature matching operations, the Gerber mask and solder paste mask are first divided according to the preset partition boundaries. The corresponding first and second structural features are extracted from each partition. Within a single pad area, the weight parameters specific to that area are fused, and the comprehensive matching score of local shape similarity, adjacent pad arrangement deviation, and global topology coordinate offset is calculated. Based on the comprehensive score after partition weighting, the candidate feature pairing within that area is filtered. Each pad area is calculated independently and outputs its corresponding feature matching pair subset. After all partition operations are completed, all sub-matching pairs are summarized to form a complete feature matching pair set for the entire circuit board.

[0093] By partitioning the circuit board according to pad distribution, component type, and board deformation characteristics and configuring differentiated weights, large independent pads increase the weight of local shape similarity and prioritize matching based on shape. Dense array pads increase the weight of adjacent pad arrangement and eliminate matching ambiguities caused by shape similarity based on surrounding points. Deformation-sensitive areas increase the weight of topological offset and suppress matching errors caused by local deformation by relying on global distribution. The judgment priority of the three-layer constraint is dynamically adjusted by region. Without increasing hardware acquisition costs, the matching and screening logic of different regions is optimized in a targeted manner, further reducing the number of mismatches in complex areas such as high-density arrays, irregularly shaped pads, and flexible board edges. This improves the overall reliability of feature matching of the whole board, reduces the fitting deviation of subsequent coordinate transformation matrix, and adapts to complex working conditions where a single circuit board has multiple pad arrangement types. It also significantly broadens the range of circuit board specifications that the algorithm can stably detect.

[0094] In one embodiment, the method further includes: Obtain historical solder paste printing quality data and analyze it to obtain solder paste defect distribution data. When the solder paste defect distribution data indicates that there is a target area with an abnormal number exceeding the threshold, the manual instructions for obtaining the target area are used to adjust the parameters of the target area in the Gerber file.

[0095] In this embodiment, the historical solder paste printing quality can be the full quality inspection results data retained from the solder paste inspection of past batches of circuit boards on the SMT production line. This data is used to trace the long-term production fluctuation patterns. In other words, it refers to the complete judgment records of solder paste area coverage, center offset, three-dimensional defects, mismatched pads, etc., stored from multiple batches of the same type of circuit board.

[0096] Solder paste defect distribution data can be a set of regional defect frequencies, defect types, and defect amplitudes generated after the statistical summary of batch quality inspection data. It is used to quantify the frequency of defects occurring at fixed positions on the circuit board. It can also be used to statistically analyze the occurrence frequency and severity of various defects in each pad area and single pad point of the circuit board based on multiple batches of historical quality records, and generate a thermal distribution dataset of the entire board defect frequency.

[0097] The anomaly frequency threshold can be a pre-set critical value for defect frequency judgment by process engineers. It serves as a criterion for distinguishing between occasional defects and persistent process defects. If the cumulative number of defects in the same fixed area exceeds this value, it is determined that there is a persistent printing defect in that area. Among them, the pad partitions or individual pad points where the cumulative number of defects exceeds the anomaly frequency threshold, derived from solder paste defect distribution data, represent the locations where there are persistent anomalies in the stencil and printing process, and can be referred to as target areas.

[0098] Manual instructions can be process correction instructions entered by operators on the equipment interface, or Gerber parameter adjustment instructions issued for target areas with frequent defects. These instructions include parameter adjustment requirements such as expansion and contraction of stencil opening length and width, compensation for pad reference coordinate offset, and correction of opening fillet. Operators can manually enter and generate these instructions after selecting the target area on the visual defect heat map interface.

[0099] Understandably, the system continuously stores complete records of solder paste printing quality generated from each inspection of the same type of circuit board, forming a historical quality inspection archive. After accumulating sufficient batch historical data, it automatically retrieves all historical solder paste printing quality records for statistical analysis. It clusters and summarizes the frequency, type, and severity of defects at each point and in each pad area according to the spatial coordinates of the circuit board, generating solder paste defect distribution data. The program compares the cumulative number of defects in each area within the solder paste defect distribution data with the preset abnormal number threshold one by one, filters out target areas with frequent defects and exceeding the threshold, and marks the concentrated location of defects on the visualization interface. After the operator views the defect distribution heat map, they issue manual adjustment instructions for the target area. After receiving the manual instructions, the system locates the stencil opening element corresponding to the target area in the original Gerber file, and modifies the vector parameters such as the opening size, coordinate offset, and contour of the area according to the instructions, completing the parameter optimization and adjustment of the target area in the Gerber file. This improves persistent solder paste printing defects from the design source.

[0100] By automatically calculating the frequency of defect distribution based on long-term archived historical solder paste printing quality data, the system can locate high-frequency defect target areas, distinguish between occasional single defects and persistent systemic process defects, and prevent operators from ignoring low-frequency but long-term accumulated fixed-point defects. At the same time, operators can directly issue correction commands based on defect distribution data, and the system will automatically adjust the Gerber stencil opening parameters of the corresponding areas, eradicating frequent solder paste defects in fixed areas from the design source and reducing the long-term batch production of defective products on the SMT production line.

[0101] In one example, a schematic diagram of Gerber alignment based on solder paste segmentation can be referenced. Figure 3 As shown, the input material is a real-time RGB image of the PCB pads captured by the SPI optical station of the SMT production line. This original image contains multiple interfering elements such as substrate background color, solder paste, printed silkscreen, optical reflection, shooting shadows, and dust noise, making it impossible to directly extract a pure solder paste area for subsequent matching operations. A serially cascaded encoder-decoder segmentation network is used to complete pixel-level segmentation operations. Within this segmentation network, Encoder 1, Encoder 2, and Encoder 3 sequentially downsample from top to bottom to extract multi-level image features. The output of Encoder 1 jumps to Decoder 3, the output of Encoder 2 jumps to Decoder 2, and the output of Encoder 3 jumps to Decoder 1 on one hand and accesses the bottleneck layer on the other to complete deep feature processing, namely compression, purification, and channel dimension calibration. The output of the bottleneck layer is directionally accessed to Decoder 2. The decoding module relies on the hierarchical vertical correlation to complete the hierarchical upsampling to restore the spatial resolution, and finally outputs the predicted solder paste mask.

[0102] Secondly, after obtaining the predicted solder paste mask through segmentation model processing, the red image containing the predicted solder paste mask in the figure corresponds to the actual solder paste pattern in the real-world image. The Gerber mask is generated by parsing and rendering the Gerber vector file of the circuit board stencil layer. During the rendering stage, silkscreen lines, auxiliary positioning lines, Mark reference points, and various non-closed invalid primitives are automatically filtered out, retaining only the blue pixel area corresponding to the closed contour of the standard pad, which serves as the theoretical benchmark template for judging the solder paste printing qualification. After completing the generation of the two masks, the system simultaneously performs a unified feature extraction operation on the two sets of binary images, extracting structural features such as the closed contour size, geometric center point coordinates, and relative arrangement relationship of neighboring pads for each pad. This transforms the two types of data with inconsistent dimensions—vector format Gerber drawings and color real-world images—into pixel images with perfectly matched specifications, achieving the unification of the feature extraction logic between the theoretical template and the physical sample.

[0103] Then, the feature pairing and coordinate transformation matrix are solved using a graph neural network. The network uses the pad structure features extracted by two masks as graph vertices and the spatial relationships between pads as undirected graph edges, constructing two independent topological network graphs: one for the physical solder paste and the other for the Gerber theory. During the operation, the local shape similarity of a single pad, the relative arrangement of neighboring pads, and the topological offset verification constraints are simultaneously fused to output feature matching pairs. Based on the selected set of matching pairs, the system solves the T / H coordinate transformation matrix using the RANSAC random sampling consensus algorithm and the least squares fitting method. This matrix can uniformly carry the mapping relationship between translation, rotation, scaling, mirroring, and slight local deformation between the two sets of pixel coordinate systems, eliminating the natural spatial deviation between the PCB design coordinate system and the industrial camera imaging coordinate system. No manual marking of reference points or manual adjustment of transformation parameters is required throughout the process.

[0104] Finally, after obtaining the verified coordinate transformation matrix, the system performs a global pixel coordinate mapping operation on the original Gerber mask, substituting the pixel coordinates of all standard pad outlines into the matrix to complete the spatial transformation, generating a Gerber alignment mask that is completely consistent with the pixel coordinate system of the solder paste image. In the visualization layer, the transformed standard pad outlines are superimposed on the original SPI real-shot pad image as a red layer to form an alignment effect diagram in which the theoretical template and the physical solder paste area coincide.

[0105] In one example, the specific process of the solder paste printing quality analysis method can be described as follows: First, the system reads all coordinate points, graphic outlines, and primitive classification labels stored inside the stencil Gerber file, and simultaneously filters out borders, silkscreen lines on the board surface, process auxiliary lines, and non-closed invalid graphics that have no actual judgment significance, leaving only standard pads with complete closed outlines, and summarizing to generate a pure theoretical pad set without redundant interference.

[0106] Secondly, for each standard theoretical pad extracted from the Gerber file, the system statistically records the closed contour, pixel area, geometric center point coordinates, circumscribed length and width dimensions, graphic rotation direction, and spatial relationship of adjacent pads. Based on the standardized geometric parameters of all pads, a Gerber mask matching the resolution of the subsequent real-world image is uniformly rendered and generated. This mask fully carries the global layout topology information of all pads on the entire board in the form of binary pixels.

[0107] Subsequently, the standard PCB board with qualified solder paste was photographed to capture the entire RGB image of the board. The standard reference board ensures that the corresponding areas of most theoretical pads have complete outlines of physical solder paste without large-area defects, thus guaranteeing that the image contains sufficient physical solder paste feature points for matching and calculation.

[0108] Subsequently, pixel-level segmentation of the solder paste region inside the real-world image is completed using the PP-MobileSeg lightweight segmentation model. The algorithm can use a sliding window traversal to perform parallel segmentation operations on the entire board image, and then stitch all the segmentation results together to form a complete board output, ultimately generating a binary solder paste mask that can distinguish between solder paste and blank substrate. After segmentation, the system traverses each independent solder paste connected region within the solder paste mask, extracts the closed contour, geometric centroid, length and width dimensions, and spatial structure of the neighboring solder paste arrangement of each solder paste region, and completely retains all geometric identification information of the solder paste on the physical side.

[0109] Next, the geometric center point, contour corner key points, local shape similarity descriptors representing shape differences, and spatial correlation between pads were extracted from each pad of the Gerber mask and solder paste segmentation mask, respectively. These structural features were then integrated to form the Gerber theoretical feature set and the actual solder paste physical feature set.

[0110] Then, the Gerber feature set and solder paste feature set are simultaneously input into the SuperGlue graph neural network matching module. The module integrates three layers of verification logic: feature shape similarity, local neighborhood arrangement constraints around a single pad, and global uniform arrangement consistency of pads on the entire board. The module cross-determines candidate pairs, filtering out confusing points caused by similar shapes, incorrect pairs with conflicting local arrangements, and outliers that violate the global distribution rules of the entire board. Finally, it outputs effective feature matching pairs with high credibility and no large number of mismatches.

[0111] Subsequently, the RANSAC algorithm combined with the least squares method is used to fit the transformation matrix mapping from the Gerber theoretical pixel coordinate system to the pixel coordinate system of the actual image of the board. The matrix is ​​compatible with multiple spatial transformation relationships such as image translation, rotation, uniform scaling, mirror flipping, and affine stretching, and adapts to various on-site working conditions such as rigid board standard imaging, local deformation of flexible circuit boards, and shooting perspective deviation. After the initial solution of the matrix is ​​completed, the system simultaneously introduces acceptance indicators such as reprojection error, mask pixel overlap rate, total number of effective matching pairs, and global pad layout consistency to jointly verify the reliability of the matrix. The corresponding quantitative standards in the acceptance table are overall overlap score, pad matching rate, and repeat alignment stability. If any indicator fails to reach the preset process threshold, the current matrix fitting is judged to be invalid and the subsequent layer mapping process is rejected.

[0112] Next, the system substitutes all pixel coordinates of the Gerber mask into the verified transformation matrix to complete global coordinate mapping, so that all standard theoretical pads are mapped to the unified pixel space of the actual board image. The system traverses all mapped theoretical pad primitives one by one, compares their pixel coverage with the actual solder paste area in the solder paste mask, and establishes a one-to-one binding relationship between theoretical pads and solder paste areas that have spatial overlap or are adjacent. For Gerber theoretical primitives that still cannot be matched with the corresponding solder paste area after mapping, the system uses high-contrast colors to highlight and display such primitives in the visual interactive interface. At the same time, an operation window pops up to provide operators with three optional operation instructions: delete invalid primitives, retain primitives, and re-execute image matching. This allows for intuitive location of areas with openings in the stencil but no solder paste printed on site.

[0113] When the system detects that the total number of valid matching pairs is insufficient, the matrix verification score is below the threshold, or the image quality is abnormal, it automatically opens the manual correction interaction channel. Operators can input small translation offsets, rotation angles, scaling ratios, and mirror switch parameters on the interface, or manually select the board Mark reference point to complete local positioning compensation. After the operator submits the correction parameters, the system superimposes the manually corrected parameters onto the original coordinate transformation matrix to form a new initial transformation reference, and re-executes the entire process of SuperGlue feature matching, transformation matrix solving, and four-dimensional index verification, taking into account both the dual needs of fully automated and efficient detection and manual fine-tuning in complex scenarios.

[0114] Finally, using the Gerber alignment mask as the theoretical benchmark for solder paste qualification, the actual area coverage of solder paste and the offset of the solder paste area relative to the center plane of the standard solder pad are quantitatively calculated for each pad based on the pixel difference calculation between the solder paste mask and the alignment template. Simultaneously, the 3D height map of solder paste collected by the SPI device is retrieved, and the Z-axis 3D height value of each pixel point is read. The average height of solder paste and the total volume of solder paste per pad are calculated based on the 3D contour surface features. At the same time, 3D printing defects that cannot be detected by relying solely on 2D planar images, such as solder paste edge spikes and solder bridging between adjacent pads, are identified. The overall quality of solder paste printing for each pad of the entire board is judged by combining planar quantitative indicators and 3D morphological defects. It is predicted that insufficient solder, excessive solder, offset, and solder bridging will cause open circuits and short circuits in the subsequent reflow soldering, and defective boards are intercepted in advance from entering the component placement process.

[0115] The method for analyzing solder paste printing quality has been described above. The apparatus for performing this method is described below.

[0116] Please see Figure 4 ,like Figure 4 The diagram shown is a structural schematic of a solder paste printing quality analysis device provided in an embodiment of this application. The device 400 includes: The acquisition unit 401 is used to acquire the Gerber file and solder paste image of the target circuit board, parse the Gerber file to obtain the Gerber mask, and perform image processing on the solder paste image to obtain the solder paste mask. The matching unit 402 is used to extract features from the Gerber mask to obtain the first structural feature and to extract features from the solder paste mask to obtain the second structural feature. The first structural feature and the second structural feature are matched based on local shape similarity, adjacent pad arrangement and topological offset to obtain feature matching pairs. The transformation unit 403 is used to calculate the coordinate transformation matrix between the Gerber mask and the solder paste mask based on the feature matching pair, and transform the Gerber mask to the coordinate system where the solder paste image is located based on the coordinate transformation matrix to obtain the Gerber aligned mask. Determining unit 404 is used to determine the solder paste printing quality corresponding to the solder paste image based on the Gerber alignment mask.

[0117] Optionally, in one embodiment, the matching unit 402 is specifically used for: The outline length and width, number of corner points and edge gradient of each pad in the first structural feature and the second structural feature are extracted respectively to calculate the local shape similarity; The relative spacing and included angle of the surrounding pads within the preset neighborhood of a single pad in the first structural feature and the second structural feature are extracted respectively to determine the arrangement of adjacent pads; Based on the topology connection graphs corresponding to the first and second structural features, the topology offset is determined. Based on local shape similarity, adjacent pad arrangement, and topological offset, the first structural feature and the second structural feature are matched to obtain feature matching pairs.

[0118] Optionally, in one embodiment, the conversion unit 403 is further configured to: The reprojection error is determined based on the pixel distance between the Gerber alignment mask and the solder paste image. The pixel overlap ratio is determined based on the percentage of overlap between the Gerber alignment mask and the solder paste image. Obtain the number of feature matching pairs between the Gerber alignment mask and the solder paste image, as well as the pad layout differences between the Gerber alignment mask and the Gerber mask. When coordinate transformation anomalies are determined based on reprojection error, pixel overlap rate, number of matches, and pad layout differences, manually input adjustment parameters are obtained, and the coordinate transformation matrix is ​​adjusted based on the adjustment parameters to update the Gerber alignment mask.

[0119] Optionally, in one embodiment, the determining unit 404 is specifically used for: The Erber alignment mask and solder paste image are differentially processed to obtain a differential image, and the solder paste area coverage and pad center plane offset are determined based on the differential image. Obtain the 3D height map corresponding to the solder paste image, and identify 3D defects in the solder paste based on the 3D contour of the 3D height map; The solder paste printing quality corresponding to the solder paste image is determined based on the solder paste area coverage, pad center plane offset, and solder paste three-dimensional defects.

[0120] Optionally, in one embodiment, the matching unit 402 is further configured to: Traverse the candidate pad primitives in the Gerber alignment mask and determine the matching relationship between each candidate pad primitive and the pad primitives in the solder paste mask. When a target matching relationship indicates that there is no match, the target pad element corresponding to the target matching relationship will be highlighted in the visualization interface.

[0121] Optionally, in one embodiment, the target circuit board is divided into multiple pad areas, and the weights of local shape similarity, adjacent pad arrangement, and topological offset are different in different pad areas. The matching unit 402 is specifically used for: The first and second structural features are matched based on the weights corresponding to the local shape similarity, adjacent pad arrangement, and topological offset in each pad area to obtain feature matching pairs for each pad area.

[0122] Optionally, in one embodiment, the determining unit 404 is further configured to: Obtain historical solder paste printing quality data and analyze it to obtain solder paste defect distribution data. When the solder paste defect distribution data indicates that there is a target area with an abnormal number exceeding the threshold, the manual instructions for obtaining the target area are used to adjust the parameters of the target area in the Gerber file.

[0123] This application also provides an electronic device, which includes a memory and a processor. The memory stores a computer program, and the processor executes the computer program to implement the above-described solder paste printing quality analysis method. This electronic device can be any smart terminal, including tablet computers, in-vehicle computers, etc.

[0124] Please see Figure 5 , Figure 5 The hardware structure of an electronic device according to another embodiment is illustrated. The electronic device includes: The processor 501 can be implemented using a general-purpose CPU (Central Processing Unit), microprocessor, application-specific integrated circuit (ASIC), or one or more integrated circuits, and is used to execute relevant programs to implement the technical solutions provided in the embodiments of this application. The memory 502 can be implemented as a read-only memory (ROM), static storage device, dynamic storage device, or random access memory (RAM). The memory 502 can store the operating system and other applications. When the technical solutions provided in the embodiments of this specification are implemented through software or firmware, the relevant program code is stored in the memory 502 and is called and executed by the processor 501 using the solder paste printing quality analysis method of the embodiments of this application. The input / output interface 503 is used to implement information input and output; The communication interface 504 is used to enable communication and interaction between this device and other devices. Communication can be achieved through wired means (such as USB, network cable, etc.) or wireless means (such as mobile network, WIFI, Bluetooth, etc.). Bus 505 transmits information between various components of the device (e.g., processor 501, memory 502, input / output interface 503, and communication interface 504); The processor 501, memory 502, input / output interface 503, and communication interface 504 are connected to each other within the device via bus 505.

[0125] This application also provides a computer-readable storage medium storing a computer program that, when executed by a processor, implements the above-described solder paste printing quality analysis method.

[0126] Memory, as a non-transitory computer-readable storage medium, can be used to store non-transitory software programs and non-transitory computer-executable programs. Furthermore, memory may include high-speed random access memory, and may also include non-transitory memory, such as at least one disk storage device, flash memory device, or other non-transitory solid-state storage device. In some embodiments, memory may optionally include memory remotely located relative to the processor, and these remote memories can be connected to the processor via a network. Examples of such networks include, but are not limited to, the Internet, intranets, local area networks, mobile communication networks, and combinations thereof.

[0127] The embodiments described in this application are for the purpose of more clearly illustrating the technical solutions of the embodiments of this application, and do not constitute a limitation on the technical solutions provided by the embodiments of this application. As those skilled in the art will know, with the evolution of technology and the emergence of new application scenarios, the technical solutions provided by the embodiments of this application are also applicable to similar technical problems.

[0128] Those skilled in the art will understand that the technical solutions shown in the figures do not constitute a limitation on the embodiments of this application, and may include more or fewer steps than shown, or combine certain steps, or different steps.

[0129] The device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs.

[0130] Those skilled in the art will understand that all or some of the steps in the methods disclosed above, as well as the functional modules / units in the systems and devices, can be implemented as software, firmware, hardware, or suitable combinations thereof.

[0131] The terms “first,” “second,” “third,” “fourth,” etc. (if present) in the specification and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of this application described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms “comprising” and “having,” and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0132] It should be understood that in this application, "at least one (item)" means one or more, and "more than" means two or more. "And / or" is used to describe the relationship between related objects, indicating that three relationships can exist. For example, "A and / or B" can represent three cases: only A exists, only B exists, and both A and B exist simultaneously, where A and B can be singular or plural. The character " / " generally indicates that the preceding and following related objects are in an "or" relationship. "At least one (item) of the following" or similar expressions refer to any combination of these items, including any combination of single or plural items. For example, at least one (item) of a, b, or c can represent: a, b, c, "a and b", "a and c", "b and c", or "a and b and c", where a, b, and c can be single or multiple.

[0133] In the several embodiments provided in this application, it should be understood that the disclosed apparatus and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of the units described above is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between apparatuses or units may be electrical, mechanical, or other forms.

[0134] The units described above as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0135] Furthermore, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0136] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes multiple instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods of the various embodiments of this application. The aforementioned storage medium includes various media capable of storing programs, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0137] The preferred embodiments of the present application have been described above with reference to the accompanying drawings, but this does not limit the scope of the claims of the present application. Any modifications, equivalent substitutions, and improvements made by those skilled in the art without departing from the scope and substance of the embodiments of the present application shall be within the scope of the claims of the present application.

Claims

1. A method for analyzing the quality of solder paste printing, characterized in that, include: The Gerber file and solder paste image of the target circuit board are obtained, the Gerber file is parsed to obtain a Gerber mask, and the solder paste image is processed to obtain a solder paste mask. Feature extraction is performed on the Gerber mask to obtain a first structural feature, and feature extraction is performed on the solder paste mask to obtain a second structural feature. The first structural feature and the second structural feature are matched based on local shape similarity, adjacent pad arrangement and topological offset to obtain a feature matching pair. Based on the feature matching pairs, the coordinate transformation matrix between the Gerber mask and the solder paste mask is calculated, and the Gerber mask is transformed to the coordinate system where the solder paste image is located based on the coordinate transformation matrix to obtain the Gerber alignment mask; The solder paste printing quality corresponding to the solder paste image is determined based on the Gerber alignment mask. The matching of the first structural feature and the second structural feature based on local shape similarity, adjacent pad arrangement, and topological offset to obtain feature matching pairs includes: The outline length and width, number of corner points and edge gradient of each pad in the first structural feature and the second structural feature are extracted respectively to calculate the local shape similarity; The relative spacing and included angle of the surrounding pads within the preset neighborhood of a single pad in the first structural feature and the second structural feature are extracted respectively to determine the arrangement of adjacent pads; Based on the topology connection graphs corresponding to the first structural feature and the second structural feature, the topology offset is determined. Based on the local shape similarity, the arrangement of adjacent pads, and the topological offset, the first structural feature and the second structural feature are matched to obtain a feature matching pair.

2. The method according to claim 1, characterized in that, After transforming the Gerber mask to the coordinate system of the solder paste image based on the coordinate transformation matrix to obtain the Gerber alignment mask, the process further includes: The reprojection error is determined based on the pixel distance between the Gerber alignment mask and the solder paste image; The pixel overlap rate is determined based on the percentage of overlap between the Gerber alignment mask and the solder paste image. Obtain the number of feature matching pairs between the Gerber alignment mask and the solder paste image, as well as the pad layout differences between the Gerber alignment mask and the Gerber mask; When the coordinate transformation anomaly is determined based on the reprojection error, the pixel overlap rate, the number of matches, and the pad layout difference, manually input adjustment parameters are obtained, and the coordinate transformation matrix is ​​adjusted based on the adjustment parameters to update the Gerber alignment mask.

3. The method according to claim 1, characterized in that, Determining the solder paste printing quality corresponding to the solder paste image based on the Gerber alignment mask includes: The Gerber alignment mask and the solder paste image are differentially processed to obtain a differential image, and the solder paste area coverage and pad center plane offset are determined based on the differential image. Obtain the three-dimensional height map corresponding to the solder paste image, and identify three-dimensional defects in the solder paste based on the three-dimensional contour of the three-dimensional height map; The solder paste printing quality corresponding to the solder paste image is determined based on the solder paste area coverage, the offset of the center plane of the solder pad, and the three-dimensional defects of the solder paste.

4. The method according to claim 1, characterized in that, The method further includes: Traverse the candidate pad primitives in the Gerber alignment mask and determine the matching relationship between each candidate pad primitive and the pad primitives in the solder paste mask; When a target matching relationship indicates that there is no match, the target pad element corresponding to the target matching relationship is highlighted in the visualization interface.

5. The method according to claim 1, characterized in that, The target circuit board is divided into multiple pad areas. The weights of the local shape similarity, the arrangement of adjacent pads, and the topological offset differ in different pad areas. The matching of the first structural feature and the second structural feature based on local shape similarity, adjacent pad arrangement, and topological offset to obtain feature matching pairs includes: The first structural feature and the second structural feature are matched based on the weights corresponding to the local shape similarity, the arrangement of adjacent pads, and the topological offset in each pad area to obtain feature matching pairs for each pad area.

6. The method according to claim 1, characterized in that, The method further includes: Historical solder paste printing quality is obtained, and the historical solder paste printing quality is analyzed to obtain solder paste defect distribution data; When the solder paste defect distribution data indicates that there is a target area where the number of abnormalities exceeds a threshold, manual instructions for the target area are obtained to adjust the parameters of the target area in the Gerber file.

7. A solder paste printing quality analysis device, characterized in that, include: The acquisition unit is used to acquire the Gerber file and solder paste image of the target circuit board, parse the Gerber file to obtain the Gerber mask, and perform image processing on the solder paste image to obtain the solder paste mask. The matching unit is used to extract features from the Gerber mask to obtain a first structural feature, and to extract features from the solder paste mask to obtain a second structural feature, and to match the first structural feature and the second structural feature based on local shape similarity, adjacent pad arrangement and topological offset to obtain a feature matching pair; A transformation unit is used to calculate the coordinate transformation matrix between the Gerber mask and the solder paste mask based on the feature matching pair, and to transform the Gerber mask to the coordinate system where the solder paste image is located based on the coordinate transformation matrix to obtain the Gerber alignment mask. A determining unit is used to determine the solder paste printing quality corresponding to the solder paste image based on the Gerber alignment mask; The matching unit is specifically used for: The outline length and width, number of corner points and edge gradient of each pad in the first structural feature and the second structural feature are extracted respectively to calculate the local shape similarity; The relative spacing and included angle of the surrounding pads within the preset neighborhood of a single pad in the first structural feature and the second structural feature are extracted respectively to determine the arrangement of adjacent pads; Based on the topology connection graphs corresponding to the first structural feature and the second structural feature, the topology offset is determined. Based on the local shape similarity, the arrangement of adjacent pads, and the topological offset, the first structural feature and the second structural feature are matched to obtain a feature matching pair.

8. An electronic device, characterized in that, include: Memory, transceiver, processor, and bus system; The memory is used to store programs; The processor is configured to execute a program in the memory, including performing the method as described in any one of claims 1 to 6; The bus system is used to connect the memory and the processor to enable communication between the memory and the processor.

9. A computer-readable storage medium, characterized in that, Includes instructions that, when run on a computer, cause the computer to perform the method as described in any one of claims 1 to 6.

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