A single-input double-output thyristor triggering method and device based on digital control

Abstract

A single-input double-output thyristor triggering method and device based on digital control, which obtains electric energy from an alternating current power supply; converts the collected anode-cathode voltage into a square wave signal synchronized with the alternating current power supply, and outputs the square wave signal to the input end of a digital control chip; determines the half cycle in which the current alternating current power supply voltage is located, and selects the first thyristor or the second thyristor to be turned on; outputs an adjustable-width trigger pulse to the gate of the thyristor corresponding to the trigger module through the trigger module, and controls the thyristor to be turned on. The advantages of the present application are: the trigger pulse width and the feedback pulse width are configured, all pulse width parameters are generated by software configuration of the digital control chip, and do not depend on any analog timing elements such as resistors and capacitors, thereby avoiding the problem of pulse width change caused by capacitor value temperature drift and long-term use value attenuation, ensuring the long-term stability of the trigger pulse and the feedback pulse width, and eliminating the risk of state misjudgment of the upper circuit caused by pulse width change.

Description

Technical Field

[0001] This invention relates to the field of power electronics technology, and in particular to a single-input dual-output thyristor triggering method and device based on digital control. Background Technology

[0002] Thyristors, as crucial power components in the power electronics industry, are widely used in high-voltage, high-power applications such as static var compensators (SVCs) and high-power solid-state switches due to their high voltage withstand capability, high current capacity, and low loss. In thyristor applications, the design of the trigger circuit is a critical step in the overall power valve group design, directly affecting the reliable conduction of the thyristor and the stability of system operation.

[0003] Traditional thyristor triggering circuits typically employ purely analog circuitry, communicating with higher-level circuitry via optical fiber. The uplink fiber is used to report thyristor status pulses, while the downlink fiber is used to receive trigger pulses. In this triggering technology, different operating states of the thyristor need to be distinguished by pulse signals of varying widths, thus requiring strict precision in pulse width. The pulse width is determined by a single-pulse trigger chip in conjunction with different resistors and capacitors. However, due to the significant temperature drift of the capacitors and their degradation over long-term use, the pulse width changes, leading to errors in the higher-level circuitry's judgment of the thyristor's state.

[0004] Furthermore, in high-voltage, high-power applications, thyristors are typically connected in anti-parallel configurations (i.e., two thyristors connected in reverse parallel to form a valve group). In traditional triggering circuits, a single downlink fiber optic channel can only drive one thyristor. To drive a pair of anti-parallel thyristors, two downlink fibers and their corresponding fiber optic transceiver circuits are required. This not only increases the cost of fiber optic materials and construction complexity but also increases the potential points of system failure.

[0005] To address the aforementioned problems, some improvements have been made in the existing technology. For example, Chinese patent CN203800837U discloses a "thyristor dual-trigger pulse rectifier controller," which uses a digital signal processor (DSP) in conjunction with a synchronous signal conditioning circuit and a pulse amplification and isolation circuit to achieve digital control of the thyristor. Furthermore, Chinese patent CN96227066.0 discloses a "digital phase-locked loop controlled thyristor universal trigger," which achieves trigger control of the thyristor through digital control units such as digital selection, frequency division, and phase-locked loop. However, these solutions still have the following shortcomings: First, the problem of a single fiber channel driving multiple thyristors has not been solved, and the number of fibers has not been reduced. Secondly, the width of the trigger pulse and feedback pulse still depends in part on hardware parameters, and long-term stability needs to be improved. Third, the identification of the trigger status of each thyristor requires a complex communication protocol, resulting in significant system overhead.

[0006] Therefore, there is an urgent need for a thyristor triggering method and device that can drive two anti-parallel thyristors through a single downlink optical fiber, with the pulse width precisely adjustable digitally and the feedback status directly identifiable by the pulse width, in order to solve the technical problems of pulse width temperature drift aging, large number of optical fibers, and complex status identification in traditional analog schemes. Summary of the Invention

[0007] The purpose of this invention is to provide a single-input dual-output thyristor triggering method and device based on digital control, in order to solve the technical problems in existing thyristor triggering circuits, such as unstable pulse width due to RC temperature drift and aging, the large number of optical fibers required because a single downlink optical fiber can only drive one thyristor, and the reliance on complex communication protocols for thyristor state identification. This invention configures pulse width parameters through digital control chip software, combines positive and negative half-cycle sampling and judgment, realizes the driving of two anti-parallel thyristors by a single optical fiber, and achieves direct state identification through differentiated feedback pulse width.

[0008] To achieve the above objectives, the present invention provides the following technical solution: A single-input dual-output thyristor triggering method based on digital control, comprising: Power is obtained from AC power through positive and negative power extraction circuits. The power extraction circuit is used to power the digital control chip, sampling circuit, isolation circuit and trigger module. The positive sampling circuit and the negative sampling circuit respectively collect the anode-cathode voltage of the first thyristor and the second thyristor in the anti-parallel thyristor valve group, and convert the collected anode-cathode voltage into a square wave signal synchronized with the AC power supply, and output it to the input terminal of the digital control chip respectively. The digital control chip receives the downlink fiber optic double pulse signal from the upper-level controller, and determines the current half-cycle of the AC power supply voltage based on the current square wave signal level output by the sampling circuit, and selects to turn on the first thyristor or the second thyristor. After determining that the corresponding thyristor should be triggered, the digital control chip outputs an adjustable-width trigger pulse to the gate of the thyristor through the trigger module corresponding to the thyristor, thereby controlling the thyristor to conduct. After the trigger pulse is sent, the digital control chip sends an adjustable feedback pulse with a different width than the trigger pulse to the upper-layer controller via the uplink optical fiber to report the trigger status.

[0009] The width of the trigger pulse, the width of the feedback pulse, and the pulse width and pulse interval of the downlink fiber optic double pulse signal are all configurable parameters.

[0010] The energy extraction circuit includes a positive energy extraction branch and a negative energy extraction branch. The positive and negative energy extraction branches share a common ground and obtain energy from the positive and negative half-cycles of the AC power supply, respectively, and output 60V DC voltage, 10V DC voltage, and 5V DC voltage. The 60V DC voltage and 10V DC voltage share a common ground with the AC power supply, while the 5V DC voltage is isolated from the AC power supply.

[0011] The sampling circuit converts the AC power supply voltage into a 50Hz square wave signal; The square wave signal output by the positive sampling circuit is 180° out of phase with the square wave signal output by the negative sampling circuit. The digital control chip determines the time interval during which the trigger pulse can be output based on the high-level range of the square wave signal.

[0012] The trigger module is used to amplify the milliampere-level control signal output by the digital control chip into a 7~8A thyristor gate trigger current.

[0013] When the digital control chip detects the downlink fiber double pulse signal and the current sampling square wave is at a high level, it outputs a trigger pulse only once in the current half-cycle to trigger the thyristor that is turned on in the corresponding half-cycle. The other thyristor that is not turned on does not output a trigger signal.

[0014] The feedback pulse includes a first feedback pulse and a second feedback pulse, the widths of which are denoted as E and F, respectively. The trigger pulse includes a first trigger pulse and a second trigger pulse, the widths of which are denoted as C and D, respectively. The values ​​of E and C are different, and the values ​​of F and D are different, so that the upper-level controller can identify the currently triggered thyristor and its operating status through the pulse width.

[0015] A single-input dual-output thyristor triggering device based on digital control includes a power supply module, a sampling module, a digital control module, a triggering module, and a communication module; The power supply module is used to draw power from AC power and supply power to the digital control chip, sampling circuit, isolation circuit and trigger module; The sampling module includes a positive sampling circuit and a negative sampling circuit, which are respectively connected to the anode and cathode of the first thyristor and the second thyristor in the anti-parallel thyristor valve group, and are used to collect the anode-cathode voltage signals of the first thyristor and the second thyristor, and convert the collected anode-cathode voltage signals into square wave signals. The digital control module includes a digital control chip, which is connected to the output of the sampling module and receives a dual-pulse signal sent by the upper-level controller through a downlink optical fiber. The trigger module includes a first trigger circuit and a second trigger circuit, which are respectively connected to the gates of the first thyristor and the second thyristor, and the output trigger pulse is controlled by a digital control chip. The communication module includes uplink and downlink optical fibers, used to receive dual-pulse commands from the upper-layer controller and send feedback pulses to the upper-layer controller; The digital control chip controls the operation of the trigger module according to any one of claims 1 to 7.

[0016] The power supply module includes an energy harvesting circuit and an isolation power supply. The energy harvesting circuit includes a positive energy harvesting branch and a negative energy harvesting branch. The output terminals of both the positive and negative energy harvesting branches are connected to the input terminal of the isolation power supply. The positive and negative power extraction branches have the same structure, both including a limiting circuit, a supporting current limiting circuit, and a 60-10V voltage conversion circuit connected in sequence. The current limiting circuit includes resistors R1, R2, R3, and R4, capacitors C14, C15, C16, C17, and C13, and inductor L4. Capacitor C14 is connected in parallel with the limiting circuit, and resistors R1 and inductor L4 are connected in series. Capacitor C13 is connected in parallel with the 60-10V voltage conversion circuit; One end of resistor R1 is connected to one end of capacitor C14; One end of inductor L4 is connected to one end of capacitor C13; The input terminal of the forward power extraction branch is connected to the output terminal of the thyristor power circuit; The input terminal of the negative energy extraction branch is connected to the output terminal of the thyristor power circuit. Resistors R1, R2, R3, and R4 are connected in parallel; Capacitors C14, C15, C16, and C17 are connected in parallel.

[0017] In thyristor power circuits: The first anti-parallel thyristor group includes a first thyristor (Q1) and a fourth thyristor (Q4). The anode of the first thyristor (Q1) is connected to the first terminal (L) of the AC power supply, and the anode of the fourth thyristor (Q4) is connected to the second terminal (N) of the AC power supply. The second anti-parallel thyristor group includes a second thyristor (Q2) and a third thyristor (Q3). The cathode of the second thyristor (Q2) is connected to the first terminal (L) of the AC power supply, and the cathode of the third thyristor (Q3) is connected to the second terminal (N) of the AC power supply. Resistor R3 is connected in series with capacitor C1. One end of resistor R3 is connected to the first terminal (L) of the AC power supply. One end of capacitor C1 provides V1+ voltage to the forward power supply branch. The cathode of the first thyristor (Q1) and the anode of the second thyristor (Q2) both provide V1- voltage to the forward power supply branch. Resistor R4 is connected in series with capacitor C2. One end of capacitor C2 is connected to the second terminal (N) of the AC power supply. One end of resistor R4 provides V2+ voltage to the negative power extraction branch. The cathode of the first thyristor (Q1) and the anode of the third thyristor (Q3) both provide V2- voltage to the negative power extraction branch. The gate of the first thyristor (Q1) provides the T+ voltage to the first trigger circuit, and the gate of the fourth thyristor (Q4) provides the T- voltage to the second trigger circuit. The first terminal (L) of the AC power supply provides the AK1 voltage to the sampling circuit through resistor R11, and the second terminal (N) of the AC power supply provides the AK2 voltage to the sampling circuit through resistor R12.

[0018] Compared with the prior art, the beneficial effects of the present invention are: 1. The trigger pulse width and feedback pulse width are configured by software using a digital control chip. All pulse width parameters (A, B, C, D, E, F) are generated by the digital control chip through software configuration, without relying on any analog timing components such as resistors and capacitors. Compared with the traditional analog solution that uses a single-pulse trigger chip in conjunction with an RC circuit to determine the pulse width, this fundamentally avoids the problem of pulse width changes caused by capacitor value temperature drift and long-term capacitance decay. It ensures the long-term stability and consistency of the trigger pulse and feedback pulse width, and eliminates the risk of misjudgment of the status of the upper-level circuit due to pulse width changes. 2. By acquiring voltage signals of the positive and negative half-cycles of the AC power supply through positive and negative sampling circuits respectively, the digital control chip determines the current half-cycle based on the level of the sampled square wave and selectively turns on the corresponding thyristor. This enables the driving of two anti-parallel thyristors (Q1 and Q4, or Q2 and Q3) through a single downlink optical fiber. Compared with the traditional technology where one downlink optical fiber can only drive one thyristor, this invention reduces the number of optical fibers by half, and also reduces the number of supporting components such as optical fiber transceiver circuits and optical interfaces, significantly reducing material costs and construction complexity. 3. The feedback pulses include the first feedback pulse, namely the positive thyristor feedback pulses (Q1 and Q3), and the second feedback pulse, namely the positive thyristor feedback pulses (Q2 and Q4). Their widths are denoted as E and F, respectively. The values ​​of E and F are different, and E is different from the corresponding trigger pulse width C, while F is different from the corresponding trigger pulse width D. Through the above differentiation settings, the upper-level controller only needs to detect the width of the feedback pulse to directly identify which thyristor is currently being triggered and its operating status. There is no need to rely on additional communication protocols or address codes, which simplifies the system communication overhead and improves the real-time performance and reliability of status identification. 4. Energy is directly extracted from the AC power supply through the energy extraction circuit, which includes a positive energy extraction branch and a negative energy extraction branch, respectively extracting energy from the positive and negative half-cycles of the AC power supply. The two energy extraction branches share a common ground and can continuously supply power to the internal circuit. The energy extraction circuit generates three DC voltages: 60V for the trigger circuit, 10V for the sampling circuit, fiber optic communication circuit and primary side power supply of the isolation chip, and 5V for the secondary side power supply of the isolation chip and digital control chip. Among them, 60V and 10V share a common ground with the AC power supply, while 5V is isolated from the AC power supply. The isolation power chip achieves effective electrical isolation between the digital control section and the power section, ensuring the safe operation of the low-voltage control circuit in high-voltage and high-power application scenarios. 5. The power supply module’s energy extraction circuit adopts the same structural design for both the positive and negative energy extraction branches, both of which include a limiting circuit, a current limiting circuit, and a 60-10V voltage conversion circuit connected in sequence. In the limiting circuit, the limiting structure composed of inductor L3, diode D1, and thyristor V2, along with the trigger detection network composed of Zener diode D2 and resistors R7 and R8, quickly conducts thyristor V2 to short-circuit the input terminal when the input voltage exceeds 60V. The parallel-connected energy storage capacitors C14~C17 supply power to the subsequent stage, achieving a precise 60V voltage regulation and limiting function. In the current limiting circuit, the parallel-connected resistors R1, R2, R5, and R6 are connected in series with inductor L4, and with capacitor C13 for filtering, provide a stable input to the subsequent LDO circuit, ensuring stable output of the power supply module during the period when V2 is short-circuited. At the same time, the 60-10V voltage conversion circuit adopts an LDO voltage regulation structure composed of transistor V1 and its surrounding components, with diode D4 clamping the emitter voltage of transistor V1 and diode D6 preventing reverse voltage flow of the output. The circuit structure is simple, the conversion efficiency is high, and the output stability is good. 6. The isolated power supply uses an isolation chip U12. Its Vin+ pin is connected to the +10V input through parallel-connected input filter capacitors C20, C21, and C22, and the Vin- pin is connected to the primary side ground GND1. The Vo+ pin outputs a +5V voltage, and the Vo- pin is connected to the secondary side ground GND. The output terminal is connected in parallel with filter capacitors C23, C24, and C33. Through the above structure, the isolated power supply converts the primary side +10V voltage to a +5V voltage that is completely isolated from the AC power supply. The primary side ground GND1 and the secondary side ground GND are mutually isolated, realizing complete electrical isolation between the low-voltage control circuit and the high-voltage power circuit, effectively ensuring the safe and reliable operation of the digital control chip and sampling circuit in a high-voltage and strong electromagnetic environment. 7. The sampling module includes a positive sampling circuit and a negative sampling circuit. The two sampling circuits have the same structure and are independent of each other. The positive sampling circuit is connected to the anode of the first thyristor Q1 and the cathode of the second thyristor Q2 through resistor R11 to collect the positive half-cycle voltage signal. The negative sampling circuit is connected to the anode of the fourth thyristor Q4 and the cathode of the third thyristor Q3 through resistor R12 to collect the negative half-cycle voltage signal. Both sampling circuits convert the AC power supply voltage into a 50Hz square wave signal through a resistor divider and comparator. The output signals are 180° out of phase and are connected to different input terminals of the digital control chip through digital isolation chips. The above structure enables the digital control chip to accurately identify the positive and negative half-cycles of the AC power supply and only allows the output of trigger pulses when the corresponding square wave signal is high, effectively avoiding accidental triggering. 8. The thyristor power circuit adopts a symmetrical topology of a first pair of anti-parallel thyristor groups (Q1 and Q4) and a second pair of anti-parallel thyristor groups (Q2 and Q3). The anode of the first thyristor Q1 is connected to the first terminal L of the AC power supply, and the anode of the fourth thyristor Q4 is connected to the second terminal N of the AC power supply. The cathodes of Q1 and Q4 are connected together. The cathode of the second thyristor Q2 is connected to the L terminal, and the cathode of the third thyristor Q3 is connected to the N terminal. The anodes of Q2 and Q3 are connected together. Resistor R3 and capacitor C1 are connected in series to form an RC snubber circuit for Q1, and resistor R4 and capacitor C2 are connected in series to form an RC snubber circuit for Q4, used to absorb thyristor turn-off overvoltage. The gate of the first thyristor Q1 receives the trigger signal through the trigger circuit T1 terminal, and the gate of the fourth thyristor Q4 receives the trigger signal through the trigger circuit T2 terminal. The above topology, combined with the positive / negative half-cycle judgment logic of the digital control chip, realizes the function of driving two diagonally anti-parallel thyristors through a single downlink optical fiber. The structure is simple and highly reliable. 9. The thyristor power circuit adopts a symmetrical topology of the first pair of anti-parallel thyristor groups (Q1 and Q4) and the second pair of anti-parallel thyristor groups (Q2 and Q3). The anode of the first thyristor Q1 is connected to the first terminal L of the AC power supply, and the anode of the fourth thyristor Q4 is connected to the second terminal N of the AC power supply. The cathodes of Q1 and Q4 are connected together. The cathode of the second thyristor Q2 is connected to the L terminal, and the cathode of the third thyristor Q3 is connected to the N terminal. The anodes of Q2 and Q3 are connected together. Resistor R3 and capacitor C1 are connected in series to form the RC snubber circuit of Q1, and resistor R4 and capacitor C2 are connected in series to form the RC snubber circuit of Q4, which is used to absorb the thyristor turn-off overvoltage. The gate of the first thyristor Q1 receives the trigger signal through the trigger circuit T1 terminal, and the gate of the fourth thyristor Q4 receives the trigger signal through the trigger circuit T2 terminal. The above topology, combined with the positive / negative half-cycle judgment logic of the digital control chip, realizes the function of driving two diagonally anti-parallel thyristors through a single downlink optical fiber. The structure is simple and highly reliable. 10. The system uses a digital control chip as the core control unit and fiber optic communication to achieve isolated communication with the upper-level controller. The overall circuit structure is simple and the number of components is small, which reduces the probability of system failure. All pulse parameters can be configured online through the digital control chip. It can adapt to the triggering requirements of different specifications of thyristors without replacing hardware, and has good versatility and maintainability. Attached Figure Description

[0019] Figure 1 This is a topology diagram of a single-input dual-output thyristor triggering device based on digital control.

[0020] Figure 2 This is the topology diagram of the energy extraction circuit.

[0021] Figure 3 This is a diagram of the external connection topology of the thyristor trigger circuit.

[0022] Figure 4 This is a topology diagram of the sampling circuit.

[0023] Figure 5 This is the topology diagram of the trigger circuit.

[0024] Figure 6 This is a timing diagram for triggering a single-input dual-output thyristor based on digital control. Detailed Implementation

[0025] The present invention will now be described in detail with reference to the accompanying drawings, but it should be noted that the implementation of the present invention is not limited to the following embodiments.

[0026] The following embodiments are implemented based on the technical solution of the present invention, providing detailed implementation methods and specific operation processes. However, the scope of protection of the present invention is not limited to the following embodiments. Unless otherwise specified, the methods used in the following embodiments are conventional methods.

[0027] Example 1:

[0028] A single-input dual-output thyristor triggering device based on digital control includes a power supply module, a sampling module, a digital control module, a triggering module, and a communication module.

[0029] I. Power Supply Module See Figure 1 , Figure 2 The power supply module is used to draw power from AC power and to supply power to the digital control chip, sampling circuit, isolation circuit and trigger circuit.

[0030] The power supply module includes an energy harvesting circuit and an isolation power supply; (a) Energy harvesting circuit The power extraction circuit includes a positive power extraction branch and a negative power extraction branch. Both branches have identical structures, comprising a limiting circuit, a current limiting circuit, and a 60-10V voltage conversion circuit connected in sequence. The outputs of both the positive and negative power extraction branches are connected to the input of an isolation power supply, which provides a +5V power supply.

[0031] 1. Limiting circuit The limiting circuit includes inductor L3, diodes D1 and D3, Zener diode D2, thyristor V2, resistor R8, resistor R7, and capacitor C18.

[0032] One end of inductor L3, the cathode of Zener diode D2, and the cathode of diode D3 are connected to the input terminal (V1+) of the current limiting circuit. The other end of inductor L3 is connected to the anode of diode D1 and the anode of thyristor V2, respectively. The cathode of diode D1 is connected to resistor R1, which supports the current limiting circuit.

[0033] The cathode of Zener diode D2, the other end of resistor R8, the other end of capacitor C18, and the anode of diode D3 are connected to V1-. Zener diode D2 is connected in series with resistor R8. Resistor R7 is connected between the connection point of Zener diode D2 and resistor R8 and the gate of thyristor V2. The connection point of Zener diode D2 and resistor R8 is also connected to one end of capacitor C18.

[0034] The working principle of the limiting circuit is as follows: As the voltage at terminals V1+ and V1- rises from 0V to 60V, the limiting circuit does not operate, and the subsequent energy storage capacitors C14-C17 charge. When the voltage reaches 60V, C14-C17 charge to 60V. If the voltage continues to rise above 60V, Zener diode D2 breaks down, triggering thyristor V2 to conduct through resistor R7, shorting the input terminals V1+ and V1-, and ceasing power supply to the subsequent stage. The subsequent circuit is then powered by the energy storage capacitors C14-C17. When the voltage drops below 60V, thyristor V2 turns off, and C14-C17 resume charging. Diode D1 prevents current backflow, and diode D3 provides a reverse current discharge path. Through this process, the conversion from AC voltage to 60V DC voltage is completed.

[0035] 2. Support current limiting circuit The current limiting circuit includes resistors R1, R2, R5, and R6, capacitors C14, C15, C16, C17, and C13, and inductor L4.

[0036] Capacitor C14 is connected in parallel with the limiting circuit; resistor R1 is connected in series with inductor L4; capacitor C13 is connected in parallel with the 60-10V voltage conversion circuit, with the other end of capacitor C13 connected to ground (i.e., +60V reference ground); one end of resistor R1 is connected to one end of capacitor C14; one end of inductor L4 is connected to one end of capacitor C13; the input terminal of the positive power extraction branch is connected to the first output terminal of the thyristor power circuit; the input terminal of the negative power extraction branch is connected to the second output terminal of the thyristor power circuit; resistors R1, R2, R5, and R6 are connected in parallel; capacitors C14, C15, C16, and C17 are connected in parallel. Resistors R1, R2, R5, and R6 act as current limiters, while inductor L4 and capacitor C13 act as filters.

[0037] 3. 60-10V voltage conversion circuit The 60-10V voltage conversion circuit includes resistor R3, resistor R4, transistor V1, Zener diode D5, diode D4, diode D6, and capacitor C19.

[0038] The +60V input terminal is connected to one end of resistor R3, one end of resistor R4, and one end of inductor L4 supporting the current limiting circuit. The anode of Zener diode D5, the cathode of capacitor C19, and capacitor C13 supporting the current limiting circuit are connected to ground (i.e., the +60V reference ground). The cathode of diode D6 is connected to the input of isolation chip U12 of the isolation power supply. Isolation chip U12 uses LM139. Resistor R3 and Zener diode D5 are connected in series. The connection between resistor R3 and Zener diode D5 is connected to the base of transistor V1. The connection between resistor R3 and Zener diode D5 is also connected to the cathode of diode D4. The emitter of transistor V1 (i.e., the +10V output terminal) is connected to the anode of diode D4, the anode of capacitor C19, and the anode of diode D6, respectively. The collector of transistor V1 is connected to the other end of resistor R4. The other end of capacitor C19 is connected to ground (i.e., the +60V reference ground).

[0039] Transistor V1 and its surrounding components (R3, R4, D5) constitute an LDO voltage regulator circuit, converting 60V DC voltage into a stable 10V DC voltage. Zener diode D5 provides a reference voltage, diode D4 prevents reverse voltage from flowing back to the output, diode D6 provides current limiting protection for Zener diode D5, and capacitor C19 filters the +10V output.

[0040] The overall output of the power extraction circuit is as follows: 60V DC voltage powers the trigger circuit, 10V DC voltage powers the sampling circuit, fiber optic communication circuit and the primary side of the isolation chip, and 5V DC voltage powers the secondary side of the isolation chip and the digital control chip, thereby achieving high and low voltage isolation.

[0041] (ii) Isolated power supply The isolated power supply includes capacitors C20, C21, C22, C23, C24, and C33, and isolation chip U12.

[0042] The +10V input terminal is connected to one end of capacitor C20, one end of capacitor C21, one end of capacitor C22, and pin 16 of isolation chip U12. The other ends of capacitors C20, C21, and C22 are all connected to GND1 (primary ground). Pin 9 of isolation chip U12 is connected to one end of capacitor C23, C24, and C33, and provides a +5V output. Pin 10 of isolation chip U12 is connected to the other ends of capacitors C23, C24, and C33, and is connected to GND (secondary ground).

[0043] U12 is an isolation power supply chip used to convert the primary side +10V voltage to a +5V voltage isolated from the AC power supply. C20, C21, and C22 are input-side filter capacitors, and C23, C24, and C33 are output-side filter capacitors. GND1 is the primary side ground, and GND is the secondary side ground; the two are isolated from each other.

[0044] II. Thyristor Power Circuit See Figure 3 In thyristor power circuits: The first pair of anti-parallel thyristor groups includes a first thyristor (Q1) and a fourth thyristor (Q4). The anode of the first thyristor (Q1) is connected to the first terminal (L) of the AC power supply, and the anode of the fourth thyristor (Q4) is connected to the second terminal (N) of the AC power supply. The second pair of anti-parallel thyristor groups includes a second thyristor (Q2) and a third thyristor (Q3). The cathode of the second thyristor (Q2) is connected to the first terminal (L) of the AC power supply, and the cathode of the third thyristor (Q3) is connected to the second terminal (N) of the AC power supply.

[0045] Resistor R3 is connected in series with capacitor C1. One end of resistor R3 is connected to the first terminal (L) of the AC power supply. One end of capacitor C1 provides V1+ voltage to the positive power supply branch. The cathode of the first thyristor (Q1) and the anode of the second thyristor (Q2) both provide V1- voltage to the positive power supply branch. Resistor R4 is connected in series with capacitor C2. One end of capacitor C2 is connected to the second terminal (N) of the AC power supply. One end of resistor R4 provides V2+ voltage to the negative power supply branch. The cathode of the first thyristor (Q1) and the anode of the third thyristor (Q3) both provide V2- voltage to the negative power supply branch.

[0046] The gate of the first thyristor (Q1) provides the T+ voltage to the trigger circuit, and the gate of the fourth thyristor (Q4) provides the T- voltage to the trigger circuit; the first terminal (L) of the AC power supply provides the AK1 voltage to the sampling circuit through resistor R11, and the second terminal (N) of the AC power supply provides the AK2 voltage to the sampling circuit through resistor R12.

[0047] The positive energy input terminals V1+ and V1- and the negative energy input terminals V2+ and V2- of the energy harvesting circuit are 180° out of phase in AC, respectively harvesting energy from the positive and negative half-waves of the L and N voltages.

[0048] III. Sampling Module The sampling module includes a positive sampling circuit and a negative sampling circuit. The positive and negative sampling circuits have the same structure, see [link to documentation]. Figure 4Each component includes a resistor R22, a diode D21, and a comparator U1. The cathode of diode D21 and one end of resistor R22 are connected to the negative input terminal of comparator U1. The negative input terminal of comparator U1 is connected to the positive input terminal of comparator U1. The output terminal of comparator U1 is connected to the digital control chip. The cathode of diode D21 is connected to the anode of the first thyristor (Q1) and the cathode of the second thyristor (Q2) in the thyristor power circuit through resistor R11 of the forward sampling circuit. The cathode of diode D21 is connected to the anode of the fourth thyristor (Q4) and the cathode of the third thyristor (Q3) in the thyristor power circuit through resistor R12 of the negative sampling circuit.

[0049] The sampling circuit converts the AC power supply voltage into a 50Hz square wave signal through a resistor divider and comparator. The square wave signal output by the positive sampling circuit is 180° out of phase with the square wave signal output by the negative sampling circuit. The digital control chip determines the time interval for outputting the trigger pulse based on the high-level range of the square wave signal.

[0050] When the AC power supply L and N terminals are positive voltages, the positive sampling circuit samples through the AK1 terminal. When the sampling voltage reaches the threshold value, the sampling circuit level flips from low to high; when the voltage is below the threshold value, the sampling circuit level flips from high to low. When the AC power supply L and N terminals are negative voltages, the negative sampling circuit samples through the AK2 terminal, and the operation process is the same.

[0051] The sampling circuit is connected to different pins of the digital control chip through a digital isolation chip to achieve high and low voltage isolation.

[0052] IV. Trigger Module The trigger module includes a first trigger circuit and a second trigger circuit. The first trigger circuit and the second trigger circuit have the same structure, see [link to documentation]. Figure 5Each transistor includes V31, V32, V33, resistors R31-R36, Zener diode D31, diodes D32-D35, and capacitor C33. The base of transistor V33 is connected to the digital control chip via a corresponding isolation chip. The base of transistor V33 is also connected to one end of resistor R35. The other end of resistor R35, the cathode of diode D35, and the other end of resistor R36 are connected to V1- / V2- (the reference ground for different trigger circuits). The emitter of transistor V33 is connected to the anode of diode D35. The collector of transistor V33 is connected to one end of resistor R34. The other end of 34 is connected to resistor R33, the anode of Zener diode D31, and the base of transistor V31. The collector of transistor V31 is connected to the base of transistor V32, the anode of diode D34, and the cathode of diode D33. The emitter of transistor V32 is connected to the anode of diode D33 and the anode of diode D32. The cathode of diode D32 provides T+ / T- voltage. The collector of diode D32 is connected to the emitter of diode D31, the cathode of transistor V33, and one end of resistor R31. The +60V input terminal is connected to resistor R31, resistor R33, resistor R33, and the cathode of Zener diode D31.

[0053] The trigger circuit is connected to the digital control chip through an isolation chip, which can amplify the milliampere-level control signal output by the digital control chip into a 7~8A thyristor gate trigger current.

[0054] The T+ output terminal of the first trigger circuit is connected to the gate of the first thyristor (Q1), and the T- output terminal of the second trigger circuit is connected to the gate of the fourth thyristor (Q4).

[0055] V. Digital Control Module The digital control module includes a digital control chip, specifically the TMS320F28335 DSP chip (or an STM32F407 series ARM chip, or an EMP1270 series CPLD chip). This chip features high operating speed and high PWM output accuracy, making it suitable for precise control of thyristor trigger pulses.

[0056] The digital control chip is connected to the output of the sampling module and receives the dual-pulse signal sent by the upper-level controller through the downlink optical fiber. Based on the level of the square wave signal output by the sampling circuit, the digital control chip determines the current half-cycle of the AC power supply voltage, and when it detects the downlink optical fiber dual-pulse signal and the current sampled square wave is at a high level, it outputs the corresponding trigger pulse for the thyristor.

[0057] After the trigger pulse is sent, the digital control chip sends a feedback pulse to the upper-level controller via the uplink optical fiber. The width of the feedback pulse is different from that of the trigger pulse so that the upper-level controller can identify the currently triggered thyristor and its operating status by the pulse width.

[0058] VI. Communication Module The communication module includes uplink and downlink optical fibers, used to receive dual-pulse commands from the upper-layer controller and send feedback pulses to the upper-layer controller.

[0059] Fiber optic transmission effectively avoids interference in strong electromagnetic environments, ensuring reliable transmission of trigger signals. Compared to traditional analog schemes where one downlink fiber can only drive one thyristor, this device can drive two diagonally antiparallel thyristors (Q1 and Q4 or Q2 and Q3) with a single downlink fiber, halving the number of fibers and significantly reducing system costs.

[0060] By implementing software configuration of the trigger pulse width and feedback pulse width using a digital control chip, the pulse width variation problems caused by temperature drift and aging of resistors and capacitors in traditional analog solutions are avoided, ensuring the long-term stability of the feedback pulse width. Simultaneously, the topology design of driving two anti-parallel thyristors with a single downlink optical fiber reduces system cost. The square wave signal of the sampling circuit is synchronized with the AC power supply, achieving precise zero-crossing triggering of the thyristors.

[0061] A single-input dual-output thyristor triggering method based on digital control, comprising: S1, Power Supply Electrical energy is obtained from AC power through positive and negative power extraction circuits. The power extraction circuit is used to power the digital control chip, sampling circuit, isolation circuit and trigger circuit. The energy harvesting circuit includes a positive energy harvesting branch and a negative energy harvesting branch, which share a common ground. They harvest energy from the positive and negative half-cycles of the AC power supply, respectively, and output 60V DC, 10V DC, and 5V DC voltages. The 60V and 10V DC voltages share a common ground with the AC power supply, while the 5V DC voltage is isolated from the AC power supply. The 60V DC voltage powers the trigger circuit, the 10V DC voltage powers the sampling circuit, the fiber optic communication circuit, and the primary side of the isolation chip, and the 5V DC voltage powers the secondary side of the isolation chip and the digital control chip, thus achieving high and low voltage isolation.

[0062] Taking positive power extraction as an example, the power extraction circuit operates as follows: During the positive half-cycle of the AC power supply, as the voltage rises from 0V to 60V, the limiting circuit does not operate, and the energy storage capacitors C14~C17 charge. When the voltage reaches 60V, C14~C17 charge to 60V. When the voltage continues to rise above 60V, the limiting circuit activates, and thyristor V2 conducts, short-circuiting the input terminal and ceasing to supply power to the subsequent stage. The subsequent stage circuit is powered by the energy storage capacitors C14~C17. When the voltage drops below 60V, the limiting circuit resumes operation and continues charging C14~C17. This process is repeated to complete the conversion from AC voltage to 60V DC voltage. Resistors R1, R2, R5, and R6 limit current, while inductor L4 and capacitor C13 act as filters. Transistor V1 and its surrounding components form an LDO circuit, converting the 60V DC voltage to 10V DC voltage.

[0063] S2, Sampling The positive sampling circuit and the negative sampling circuit respectively collect the anode-cathode voltage of the first thyristor (Q1) and the second thyristor (Q4) in the anti-parallel thyristor valve group, and convert the collected anode-cathode voltage into a square wave signal synchronized with the AC power supply, and output it to the input terminal of the digital control chip respectively.

[0064] The sampling circuit converts the AC power supply voltage into a 50Hz square wave signal through a resistor divider and comparator. The square wave signal output by the positive sampling circuit is 180° out of phase with the square wave signal output by the negative sampling circuit. The digital control chip determines the time interval for outputting the trigger pulse based on the high-level range of the square wave signal.

[0065] The forward sampling circuit is connected to the anode (AK1 terminal) of the first thyristor Q1 through resistor R1, and the negative sampling circuit is connected to the cathode (AK2 terminal) of the second thyristor Q4 through resistor R2. When the AC power supply voltage is in the positive half-cycle, the forward sampling circuit outputs a high-level square wave signal, and the negative sampling circuit outputs a low-level square wave signal; when the AC power supply voltage is in the negative half-cycle, the forward sampling circuit outputs a low-level square wave signal, and the negative sampling circuit outputs a high-level square wave signal. The digital control chip only allows the output of a trigger pulse during the period when the corresponding square wave signal is high.

[0066] S3, Judgment and Choice The digital control chip receives the downlink fiber optic double pulse signal from the upper-level controller and determines the current half-cycle of the AC power supply voltage based on the square wave signal level output by the current sampling circuit, and selects to turn on the first thyristor Q1 or the second thyristor Q4.

[0067] When the digital control chip detects the downlink fiber double pulse signal and the current sampled square wave is at a high level, it outputs a trigger pulse only once in the current half-cycle to trigger the thyristor that is turned on in the corresponding half-cycle. The other thyristor that is not turned on does not output a trigger signal.

[0068] Taking the first thyristor Q1 and the fourth thyristor Q4 in the driving thyristor valve group as an example: When the L and N terminals of the AC power supply are in positive direction, the forward sampling circuit samples through the AK1 terminal. When the sampling voltage reaches the threshold value, the sampling circuit level flips from low to high; when the voltage is below the threshold value, the sampling circuit level flips from high to low. Based on this, the digital control chip determines that it is currently in the positive half-cycle, at which point the first thyristor Q1 should be triggered.

[0069] S4, Trigger Pulse Output After determining that the corresponding thyristor should be triggered, the digital control chip outputs an adjustable-width trigger pulse to the gate of the thyristor through the trigger circuit corresponding to the thyristor, thereby controlling the thyristor to conduct.

[0070] The trigger circuit is connected to the digital control chip through an isolation chip. It is used to amplify the milliampere-level control signal output by the digital control chip into a 7~8A thyristor gate trigger current to ensure reliable thyristor conduction.

[0071] See Figure 6 When the downlink fiber double pulse signal is detected during the high level of the positive sampling circuit, the digital control chip sends a trigger pulse to the gate of the first thyristor Q1 through the trigger circuit T1 terminal, and the pulse width is denoted as C (in μs); when the downlink fiber double pulse signal is detected during the high level of the negative sampling circuit, the digital control chip sends a trigger pulse to the gate of the fourth thyristor Q4 through the trigger circuit T2 terminal, and the pulse width is denoted as D (in μs).

[0072] S5, Feedback Pulse Transmission After the trigger pulse is sent, the digital control chip sends an adjustable feedback pulse with a different width than the trigger pulse to the upper-layer controller via the uplink optical fiber to report the trigger status.

[0073] The width of the trigger pulse, the width of the feedback pulse, and the pulse width and pulse interval of the downlink fiber optic double pulse signal are all configurable parameters.

[0074] See Figure 6The pulse width of the downlink fiber optic dual-pulse signal is denoted as A (in μs), and the pulse interval is denoted as B (in μs). Feedback pulses include a first feedback pulse and a second feedback pulse; the width of the first feedback pulse is denoted as E (in μs), and the width of the second feedback pulse is denoted as F (in μs). Trigger pulses include a first trigger pulse and a second trigger pulse; their widths are denoted as C and D (in μs), respectively. A, B, C, D, E, and F are all configurable parameters, and the values ​​of E and F, E and C, and F and D are different, so that the upper-level controller can identify the currently triggered thyristor and its operating status through the pulse width.

[0075] When the digital control chip triggers the first thyristor Q1 to conduct, it sends a feedback pulse of width E to the upper-level controller via the uplink optical fiber; when the digital control chip triggers the fourth thyristor Q4 to conduct, it sends a feedback pulse of width F to the upper-level controller via the uplink optical fiber. Since E≠F, and E≠C, F≠D, the upper-level controller can accurately identify the currently triggered thyristor number and its operating status based on the width of the received feedback pulse.

[0076] Typical parameter configuration example:

[0077] Through the above steps, this invention enables the driving of two diagonally antiparallel thyristors (Q1 and Q4 or Q2 and Q3) with a single downlink optical fiber, replacing the traditional approach where one downlink optical fiber can only drive one thyristor. This halves the number of optical fibers and significantly reduces system cost. Furthermore, since both the trigger pulse width and feedback pulse width are generated by the software configuration of the digital control chip, the pulse width variation problems caused by temperature drift and aging of resistors and capacitors in traditional analog schemes are avoided, ensuring the long-term stability of the feedback pulse width and the reliability of system communication.

Claims

1. A single-input dual-output thyristor triggering method based on digital control, comprising: Power is obtained from AC power through positive and negative power extraction circuits. The power extraction circuit is used to power the digital control chip, sampling circuit, isolation circuit and trigger module. The positive sampling circuit and the negative sampling circuit respectively collect the anode-cathode voltage of the first thyristor and the second thyristor in the anti-parallel thyristor valve group, and convert the collected anode-cathode voltage into a square wave signal synchronized with the AC power supply, and output it to the input terminal of the digital control chip respectively. The digital control chip receives the downlink fiber optic double pulse signal from the upper-level controller, and determines the current half-cycle of the AC power supply voltage based on the current square wave signal level output by the sampling circuit, and selects to turn on the first thyristor or the second thyristor. After determining that the corresponding thyristor should be triggered, the digital control chip outputs an adjustable-width trigger pulse to the gate of the thyristor through the trigger module corresponding to the thyristor, thereby controlling the thyristor to conduct. After the trigger pulse is sent, the digital control chip sends an adjustable feedback pulse with a different width than the trigger pulse to the upper-layer controller via the uplink optical fiber to report the trigger status.

2. The single-input dual-output thyristor triggering method based on digital control according to claim 1, characterized in that, The width of the trigger pulse, the width of the feedback pulse, and the pulse width and pulse interval of the downlink fiber optic double pulse signal are all configurable parameters.

3. The single-input dual-output thyristor triggering method based on digital control according to claim 1, characterized in that, The energy harvesting circuit includes a positive energy harvesting branch and a negative energy harvesting branch. The positive and negative energy harvesting branches share a common ground and obtain energy from the positive and negative half-cycles of the AC power supply, respectively, and output 60V DC voltage, 10V DC voltage, and 5V DC voltage. The 60V DC voltage and 10V DC voltage share a common ground with the AC power supply, while the 5V DC voltage is isolated from the AC power supply.

4. The single-input dual-output thyristor triggering method based on digital control according to claim 1, characterized in that: The sampling circuit converts the AC power supply voltage into a 50Hz square wave signal; The square wave signal output by the positive sampling circuit is 180° out of phase with the square wave signal output by the negative sampling circuit. The digital control chip determines the time interval during which the trigger pulse can be output based on the high-level range of the square wave signal.

5. The single-input dual-output thyristor triggering method based on digital control according to claim 1, characterized in that, The trigger module is used to amplify the milliampere-level control signal output by the digital control chip into a 7~8A thyristor gate trigger current.

6. The single-input dual-output thyristor triggering method based on digital control according to claim 1, characterized in that, When the digital control chip detects a downlink fiber double pulse signal and the current sampled square wave is at a high level, it outputs a trigger pulse only once within the current half-cycle to trigger the thyristor that is conducting in the corresponding half-cycle. The other thyristor that is not conducting does not output a trigger signal.

7. The single-input dual-output thyristor triggering method based on digital control according to claim 1, characterized in that, The feedback pulse includes a first feedback pulse and a second feedback pulse, the widths of which are denoted as E and F, respectively. The trigger pulse includes a first trigger pulse and a second trigger pulse, the widths of which are denoted as C and D, respectively. The values ​​of E and C are different, and the values ​​of F and D are different, so that the upper-level controller can identify the currently triggered thyristor and its operating status through the pulse width.

8. A single-input dual-output thyristor triggering device based on digital control for implementing the method of any one of claims 1-7, characterized in that, Includes a power supply module, a sampling module, a digital control module, a triggering module, and a communication module; The power supply module is used to obtain electrical energy from AC power and to power the digital control chip, sampling circuit, isolation circuit and trigger module; The sampling module includes a positive sampling circuit and a negative sampling circuit, which are respectively connected to the anode and cathode of the first thyristor and the second thyristor in the anti-parallel thyristor valve group, and are used to collect the anode-cathode voltage signals of the first thyristor and the second thyristor, and convert the collected anode-cathode voltage signals into square wave signals. The digital control module includes a digital control chip, which is connected to the output of the sampling module and receives a dual-pulse signal sent by the upper-level controller through a downlink optical fiber. The trigger module includes a first trigger circuit and a second trigger circuit, which are respectively connected to the gates of the first thyristor and the second thyristor, and the output trigger pulse is controlled by a digital control chip. The communication module includes uplink and downlink optical fibers, used to receive dual-pulse commands from the upper-layer controller and send feedback pulses to the upper-layer controller; The digital control chip controls the operation of the trigger module according to any one of claims 1 to 7.

9. A single-input dual-output thyristor triggering device based on digital control according to claim 8, characterized in that, The power supply module includes an energy harvesting circuit and an isolation power supply. The energy harvesting circuit includes a positive energy harvesting branch and a negative energy harvesting branch. The output terminals of both the positive and negative energy harvesting branches are connected to the input terminal of the isolation power supply. The positive and negative power extraction branches have the same structure, both including a limiting circuit, a support current limiting circuit, and a 60-10V voltage conversion circuit connected in sequence. The current limiting circuit includes resistors R1, R2, R3, and R4, capacitors C14, C15, C16, C17, and C13, and inductor L4. Capacitor C14 is connected in parallel with the limiting circuit, and resistors R1 and inductor L4 are connected in series. Capacitor C13 is connected in parallel with the 60-10V voltage conversion circuit; One end of resistor R1 is connected to one end of capacitor C14; One end of inductor L4 is connected to one end of capacitor C13; The input terminal of the forward power extraction branch is connected to the output terminal of the thyristor power circuit; The input terminal of the negative energy extraction branch is connected to the output terminal of the thyristor power circuit. Resistors R1, R2, R3, and R4 are connected in parallel; Capacitors C14, C15, C16, and C17 are connected in parallel.

10. A single-input dual-output thyristor triggering device based on digital control according to claim 8, characterized in that, In the aforementioned thyristor power circuit: The first anti-parallel thyristor group includes a first thyristor (Q1) and a fourth thyristor (Q4). The anode of the first thyristor (Q1) is connected to the first terminal (L) of the AC power supply, and the anode of the fourth thyristor (Q4) is connected to the second terminal (N) of the AC power supply. The second anti-parallel thyristor group includes a second thyristor (Q2) and a third thyristor (Q3). The cathode of the second thyristor (Q2) is connected to the first terminal (L) of the AC power supply, and the cathode of the third thyristor (Q3) is connected to the second terminal (N) of the AC power supply. Resistor R3 is connected in series with capacitor C1. One end of resistor R3 is connected to the first terminal (L) of the AC power supply. One end of capacitor C1 provides V1+ voltage to the forward power supply branch. The cathode of the first thyristor (Q1) and the anode of the second thyristor (Q2) both provide V1- voltage to the forward power supply branch. Resistor R4 is connected in series with capacitor C2. One end of capacitor C2 is connected to the second terminal (N) of the AC power supply. One end of resistor R4 provides V2+ voltage to the negative power extraction branch. The cathode of the first thyristor (Q1) and the anode of the third thyristor (Q3) both provide V2- voltage to the negative power extraction branch. The gate of the first thyristor (Q1) provides the T+ voltage to the first trigger circuit, and the gate of the fourth thyristor (Q4) provides the T- voltage to the second trigger circuit. The first terminal (L) of the AC power supply provides the AK1 voltage to the sampling circuit through resistor R11, and the second terminal (N) of the AC power supply provides the AK2 voltage to the sampling circuit through resistor R12.

Images