Packaged device

By using a stacked arrangement of light-emitting chips and optimizing the optical path in RGB packaged devices, the problem of poor light mixing effect was solved, resulting in better color uniformity and display effect.

CN123035803APending Publication Date: 2026-11-03SHENZHEN JUFEI OPTOELECTRONICS CO LTD
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Patent Information

Application Number
CN202611182946.3
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2026-08-05
Publication Date
2026-11-03

AI Technical Summary

Technical Problem

The existing RGB-type packaged devices do not have good light mixing effect, which makes it difficult to meet the needs of high-end displays, resulting in obvious color difference and poor overall picture quality when viewed at close range.

Method used

By using a stacked arrangement of light-emitting chips, the lower chip is flip-chip connected to the substrate, and the upper chip is upright-mounted. The optical path overlap is optimized through a reflective adhesive layer and a thermally conductive structure to achieve full mixing of different colors of light.

Benefits of technology

It improves the light mixing effect of the packaged device, reduces color difference, and enhances the display quality of high-end display devices.

✦ Generated by Eureka AI based on patent content.

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Abstract

The application relates to the technical field of LED packaging, in particular to a packaging device, which comprises a support and a light-emitting chip. The support comprises an insulating frame and a substrate. The substrate can conduct electricity. The insulating frame and the substrate enclose a chip mounting cavity with a side wall and a bottom surface. The light-emitting chip is arranged in the chip mounting cavity. The light-emitting chip comprises at least one lower side chip and at least one upper side chip. The lower side chip is electrically connected to the substrate in a flip-chip mode. The at least one upper side chip is arranged on the side of the lower side chip away from the substrate in a stacked mode. The upper side chip is electrically connected to the substrate in a face-up mode. The stacked lower side chip and the upper side chip can emit light of different colors. The light paths of the chips of different colors at least partially overlap, the different color lights are mixed as much as possible, the light emission effect of the packaging device is improved, and the demand of high-end display is met.
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Description

Technical Field

[0001] This application relates to the field of LED packaging technology, specifically to a packaging device. Background Technology

[0002] RGB-type packaged devices are typically used in RGB direct-view products or as backlights for high-end LCD monitors. They consist of RGB light-emitting chips (a chipset comprising red, green, and blue light-emitting chips, forming a three-color light source). Each of the three RGB chips can be individually controlled to emit light, and the packaged structure allows for mixing and modulation to create different colors. Bracket-type RGB packaged devices include a bracket, RGB light-emitting chips, and encapsulating adhesive. For the arrangement of the three color chips in an RGB light-emitting chip, possible arrangements include a triangular or linear arrangement on the corresponding substrate. When this type of structure is used as a backlight for high-end LCD displays, the RGB three-color light source needs to be mixed to create different colors. However, in reality, any single color of the RGB chip often cannot completely mix with neighboring colors to form the desired color due to the direction and distance of emission. This results in poor overall image quality and noticeable color differences when viewed up close, making it difficult to meet the requirements of high-end monitors. Summary of the Invention

[0003] This application provides a packaging device to solve the technical problem that the light mixing effect of RGB type packaging devices in the prior art is not good enough to meet the needs of high-end displays.

[0004] To achieve one of the above objectives, some embodiments of this application provide a packaging device, including: A support, comprising an insulating frame and a substrate, the substrate being conductive, the insulating frame being connected to the substrate to form a chip mounting cavity having sidewalls and a bottom surface; The light-emitting chip is disposed within the chip mounting cavity. The light-emitting chip includes at least one lower chip and at least one upper chip. The lower chip is electrically connected to the substrate by flip-chip. At least one upper chip and at least one lower chip are stacked and disposed on the side of the lower chip facing away from the substrate. The upper chip is electrically connected to the substrate by upright mounting. The stacked lower chip and the upper chip are capable of emitting light of different colors.

[0005] In some embodiments, the lower chip is disposed on the bottom surface of the chip mounting cavity, and at least one of the lower chips has a peripheral side facing the sidewall of the chip mounting cavity. A first reflective adhesive layer is provided between the peripheral side and the sidewall of the chip mounting cavity, and the first reflective adhesive layer contacts the peripheral side of the lower chip.

[0006] In some embodiments, the substrate surface of the bottom surface of the chip mounting cavity has a first groove, at least a portion of which is located between the lower chip and the sidewall of the chip mounting cavity, and the first groove has a protective layer.

[0007] In some embodiments, the protective layer within the first groove has a protruding rib protruding from the opening of the first groove, and a second reflective adhesive layer is provided between the sidewall of the chip mounting cavity and the protruding rib. One side of the second reflective adhesive layer contacts the sidewall of the chip mounting cavity, and the other side contacts the protruding rib. The first reflective adhesive layer is disposed between the protruding rib and the peripheral side surface of the lower chip, and the reflectivity of the first reflective adhesive layer and the second reflective adhesive layer is greater than the reflectivity of the insulating frame.

[0008] In some embodiments, the first reflective adhesive layer is formed by a centrifugal process, and the second reflective adhesive layer is formed by a dispensing and baking process.

[0009] In some embodiments, the rib is provided on the side of the first groove near the sidewall of the chip mounting cavity.

[0010] In some embodiments, the light-emitting chip includes at least two lower chips arranged side-by-side with a gap between them, and at least one upper chip simultaneously spans across at least two lower chips to be stacked with at least two lower chips at the same time. The light emitted by the at least two lower chips stacked with the same upper chip is of a different color.

[0011] In some embodiments, the space between two lower chips stacked with the same upper chip is filled with thermally conductive adhesive, which forms a thermally conductive structure between the upper chip and the substrate.

[0012] In some embodiments, the substrate has a second groove corresponding to the spacing between the two lower chips, the second groove being filled with a protective layer, and the packaging device further includes a third reflective adhesive layer located between the two lower chips, the third reflective adhesive layer being bonded to the protective layer in the second groove.

[0013] In some embodiments, the first groove and / or the second groove is a tapered structure.

[0014] According to the packaging device of the above embodiment, at least one upper chip and at least one lower chip are stacked, and the upper chip and the lower chip that are stacked together emit light of different colors. In this way, by stacking, the light path of the light emitted by the lower chip is at least partially overlapped with the light path of the light emitted by the upper chip, so as to achieve as much mixing as possible of different colored light and improve the display quality of the screen when the packaging device is applied to a display device. Attached Figure Description

[0015] Figure 1 This is a schematic diagram of the structure of a packaging device according to this application; Figure 2 This is a schematic diagram of another packaged device according to this application; Figure 3 This is a schematic diagram of the structure of another packaging device according to this application; Figure 4 This is a top view of a packaging device according to this application; Figure 5 This is a top view of another packaged device according to this application; Figure 6 This is a schematic diagram of the packaging process for a packaging device according to this application.

[0016] Label Explanation: 10. Support; 101. Substrate; 1011. First groove; 10111. Slot; 1012. Second groove; 102. Insulating frame; 1013. Insulating separator; 103. Chip mounting cavity; 1031. Side wall; 1032. Light outlet; 104. Thermal conductive structure; 20. Light-emitting chip; 201. First upper chip; 202. First lower chip; 203. Second lower chip; 30. Conductor; 40. First reflective adhesive layer; 50. Protective layer; 501. Rib; 60. Second reflective adhesive layer; 70. Third reflective adhesive layer. Detailed Implementation

[0017] The present invention will now be described in further detail with reference to specific embodiments and accompanying drawings. Similar elements in different embodiments are referred to by associated similar element reference numerals. In the following embodiments, many details are described to facilitate a better understanding of the invention. However, those skilled in the art will readily recognize that some features may be omitted in different situations, or may be replaced by other elements, materials, or methods. In some cases, certain operations related to the present invention are not shown or described in the specification. This is to avoid obscuring the core parts of the invention with excessive description. For those skilled in the art, detailed description of these related operations is not necessary; they can fully understand the related operations based on the description in the specification and general technical knowledge in the art.

[0018] Furthermore, the features, operations, or characteristics described in the specification can be combined in any suitable manner to form various embodiments. At the same time, the steps or actions in the method description can be rearranged or adjusted in a manner obvious to those skilled in the art. Therefore, the various orders in the specification and drawings are only for the clear description of a particular embodiment and do not imply a necessary order, unless otherwise stated that a particular order must be followed.

[0019] The serial numbers assigned to components in this document, such as "first" and "second," are used only to distinguish the described objects and have no sequential or technical meaning. The terms "connection" and "linkage" used in this invention, unless otherwise specified, include both direct and indirect connections (linkages).

[0020] For packaged devices with chips capable of emitting different colors of light, the desired light is obtained by mixing these different colors of light. Therefore, the structure of such packaged devices should, as far as possible, achieve sufficient mixing of the different colors of light emitted by the different chips. In the prior art, each chip in such packaged devices is bonded to the substrate, and the different chips are arranged side by side in the cup cavity of the support, resulting in limited uniformity of mixing of different colors of light. To improve the uniformity of mixing different colors of light in packaged devices, this application provides a packaged device that stacks chips emitting different colors of light, such that the optical paths of the chips emitting different colors of light at least partially overlap, thereby achieving as much uniform mixing of different colors of light as possible.

[0021] Please refer to Figure 1 One embodiment of this application provides a bracket-type packaging device, which includes a bracket 10 and a light-emitting chip 20.

[0022] The support 10 includes a substrate 101 and an insulating frame 102. The substrate 101 is conductive, enabling external circuitry to access the packaged device. Generally, the substrate 101 can be a metal plate or a circuit board, with the circuitry on the circuit board enabling the substrate 101 to conduct electricity.

[0023] The insulating frame 102 is molded from an insulating material, and one feasible method is through molding. The insulating frame 102 is connected to the substrate 101 to form a support 10 with a chip mounting cavity 103. Part of the substrate 101 forms the bottom surface of the chip mounting cavity 103, and part of the insulating frame 102 forms the sidewall 1031 of the chip mounting cavity 103. The molding material of the insulating frame 102 can be, but is not limited to, EMC (Epoxy Molding Compound). The EMC material has good adhesion to the substrate 101. At the same time, reflective particles can be added to the EMC material, giving it a certain reflective ability, so that the insulating frame 102 can reflect the light emitted by the light-emitting chip 20.

[0024] In this embodiment, the light-emitting chip 20 includes an upper chip and a lower chip. The lower chip is electrically connected to the substrate surface of the bottom surface of the chip mounting cavity 103 via a flip-chip connection. A flip-chip connection means that the chip's electrodes face downwards and are connected to the substrate 101, eliminating the need for wires between the chip and the substrate 101. The upper chip is stacked on the side of the lower chip facing away from the substrate 101. Since there is a distance of at least the thickness of the lower chip between the upper chip and the substrate 101, the upper chip is electrically connected to the substrate 101 via a right-side-mount connection. A right-side-mount connection means that the chip's electrodes face upwards and are electrically connected to the substrate 101 via wires 30. Furthermore, the stacked lower and upper chips can emit light of different colors, achieving at least partial overlap of the light paths of different colors, thus ensuring that the different colors are mixed as thoroughly as possible.

[0025] For details, please refer to Figure 1 The packaged device is an RGB packaged device. The light-emitting chip 20 includes a first upper chip 201 emitting red light, a first lower chip 202 emitting green light, and a second lower chip 203 emitting blue light. The first lower chip 202 and the second lower chip 203 are flip-chips, fixed to the substrate 101 as lower chips via a flip-chip die bonding process, and finally soldered together using a reflow soldering process. The first upper chip 201 is a regular chip, stacked on the side of the lower chips facing away from the substrate 101. During installation, an appropriate amount of adhesive is applied to the upper surfaces of the first lower chip 202 and the second lower chip 203 using a die bonding dispensing process, stacking and fixing the first upper chip 201 onto the first lower chip 202 and the second lower chip 203. The positive and negative electrodes of the first upper chip 201 are electrically connected to the substrate 101 via wires 30 using a wire bonding process. Finally, a complete packaged device is formed by potting or molding encapsulant.

[0026] Please refer to Figure 1 The substrate 101 has corresponding insulating separators 1013, which isolate the substrate 101 into independent conductive portions. These conductive portions are electrically connected to the lower and upper chips. Alternatively, insulating separators 1013 can be provided between adjacent lower chips. In some embodiments, refer to... Figure 2 and Figure 3 Alternatively, the insulating separator 1013 may not be provided between adjacent lower chips. Regarding the molding method of the insulating separator 1013, it can be integrally molded with the insulating frame 102. Of course, the insulating separator 1013 and the insulating frame 102 can be molded separately. In this case, the materials of the insulating separator 1013 and the insulating frame 102 can be the same or different. To reduce the obstruction of the upper chip's optical path to the lower chip, the substrate of the upper chip can be a transparent substrate.

[0027] Please continue to refer to this. Figure 1 In some embodiments, an upper chip cooperates with two lower chips. The first upper chip 201 spans the two lower chips. A part of the first upper chip 201 is stacked with the first lower chip 202, and another part is stacked with the second lower chip 203. That is, one upper chip is simultaneously stacked with two lower chips. The side of the upper chip corresponds to the middle of the two lower chips respectively. The light emitted from the side of the upper chip can also be effectively mixed with the light emitted from the lower chips, so as to achieve as full a mixture of red, blue and green light as possible.

[0028] In some implementations, the upper chip may be stacked with only one of the lower chips, and the other lower chip may be arranged side by side with only the other lower chip. For example, the first upper chip 201 may be stacked with only the first lower chip 202, and the second lower chip 203 may be arranged side by side with only the first lower chip 202.

[0029] In some implementations, reference Figure 4 and Figure 5 To ensure good light mixing, the outer periphery of the upper chip is not aligned with the outer periphery of the lower chip on the same side, and the orthographic projection outline of the upper chip on the bottom surface is located within the orthographic projection outline of the lower chip. The outer periphery of the chip refers to the side of the chip opposite to the sidewall 1031 of the chip mounting cavity 103. Specifically, when an upper chip and a lower chip are stacked vertically, the orthographic projection outline of the upper chip is located within the orthographic projection outline of the lower chip, and the upper chip is centered on the lower chip. Another example is when an upper chip is stacked with two or more lower chips, with each lower chip partially stacked and mating. A portion of the outer periphery of the upper chip is closer to the center of the packaged device than a portion of the outer periphery of the stacked lower chips, and at least a portion of the orthographic projection outline of the upper chip is located inside the orthographic projection outline of the stacked lower chips.

[0030] In this embodiment, the light emission colors of the upper and lower chips are different for at least one upper chip and at least one lower chip. Specifically, the first upper chip 201 is a green chip, the first lower chip 202 is a red chip, and the second lower chip 203 is a blue chip. The light emission colors of the first upper chip 201, the first lower chip 202, and the second lower chip 203 can be interchanged. Alternatively, the light emission colors of the first upper chip 201 and the first lower chip 202 can be the same, but the light emission color of the second lower chip 203 can be different. This invention does not specifically limit the light emission colors of the upper and lower chips, as long as at least one upper chip and at least one lower chip have different light emission colors.

[0031] In some implementations, reference Figure 1 In the cross-sectional view of the packaged device, the sidewall 1031 of the chip mounting cavity 103 is an inclined surface, and the angle between the sidewall 1031 and the substrate 101 is greater than 90° and less than or equal to 105°, so that the light irradiated onto the sidewall 1031 can be reflected towards the light outlet 1032, thereby increasing the light output of the packaged device. In some other embodiments, the sidewall 1031 is a vertical wall, and the angle between it and the substrate 101 is 90°.

[0032] In some embodiments, the packaging device further includes a first reflective adhesive layer 40 disposed within the chip mounting cavity 103. The first reflective adhesive layer 40 is disposed between the peripheral side surface of the lower chip and the sidewall 1031. One side of the first reflective adhesive layer 40 is in contact with at least the peripheral side surface of the lower chip. The maximum height of the first reflective adhesive layer 40 is not higher than the top surface of the lower chip it contacts. If light is emitted from the peripheral side surface of the lower chip toward the sidewall 1031 of the chip mounting cavity 103, this portion of light does not pass through other chips and cannot mix with the light from other chips, becoming stray light that affects the light emission effect of the packaging device. Providing the first reflective adhesive layer 40 on the chip side can reduce the amount of stray light emitted. Specifically, please refer to... Figure 1 The first reflective adhesive layer 40 covers the outer peripheral surfaces of the first lower chip 202 and the second lower chip 203 facing the sidewall 1031, reducing or eliminating stray light emission from the outer peripheral surfaces of the lower chips. Furthermore, the thickness of the first reflective adhesive layer 40 gradually decreases along the direction from the lower chip towards the insulating frame 102, forming a reflective slope. The material of the first reflective adhesive layer 40 can be one or more of the following: silicone resin or silicone doped with silicon oxide, titanium oxide, polyaniline, or titanium aluminum nitride. Preferably, the reflectivity of the first reflective adhesive layer 40 is higher than the reflectivity of the bottom surface of the chip mounting cavity 103, which can increase light reflection and improve the light extraction efficiency of the packaged device.

[0033] In some implementation methods, please refer to Figure 1 A gap exists between the first lower chip 202 and the second lower chip 203, and thermally conductive adhesive can be filled within the gap. The thermally conductive adhesive forms a thermally conductive structure 104 between the first upper chip 201 and the substrate 101, enabling efficient conduction of heat generated by the first upper chip 201 to the substrate 101 during operation. Figure 1As indicated by the middle arrow. The light-emitting chip 20 generates heat during operation. The lower chip is mounted on the substrate 101, allowing the heat generated during operation to be efficiently dissipated through the substrate 101. The heat generated by the upper chip during operation is dissipated through the thermally conductive structure 104. This efficient heat dissipation ensures the continuous and reliable operation of the light-emitting chip 20. In some embodiments, the thermally conductive adhesive forming the thermally conductive structure 104 can be the same material as the adhesive used to fix the upper chip. While the upper chip is attached to the surface of the lower chip using adhesive, the adhesive can also fill the gap between the two lower chips, forming the thermally conductive structure 104. Since the upper chip is electrically connected to the substrate 101 in a positive mounting manner, the two wires 30 can also conduct heat from the upper chip to the substrate 101, such as... Figure 1 As indicated by the middle arrow.

[0034] In this embodiment, the number of light-emitting chips 20 can be less than three, such as two, one as the upper chip and one as the lower chip. Of course, the number of chips in the light-emitting chip 20 can also be more than three, such as four, with two as upper chips and two as lower chips, stacked in a one-to-one correspondence. Alternatively, one chip can be the upper chip and three chips the lower chips, with the upper chip stacked simultaneously with the three lower chips, and each upper chip having overlapping and mating portions with the lower chips.

[0035] In some implementation methods, please refer to Figure 2 and Figure 3 The substrate 101 has a first groove 1011, at least a portion of which is located between the lower chip and the sidewall 1031 of the insulating frame 102. The opening 10111 of the first groove 1011 faces the chip mounting cavity 103, and a protective layer 50 is filled within the first groove 1011. The material forming the protective layer 50 can be the same as the material of the insulating frame 102. In this case, the protective layer 50 and the insulating frame 102 are integrally formed. Of course, the material forming the protective layer 50 can be a different material from the insulating frame 102, and no specific limitation is made here. The protective layer 50 protects the corresponding surface of the substrate 101, reducing the probability of corrosion of the substrate 101 by external substances and improving the anti-sulfurization ability of the support 10. In other words, by opening a first groove 1011 on the substrate 101 and filling the first groove 1011 with a protective layer 50, the corresponding position of the substrate 101 is protected by the protective layer 50. Based on this purpose, those skilled in the art can choose a suitable material as the protective layer 50, and there is no specific limitation on the material of the protective layer 50.

[0036] In some implementation methods, please refer to Figure 2 and Figure 3The protective layer 50 within the first groove 1011 has upwardly protruding ribs 501 extending from the groove opening 10111. The ribs 501 surround the outer periphery of the lower chip and act as a blocking structure to prevent at least a portion of the second reflective adhesive layer 60 disposed between the ribs 501 and the sidewall 1031 from flowing down to the lower chip. Since the ribs 501 constrain at least a portion of the second reflective adhesive layer 60 between the ribs 501 and the sidewall 1031, when forming the second reflective adhesive layer 60, adhesive is applied between the ribs 501 and the sidewall 1031. With the obstruction of the ribs 501, this portion of the adhesive can be prevented from flowing down to the lower chip, avoiding the second reflective adhesive layer 60 from contacting the top surface of the lower chip due to a large amount of adhesive, thus affecting the light emission from the top surface of the lower chip. In this embodiment, the ribs 501 and at least a portion of the sidewall 1031 enclose a closed space. Please refer to [reference needed]. Figure 4 It could be that the rib 501 forms a closed space around the lower chip, or please refer to... Figure 5 The two ends of the rib 501 are connected to the sidewall 1031 to form a closed space. In other embodiments, the rib 501 does not form a closed space with the sidewall 1031, but can still block the colloid. The present invention does not impose specific restrictions on the blocking structure formed by the rib 501, as long as it can prevent the second reflective adhesive layer 60 from passing over the rib 501 and covering the top surface of the lower chip.

[0037] In some embodiments, the adhesive material of the second reflective adhesive layer 60 can be one or more of the following materials: silicone resin or silicone doped with silicon oxide, titanium oxide, polyaniline, titanium aluminum nitride, etc. The reflectivity of the second reflective adhesive layer 60 is higher than that of the bottom surface of the chip mounting cavity 103. The first reflective adhesive layer 40 can be made of the same material as the second reflective adhesive layer 60. The second reflective adhesive layer 60 covers the sidewall 1031 and part of the bottom surface of the chip mounting cavity 103, enabling more light to be reflected toward the light outlet 1032. At least a portion of the second reflective adhesive layer 60 is bonded to the protective layer 50 filled in the first groove 1011. Compared to bonding with the substrate 101, the second reflective adhesive layer 60 has a stronger bond with the protective layer 50.

[0038] In some implementations, please refer to [the documentation / reference]. Figure 2 and Figure 3 The first reflective adhesive layer 40 of the encapsulated device is formed between the protrusion 501 and the peripheral side of the lower chip. One side of the first reflective adhesive layer 40 contacts the protrusion 501, and the other side contacts the peripheral side of the lower chip. In this way, the first reflective adhesive layer 40 and the second reflective adhesive layer 60 cooperate to increase the coverage area of ​​the chip mounting cavity 103, achieve better reflective effect, and improve the efficiency of light reflection to the light outlet 1032. In addition, the contact between the first reflective adhesive layer 40 and the peripheral side of the lower chip reduces or eliminates stray light emission from the peripheral side of the lower chip.

[0039] As mentioned earlier, the second reflective adhesive layer 60 needs to cover the sidewall 1031 via the rib 501. The amount of adhesive applied during the molding of the second reflective adhesive layer 60 is relatively large. The rib 501 effectively prevents the adhesive from covering the top surface of the lower chip during molding. During encapsulation, after dispensing between the rib 501 and the sidewall 1031, a baking process can be used to promote the curing of this portion of the adhesive into the second reflective adhesive layer 60. Then, adhesive for molding the first reflective adhesive layer 40 is applied to the rib 501 and the side of the lower chip. This portion of adhesive is relatively small, and after dispensing, it can be molded into the first reflective adhesive layer 40 through a centrifugal process. After centrifugation, the first reflective adhesive layer 40 forms a concave shape, lower in the middle and higher at both ends. The first reflective adhesive layer 40 covers the side of the lower chip but not the top surface, reducing light emission from the lower chip towards the sidewall 1031 of the chip mounting cavity 103. Of course, in some other embodiments, the first reflective adhesive layer 40 can also cover the bottom surface of the lower chip. Meanwhile, the centrifugation process allows the first reflective adhesive layer 40 to be laid on the bottom surface of the chip mounting cavity 103. The first reflective adhesive layer 40 is preferably made of a material with a reflectivity higher than that of the bottom surface of the chip mounting cavity 103, which can also improve the reflectivity of the bottom surface of the chip mounting cavity 103 and improve the light mixing efficiency. The combination of the second reflective adhesive layer 60 and the first reflective adhesive layer 40 effectively improves the light extraction efficiency and light mixing efficiency of the packaged device.

[0040] In some implementation methods, please refer to Figure 2 and Figure 3 The substrate 101 has a second groove 1012, which corresponds to the spacing between the two lower chips. The second groove 1012 is also filled with a protective layer 50. The packaged device may further include a third reflective adhesive layer 70 located between the two lower chips. The third reflective adhesive layer 70 is bonded to the protective layer 50 within the second groove 1012. Please refer to [reference needed]. Figure 3 In this embodiment, the third reflective adhesive layer 70 is preferably disposed between the two lower chips on the upper side where the upper chip is not stacked. The third reflective adhesive layer 70 can be formed simultaneously with the first reflective adhesive layer 40, that is, the third reflective adhesive layer 70 can be formed with the same material as the first reflective adhesive layer 40, further improving the light extraction efficiency of the packaged device.

[0041] In some implementation methods, please refer to Figure 2 and Figure 3The first groove 1011 extends to the lower side of the lower chip, and the second groove 1012 also extends to the lower side of the lower chip. This allows the surface area of ​​the substrate 101 in the chip mounting cavity 103 to be as small as possible. The part near the lower chip can retain only the pads of the substrate 101 (the pads of the substrate 101 are the surfaces of the substrate 101 that are electrically connected to the chip). That is, grooves are set in other positions except for the substrate pads. A protective layer 50 is provided in the grooves to reduce the surface area of ​​the substrate 101 in the chip mounting cavity 103, which can further improve the anti-sulfurization ability of the substrate 101. The material forming the protective layer 50 is preferably a reflective material, which can improve the reflectivity of light.

[0042] Regarding the location of the protruding rib 501, please refer to the following in some implementation methods. Figure 2 and Figure 3 The rib 501 is provided on the side of the first groove 1011 near the sidewall 1031 of the chip mounting cavity 103, so that there is a sufficient area between the rib 501 and the lower chip to provide the first reflective adhesive layer 40.

[0043] Regarding the structure of the first groove 1011, please refer to [reference needed] in some embodiments. Figure 2 and Figure 3 The first groove 1011 has a constricted structure with a large cavity and a small opening. Specifically, the direction in which the lower chip and the insulating frame 102 are spaced apart is defined as the first direction, and the thickness direction of the substrate 101 is defined as the second direction. The groove 10111 has opposing extensions on both sides of its opening edge in the first direction. Along the second direction, the protective layer 50 has a portion located below the extension. This allows the insulating strip formed by the curing of the protective layer 50 to be stably held within the first groove 1011, preventing the insulating strip from coming out of the first groove 1011. In some embodiments, the second groove 1012 also has a constricted structure.

[0044] The above-mentioned stacked chip packaging structure enables the upper and lower chips to emit light simultaneously or in pairs, allowing for sufficient light mixing to achieve the desired color and reducing unwanted cross-color light from the surrounding area. This solves the color difference problem in conventional RGB LED LCD backlight displays and improves the visual quality of high-end LCD displays.

[0045] The above chip stacking packaging method is not limited to RGB three-color chips. It can also be extended to any color light-emitting chip stacked in 20 layers, or to stacked packaging of two or more chips.

[0046] Please refer to Figure 6 Another embodiment of this application provides a method for manufacturing a packaged device, the steps of which include: S100, A bracket 10 is provided having a first groove 1011 and a rib 501; the structure of the bracket 10 is as described above, and the first groove 1011 is filled with a protective layer 50.

[0047] S200, The lower chip is fixed to the bottom surface of the chip mounting cavity 103 of the bracket 10. The lower chip can be soldered and fixed to the substrate 101 by reflow soldering.

[0048] S300, A second reflective adhesive layer 60 is disposed between the rib 501 and the sidewall 1031 of the chip mounting cavity 103. After the adhesive for forming the second reflective adhesive layer 60 is applied within the area enclosed by the rib 501 and the sidewall 1031, baking is used to promote the curing of this portion of the adhesive into the second reflective adhesive layer 60. By providing the rib 501 to block the adhesive for forming the second reflective adhesive layer 60, it is possible to prevent this portion of the adhesive from flowing and covering the top surface of the underlying chip.

[0049] S400 At least one lower chip has a peripheral side surface, which refers to the side surface of the lower chip opposite to the sidewall 1031 of the chip mounting cavity 103. A first reflective adhesive layer 40 is disposed on the portion of the substrate 101 located between the protrusion 501 and the peripheral side surface of the lower chip. After the adhesive is applied, the adhesive for forming the first reflective adhesive layer 40 can be spread between the protrusion 501 and the peripheral side surface of the lower chip by a centrifugal process, and this adhesive will cover at least a portion of the peripheral side surface of the lower chip. The first reflective adhesive layer 40 thus formed covers at least a portion of the peripheral side surface of the lower chip, reducing the amount of light emitted from the lower chip toward the sidewall 1031 of the chip mounting cavity 103.

[0050] In the packaged device obtained by the above packaging steps, the first reflective adhesive layer 40 and the second reflective adhesive layer 60 work together to reflect light. In this embodiment, the reflectivity of the first reflective adhesive layer 40 and the second reflective adhesive layer 60 to light is higher than the reflectivity of the bottom surface of the chip mounting cavity 103 to light, so that the packaged device has a higher light emission rate and light emission quality.

[0051] As an improvement to the packaging process of packaged devices, such as Figure 3As shown, in some embodiments, there are at least two lower side chips, each of which is mounted on the substrate 101 with a gap between them. The bracket 10 prepared in step S100 has a second groove 1012 on the substrate surface corresponding to the mounting positions of two adjacent lower side chips, and a protective layer 50 is provided in the second groove 1012. During encapsulation, a third reflective adhesive layer 70 is formed by injection molding between two adjacent lower side chips. The third reflective adhesive layer 70 is located on the protective layer 50 of the second groove 1012 and is the same as the first reflective adhesive layer 40. The third reflective adhesive layer 70 is formed by centrifugal process. The third reflective adhesive layer 70 can be transparent adhesive or reflective adhesive, preferably reflective adhesive.

[0052] As an improvement to the packaging process of the packaged device, in some embodiments, the first groove 1011 and / or the second groove 1012 are tapered structures. The direction in which the chip is spaced apart from the insulating frame 102 is defined as the first direction, and the thickness direction of the substrate 101 is defined as the second direction. The groove 10111 has opposing extensions on both sides of its opening edge in the first direction. Along the second direction, the protective layer 50 has a portion located below the extension. This allows the insulating strip formed by the curing of the protective layer 50 to be stably held within the first groove 1011, preventing the insulating strip from detaching from the first groove 1011.

[0053] As an improvement to the packaging process of the packaged device, in some embodiments, in the support 10 prepared in step S100, the rib 501 is located on the side of the first groove 1011 near the sidewall 1031 of the chip mounting cavity 103, so that there is a sufficient area between the rib 501 and the lower chip to provide the first reflective adhesive layer 40.

[0054] As an improvement to the packaging process of packaged devices, such as Figure 2 As shown, in some embodiments, the chip mounted in the chip mounting cavity 103 in step S200 includes a lower flip chip and an upper upright chip stacked on top of the lower flip chip. At least one lower flip chip and the upper upright chip stacked on top of it emit different colors. The periphery of the upper upright chip is closer to the center of the package device than the periphery of the lower flip chip. The orthographic projection (orthographic projection on the bottom surface of the chip mounting cavity 103) of the periphery of the upper upright chip is located inside the orthographic projection (orthographic projection on the bottom surface of the chip mounting cavity 103) of the periphery of the lower flip chip.

[0055] This document describes various exemplary embodiments with reference to them. However, those skilled in the art will recognize that changes and modifications can be made to the exemplary embodiments without departing from the scope of this document. For example, various operational steps and components for performing operational steps can be implemented in different ways depending on the specific application or considering any number of cost functions associated with the operation of the system (e.g., one or more steps can be deleted, modified, or combined with other steps).

[0056] While the principles herein have been illustrated in various embodiments, numerous modifications to the structures, arrangements, proportions, elements, materials, and components, particularly suited to specific environments and operational requirements, may be used without departing from the principles and scope of this disclosure. These modifications and other alterations or alterations will be included within the scope of this document. Those skilled in the art will recognize that many changes can be made to the details of the above embodiments without departing from the fundamental principles of the invention.

Claims

1. A packaged device, characterized in that, include: A support, comprising an insulating frame and a substrate, the substrate being conductive, the insulating frame being connected to the substrate to form a chip mounting cavity having sidewalls and a bottom surface; The light-emitting chip is disposed within the chip mounting cavity. The light-emitting chip includes at least one lower chip and at least one upper chip. The lower chip is electrically connected to the substrate by flip-chip. At least one upper chip and at least one lower chip are stacked and disposed on the side of the lower chip facing away from the substrate. The upper chip is electrically connected to the substrate by upright mounting. The stacked lower chip and the upper chip are capable of emitting light of different colors.

2. The packaged device as described in claim 1, characterized in that, The lower chip is disposed on the bottom surface of the chip mounting cavity. At least one of the lower chips has a peripheral side facing the sidewall of the chip mounting cavity. A first reflective adhesive layer is provided between the peripheral side and the sidewall of the chip mounting cavity, and the first reflective adhesive layer is in contact with the peripheral side of the lower chip.

3. The packaged device as described in claim 2, characterized in that, The substrate surface at the bottom of the chip mounting cavity has a first groove, at least a portion of which is located between the lower chip and the sidewall of the chip mounting cavity, and the first groove has a protective layer.

4. The packaged device as described in claim 3, characterized in that, The protective layer within the first groove has protruding ribs that extend beyond the opening of the first groove. A second reflective adhesive layer is provided between the sidewall of the chip mounting cavity and the protruding ribs. One side of the second reflective adhesive layer contacts the sidewall of the chip mounting cavity, and the other side contacts the protruding ribs. The first reflective adhesive layer is located between the protruding ribs and the peripheral side surface of the lower chip. The reflectivity of the first reflective adhesive layer and the second reflective adhesive layer is greater than the reflectivity of the insulating frame.

5. The packaged device as described in claim 4, characterized in that, The first reflective adhesive layer is formed by centrifugation, and the second reflective adhesive layer is formed by dispensing and baking.

6. The packaged device as claimed in claim 4, characterized in that, The rib is provided on one side of the first groove near the sidewall of the chip mounting cavity.

7. The packaged device according to any one of claims 3-6, characterized in that, The light-emitting chip includes at least two lower chips arranged side by side with a gap between them, and at least one upper chip simultaneously spans across at least two lower chips to be stacked with at least two lower chips at the same time. The light emitted by at least two lower chips stacked with the same upper chip is of a different color.

8. The packaged device as claimed in claim 7, characterized in that, Thermally conductive adhesive is filled in the gap between two lower chips stacked with the same upper chip, forming a thermally conductive structure between the upper chip and the substrate.

9. The packaged device as claimed in claim 7, characterized in that, The substrate has a second groove corresponding to the spacing between the two lower chips. The second groove is filled with a protective layer. The packaging device also includes a third reflective adhesive layer located between the two lower chips, which is bonded to the protective layer in the second groove.

10. The packaged device as claimed in claim 9, characterized in that, The first groove and / or the second groove are constricted structures.