Display panel, manufacturing method thereof and display device
Patent Information
- Application Number
- CN202580000231.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-02-27
- Publication Date
- 2026-11-03
AI Technical Summary
Existing OLED display panels have wide bezels, resulting in wasted resources and large bezels.
The design employs at least two inorganic encapsulation layers. By setting a first overlap hole and a second overlap hole in the lead-out area, the inorganic encapsulation layer and the touch electrode layer are directly connected, reducing masking process steps and preventing the inorganic encapsulation layer from depositing at the touch signal traces. Combined with a blocking structure, it prevents cutting and cracking.
This effectively reduces the width of the display panel bezel, saves on masking process steps, lowers costs, and improves the reliability of the display panel and the stability of signal transmission.
Smart Images

Figure CN123037030A_ABST
Abstract
Description
Display panel and its manufacturing method, display device Technical Field
[0001] This invention relates to the field of display technology, and more specifically, to a display panel, a method for manufacturing the same, and a display device. Background Technology
[0002] Organic light-emitting diodes (OLEDs) have advantages such as self-illumination, low power consumption, and the ability to achieve flexible displays, making them one of the mainstream display technologies currently available. However, the bezels of current display panels are relatively wide.
[0003] It should be noted that the information in the background section above is only used to enhance the understanding of the background of the present invention, and therefore may include information that does not constitute prior art known to those skilled in the art. Summary of the Invention
[0004] The purpose of this invention is to overcome the shortcomings of the prior art and provide a display panel and display device.
[0005] According to one aspect of the present invention, a display panel is provided, the display panel having a display area and a non-display area located around the display area, the non-display area including a lead-out area, the lead-out area including a region of the non-display area located on one side of the display area along a first direction, the display panel including a driving backplate, an encapsulation layer assembly and a touch layer assembly, the driving backplate including an overlap portion disposed in the lead-out area; the encapsulation layer assembly disposed on one side of the driving backplate, the encapsulation layer assembly including at least two inorganic encapsulation layers, the edges of the at least two inorganic encapsulation layers being spaced apart from the end of the overlap portion near the display area, or at least one inorganic encapsulation layer extending from the display area. To the lead-out area, the edge of the inorganic encapsulation layer that does not extend to the lead-out area is spaced apart from the end of the overlap portion near the display area; the touch layer group is located on the side of the encapsulation layer group away from the driving backplate, and the touch layer group includes a first touch electrode layer, a second touch electrode layer and a touch insulating layer, and at least a touch insulating layer is provided between the first touch electrode layer and the second touch electrode layer; the lead-out area is provided with a first overlap hole, the first overlap hole passes through the touch insulating layer, or the first overlap hole passes through the touch insulating layer and at least one inorganic encapsulation layer, the first overlap hole exposes the overlap portion, and the second touch electrode layer passes through the first overlap hole and connects to the overlap portion.
[0006] In one embodiment of the present invention, the encapsulation layer group includes a first inorganic encapsulation layer and a second inorganic encapsulation layer. The second inorganic encapsulation layer is disposed on the side of the first inorganic encapsulation layer away from the driving backplate. Both the first inorganic encapsulation layer and the second inorganic encapsulation layer extend to the lead-out area. The first overlapping hole penetrates the touch insulating layer, the first inorganic encapsulation layer and the second inorganic encapsulation layer.
[0007] In one embodiment of the present invention, the encapsulation layer group includes a first inorganic encapsulation layer and a second inorganic encapsulation layer. The second inorganic encapsulation layer is disposed on the side of the first inorganic encapsulation layer away from the driving backplate. The first inorganic encapsulation layer or the second inorganic encapsulation layer extends to the lead-out area. The first overlapping hole penetrates the touch insulating layer and the first inorganic encapsulation layer or the second inorganic encapsulation layer.
[0008] In one embodiment of the present invention, the touch insulating layer includes a touch overlap layer, which is disposed between the first touch electrode layer and the second touch electrode layer, and the first touch electrode layer is disposed between the second inorganic encapsulation layer and the touch overlap layer.
[0009] In one embodiment of the present invention, the encapsulation layer group includes a first inorganic encapsulation layer and a second inorganic encapsulation layer. The second inorganic encapsulation layer is disposed on the side of the first inorganic encapsulation layer away from the driving backplate. The touch insulating layer includes a touch buffer layer and a touch overlap layer. The touch overlap layer is disposed between the first touch electrode layer and the second touch electrode layer. The touch buffer layer is disposed between the second inorganic encapsulation layer and the first touch electrode layer. The edges of the first inorganic encapsulation layer, the second inorganic encapsulation layer, and the touch buffer layer are spaced apart from the end of the overlap portion near the display area. The touch overlap layer extends to the lead-out area, and the first overlap hole passes through the touch overlap layer to expose the overlap portion.
[0010] In one embodiment of the present invention, the non-display area is provided with at least one blocking dam, and the non-display area also includes a wiring area, which includes the area of the non-display area other than the lead-out area. The wiring area is provided with a blocking structure, which is located on the side of the blocking dam away from the display area. The inorganic encapsulation layer and the touch buffer layer extend from the display area to the space between the blocking dam and the blocking structure.
[0011] In one embodiment of the present invention, the lead-out area is further provided with a second overlapping hole, the second overlapping hole passes through the touch insulating layer, and the second touch electrode layer passes through the second overlapping hole and connects to the first touch electrode layer.
[0012] In one embodiment of the present invention, the encapsulation layer group includes a first inorganic encapsulation layer and a second inorganic encapsulation layer. The second inorganic encapsulation layer is disposed on the side of the first inorganic encapsulation layer away from the driving backplate. The orthographic projection of the side of the second inorganic encapsulation layer away from the display area on the driving backplate is a first orthographic projection, and the orthographic projection of the side of the first inorganic encapsulation layer away from the display area on the driving backplate is a second orthographic projection. The edge of the first orthographic projection is closer to the display area than the edge of the second orthographic projection, and a misalignment gap is formed between the first orthographic projection and the second orthographic projection.
[0013] In one embodiment of the present invention, the orthographic projection of the side of the touch buffer layer away from the display area on the driving back plate is the first orthographic projection, and the orthographic projection of the side of the first inorganic encapsulation layer and the second inorganic encapsulation layer away from the display area on the driving back plate is the second orthographic projection. The edge of the first orthographic projection is closer to the display area than the edge of the second orthographic projection, and a misalignment gap is formed between the first orthographic projection and the second orthographic projection.
[0014] In one embodiment of the present invention, the orthographic projection of the side of the touch buffer layer and the second inorganic encapsulation layer away from the display area on the driving back plate is the first orthographic projection, and the orthographic projection of the side of the first inorganic encapsulation layer away from the display area on the driving back plate is the second orthographic projection. The edge of the first orthographic projection is closer to the display area than the edge of the second orthographic projection, and a misalignment gap is formed between the first orthographic projection and the second orthographic projection.
[0015] In one embodiment of the present invention, the side of the touch buffer layer away from the display area is flush with the side of the second inorganic encapsulation layer away from the display area.
[0016] In one embodiment of the present invention, the angle between the side of the first inorganic encapsulation layer near the driving backplate and the side surface of the first inorganic encapsulation layer is the first angle, and the angle between the side surface of the touch buffer layer and the second inorganic encapsulation layer and the side surface of the second inorganic encapsulation layer near the driving backplate is the second angle. The size of the first angle and the size of the second angle are the same or different, and the first angle and the second angle are less than or equal to 90°.
[0017] In one embodiment of the present invention, the first included angle is smaller than the second included angle.
[0018] In one embodiment of the present invention, the size of the first included angle is 20° to 50°, and the size of the second included angle is 50° to 90°.
[0019] In one embodiment of the present invention, the driving backplane includes a substrate, a first source-drain conductive layer and a second source-drain conductive layer. The first source-drain conductive layer is disposed on one side of the substrate, and the second source-drain conductive layer is disposed on the side of the first source-drain conductive layer away from the substrate. The overlapping portion includes a first sub-overlap portion and a second sub-overlap portion. The first sub-overlap portion is located in the first source-drain conductive layer, and the second sub-overlap portion is located in the second source-drain conductive layer.
[0020] In one embodiment of the present invention, the angle between the edge of the inorganic encapsulation layer away from the display area and the side of the inorganic encapsulation layer near the driving backplate is a fourth angle, which is greater than 20°.
[0021] According to another aspect of the present invention, a display panel is provided, the display panel having a display area and a non-display area located around the display area, the non-display area including a lead-out area, the lead-out area including a region of the non-display area located on one side of the display area along a first direction, the display panel including a driving backplate, an encapsulation layer assembly, and a touch layer assembly, the driving backplate including an overlap portion disposed in the lead-out area; the encapsulation layer assembly disposed on one side of the driving backplate, the encapsulation layer assembly including at least two inorganic encapsulation layers; the touch layer assembly disposed on the side of the encapsulation layer assembly away from the driving backplate, the touch layer assembly including a first touch electrode layer and A touch buffer layer is disposed between the first touch electrode layer and the inorganic encapsulation layer. The edges of the inorganic encapsulation layer and the touch buffer layer are spaced apart from the end of the overlapping portion near the display area. The sides of the touch buffer layer and the inorganic encapsulation layer form a first etched segment and a second etched segment that are sequentially moved away from the driving backplate. The orthographic projection of the first etched segment on the driving backplate is the first orthographic projection, and the orthographic projection of the second etched segment on the driving backplate is the second orthographic projection. The first orthographic projection is closer to the display area than the second orthographic projection, and a misalignment gap is formed between the first orthographic projection and the second orthographic projection.
[0022] In one embodiment of the present invention, the encapsulation layer group includes a first inorganic encapsulation layer and a second inorganic encapsulation layer. The second inorganic encapsulation layer is disposed on the side of the first inorganic encapsulation layer away from the driving backplate. The side of the first inorganic encapsulation layer away from the display area is a first etched segment. The side of the touch buffer layer and the second inorganic encapsulation layer away from the display area is a second etched segment. The angle between the first etched segment and the side of the first inorganic encapsulation layer near the driving backplate is a first included angle. The angle between the second etched segment and the side of the second inorganic encapsulation layer near the driving backplate is a second included angle. The size of the first included angle and the size of the second included angle are the same or different. The first included angle and the second included angle are less than or equal to 90°.
[0023] According to another aspect of the present invention, a method for manufacturing a display panel according to any one aspect of the present invention is provided, the method comprising:
[0024] A drive backplane is provided, and the drive backplane has an overlap in the lead-out area;
[0025] At least two inorganic encapsulation layers are deposited on one side of the drive backplane to form an encapsulation layer group;
[0026] A first touch electrode layer and a touch insulating layer are sequentially formed on the side of the encapsulation layer away from the drive backplane, with the touch insulating layer extending to the lead-out area;
[0027] The touch insulating layer and at least two inorganic encapsulation layers are simultaneously etched so that the first overlapping hole passes through the touch insulating layer and at least two inorganic encapsulation layers, forming a first overlapping hole exposing the overlapping portion in the lead-out area.
[0028] A second touch electrode layer is formed on the side of the touch insulating layer away from the drive backplate, and the second touch electrode layer passes through the first overlap hole and connects to the overlap portion.
[0029] In another aspect of the present invention, a method for manufacturing a display panel according to any one aspect of the present disclosure is provided, the method comprising:
[0030] A drive backplane is provided, and the drive backplane has an overlap in the lead-out area;
[0031] At least one inorganic encapsulation layer is deposited on one side of the drive backplane to form an encapsulation layer group;
[0032] At least one inorganic encapsulation layer is patterned so that the edge of the at least one inorganic encapsulation layer and the end of the overlap near the display area form a first reserved area;
[0033] A first touch electrode layer and a touch insulating layer are sequentially formed on the side of the encapsulation layer away from the drive backplane, with the touch insulating layer extending to the lead-out area;
[0034] The touch insulating layer, or the touch insulating layer and the unpatterned inorganic encapsulation layer, are etched to form a first overlap hole in the lead-out area that exposes the overlap portion.
[0035] A second touch electrode layer is formed on the side of the touch insulating layer away from the drive backplate, and the second touch electrode layer passes through the first overlap hole and connects to the overlap portion.
[0036] According to another aspect of the present invention, a display device is provided, comprising a display panel provided in one aspect of the present invention.
[0037] It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and are not intended to limit the invention. Attached Figure Description
[0038] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the invention and, together with the description, serve to explain the principles of the invention. It is obvious that the drawings described below are merely some embodiments of the invention, and those skilled in the art can obtain other drawings based on these drawings without any inventive effort.
[0039] Figure 1 is a plan view of a display panel according to an embodiment of the present invention.
[0040] Figure 2 is a cross-sectional schematic diagram of the display panel in an embodiment of the present invention, when the inorganic encapsulation layer shadow is easily deposited in the first overlap hole.
[0041] Figure 3 shows a first reserved area where an inorganic encapsulation layer shadow is set in the lead-out area. This embodiment of the invention relates to a cross-sectional schematic diagram of a display panel.
[0042] Figure 4 shows a first reserved area where an inorganic encapsulation layer is set in the lead-out area. This embodiment of the invention relates to another cross-sectional schematic diagram of a display panel.
[0043] Figure 5 is a partial cross-sectional schematic diagram of the display panel in the wiring area of the embodiment of the present invention when the inorganic encapsulation layer covers the blocking structure.
[0044] Figure 6 is a partial cross-sectional schematic diagram of the display panel in the wiring area of the present invention when the second reserved area with the inorganic encapsulation layer shadow is set in the wiring area.
[0045] Figure 7 is a cross-sectional schematic diagram of the display panel according to an embodiment of the present invention when the inorganic encapsulation layer and the touch insulating layer extend to the side of the overlap area away from the display area.
[0046] Figure 8 is a cross-sectional schematic diagram of the display panel in the lead-out area of the embodiment of the present invention when the inorganic encapsulation layer and the touch insulating layer extend to the side of the overlap area away from the display area.
[0047] Figure 9 is a comparison of the display panel when the inorganic encapsulation layer and the touch insulating layer extend to the side of the overlap area away from the display area, and the display panel when the inorganic encapsulation layer is shaded in the first reserved area of the lead-out area.
[0048] Figure 10 is a partial cross-sectional view of the display panel in the wiring area of the present invention when the angle between the edge of the inorganic encapsulation layer near the first reserved area and the side of the inorganic encapsulation layer near the driving back plate is greater than 20°.
[0049] Figure 11 is a cross-sectional schematic diagram of the display panel in the lead-out area of the embodiment of the present invention when the edge of the first inorganic encapsulation layer and the overlapping portion near the end of the display area form a first reserved area.
[0050] Figure 12 is a cross-sectional schematic diagram of the display panel in the lead-out area of the embodiment of the present invention when the edges and overlaps of the first inorganic encapsulation layer and the second inorganic encapsulation layer form a first reserved area near the end of the display area.
[0051] Figure 13 is a cross-sectional schematic diagram of the display panel in the lead-out area of the embodiment of the present invention when the first touch electrode layer is disposed on the second inorganic encapsulation layer.
[0052] Figure 14 shows a cross-sectional view of the display panel in the lead-out area of the present invention, with the side of the touch buffer layer near the display area spaced apart from the overlapping portion, and the side of the touch buffer layer near the display area being flush with the side of the second inorganic encapsulation layer near the display area.
[0053] Figure 15 is a partial cross-sectional schematic diagram of the display panel involved in the embodiment of the present invention, when the edges of the touch insulating layer and the second inorganic encapsulation layer near the substrate overlap with the edge of the first inorganic encapsulation layer away from the substrate, and the first included angle is smaller than the second included angle.
[0054] Figure 16 is a planar schematic diagram showing the connection between the first touch traces in the embodiment of the present invention by the residual portion when the edges of the touch insulating layer and the second inorganic encapsulation layer near the substrate overlap with the edge of the first inorganic encapsulation layer away from the substrate, and the first included angle is smaller than the second included angle.
[0055] Figure 17 is a partial cross-sectional schematic diagram of the display panel involved in the embodiment of the present invention when the first included angle is smaller than the second included angle and a misalignment gap is formed between the first orthographic projection and the second orthographic projection.
[0056] Figure 18 is a partial cross-sectional schematic diagram of the display panel involved in the embodiment of the present invention when the first included angle is equal to the second included angle and a misalignment gap is formed between the first orthographic projection and the second orthographic projection.
[0057] Figure 19 is a partial cross-sectional schematic diagram of the display panel involved in the embodiment of the present invention when the first etching segment is located on the side of the first inorganic encapsulation layer and the side of the second inorganic encapsulation layer, and the second etching segment is located on the side of the touch buffer layer.
[0058] Figure 20 is a partial cross-sectional schematic diagram of the display panel involved in the embodiment of the present invention when the side of the first inorganic encapsulation layer and the side of the second inorganic encapsulation layer form a misaligned gap.
[0059] Explanation of reference numerals in the attached drawings: 10-Drive backplane, 11-Substrate, 12-Buffer layer; 13-Drive circuit layer, 131-Active portion, 1321-First gate insulating layer, 1322-Second gate insulating layer, 1331-First gate, 1332-Second gate, 134-Interlayer dielectric layer, 135-First source, 136-Drain, 137-Protective layer, 138-Second source; 14-Planing layer group, 141-First planarization layer, 142-Second planarization layer; 15-Pixel defining layer, 151-Pixel opening, 152-Pixel defining portion, 153-Spacer portion; 16-Light emitting layer, 160-Light emitting device, 161-Pixel electrode, 162-Light emitting material layer, 163-Common electrode, 1601-First light emitting device, 1602-Second light emitting device, 1603-Third light emitting device; 17-Encapsulation layer group, 170-Inorganic encapsulation layer, 171-First inorganic encapsulation layer, 172-Organic encapsulation layer, 173-Second inorganic encapsulation layer, 174-Inorganic encapsulation layer shadow; 18-Touch control layer, 181-Touch buffer layer, 182-First touch electrode layer, 1821-First touch trace, 1822-Residual portion, 183-Touch overlap layer, 184-Second touch electrode layer, 186-Touch insulating layer; 19-Barrier dam, 191-First barrier layer, 192-Second barrier layer, 193-Third barrier layer; 20-Overlap portion, 201-First sub-overlap portion, 202-Second sub-overlap portion, 203-First overlap layer, 204-Second overlap layer; 211-First transition portion, 212-Second transition portion; 221-Binding part, 222-First bonding layer, 223-Second bonding layer, 224-Binding hole, 225-Organic filling part; 23-Conductive pin; 24-First overlapping hole, 241-First etched section, 242-Second etched section; 25-Second overlapping hole; 26-First data trace, 27-Second data trace, 28-Anode lead; 29-Blocking structure; 100-Display area, 200-Non-display area, 2001-Lead-out area, 2002-Overlap area, 2003-Binding area, 2004-Pin area, 2005-Traffic area, 2006-First reserved area, 2007-First reserved area, 2008-Second reserved area. Detailed Implementation
[0060] Exemplary embodiments will now be described more fully with reference to the accompanying drawings. However, these exemplary embodiments can be implemented in many forms and should not be construed as limited to the embodiments set forth herein; rather, they are provided so that the invention will be thorough and complete, and the concept of the exemplary embodiments will be fully conveyed to those skilled in the art. The same reference numerals in the drawings denote the same or similar structures, and therefore their detailed description will be omitted. Furthermore, the drawings are merely illustrative of the invention and are not necessarily drawn to scale.
[0061] Although relative terms such as "up" and "down" are used in this specification to describe the relative relationship of one component of an icon to another, these terms are used only for convenience, such as according to the orientation of the examples shown in the accompanying drawings. It is understood that if the device of the icon is flipped upside down, the component described as "up" will become the component described as "down." When a structure is "up" of another structure, it may mean that the structure is integrally formed on the other structure, or that the structure is "directly" mounted on the other structure, or that the structure is "indirectly" mounted on the other structure through another structure.
[0062] The terms “a,” “one,” “the,” “the,” and “at least one” are used to indicate the presence of one or more elements / components / etc.; the terms “including” and “having” are used to indicate an open-ended inclusion and to mean that there may be other elements / components / etc. in addition to the listed elements / components / etc.; the terms “first,” “second,” and “third,” etc., are used only as markers and are not a limitation on the number of objects.
[0063] Organic light-emitting diode (OLED) display panels can achieve self-illumination and have many advantages such as low driving voltage (DC drive), active light emission, wide viewing angle, high efficiency, fast response speed, low power consumption, and easy realization of full-color large-area wall-mounted display and flexible display. They are becoming increasingly popular.
[0064] As shown in Figure 1, the display panel has a display area 100 and a non-display area 200 located around the display area 100. The non-display area 200 includes a lead-out area 2001 located on one side of the display area 100 along a first direction. The area of the non-display area 200, excluding the lead-out area 2001, is a wiring area 2005. Various signal traces are arranged in the wiring area 2005. The lead-out area 2001 connects and leads the various signal traces to the bonding part 221, and then the bonding part 221 connects them to the conductive pin 23.
[0065] To achieve the bending and rolling characteristics of OLED display devices, current display panels employ thin film encapsulation (TFE) technology using a photomask, integrating the touch layer assembly onto the encapsulation layer assembly 17. Flexible Multiple Layer on Cell (FMLOC) technology involves setting a first touch electrode layer 182 and a second touch electrode layer 184 on the encapsulation layer assembly 17. The first touch electrode layer 182 may include driving (Tx) electrodes and sensing (Rx) electrodes arranged in mutually orthogonal directions. One of the driving electrode and the sensing electrode is interconnected, while the other is bridged through the second touch electrode layer 184, thereby enabling touch position detection. In other embodiments, the second touch electrode layer 184 may also include driving (Tx) electrodes and sensing (Rx) electrodes arranged in mutually orthogonal directions, with one of the driving electrode and the sensing electrode interconnected and the other bridged through the first touch electrode layer 182. In other embodiments, one of the first touch electrode layer 182 and the second touch electrode layer 184 may be provided with a driving electrode and a first connection portion connecting two adjacent driving electrodes, and the other may be provided with a sensing electrode and a second connection portion connecting two adjacent sensing electrodes.
[0066] As shown in Figure 2, a first overlap hole 24 is provided on the overlap layer group located in the lead-out area 2001. The signal traces of the second touch electrode layer 184 pass through the first overlap hole 24 and overlap with the signal traces of the second source-drain conductive layer. The overlap layer group includes a first overlap layer 203 and a second overlap layer 204. The first inorganic encapsulation layer 171 is disposed on the side of the second overlap layer 204 away from the driving backplate 10. When forming the first inorganic encapsulation layer 171, a mask process is usually used to form the pattern of the inorganic encapsulation layer. In the mask process, the shadow of the first inorganic encapsulation layer 171 is easily deposited in the first overlap hole 24, which can easily affect the overlap between the signal traces of the second touch electrode layer 184 and the signal traces of the second source-drain conductive layer, making the touch signal disconnected at risk.
[0067] As shown in Figures 3 and 4, during the formation of the first inorganic encapsulation layer 171, a first reserved area 2007 for the shadow of the first inorganic encapsulation layer 171 is generally set in the lead-out area 2001 to avoid the inorganic encapsulation layer shadow from depositing on the touch layer overlap hole, which could cause the touch signal to be disconnected. Usually, the width of the first reserved area 2007 is relatively large in the masking process, resulting in a significant waste of the display panel's bezel in the lead-out area 2001, making the bezel of the display panel at the location where the lead-out area 2001 is set wider.
[0068] As shown in Figure 5, during the display panel manufacturing process, a blocking structure 29 (Crack Dam) is provided in the wiring area 2005. During the masking process of the inorganic encapsulation layer 170, the wiring area 2005 also needs to be patterned. Since the wiring area 2005 also has the inorganic encapsulation layer shadow 174, the inorganic encapsulation layer 170 may partially or completely cover the blocking structure 29, resulting in an increase in the thickness of the inorganic encapsulation layer 170. During the cutting process, it is easy to cut the inorganic encapsulation layer 170 on the side of the blocking structure 29 away from the display area 100, leading to a risk of frame cracking in the display panel.
[0069] As shown in Figure 6, the trace area 2005 also needs to have a second reserved area 2008 for the inorganic encapsulation layer 170 to avoid cutting into the inorganic encapsulation layer 170 and the touch insulating layer 186, thus preventing cutting and breakage. Typically, the width of this second reserved area 2008 is relatively large in the masking process, resulting in significant waste of the display panel's bezel in the trace area 2005, making the bezel of the display panel where the trace area 2005 is located wider.
[0070] Based on this, the present invention provides a display panel. As shown in Figures 7 to 15, the display panel has a display area 100 and a non-display area 200 located around the display area 100. The non-display area 200 includes a lead-out area 2001, which includes a region of the non-display area 200 located on one side of the display area 100 along a first direction. The display panel includes a driving backplate 10, an encapsulation layer group 17, and a touch layer group. The driving backplate 10 includes an overlap portion 20, which is disposed in the lead-out area 2001. The encapsulation layer group 17 is disposed on one side of the driving backplate 10 and includes at least two inorganic encapsulation layers 170. The edges of the at least two inorganic encapsulation layers 170 are spaced apart from the end of the overlap portion 20 near the display area 100, or at least one inorganic encapsulation layer 170 extends to the lead-out area 2001 and does not extend further. The edge of the inorganic encapsulation layer 170 extending to the lead-out area 2001 is spaced apart from the end of the overlap portion 20 near the display area 100. The touch layer group is located on the side of the encapsulation layer group 17 away from the driving backplate 10. The touch layer group includes a first touch electrode layer 182, a second touch electrode layer 184, and a touch insulating layer. At least a touch insulating layer is provided between the first touch electrode layer 182 and the second touch electrode layer 184. The lead-out area 2001 is provided with a first overlap hole 24 and a second overlap hole 25. The first overlap hole 24 passes through the touch insulating layer, or the first overlap hole 24 passes through the touch insulating layer 186 and extends to the inorganic encapsulation layer 170 extending to the lead-out area 2001. The first overlap hole 24 exposes the overlap portion 20. The second touch electrode layer 184 passes through the first overlap hole 24 and connects to the overlap portion 20.
[0071] First, all inorganic encapsulation layers 170 are formed on the entire surface. Then, at least two inorganic encapsulation layers 170 are patterned so that the edges of at least two inorganic encapsulation layers 170 and the end of the overlap portion 20 near the display area 100 form a first reserved area 2006. Then, the positions corresponding to the touch insulating layer 186 and the first overlap hole 24 are etched. Alternatively, a portion of the inorganic encapsulation layer 170 can be patterned, forming a first reserved area 2006 at the edge of the portion of the inorganic encapsulation layer 170 and the end of the overlap portion 20 near the display area 100. Then, the touch insulating layer 186 and the inorganic encapsulation layer 170 extending to the lead-out area 2001, corresponding to the positions of the first overlap hole 24, can be etched. This avoids the inorganic encapsulation layer 170 depositing within the first overlap hole 24. When all inorganic encapsulation layers 170 extend to the lead-out area, the inorganic encapsulation layer 170 and the touch insulating layer 186 in the lead-out area 2001 can be patterned together, forming the first overlap hole 24 in a single etching process. This method of forming the first overlap hole 24 requires only one or two masking processes, saving at least one masking process compared to the current method of separately patterning at least two inorganic encapsulation layers 170 and the touch insulating layer 186 to form the avoidance area and the first overlap hole 24, resulting in lower costs.
[0072] The display panel involved in the embodiments of the present invention will be described in detail below with reference to specific examples.
[0073] As shown in Figure 7, the display panel generally includes a substrate 11, a driving circuit layer 13, and a light-emitting layer 16. The driving circuit layer 13 includes an active layer, a first gate layer 1331, a second gate layer 1332, a first source-drain conductive layer, and a second source-drain conductive layer. The active layer is disposed on one side of the substrate 11. The first gate layer 1331 is disposed on the side of the active layer away from the substrate 11. The second gate layer 1332 is disposed on the side of the first gate layer 1331 away from the substrate 11. The first source-drain conductive layer is disposed on the side of the second gate layer 1332 away from the substrate 11. The second source-drain conductive layer is disposed on the side of the first source-drain conductive layer away from the substrate 11. In other embodiments, the driving circuit layer 13 may only include the first source-drain conductive layer. In other embodiments, the driving circuit layer 13 may also include a third source-drain conductive layer, which may be disposed on the side of the second source-drain conductive layer away from the substrate 11.
[0074] The light-emitting layer 16 includes a pixel electrode layer 161, a light-emitting material layer 162, and a common electrode 163. The pixel electrode layer 161 is disposed on the side of the driving circuit layer 13 away from the substrate 11, the light-emitting material layer 162 is disposed on the side of the pixel electrode layer 161 away from the substrate 11, and the common electrode 163 is disposed on the side of the light-emitting material layer 162 away from the substrate 11. Additionally, the display panel may also include a buffer layer 12, which may be disposed between the substrate 11 and the driving circuit layer 13.
[0075] The substrate 11 can be an inorganic material substrate 11 or an organic material substrate 11. For example, in one embodiment of this disclosure, the material of the substrate 11 can be a glass material such as soda-lime glass, quartz glass, or sapphire glass, or a metal material such as stainless steel, aluminum, or nickel.
[0076] In another embodiment of this disclosure, the substrate 11 may also be a flexible substrate 11, for example, the material of the substrate 11 may be polyimide (PI). The substrate 11 may also be a composite of multiple materials. For example, in one embodiment of this disclosure, the substrate 11 may include a bottom film layer, a pressure-sensitive adhesive layer, a first polyimide layer and a second polyimide layer stacked sequentially.
[0077] In the display area 100, the driving circuit layer 13 is provided with a driving circuit for driving the light-emitting material layer 162. The driving circuit is located in the display area 100, and any driving circuit can include a transistor. The transistor can be a thin-film transistor, which can be selected from top-gate thin-film transistors, bottom-gate thin-film transistors, or dual-gate thin-film transistors. Taking a top-gate thin-film transistor as an example, the thin-film transistor can include an active part 131, a first gate 1331, a second gate 1332, a first gate insulating layer 1321, a second gate insulating layer 1322, a first source 135, and a drain 136, wherein: the active part 131 is located in the active layer, the first gate 1331 is located in the first gate 1331 layer, the second gate 1332 is located in the second gate 1332 layer, and the first source 135 and drain 136 are located in the first source-drain conductive layer.
[0078] The active portion 131 is disposed on one side of the substrate 11. The material of the active portion 131 can be amorphous silicon semiconductor material, low-temperature polycrystalline silicon semiconductor material, metal oxide semiconductor material, organic semiconductor material, or other types of semiconductor material. Therefore, the thin film transistor can be an N-type thin film transistor or a P-type thin film transistor. The active portion 131 may include a channel region and two doped regions of different doping types located on both sides of the channel region.
[0079] A first gate insulating layer 1321 is disposed on the side of the active portion 131 away from the substrate 11. The first gate insulating layer 1321 can cover the active portion 131 and the substrate 11. A first gate 1331 is disposed on the side of the first gate insulating layer 1321 away from the substrate 11 and is directly opposite to the active portion 131. That is, the projection of the first gate 1331 on the substrate 11 is located within the projection range of the active portion 131 on the substrate 11. For example, the projection of the first gate 1331 on the substrate 11 coincides with the projection of the channel region of the active portion 131 on the substrate 11. A second gate insulating layer 1322 is disposed on the side of the first gate 1331 away from the substrate 11. The second gate insulating layer 1322 can cover the first gate 1331 and the first gate insulating layer 1321. The second gate 1332 is disposed on the side of the second gate insulating layer 1322 away from the substrate 11 and is directly opposite to the active portion 131. The first gate insulating layer 1321 and the second gate insulating layer 1322 are both made of insulating materials such as silicon oxide.
[0080] The thin-film transistor may further include an interlayer dielectric layer 134, which is disposed on the side of the second gate 1332 away from the substrate 11. The interlayer dielectric layer 134 may cover the second gate 1332 and the second gate insulating layer 1322, and both interlayer dielectric layers 134 are made of insulating material. Source and drain electrodes 136 are disposed on the surface of the interlayer dielectric layer 134 away from the substrate 11, and the source and drain electrodes 136 include a first source electrode 135 and a drain electrode 136. The first source electrode 135 and the drain electrode 136 are connected to the active portion 131. For example, the first source electrode 135 and the drain electrode 136 are respectively connected to two doped regions of the corresponding active portion 131 through vias.
[0081] A planarization layer group 14 is provided on the side of the first source electrode 135 and drain electrode 136 away from the substrate 11. The planarization layer group 14 may include a first planarization layer 141, and the surface of the first planarization layer 141 away from the substrate 11 is planar. The source and drain electrode 136 may also include a second source electrode 138, which is located on the side of the first planarization layer 141 away from the substrate 11 and is connected to the first source electrode 135. A second planarization layer 142 is provided on the side of the second source electrode 138 away from the substrate 11, and the second planarization layer 142 covers the second source electrode 138 and the first planarization layer 141. A protective layer 137 may also be provided on the side of the first source electrode 135 away from the substrate 11, and the protective layer 137 covers the first source electrode 135 and drain electrode 136. The first planarization layer 141 covers the protective layer 137. It should be noted that the first source 135 and the drain 136 are located in the first source-drain metal layer of the driving circuit layer 13, and the second source 138 is located in the second source-drain metal layer of the driving circuit layer 13.
[0082] A pixel defining layer 15 is disposed on the side of the first planarization layer 141 or the second planarization layer 142 away from the array substrate. The pixel defining layer 15 has multiple pixel openings 151. A spacer portion 153 is provided on the side of the pixel defining layer 15 away from the substrate 11. The spacer portion 153 is disposed around the pixel opening 151, that is, the edge of the spacer opening formed by the spacer portion 153 is located outside the pixel opening 151. The light-emitting layer 16 may include multiple light-emitting material layers 162, which are respectively disposed in different pixel openings 151. Each light-emitting material layer 162 may include a pixel electrode 161, a light-emitting material layer 162, and a common electrode 163. The pixel electrode 161 is disposed in the pixel electrode 161 layer and is located on the surface of the first planarization layer 141 or the second planarization layer 142 away from the substrate 11. The light-emitting material layer 162 is disposed on the surface of the pixel electrode 161 away from the substrate 11, and the common electrode 163 is disposed on the surface of the light-emitting material layer 162 away from the substrate 11. The light-emitting material layer 162 can be driven to emit light through the pixel electrode 161 and the common electrode 163 to display an image.
[0083] Pixel electrode 161 is connected to either the first source 135 or the second source 138. A pixel defining layer 15 is provided on the side of pixel electrode 161 away from the substrate 11. When the thin-film transistor includes only the first source 135, pixel electrode 161 is connected to the first source 135, and the pixel defining layer 15 covers pixel electrode 161 and the first planarization layer 141. When the thin-film transistor also includes the second source 138, pixel electrode 161 is connected to the second source 138, and the pixel defining layer 15 covers pixel electrode 161 and the second planarization layer 142.
[0084] The common electrode 163 can serve as the cathode, and the pixel electrode 161 can serve as the anode. The light-emitting material layer 162 can be driven to emit light by applying a signal to the pixel electrode 161; the specific light-emitting principle will not be detailed here. The light-emitting material layer 162 may contain electroluminescent organic light-emitting materials and can be formed using processes such as vapor deposition. For example, the light-emitting material layer 162 may include a hole injection layer, a hole transport layer, a light generation layer, an electron transport layer, and an electron injection layer sequentially stacked on the pixel electrode 161 layer. It should be noted that the light-emitting material layer 162 may include a red light-emitting material layer 162, a green light-emitting material layer 162, and a blue light-emitting material layer 162, depending on the emitted color.
[0085] Furthermore, the display panel disclosed herein may also include an encapsulation layer assembly 17, which is disposed on the side of the light-emitting layer 16 away from the substrate 11, thereby covering the light-emitting layer 16 and preventing water and oxygen corrosion. The encapsulation layer assembly 17 may be a single-layer or multi-layer structure, and the material of the encapsulation layer assembly 17 may include organic or inorganic materials, without special limitations herein.
[0086] In this embodiment, the encapsulation layer group 17 may include a first inorganic encapsulation layer 171, an organic encapsulation layer 172, and a second inorganic encapsulation layer 173. The first inorganic encapsulation layer 171 is disposed on the side of the light-emitting layer 16 away from the substrate 11, the organic encapsulation layer 172 is disposed on the side of the first inorganic encapsulation layer 171 away from the substrate 11, and the second inorganic encapsulation layer 173 is disposed on the side of the organic encapsulation layer 172 away from the substrate 11.
[0087] The display panel also includes a touch control layer 18, which can be a mutual capacitance touch control layer. The touch control layer 18 includes a touch buffer layer 181, a first touch electrode layer 182, a touch overlap layer 183, and a second touch electrode layer 184. The touch buffer layer 181 is located on the side of the encapsulation layer group 17 away from the substrate 11. The second touch electrode layer 184 is located on the side of the touch buffer layer 181 away from the substrate 11. The touch overlap layer 183 is located on the side of the second touch electrode layer 184 away from the substrate 11. The first touch electrode layer 182 is located on the side of the touch overlap layer 183 away from the substrate 11. The manufacturing process of the touch buffer layer 181 and the touch overlap layer 183 can refer to the manufacturing process of the first inorganic encapsulation layer 171 and the second inorganic encapsulation layer 173, or it can be formed using organic materials through inkjet printing, spraying exposure and development processes.
[0088] As shown in Figure 8, due to the flow of liquid organic encapsulation material, leakage of liquid organic encapsulation material is prone to occur. To prevent leakage of organic encapsulation material, a barrier dam 19 is provided in the non-display area 200. The barrier dam 19 is located on the side of the protective layer 137 away from the substrate 11. The barrier dam 19 is arranged around the display area 100 and serves to block the organic encapsulation material. The cross-sectional shape of the barrier dam 19 can be rectangular or trapezoidal. The barrier dam 19 must have at least one side with a beveled edge near the display area 100, which is not limited here.
[0089] The stacked pattern of the barrier dam 19 includes a first barrier layer 191, which is made of the same material as the second planarization layer 142. A second barrier layer 192 can also be provided on the first barrier layer 191, which is made of the same material as the pixel defining layer 15. A third barrier layer 193 can also be provided on the second barrier layer 192, which is made of the same material as the spacer portion 153.
[0090] The display panel also includes a first data trace 26, a second data trace 27, and an anode lead 28. The first data trace 26 is located in the first source-drain conductive layer, the second data trace 27 is located in the second source-drain conductive layer, and the anode lead 28 is located in the pixel electrode 161 layer. The orthographic projection of the first data trace 26, the second data trace 27, and the anode lead 28 on the substrate 11 is located within the orthographic projection of the barrier dam 19 on the substrate 11.
[0091] The non-display area 200 has an outlet area 2001 located on one side of the display area 100 in a first direction. The outlet area 2001 includes an overlap area 2002, a bonding area 2003, and a pin area 2004 arranged sequentially in a direction away from the display area 100. The bonding area 2003 has a bonding portion 221. A first bonding layer 222 is provided on the side of the bonding portion 221 away from the substrate 11, and a second bonding layer 223 is provided on the side of the first bonding layer 222 away from the substrate 11. The first bonding layer 222 can be disposed in the same layer and with the same material as the second planarization layer 142, and the second bonding layer 223 can be disposed in the same layer and with the same material as the pixel definition layer.
[0092] The overlap area 2002 is provided with an overlap portion 20, which includes a first sub-overlap portion 201 and a second sub-overlap portion 202. The first sub-overlap portion 201 is located in the first source-drain conductive layer, and the second sub-overlap portion 202 is located in the second source-drain conductive layer. A first overlap layer 203 is provided on the side of the overlap portion 20 away from the substrate 11. The first overlap layer 203 can be disposed in the same layer as the second planarization layer 142. The first overlap layer 203 is disposed in the same layer and with the same material as the first barrier layer 191. A second overlap layer 204 is provided on the side of the first overlap layer 203 away from the substrate 11. The second overlap layer 204 can be disposed in the same layer as the pixel definition layer.
[0093] A first transition portion 211 is provided between the overlapping area 2002 and the bonding area 2003, and a second transition portion 212 is provided between the bonding area 2003 and the pin area 2004. The first transition portion 211 and the second transition portion 212 are located in the second gate layer. The bonding portion 221 is located in the second source-drain conductive layer, and the first sub-overlapping portion 201 and the bonding portion 221 are connected to the first transition portion 211 through vias. The pin area 2004 is provided with conductive pins 23, which are located in the second source-drain conductive layer. The bonding portion 221 is connected to the first transition portion 211 and the second transition portion 212 through vias, the first sub-overlapping portion 201 is connected to the first transition portion 211 through a via, and the conductive pins 23 are connected to the second transition portion 212 through vias. This connects the second touch electrode layer 184 with the conductive pins 23, which can be connected to a flexible circuit board to realize the input and output of touch signals. To prevent the bonding area 2003 from peeling off between layers during bending, the bonding area 2003 is provided with a bonding hole 224 that penetrates the protective layer 137, the interlayer dielectric layer 134, the second gate insulation layer 1322, the first gate insulation layer 1321 and the buffer layer 12, and an organic filling part 225 is provided in the bonding hole 224.
[0094] The first inorganic encapsulation layer 171 and the second inorganic encapsulation layer 173 are sequentially disposed on the side of the second overlapping layer 204 away from the substrate 11 along a direction away from the substrate 11. The first inorganic encapsulation layer 171 and the second inorganic encapsulation layer 173 extend to the side of the overlapping area 2002 away from the display area 100. The touch buffer layer 181 is disposed on the side of the second inorganic encapsulation layer 173 away from the substrate 11. The touch buffer layer 181 extends to the side of the overlapping area 2002 away from the display area 100. The first touch electrode layer 182 extends between the barrier dam 19 and the first overlapping layer 203. The touch overlapping layer 183 extends from the display area 100 to the side of the overlapping area 2002 away from the display area 100.
[0095] The overlap area 2002 is provided with a first overlap hole 24, which passes through the touch overlap layer 183, the touch buffer layer 181, the second inorganic encapsulation layer 173, the first inorganic encapsulation layer 171, the second overlap layer 204, and the first overlap layer 203, exposing the second sub-overlap portion 202. A second overlap hole 25 is provided between the blocking dam 19 and the overlap area 2002, which passes through the touch overlap layer 183. The second touch electrode layer 184 extends from the display area 100 to the overlap area 2002 away from the display area 100. At the edge, the second touch electrode layer 184 passes through the second overlap hole 25 and connects to the first electrode layer. When one of the first touch electrode layers 182 and the second touch electrode layer 184 is disconnected, the touch signal can still be transmitted through the other layer, ensuring the stability of the touch signal transmission. The second touch electrode layer 184 passes through the first overlap hole 24 and connects to the second sub-overlap part 202. The touch signal can be led out to the conductive pin 23 through the overlap part 20, or the touch signal can be input to the display area 100 through the conductive pin 23.
[0096] The inorganic encapsulation layer 170 of the overlap area 2002 is patterned together with the touch overlap layer 183. The first overlap hole 24 can be formed in one etching process, saving two masking processes compared to Figure 4. As shown in Figure 9, compared to Figure 4, the first reserved area 2007 where the inorganic encapsulation layer shadow is set in the lead-out area 2001 in Figure 4 can be reduced, thereby reducing the bezel corresponding to the lead-out area 2001 of the display panel. At the same time, since the first inorganic encapsulation layer 171 and the second inorganic encapsulation layer 173 are formed on the whole surface during deposition, there is no need to use a masking process to form the pattern of the first inorganic encapsulation layer and the second inorganic encapsulation layer. The film formation of the first inorganic encapsulation layer 171 and the second inorganic encapsulation layer 173 is more uniform, which can improve the reliability of the display panel.
[0097] As shown in Figure 10, the non-display area 200 also includes a wiring area 2005. The wiring area 2005 includes the area of the non-display area 2000 excluding the lead-out area 2001. The wiring area 2005 is provided with a blocking structure 29, which is located on the side of the blocking dam 19 away from the display area 100. The inorganic encapsulation layer 170 and the touch insulating layer 186 extend from the display area 100 to the space between the blocking dam 19 and the blocking structure 29. While the first overlapping hole 24 is formed during the patterning process, the blocking structure 29 and the inorganic encapsulation layer 170 and touch insulating layer 186 on the side of the blocking structure 29 away from the blocking dam 19 are removed. This eliminates the need for the second reserved area 2008, which contains the shadows of the inorganic encapsulation layer 170 and the touch insulating layer 186, thereby reducing the bezel corresponding to the display panel wiring area 2005.
[0098] The two inorganic encapsulation layers 170 and the two touch insulating layers 186 are relatively thick. A single etching process is used to etch the overlap area 2002. Due to fluctuations in the etching process, there is a risk that part of the second sub-overlap portion 202 of the overlap area 2002 may be etched away. Therefore, the inorganic encapsulation layer 170 can be patterned using a masking process on the side of the overlap area 2002 closest to the display area 100 and between it and the barrier dam 19.
[0099] As shown in Figure 11, only the first inorganic encapsulation layer 171 can be patterned, forming a first reserved area 2006 between the edge of the first inorganic encapsulation layer 171 and the end of the overlap portion 20 near the display area 100. The second inorganic encapsulation layer 173 extends to the side of the overlap area 2002 away from the display area 100. When forming the first overlap hole 24, it only needs to pass through the first inorganic encapsulation layer 171 and the touch insulating layer 186, which can reduce the risk of the second sub-overlap portion 202 being partially etched away. Of course, the second inorganic encapsulation layer 173 can also be patterned by a mask process first, so that a first reserved area 2006 is formed between the edge of the second inorganic encapsulation layer 173 and the end of the overlap portion 20 near the display area 100. The first inorganic encapsulation layer 171 extends to the lead-out area 2001. When forming the first overlap hole 24, it can pass through the touch insulating layer, the second inorganic encapsulation layer 173, the second overlap layer 204 and the first overlap layer 203. This can reduce the etching depth required to form the first overlap hole 24, determine the process stability and yield, and save one mask process compared to Figure 4.
[0100] As shown in Figure 12, both the first inorganic encapsulation layer 171 and the second inorganic encapsulation layer 173 can be patterned. The edges of the first inorganic encapsulation layer 171 and the second inorganic encapsulation layer 173 and the end of the overlap portion 20 near the display area 100 form a first reserved area 2006, that is, only the touch insulating layer 186 extends to the lead-out area 2001. When forming the first overlap hole 24, it can pass through the touch insulating layer 186, the second overlap layer 204 and the first overlap layer 203. Compared with Figures 7 and 8, the etching depth required to form the first overlap hole 24 can be further reduced, the process stability and yield can be determined, and the risk of the second sub-overlap portion 202 being partially etched away can be better reduced. Compared with Figure 4, it can also save one mask process.
[0101] In Figures 11 and 12, one or more inorganic encapsulation layers 170 can be patterned between the side of the overlap area 2002 near the display area 100 and the side of the barrier dam 19 away from the display area 100. This can ensure that the border of the lead-out area 2001 is narrowed while saving a mask process.
[0102] As shown in Figure 13, since the material of the touch buffer layer 181 is the same as that of the second inorganic encapsulation layer 173, and the refractive index of the touch buffer layer 181 is similar to that of the second inorganic encapsulation layer 173, and both the touch buffer layer 181 and the second inorganic encapsulation layer 173 are formed using plasma chemical vapor deposition (PCVD), the touch buffer layer 181 can be replaced by the second inorganic encapsulation layer 173. The first touch electrode layer 182 is then placed on the second inorganic encapsulation layer 173. Specifically, the touch insulating layer 186 includes a touch overlap layer 183, which is located between the first touch electrode layer 182 and the second touch electrode layer 184, and between the second inorganic encapsulation layer 173 and the touch overlap layer 183. This reduces the thickness of the display panel and saves one PCVD process.
[0103] As shown in Figure 14, the side of the touch buffer layer 181 away from the display area 100 can be spaced apart from the end of the overlapping portion 20 near the display area 100. The side of the touch buffer layer 181 away from the display area 100 is flush with the side of the second inorganic encapsulation layer 173 away from the display area 100. That is, the orthographic projection of the side of the touch buffer layer 181 near the substrate 11 away from the display area 100 onto the substrate 11 overlaps with the orthographic projection of the side of the second inorganic encapsulation layer 173 away from the substrate 11. The touch buffer layer 181 and the second inorganic encapsulation layer 173 being flush can also mean that they use the same film layer; because the materials are the same, there is no obvious distinction between the two layers in terms of process. It should be noted that the side of the touch buffer layer 181 near the display area 100 and the side of the second inorganic encapsulation layer 173 near the display area 100 do not have to be completely flush, allowing for process errors.
[0104] Since the total thickness of the inorganic encapsulation layer 170 and the touch insulating layer 186 is relatively large, the inorganic encapsulation layer 170 and the touch insulating layer 186 can be etched twice without misalignment. That is, the touch buffer layer 181 is patterned in the second mask process, which can save the cost of performing a separate mask process to pattern the touch buffer layer 181. For the entire display panel, it can still save a mask process.
[0105] As shown in Figure 15, for the display panel in Figure 14, the closer the gas source providing the etching gas is to the touch buffer layer 181, the second inorganic encapsulation layer 173, and the first inorganic encapsulation layer 171, the greater the flow rate of the etching gas. Therefore, a first etching segment 241 and a second etching segment 242 are formed on the sides of the touch buffer layer 181, the second inorganic encapsulation layer 173, and the first inorganic encapsulation layer 171. The first etching segment 241 can be located on the side of the first inorganic encapsulation layer 171, and the second etching segment 242 can be located on the side of the touch buffer layer 181 and the side of the second inorganic encapsulation layer 173.
[0106] The angle between the surface of the first etched section 241 and the side of the first inorganic encapsulation layer 171 near the driving backplate 10 is the first included angle A. The angle between the surface of the second etched section 242 and the side of the second inorganic encapsulation layer 173 near the driving backplate 10 is the second included angle B. However, since the flow rate of the etching gas in the first etched section 241 is greater than that in the second etched section 242, the degree of etching of the second etched section 242 is greater than that of the first etched section 241. Therefore, the first included angle is smaller than the second included angle. The size of the first included angle A is 20° to 50°, and the size of the second included angle B is 50° to 90°.
[0107] The first touch electrode layer 182 typically includes multiple first touch traces 1821. Adjacent first touch traces 1821 are not connected to each other. When the second included angle B is greater than the first included angle A, and the edges of the touch buffer layer 181 and the second inorganic encapsulation layer 173 near the substrate 11 overlap with the edge of the first inorganic encapsulation layer 171 away from the substrate 11, a third included angle C is formed between the surface of the first etched section 241 and the surface of the second etched section 242. As shown in FIG16, when etching the first touch electrode layer 182, the first touch electrode layer 182 at the third included angle C is prone to leave residue between two adjacent first touch traces 1821. The residue 1822 connects the two adjacent first touch traces 1821, causing the signal loaded on the first touch trace 1821 to be short-circuited.
[0108] As shown in Figures 17 and 18, therefore, it is considered to perform two or more staggered etching processes on the inorganic encapsulation layer 170 and the touch buffer layer 181. The orthographic projection of the edge of the first etched segment 241 near the driving backplate 10 on the driving backplate 10 is the first orthographic projection. The orthographic projection of the edge of the second etched segment 242 near the driving backplate 10 on the driving backplate 10 is the second orthographic projection. The second orthographic projection is located within the first orthographic projection, that is, the edge of the second orthographic projection is closer to the display area 100 than the edge of the first orthographic projection. A staggered gap is formed between the first and second orthographic projections. The staggered gap can prevent residues between two adjacent second touch leads during process fluctuations, eliminating the risk of short circuit in the touch signal. In order to effectively eliminate the risk of short circuit in the touch signal, the width of the staggered gap is set to be greater than or equal to 0.1 μm.
[0109] As shown in Figure 18, in order to further eliminate the risk of residual traces between two adjacent first touch traces 1821, the size of the first included angle A is set to be the same as the size of the second included angle B, and the size of the first included angle A and the size of the second included angle B are both 20° to 90°.
[0110] As shown in Figure 19, in other embodiments, the first etched segment 241 may be located on the side of the first inorganic encapsulation layer 171 and the side of the second inorganic encapsulation layer 173, and the second etched segment 242 may be located on the side of the touch buffer layer 181. The side of the touch buffer layer 181 is closer to the display area 100 than the side of the first inorganic encapsulation layer 171 and the side of the second inorganic encapsulation layer 173, forming a misalignment gap.
[0111] It should be noted that both the first included angle A and the second included angle B are greater than 20°. This ensures that the width of the first reserved area 2006 is minimized while avoiding the shadow deposition of the inorganic encapsulation layer 170 on the first overlapping hole 24. Referring to Figure 9, the angle between the edge of the inorganic encapsulation layer 170 away from the display area 100 in the wiring area 2005 and the side of the inorganic encapsulation layer 170 near the driving backplate 10 is the fourth included angle D. The fourth included angle D is greater than 20°. This ensures that the shadow deposition of the inorganic encapsulation layer 170 on the side of the blocking structure 29 away from the substrate 11 is minimized while avoiding the shadow deposition of the inorganic encapsulation layer 170 on the side of the blocking structure 29 away from the substrate 11.
[0112] Referring to Figure 13, when the edges of the first inorganic encapsulation layer 171 and the second inorganic encapsulation layer 173 are recessed to be spaced apart from the end of the overlapping portion 20 near the display area 100, as shown in Figure 20, when the first touch electrode layer 182 is directly disposed on the second inorganic encapsulation layer 173, the first etched segment 241 can be located on the side of the first inorganic encapsulation layer 171, and the second etched segment 242 can be located on the side of the second inorganic encapsulation layer 173. At this time, the orthographic projection of the side of the second inorganic encapsulation layer 173 near the display area 100 on the driving backplate 10 is the first orthographic projection, and the orthographic projection of the side of the first inorganic encapsulation layer 171 near the display area 100 on the driving backplate 10 is the second orthographic projection. The second orthographic projection is located within the first orthographic projection, and a misaligned gap is formed between the first orthographic projection and the second orthographic projection, that is, the edge of the second orthographic projection is closer to the display area 100 than the edge of the first orthographic projection.
[0113] This invention also provides a display panel. Referring to FIG14, the display panel has a display area 100 and a non-display area 200 located around the display area 100. The non-display area 200 includes a lead-out area 2001, which includes a region of the non-display area 200 located on one side of the display area 100 along a first direction. The display panel includes a driving backplate 10, an encapsulation layer group 17, and a touch layer group. The driving backplate 10 includes an overlap portion 20 disposed in the lead-out area 2001. The encapsulation layer group 17 is disposed on one side of the driving backplate 10 and includes at least two inorganic encapsulation layers 170. The touch layer group is disposed on the side of the encapsulation layer group 17 away from the driving backplate 10 and includes a first touch electrode layer 182 and a touch buffer. Layer 181, a touch buffer layer 181, is disposed between the first touch electrode layer 182 and the inorganic encapsulation layer 170. The edges of the inorganic encapsulation layer 170 and the edge of the touch buffer layer 181 are spaced apart from the end of the overlap portion 20 near the display area 100. The sides of the touch buffer layer 181 and the inorganic encapsulation layer 170 form a first etched segment 241 and a second etched segment 242 that are sequentially away from the driving backplate 10. The orthographic projection of the first etched segment 241 on the driving backplate 10 is the first orthographic projection, and the orthographic projection of the second etched segment 242 on the driving backplate 10 is the second orthographic projection. The first orthographic projection is closer to the display area 100 than the second orthographic projection, and a misalignment gap is formed between the first orthographic projection and the second orthographic projection. While preventing the touch buffer layer 181 and the inorganic encapsulation layer 170 from extending to the overlap portion 20, it can also prevent the first touch electrode layer 182 from remaining between two adjacent first touch traces 1821.
[0114] As shown in Figure 18, the encapsulation layer group 17 includes a first inorganic encapsulation layer 171 and a second inorganic encapsulation layer 173. The second inorganic encapsulation layer 173 is disposed on the side of the first inorganic encapsulation layer 171 away from the driving backplate 10. The side of the first inorganic encapsulation layer 171 away from the display area 100 is the first etched segment 241. The side of the touch buffer layer 181 and the second inorganic encapsulation layer 173 away from the display area 100 is the second etched segment 242. The angle between the first etched segment 241 and the side of the first inorganic encapsulation layer 171 close to the driving backplate 10 is the first angle. The angle between the second etched segment 242 and the side of the second inorganic encapsulation layer 173 close to the driving backplate 10 is the second angle. The size of the first angle and the size of the second angle are the same or different. The first angle and the second angle are less than or equal to 90°.
[0115] The first inorganic encapsulation layer 171, the second inorganic encapsulation layer 173, and the touch insulating layer 186 are located at the edge between the barrier dam and the barrier structure. Alternatively, they can be misaligned as shown in Figures 15 and 17 to 20, which will not be elaborated further here. It should be noted that when the touch insulating layer 186 includes a touch overlapping layer 183, the side surface of the touch overlapping layer 183 can be on the same plane as the side surface of the touch insulating layer.
[0116] When the display panel is the display panel shown in Figure 8, the present invention also provides a method for manufacturing the display panel, the method comprising:
[0117] Step S10: Provide a drive backplate 10, the drive backplate 10 having an overlap portion 20 in the lead-out area 2001;
[0118] Step S20: Deposit at least two inorganic encapsulation layers 170 on one side of the drive backplane 10 to form an encapsulation layer group 17.
[0119] In step S30, a first touch electrode layer 182 and a touch insulating layer 186 are sequentially formed on the side of the encapsulation layer group 17 away from the driving backplate 10, and the touch insulating layer 186 extends to the lead-out area 2001.
[0120] Step S40: The touch insulating layer 186 and at least two inorganic encapsulation layers 170 are simultaneously etched so that the first overlapping hole 24 passes through the touch insulating layer 186 and at least two inorganic encapsulation layers 170, forming the first overlapping hole 24 exposing the overlapping portion 20 in the lead-out area 2001.
[0121] In step S50, a second touch electrode layer 184 is formed on the side of the touch insulating layer 186 away from the drive back plate 10. The second touch electrode layer 184 passes through the second overlap hole 25 and is connected to the overlap portion 20.
[0122] When the display panel is the display panel shown in the figure, simultaneously etching the touch insulating layer 186 and at least two inorganic encapsulation layers 170 includes simultaneously etching the touch insulating layer 186, the first inorganic encapsulation layer 171 and the second inorganic encapsulation layer 173, so that the first overlapping hole 24 passes through the touch insulating layer 186, the first inorganic encapsulation layer 171 and the second inorganic encapsulation layer 173.
[0123] When the display panel is the display panel shown in Figures 11, 12, and 14, the embodiments of the present invention also provide a method for manufacturing the display panel, the method comprising:
[0124] Step S10: Provide a drive backplate 10, the drive backplate 10 having an overlap portion 20 in the lead-out area 2001;
[0125] Step S20: Deposit at least one inorganic encapsulation layer 170 on one side of the drive backplane 10 to form an encapsulation layer group 17.
[0126] Step S30: Patterning is performed on at least one inorganic encapsulation layer 170 so that the edge of at least one inorganic encapsulation layer 170 and the end of the overlap portion 20 near the display area 100 form a first reserved area 2006.
[0127] In step S40, a first touch electrode layer 182 and a touch insulating layer 186 are sequentially formed on the side of the encapsulation layer group 17 away from the driving backplate 10, and the touch insulating layer 186 extends to the lead-out area 2001.
[0128] Step S50: Etch the touch insulating layer 186, or the touch insulating layer 186 and the unpatterned inorganic encapsulation layer 170, to form a first overlap hole 24 exposing the overlap portion 20 in the lead-out area 2001.
[0129] In step S60, a second touch electrode layer 184 is formed on the side of the touch insulating layer 186 away from the drive back plate 10. The second touch electrode layer 184 passes through the second overlap hole 25 and is connected to the overlap portion 20.
[0130] When the display panel is the same as the display panel in FIG10, etching the touch insulating layer 186 and the unpatterned inorganic encapsulation layer 170 includes etching one of the first inorganic encapsulation layer 171 and the second inorganic encapsulation layer 173 extending to the lead-out area 2001 while etching the touch insulating layer 186, such that the first overlapping hole 24 passes through the touch insulating layer 186, the first inorganic encapsulation layer 171 or the second inorganic encapsulation layer 173.
[0131] When the display panel is the display panel of FIG13, the method may further include: patterning the touch buffer layer 181 while patterning at least one inorganic encapsulation layer 170, such that the side of the touch buffer layer 181 near the display area 100 is flush with the side of the second inorganic encapsulation layer 173 near the display area 100.
[0132] This disclosure also provides a display device, which may include the display panel mentioned above in this disclosure. The specific structure and beneficial effects of the display panel have been described in detail above, and therefore will not be repeated here.
[0133] It should be noted that, in addition to the display panel, the display device also includes other necessary components and parts, such as the casing, circuit board, power cord, etc. Those skilled in the art can make corresponding additions according to the specific usage requirements of the display device, which will not be elaborated here.
[0134] Display devices can be traditional electronic devices, such as mobile phones, computers, televisions, and video recorders, or emerging wearable devices, such as virtual reality devices and augmented reality devices, which will not be listed here.
[0135] Other embodiments of the invention will readily occur to those skilled in the art upon consideration of the specification and practice of the invention described herein. This application is intended to cover any variations, uses, or adaptations of the invention that follow the general principles of the invention and include common knowledge or customary techniques in the art not invented herein. The specification and examples are to be considered exemplary only, and the true scope and spirit of the invention are indicated by the appended claims.
Claims
1. A display panel having a display area and a non-display area located around the periphery of the display area, the non-display area including a lead-out area, the lead-out area including a region of the non-display area located on one side of the display area along a first direction, wherein, include: A drive backplate includes an overlap portion, the overlap portion being disposed in the lead-out area; An encapsulation layer group is disposed on one side of the drive backplate. The encapsulation layer group includes at least two inorganic encapsulation layers. The edges of the at least two inorganic encapsulation layers are spaced apart from the end of the overlapping portion near the display area. Alternatively, at least one inorganic encapsulation layer extends to the lead-out area, and the edges of the inorganic encapsulation layers that do not extend to the lead-out area are spaced apart from the end of the overlapping portion near the display area. A touch layer group is disposed on the side of the encapsulation layer group away from the driving backplate. The touch layer group includes a first touch electrode layer, a second touch electrode layer and a touch insulating layer, and at least a touch insulating layer is provided between the first touch electrode layer and the second touch electrode layer. The lead-out area is provided with a first overlap hole, which passes through the touch insulating layer, or the first overlap hole passes through the touch insulating layer and at least one inorganic encapsulation layer, the first overlap hole exposes the overlap portion, and the second touch electrode layer passes through the first overlap hole and connects to the overlap portion.
2. The display panel according to claim 1, wherein, The encapsulation layer group includes a first inorganic encapsulation layer and a second inorganic encapsulation layer. The second inorganic encapsulation layer is disposed on the side of the first inorganic encapsulation layer away from the driving backplate. Both the first inorganic encapsulation layer and the second inorganic encapsulation layer extend to the lead-out area. The first overlapping hole penetrates the touch insulating layer, the first inorganic encapsulation layer and the second inorganic encapsulation layer.
3. The display panel according to claim 1, wherein, The encapsulation layer group includes a first inorganic encapsulation layer and a second inorganic encapsulation layer. The second inorganic encapsulation layer is disposed on the side of the first inorganic encapsulation layer away from the driving backplate. The first inorganic encapsulation layer or the second inorganic encapsulation layer extends to the lead-out area. The first overlapping hole penetrates the touch insulating layer and the first inorganic encapsulation layer or the second inorganic encapsulation layer.
4. The display panel according to claim 2 or 3, wherein, The touch insulating layer includes a touch overlap layer, which is disposed between the first touch electrode layer and the second touch electrode layer, and the first touch electrode layer is disposed between the second inorganic encapsulation layer and the touch overlap layer.
5. The display panel according to claim 1, wherein, The encapsulation layer group includes a first inorganic encapsulation layer and a second inorganic encapsulation layer. The second inorganic encapsulation layer is disposed on the side of the first inorganic encapsulation layer away from the driving backplate. The touch insulating layer includes a touch buffer layer and a touch overlap layer. The touch overlap layer is disposed between the first touch electrode layer and the second touch electrode layer. The touch buffer layer is disposed between the second inorganic encapsulation layer and the first touch electrode layer. The edges of the first inorganic encapsulation layer, the second inorganic encapsulation layer, and the touch buffer layer are spaced apart from the end of the overlap portion near the display area. The touch overlap layer extends to the lead-out area. The first overlap hole passes through the touch overlap layer to expose the overlap portion.
6. The display panel according to claim 5, wherein, The non-display area is provided with at least one blocking dam. The non-display area also includes a wiring area, which includes the area of the non-display area other than the lead-out area. The wiring area is provided with a blocking structure, which is located on the side of the blocking dam away from the display area. The inorganic encapsulation layer and the touch buffer layer extend from the display area to the space between the blocking dam and the blocking structure.
7. The display panel according to claim 1, wherein, The lead-out area is also provided with a second overlapping hole, which passes through the touch insulating layer, and the second touch electrode layer passes through the second overlapping hole and connects to the first touch electrode layer.
8. The display panel according to claim 1, wherein, The encapsulation layer group includes a first inorganic encapsulation layer and a second inorganic encapsulation layer. The second inorganic encapsulation layer is disposed on the side of the first inorganic encapsulation layer away from the driving backplate. The orthographic projection of the side of the second inorganic encapsulation layer away from the display area on the driving backplate is a first orthographic projection. The orthographic projection of the side of the first inorganic encapsulation layer away from the display area on the driving backplate is a second orthographic projection. The edge of the first orthographic projection is closer to the display area than the edge of the second orthographic projection. A misalignment gap is formed between the first orthographic projection and the second orthographic projection.
9. The display panel according to claim 5, wherein, The orthographic projection of the side of the touch buffer layer away from the display area on the driving backplate is the first orthographic projection, and the orthographic projection of the sides of the first inorganic encapsulation layer and the second inorganic encapsulation layer away from the display area on the driving backplate is the second orthographic projection. The edge of the first orthographic projection is closer to the display area than the edge of the second orthographic projection, and a misalignment gap is formed between the first orthographic projection and the second orthographic projection.
10. The display panel according to claim 5, wherein, The orthographic projection of the side of the touch buffer layer and the second inorganic encapsulation layer away from the display area on the driving backplate is a first orthographic projection, and the orthographic projection of the side of the first inorganic encapsulation layer away from the display area on the driving backplate is a second orthographic projection. The edge of the first orthographic projection is closer to the display area than the edge of the second orthographic projection, and a misalignment gap is formed between the first orthographic projection and the second orthographic projection.
11. The display panel according to claim 10, wherein, The side of the touch buffer layer away from the display area is flush with the side of the second inorganic encapsulation layer away from the display area.
12. The display panel according to claim 10, wherein, The angle between the side of the first inorganic encapsulation layer near the driving backplate and the side of the first inorganic encapsulation layer is the first included angle, and the angle between the side of the touch buffer layer and the second inorganic encapsulation layer and the side of the second inorganic encapsulation layer near the driving backplate is the second included angle. The size of the first included angle may be the same as or different from the size of the second included angle, and the first included angle and the second included angle are less than or equal to 90°.
13. The display panel according to claim 12, wherein, The first included angle is smaller than the second included angle.
14. The display panel according to claim 12, wherein, The first included angle is 20° to 50°, and the second included angle is 50° to 90°.
15. The display panel according to claim 1, wherein, The drive backplane includes a substrate, a first source / drain conductive layer, and a second source / drain conductive layer. The first source / drain conductive layer is disposed on one side of the substrate, and the second source / drain conductive layer is disposed on the side of the first source / drain conductive layer away from the substrate. The overlap portion includes a first sub-overlap portion and a second sub-overlap portion. The first sub-overlap portion is located on the first source / drain conductive layer, and the second sub-overlap portion is located on the second source / drain conductive layer.
16. The display panel according to claim 6, wherein, The angle between the edge of the inorganic encapsulation layer away from the display area and the side of the inorganic encapsulation layer near the driving backplate is a fourth angle, and the fourth angle is greater than 20°.
17. A display panel having a display area and a non-display area located around the periphery of the display area, the non-display area including a lead-out area, the lead-out area including a region of the non-display area located on one side of the display area along a first direction, wherein, include: A drive backplate includes an overlap portion, the overlap portion being disposed in the lead-out area; An encapsulation layer assembly is disposed on one side of the drive backplate, and the encapsulation layer assembly includes at least two inorganic encapsulation layers; A touch layer group is disposed on the side of the encapsulation layer group away from the driving backplate. The touch layer group includes a first touch electrode layer and a touch buffer layer. The touch buffer layer is disposed between the first touch electrode layer and the inorganic encapsulation layer. The edges of the inorganic encapsulation layer and the touch buffer layer are spaced apart from the end of the overlapping portion near the display area. The sides of the touch buffer layer and the inorganic encapsulation layer form a first etched segment and a second etched segment that are sequentially away from the driving backplate. The orthographic projection of the first etched segment on the driving backplate is a first orthographic projection, and the orthographic projection of the second etched segment on the driving backplate is a second orthographic projection. The first orthographic projection is closer to the display area than the second orthographic projection, and a misalignment gap is formed between the first orthographic projection and the second orthographic projection.
18. The display panel according to claim 17, wherein, The encapsulation layer group includes a first inorganic encapsulation layer and a second inorganic encapsulation layer. The second inorganic encapsulation layer is disposed on the side of the first inorganic encapsulation layer away from the driving backplate. The side of the first inorganic encapsulation layer away from the display area is a first etched segment. The side of the touch buffer layer and the second inorganic encapsulation layer away from the display area is a second etched segment. The angle between the first etched segment and the side of the first inorganic encapsulation layer near the driving backplate is a first included angle. The angle between the second etched segment and the side of the second inorganic encapsulation layer near the driving backplate is a second included angle. The size of the first included angle may be the same as or different from the size of the second included angle. The first included angle and the second included angle are less than or equal to 90°.
19. A method for manufacturing a display panel according to any one of claims 1 to 16, wherein, The method includes: A drive backplate is provided, wherein the drive backplate has an overlapping portion in the lead-out area; At least two inorganic encapsulation layers are deposited on one side of the drive backplate to form an encapsulation layer group; A first touch electrode layer and a touch insulating layer are sequentially formed on the side of the encapsulation layer group away from the driving backplate, and the touch insulating layer extends to the lead-out area; The touch insulating layer and the at least two inorganic encapsulation layers are simultaneously etched so that the first overlapping hole passes through the touch insulating layer and the at least two inorganic encapsulation layers, forming a first overlapping hole that exposes the overlapping portion in the lead-out area; A second touch electrode layer is formed on the side of the touch insulating layer away from the drive back plate, and the second touch electrode layer passes through the first overlap hole and is connected to the overlap portion.
20. A method for manufacturing a display panel according to any one of claims 1 to 16, wherein, The method includes: A drive backplate is provided, wherein the drive backplate has an overlapping portion in the lead-out area; At least one inorganic encapsulation layer is deposited on one side of the drive backplate to form an encapsulation layer group; The at least one inorganic encapsulation layer is patterned so that the edge of the at least one inorganic encapsulation layer and the end of the overlapping portion near the display area form a first reserved area; A first touch electrode layer and a touch insulating layer are sequentially formed on the side of the encapsulation layer group away from the driving backplate, and the touch insulating layer extends to the lead-out area; The touch insulating layer, or the touch insulating layer and the unpatterned inorganic encapsulation layer, are etched to form a first overlap hole in the lead-out area that exposes the overlap portion; A second touch electrode layer is formed on the side of the touch insulating layer away from the drive back plate, and the second touch electrode layer passes through the first overlap hole and is connected to the overlap portion.
21. A display device, wherein, Includes the display panel as described in any one of claims 1 to 18.
