Display controller capable of reducing using high speed buffer store and its frame regulating method
A technology for displaying controllers and adjustment methods, which is applied to static indicators, cathode ray tube indicators, instruments, etc., and can solve problems such as huge memory capacity, increased production costs of display controllers, and reduced competitiveness
Patent Information
- Authority / Receiving Office
- CN · China
- Current Assignee / Owner
- Publication Date
- 2007-05-02
- Estimated Expiration
- Not applicable · inactive patent
Smart Images
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Abstract
Description
technical field
[0001] The invention relates to a display controller and a frame adjustment method thereof, in particular to a display controller capable of reducing cache usage and an adjustment method thereof. Background technique
[0002] With the advancement of technology, various electronic products have gradually become the focus of human life, and the display effect of electronic products has become a major factor that attracts consumers to buy. The display screen of an electronic product is obtained by processing and superimposing multiple frames to obtain the final display screen. Its operation is such as superimposing the processed sub-frames on the main frame to obtain a display image.
[0003] The above applications are used, for example, in function menus displayed by electronic devices. Various functions that can be used by electronic devices have increased significantly. In order to facilitate the selection of various function options in the electronic devi...
Examples
Embodiment Construction
[0034] The function of the display controller is to move, scale, mirror or rotate the source frame to be superimposed to the target frame, and then superimpose it to the target frame. The concept of the present invention is to reduce the internal memory configured in the display controller by changing the way of hardware design without affecting the aforementioned processing functions, which can effectively save the production cost of the display controller.
[0035] Please refer to FIG. 2 , which shows a block diagram of a display controller according to the present invention. The display controller 50 accesses the image data from the external memory 10 through the bus 20, and outputs the processed image data to a display 40 having n rows of pixels×m columns of pixels to form a display 40 having n rows of pixels×m columns of pixels Display screen, n and m are non-zero positive integers. The external memory 10 can be, for example, a synchronous dynamic random access memory (S...