DALI (Digital Addressable Lighting Interface) power supply driving circuit

Abstract

The utility model discloses a DALI power supply driving circuit comprising a DC / DC circuit, a current limiting circuit and an interface circuit. Wherein the DC / DC circuit is connected with the input end of the power supply, and the output end is connected with the input end of the current limiting circuit; the output end of the current limiting circuit is connected with the interface circuit through a port J3. The interface circuit is connected with the single-chip microcomputer and connected with a tested device through the port J3. The DC / DC circuit is used for reducing output voltage for supplying power to the current limiting circuit and the interface circuit; the current limiting circuit is used for limiting current flowing into the interface circuit; the single-chip microcomputer inquires and / or controls the address and / or the working state of the tested device through the interface circuit. According to the utility model, the application range is simple, a conventional 24V power supply can be directly connected, and voltage conversion is not needed; various current-limiting protection circuits are provided, so that the system safety can be improved; and the anti-interference capability of the DALI system can be provided.

Description

Technical Field

[0001] The utility model relates to a DALI power supply driving circuit, belonging to the technical field of DALI power supply driving circuits. Background Art

[0002] In lighting systems, it is usually necessary to configure a load LED driving circuit to achieve lighting effects in different scenarios. There are many ways to configure, from manual adjustment to automatic adjustment, each with different methods. Currently, the mainstream market uses DALI (Digital Addressable Lighting Interface) technology to adjust the load LED.

[0003] However, the existing DALI power drive circuit needs to undergo voltage conversion before it can be connected to a conventional 24V power supply, and since current limiting protection circuits are rarely used, the system security is insufficient. Utility Model Content

[0004] The purpose of the utility model is to provide a DALI power supply driving circuit to solve the above problems.

[0005] The technical solution adopted by the utility model is:

[0006] A DALI power drive circuit includes a DC / DC circuit, a current limiting circuit and an interface circuit; wherein the DC / DC circuit is connected to the input end of the power supply, and the output end is connected to the input end of the current limiting circuit; the output end of the current limiting circuit is connected to the interface circuit through a port J3, and the interface is connected to a single-chip microcomputer and connected to a device under test through the port J3;

[0007] The DC / DC circuit is used to reduce the output voltage that supplies power to the current limiting circuit and the interface circuit;

[0008] The current limiting circuit is used to limit the current flowing into the interface circuit;

[0009] The single chip microcomputer inquires and / or controls the address and / or working status of the device under test through the interface circuit.

[0010] Preferably, the DC / DC circuit includes a chip U7, capacitors C18, C20, C21, C22, C23, resistors R28, R29, R32, R33, electrolytic capacitors C21, C23, inductor L2, diode D10, and light-emitting diode LED4;

[0011] Among them, one end of the capacitor C22, the positive electrode of the electrolytic capacitor C23, and the 7th pin of the chip U7 are connected to the input end of the power supply; the other end of the capacitor C22, the negative electrode of the electrolytic capacitor C23, and the 6th and 9th pins of the chip U7 are all connected to GND;

[0012] One end of the resistor R28 is connected to the input end of the power supply, and the other end is connected to the 5th pin of the chip U7;

[0013] Pin 1 of chip U7 is connected to one end of capacitor C18, and the other end of capacitor C18 is connected to one end of inductor L2 and the cathode of diode D10; pin 8 of chip U7 is also connected to the cathode of diode D10, and the anode of diode D10 is connected to GND; the other end of inductor L2 is connected to the input end of the current limiting circuit;

[0014] One end of the resistor R29 is connected in series with one end of the resistor R33, and the cathode of the light emitting diode LED4 is connected in series with one end of the resistor R32, and they are all connected in parallel with the capacitor C20 and the electrolytic capacitor C21, and one end of the capacitor C20, the anode of the electrolytic capacitor C21, the other end of the resistor R29, and the anode of the light emitting diode LED4 are all connected to the other end of the inductor L2; the other end of the capacitor C20, the cathode of the electrolytic capacitor C21, the other end of the resistor R33, and the other end of the resistor R32 are all connected to GND;

[0015] Pin 4 of chip U7 collects the voltage divider value of resistors R29 and R33.

[0016] Preferably, the current limiting circuit includes resistors R24, R25, R26, R27, R30, R31, R34, R35, a field effect transistor Q5, an NPN transistor Q6, diodes D9, D11, and a capacitor C24;

[0017] Among them, after the resistors R24, R25, R26 and R27 are connected in parallel, one end is connected to the output end of the DC / DC circuit, and the other end is connected to the gate of the field effect transistor Q5 and the collector of the NPN transistor; the drain of the field effect transistor Q5 is also connected to the output end of the DC / DC circuit;

[0018] After resistors R30 and R31 are connected in parallel, one end is connected to the source of field effect transistor Q5 and the base of NPN transistor, and the other end is connected to the positive electrode of diode D9; the emitter of NPN light emitting diode is also connected to the positive electrode of diode D9;

[0019] One end of the capacitor C24 is connected in series with one end of the resistor R35 and then connected in parallel with the resistor R34, and connected to the cathode of the diode D9 as the DALI signal DA+ output end, and the input end of the interface circuit. The other end of the resistor R34 and the other end of the resistor R35 are connected in parallel with the anode of the diode D11 as the DALI signal DA- output end, and the input end of the interface circuit.

[0020] The cathode of diode D11 is connected to GND.

[0021] Preferably, the interface circuit includes a rectifier bridge D4, an interface current limiting circuit 1, a receiving circuit, an interface current limiting circuit 2, and a sending circuit;

[0022] Among them, the 4th and 2nd pins of the rectifier bridge D4 are respectively connected to the cathode of the diode D9 and the other end of the resistors R34 and R35 through the port J3, so as to receive the DALI signals DA+ and DA-; the 1st pin of the rectifier bridge D4 is respectively connected to the interface current limiting circuit 1 and the interface current limiting circuit 2, and connected to ISO_VCC; the 3rd pin of the rectifier bridge D4 is connected to ISO_GND;

[0023] The single chip microcomputer is connected to the receiving circuit and is used to query the address and / or working status of the device under test;

[0024] The single chip microcomputer is also connected to the transmitting circuit to control the working state of the device under test;

[0025] The interface current limiting circuit is used to limit the current flowing into the receiving circuit when the microcontroller queries the device under test;

[0026] The second interface current limiting circuit is used to limit the current flowing into the rectifier bridge D4 when the microcontroller controls the device under test.

[0027] Preferably, the interface current limiting circuit 1 includes resistors R11, R12, and PNP transistors Q1, Q2;

[0028] Among them, one end of the resistor R12 and the emitter of the PNP transistor Q1 are connected to the pin 1 of the rectifier bridge D4; the other end of the resistor R12 is connected to the base of the PNP transistor Q1 and the emitter of the PNP transistor Q2;

[0029] The collector of the PNP transistor Q1 and the base of the PNP transistor Q2 are connected to one end of the resistor R11, and the other end of the resistor R11 is connected to the collector of the PNP transistor Q2 and then connected to pin 1 of U3.

[0030] Preferably, the second interface current limiting circuit comprises resistors R15, R17, R18, NPN transistors Q3, Q4, and capacitor C10;

[0031] Among them, the collector of the NPN transistor Q3 is connected to the 1st pin of the rectifier bridge D4, the base is connected to one end of the resistor R15, and the emitter is connected to one end of the resistor R18; the other end of the resistor R15 is connected to the sending circuit;

[0032] One end of the resistor R17 and the collector of the NPN transistor Q4 are connected to the base and emitter of the NPN transistor Q3 respectively; the other end of the resistor R17 and the base of the NPN transistor Q4 are connected to one end of the capacitor C10;

[0033] The other end of the resistor R18, the emitter of the NPN transistor Q4, and the other end of the capacitor C10 are all connected to ISO_GND.

[0034] Preferably, the receiving circuit includes optical couplers U3, R13;

[0035] The transmitting circuit includes an optical coupler U5, resistors R14 and R16, a voltage stabilizing diode D5, and a capacitor C7;

[0036] Among them, the 1st pin of the optical coupler U3 is connected to the resistor R11 and the collector of the PNP transistor Q2, the 4th pin is connected to VCC, the 3rd pin is connected to one end of the resistor R13 and the single chip computer; the other end of the resistor R13 is connected to GND;

[0037] Pin 1 of the optocoupler U5 is connected to VCC, pin 2 is connected to one end of the resistor R14, pin 4 is connected to pin 2 of the optocoupler U3, the cathode of the voltage zener diode D5, and one end of the capacitor C7, and pin 2 is connected to the other end of the resistor R16 and the resistor R15;

[0038] The other end of the resistor R14 is connected to the single chip microcomputer, and the anode of the voltage stabilizing diode D5 and the other end of the capacitor C7 are both connected to ISO_GND.

[0039] The beneficial effects of the utility model are:

[0040] 1. Simple scope of application: conventional 24V power supply can be directly connected without voltage conversion;

[0041] 2. Equipped with a variety of current limiting protection circuits to improve system safety;

[0042] 3. Provide DALI system anti-interference capability. BRIEF DESCRIPTION OF THE DRAWINGS

[0043] Figure 1 This is the overall structure diagram of the utility model;

[0044] Figure 2 is a circuit diagram of a DC / DC circuit;

[0045] Figure 3 is a circuit diagram of a current limiting circuit;

[0046] Figure 4 This is the circuit diagram of the interface circuit. DETAILED DESCRIPTION

[0047] The utility model is specifically introduced below in conjunction with the accompanying drawings and embodiments.

[0048] like Figure 1-4 As shown: This embodiment is a DALI power drive circuit, including a DC / DC circuit, a current limiting circuit and an interface circuit.

[0049] Among them, participants Figure 2 As shown, the DC / DC circuit includes a chip U7, capacitors C18, C20, C21, C22, C23, resistors R28, R29, R32, R33, electrolytic capacitors C21, C23, inductor L2, diode D10, and light-emitting diode LED4; wherein, one end of capacitor C22, the positive electrode of electrolytic capacitor C23, and pin 7 of chip U7 are connected to the input end of the power supply; the other end of capacitor C22, the negative electrode of electrolytic capacitor C23, and pins 6 and 9 of chip U7 are all connected to GND; one end of resistor R28 is connected to the input end of the power supply, and the other end is connected to pin 5 of chip U7; pin 1 of chip U7 is connected to one end of capacitor C18, and the other end of capacitor C18 is connected to one end of inductor L2 and the negative electrode of diode D10; Pin 8 of chip U7 is also connected to the cathode of diode D10, and the anode of diode D10 is connected to GND; the other end of inductor L2 is connected to the input end of the current limiting circuit; one end of resistor R29 is connected in series with one end of resistor R33, and the cathode of light-emitting diode LED4 is connected in series with one end of resistor R32, and they are all connected in parallel with capacitor C20 and electrolytic capacitor C21, and one end of capacitor C20, the anode of electrolytic capacitor C21, the other end of resistor R29, and the anode of light-emitting diode LED4 are all connected to the other end of inductor L2; the other end of capacitor C20, the cathode of electrolytic capacitor C21, the other end of resistor R33, and the other end of resistor R32 are all connected to GND; pin 4 of chip U7 collects the voltage division value of resistors R29 and R33 to provide a reference voltage.

[0050] The DC24V input of the power supply is stepped down through the chip U7 to output the voltage U0, U0=1.221*(R33+R29) / R33=18.5V.

[0051] See also Figure 3As shown, the current limiting circuit includes resistors R24, R25, R26, R27, R30, R31, R34, R35, field effect tube Q5, NPN transistor Q6, diodes D9, D11, and capacitor C24; wherein, after resistors R24, R25, R26, and R27 are connected in parallel, one end is connected to the output end of the DC / DC circuit, and the other end is connected to the gate of the field effect tube Q5 and the collector of the NPN transistor; the drain of the field effect tube Q5 is also connected to the output end of the DC / DC circuit; after resistors R30 and R31 are connected in parallel, one end is connected to the source of the field effect tube Q5. , the base of the NPN transistor is connected, and the other end is connected to the anode of the diode D9; the emitter of the NPN light emitting diode is also connected to the anode of the diode D9; one end of the capacitor C24 is connected in series with one end of the resistor R35 and then connected in parallel with the resistor R34, and is connected to the cathode of the diode D9 as the DALI signal DA+ output end, and the input end of the interface circuit, the other end of the resistor R34 and the other end of the resistor R35 are connected in parallel with the anode of the diode D11, as the DALI signal DA- output end, to the input end of the interface circuit; the cathode of the diode D11 is connected to GND.

[0052] The output voltage U0 of the DC / DC circuit is output as DALI signals DA+ and DA- through the current limiting circuit. The maximum DALI output current is Imax, where Imax=0.7 / (R30 / / R31)=0.25A.

[0053] See also Figure 4 As shown, the interface circuit includes a rectifier bridge D4, an interface current limiting circuit 1, a receiving circuit, an interface current limiting circuit 2, and a sending circuit.

[0054] The current limiting circuit and the device under test (not shown in the figure) are connected to the rectifier bridge through port J3. Pin 4 and pin 2 of the rectifier bridge D4 are connected to the cathode of the diode D9 and the other end of the resistors R34 and R35 through port J3, respectively, for receiving DALI signals DA+ and DA-; pin 1 of the rectifier bridge D4 is connected to ISO_VCC; pin 3 of the rectifier bridge D4 is connected to ISO_GND.

[0055] The interface current limiting circuit 1 includes resistors R11, R12, PNP transistors Q1, Q2; wherein, one end of the resistor R12 and the emitter of the PNP transistor Q1 are connected to pin 1 of the rectifier bridge D4; the other end of the resistor R12 is connected to the base of the PNP transistor Q1 and the emitter of the PNP transistor Q2; the collector of the PNP transistor Q1 and the base of the PNP transistor Q2 are connected to one end of the resistor R11, and the other end of the resistor R11 is connected to the collector of the PNP transistor Q2 and then to pin 1 of U3.

[0056] The maximum current limiting value of the interface current limiting circuit 1 is Irx=0.7 / R12=2mA.

[0057] The second interface current limiting circuit includes resistors R15, R17, R18, NPN transistors Q3, Q4, and capacitor C10; wherein, the collector of the NPN transistor Q3 is connected to pin 1 of the rectifier bridge D4, the base is connected to one end of the resistor R15, and the emitter is connected to one end of the resistor R18; the other end of the resistor R15 is connected to the sending circuit; one end of the resistor R17 and the collector of the NPN transistor Q4 are respectively connected to the base and emitter of the NPN transistor Q3; the other end of the resistor R17 and the base of the NPN transistor Q4 are both connected to one end of the capacitor C10; the other end of the resistor R18, the emitter of the NPN transistor Q4 and the other end of the capacitor C10 are all connected to ISO_GND.

[0058] The maximum current limiting value of the interface current limiting circuit 2 is Itx=0.7 / R18=460mA.

[0059] The receiving circuit includes an optocoupler U3 and R13; the sending circuit includes an optocoupler U5, resistors R14 and R16, a zener diode D5, and a capacitor C7; wherein, pin 1 of the optocoupler U3 is connected to the resistor R11 and the collector of the PNP transistor Q2, pin 4 is connected to VCC, and pin 3 is connected to one end of the resistor R13 and the microcontroller pin DL_RX; the other end of the resistor R13 is connected to GND; pin 1 of the optocoupler U5 is connected to VCC, pin 2 is connected to one end of the resistor R14, pin 4 is connected to pin 2 of the optocoupler U3, the cathode of the zener diode D5, and one end of the capacitor C7, and pin 2 is connected to the resistor R16 and the other end of the resistor R15; the other end of the resistor R14 is connected to the microcontroller pin DL_TX, and the anode of the zener diode D5 and the other end of the capacitor C7 are both connected to ISO_GND.

[0060] The device under test is connected to port J3. When querying the address or working status of the device under test, the device under test reaches pin 1 of the optocoupler U3 through the interface current limiting circuit composed of the rectifier bridge D4, PNP transistor Q1 and resistor R12, and forms a loop with the voltage regulator diode D5 / / capacitor C7, so that the primary of the optocoupler U3 is turned on, and the microcontroller pin DL_RX detects the signal to query the device under test. When controlling the device under test, the microcontroller pin DL_TX sends a signal (which can be a signal to adjust the working status), the primary of the optocoupler U5 is turned on, and the power supply of pin 4 is provided by the discharge of capacitor C7, and the NPN transistor Q3 is turned on through pin 3, and then fed back to the device under test through the rectifier bridge D4 to control the device under test.

[0061] The above is only a preferred implementation of the utility model patent. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principle of the utility model patent. These improvements and modifications should also be regarded as the protection scope of the utility model patent.

Claims

1. A DALI power drive circuit, characterized in that: It includes a DC / DC circuit, a current limiting circuit and an interface circuit; wherein the DC / DC circuit is connected to the input end of the power supply, and the output end is connected to the input end of the current limiting circuit; the output end of the current limiting circuit is connected to the interface circuit through a port J3, and the interface circuit is connected to the single-chip microcomputer and connected to the device under test through the port J3; The DC / DC circuit is used to reduce the output voltage that supplies power to the current limiting circuit and the interface circuit; The current limiting circuit is used to limit the current flowing into the interface circuit; The single chip microcomputer inquires and / or controls the address and / or working status of the device under test through the interface circuit.

2. The DALI power drive circuit according to claim 1, characterized in that: The DC / DC circuit includes a chip U7, capacitors C18, C20, C21, C22, C23, resistors R28, R29, R32, R33, electrolytic capacitors C21, C23, inductor L2, diode D10, and light-emitting diode LED4; Among them, one end of the capacitor C22, the positive electrode of the electrolytic capacitor C23, and the 7th pin of the chip U7 are connected to the input end of the power supply; the other end of the capacitor C22, the negative electrode of the electrolytic capacitor C23, and the 6th and 9th pins of the chip U7 are all connected to GND; One end of the resistor R28 is connected to the input end of the power supply, and the other end is connected to the 5th pin of the chip U7; Pin 1 of chip U7 is connected to one end of capacitor C18, and the other end of capacitor C18 is connected to one end of inductor L2 and the cathode of diode D10; pin 8 of chip U7 is also connected to the cathode of diode D10, and the anode of diode D10 is connected to GND; the other end of inductor L2 is connected to the input end of the current limiting circuit; One end of the resistor R29 is connected in series with one end of the resistor R33, and the cathode of the light emitting diode LED4 is connected in series with one end of the resistor R32, and they are all connected in parallel with the capacitor C20 and the electrolytic capacitor C21, and one end of the capacitor C20, the anode of the electrolytic capacitor C21, the other end of the resistor R29, and the anode of the light emitting diode LED4 are all connected to the other end of the inductor L2; the other end of the capacitor C20, the cathode of the electrolytic capacitor C21, the other end of the resistor R33, and the other end of the resistor R32 are all connected to GND; Pin 4 of chip U7 collects the voltage divider value of resistors R29 and R33.

3. The DALI power drive circuit according to claim 2, characterized in that: The current limiting circuit includes resistors R24, R25, R26, R27, R30, R31, R34, R35, field effect transistor Q5, NPN transistor Q6, diodes D9, D11, and capacitor C24; Among them, after the resistors R24, R25, R26 and R27 are connected in parallel, one end is connected to the output end of the DC / DC circuit, and the other end is connected to the gate of the field effect transistor Q5 and the collector of the NPN transistor; the drain of the field effect transistor Q5 is also connected to the output end of the DC / DC circuit; After resistors R30 and R31 are connected in parallel, one end is connected to the source of field effect transistor Q5 and the base of NPN transistor, and the other end is connected to the positive electrode of diode D9; the emitter of NPN light emitting diode is also connected to the positive electrode of diode D9; One end of the capacitor C24 is connected in series with one end of the resistor R35 and then connected in parallel with the resistor R34, and connected to the cathode of the diode D9 as the DALI signal DA+ output end, and the input end of the interface circuit. The other end of the resistor R34 and the other end of the resistor R35 are connected in parallel with the anode of the diode D11 as the DALI signal DA- output end, and the input end of the interface circuit. The cathode of diode D11 is connected to GND.

4. The DALI power drive circuit according to claim 3, characterized in that: The interface circuit includes a rectifier bridge D4, an interface current limiting circuit 1, a receiving circuit, an interface current limiting circuit 2, and a sending circuit; Among them, the 4th and 2nd pins of the rectifier bridge D4 are respectively connected to the cathode of the diode D9 and the other end of the resistors R34 and R35 through the port J3, so as to receive the DALI signals DA+ and DA-; the 1st pin of the rectifier bridge D4 is respectively connected to the interface current limiting circuit 1 and the interface current limiting circuit 2, and connected to ISO_VCC; the 3rd pin of the rectifier bridge D4 is connected to ISO_GND; The single chip microcomputer is connected to the receiving circuit and is used to query the address and / or working status of the device under test; The single chip microcomputer is also connected to the transmitting circuit to control the working state of the device under test; The interface current limiting circuit is used to limit the current flowing into the receiving circuit when the microcontroller queries the device under test; The second interface current limiting circuit is used to limit the current flowing into the rectifier bridge D4 when the microcontroller controls the device under test.

5. The DALI power drive circuit according to claim 4, characterized in that: The interface current limiting circuit 1 includes resistors R11, R12, and PNP transistors Q1, Q2; Among them, one end of the resistor R12 and the emitter of the PNP transistor Q1 are connected to the pin 1 of the rectifier bridge D4; the other end of the resistor R12 is connected to the base of the PNP transistor Q1 and the emitter of the PNP transistor Q2; The collector of the PNP transistor Q1 and the base of the PNP transistor Q2 are connected to one end of the resistor R11, and the other end of the resistor R11 is connected to the collector of the PNP transistor Q2 and then connected to pin 1 of U3.

6. The DALI power drive circuit according to claim 5, characterized in that: The interface current limiting circuit 2 includes resistors R15, R17, R18, NPN transistors Q3, Q4, and capacitor C10; Among them, the collector of the NPN transistor Q3 is connected to the 1st pin of the rectifier bridge D4, the base is connected to one end of the resistor R15, and the emitter is connected to one end of the resistor R18; the other end of the resistor R15 is connected to the sending circuit; One end of the resistor R17 and the collector of the NPN transistor Q4 are connected to the base and emitter of the NPN transistor Q3 respectively; the other end of the resistor R17 and the base of the NPN transistor Q4 are connected to one end of the capacitor C10; The other end of the resistor R18, the emitter of the NPN transistor Q4, and the other end of the capacitor C10 are all connected to ISO_GND.

7. The DALI power drive circuit according to claim 6, characterized in that: The receiving circuit includes an optical coupler U3, R13; The transmitting circuit includes an optical coupler U5, resistors R14 and R16, a voltage stabilizing diode D5, and a capacitor C7; Among them, the 1st pin of the optical coupler U3 is connected to the resistor R11 and the collector of the PNP transistor Q2, the 4th pin is connected to VCC, the 3rd pin is connected to one end of the resistor R13 and the single chip computer; the other end of the resistor R13 is connected to GND; Pin 1 of the optocoupler U5 is connected to VCC, pin 2 is connected to one end of the resistor R14, pin 4 is connected to pin 2 of the optocoupler U3, the cathode of the voltage zener diode D5, and one end of the capacitor C7, and pin 2 is connected to the other end of the resistor R16 and the resistor R15; The other end of the resistor R14 is connected to the single chip microcomputer, and the anode of the voltage stabilizing diode D5 and the other end of the capacitor C7 are both connected to ISO_GND.

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