Circuit for automatically triggering CPU to burn BIOS
By designing a circuit that automatically triggers the CPU to burn BIOS, the automatic burning process is realized by combining switches, self-locking and indicator circuit units, and the problem of high cost of CPU burning circuits in the prior art is solved, with simple structure and cost Low advantages.
Patent Information
- Application Number
- CN202420160424.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-01-22
- Publication Date
- 2024-12-13
- Estimated Expiration
- 2034-01-22
AI Technical Summary
In the prior art, the circuit cost of CPU burning the BIOS is relatively high, and an additional MCU is required for control during the burning process, which increases complexity and cost.
A circuit that automatically triggers the CPU to burn the BIOS is designed, including switching circuit units, self-locking circuit units and indicator circuit units. Through the cooperation of these circuit units, automatic triggering and signal maintenance during burning is achieved, avoiding additional MCU dependency.
The circuit is simple in structure and low in cost. It can automatically trigger and maintain the indicator signal during the burning process, and automatically turn off the signal after the burning is completed, realizing an automated burning process without additional MCU control.
Smart Images
Figure CN222167586U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the technical field of computers, in particular to a circuit for automatically triggering a CPU to burn BIOS. Background Art
[0002] The computer BIOS is responsible for initializing and testing the hardware of the computer system when it is turned on to ensure that the system can work properly. If the hardware is not normal, it will stop working immediately and feedback the erroneous device information to the user. BIOS is a set of programs used to connect computer hardware and software programs. This program provides the lowest level and most direct hardware control for the computer. BIOS includes the system power-on self-test (Power On System Test, POST) program module and the system startup boot program module. These program modules are mainly responsible for the communication between the motherboard and other computer hardware devices.
[0003] When the computer is powered on, the BIOS will check all the devices inside the computer, including the microprocessor (CPU), memory, system motherboard, CMOS memory, parallel and serial communication subsystems, floppy disk and hard disk subsystems, and keyboard. After the self-test is completed, the system will search for the operating system in the specified drive and load the operating system into the memory. If the BIOS fails, the computer system will not be able to perform tests such as memory (RAM), hard disk (HD), central processing unit (CPU), etc. as soon as it is turned on, and the computer system will not be able to successfully complete the boot process.
[0004] When the BIOS manufacturer releases a newer version of the BIOS, the manufacturer will make the BIOS quick program and the update file including the program code for updating the BIOS available for users to download through the network to update the BIOS of the computer system. After the user downloads the quick program and the update file including the BIOS program code provided by the BIOS manufacturer from the network to the local host, the user can use the BIOS quick program to reprogram the BIOS update file into the BIOS memory to overwrite the original BIOS content or the newly added BIOS content to complete the BIOS update procedure. In the upgrade and update process, the CPU cooperates with other MCUs to burn for burning, and the circuit cost is high. Utility Model Content
[0005] The technical problem solved by the utility model is to provide a low-cost circuit for automatically triggering CPU to burn BIOS.
[0006] The utility model provides a circuit for automatically triggering a CPU to burn BIOS, comprising a switch circuit unit, a self-locking circuit unit and an indication circuit unit, wherein the switch circuit is electrically connected to the self-locking circuit unit and the indication circuit unit and is used to turn on the indication circuit unit; the self-locking circuit unit is electrically connected to the CPU and the indication circuit unit and is used to keep the indication circuit unit from sending an indication signal for a preset time.
[0007] Preferably, the switching circuit unit includes a first resistor, a second resistor and a first field effect transistor, the first end of the first resistor is electrically connected to the source of the first field effect transistor, and the second end of the first resistor is electrically connected to the self-locking circuit unit; the first end of the second resistor is electrically connected to the gate of the first field effect transistor, and the second end of the second resistor is electrically connected to the second end of the first resistor; the source of the first field effect transistor is used to be electrically connected to a power supply, and the drain of the first field effect transistor is electrically connected to the indication circuit unit.
[0008] Preferably, the switch circuit unit further includes a first capacitor, a first end of the first capacitor is electrically connected to the source of the first field effect transistor, and a second end of the first capacitor is electrically connected to the gate of the first field effect transistor.
[0009] Preferably, the self-locking circuit unit includes a third resistor and a second field effect transistor, the first end of the third resistor is electrically connected to the CPU, and the second end of the third resistor is electrically connected to the gate of the second field effect transistor; the source of the second field effect transistor is grounded, and the drain of the second field effect transistor is electrically connected to the second end of the first resistor.
[0010] Preferably, the self-locking circuit unit further includes a second capacitor, a first end of the second capacitor is electrically connected to the gate of the second field effect transistor, and a second end of the second capacitor is grounded.
[0011] Preferably, the self-locking circuit unit further includes a first diode, an anode of the first diode is electrically connected to the CPU, and a cathode of the first diode is electrically connected to a first end of the third resistor; the third resistor is electrically connected to the CPU via the first diode.
[0012] Preferably, the self-locking circuit unit further includes a second diode, an anode of the second diode is electrically connected to the drain of the first field effect transistor, and a cathode of the second diode is electrically connected to the gate of the second field effect transistor.
[0013] Preferably, the indicating circuit unit comprises a third diode, an anode of the third diode is electrically connected to the drain of the first field effect transistor, and a cathode of the third diode is grounded.
[0014] Preferably, the indicating circuit unit further comprises a fourth resistor, a first end of the fourth resistor is electrically connected to the cathodes of the three diodes, a second end of the fourth resistor is grounded, and the cathode of the third diode is grounded through the fourth resistor.
[0015] Preferably, the first field effect transistor is a P-channel enhancement type field effect transistor.
[0016] Preferably, the circuit for automatically triggering the CPU to burn BIOS further includes a delay circuit unit, the delay circuit unit includes a fifth resistor, a sixth resistor, a seventh resistor, a third capacitor, a fourth capacitor, a third field effect transistor and a fourth field effect transistor, the first end of the fifth resistor is used to be electrically connected to a power supply, and the second end of the fifth resistor is electrically connected to the gate of the third field effect transistor;
[0017] The first end of the sixth resistor is used to be electrically connected to the CPU, and the second end of the sixth resistor is electrically connected to the drain of the third field effect transistor and the gate of the fourth field effect transistor; the first end of the seventh resistor is electrically connected to the drain of the fourth field effect transistor, and the second end of the seventh resistor is used to be electrically connected to the power switch; the first end of the third capacitor is electrically connected to the second end of the fifth resistor, and the second end of the third capacitor is grounded; the first end of the fourth capacitor is electrically connected to the second end of the sixth resistor, and the second end of the fourth capacitor is grounded; the source of the third field effect transistor and the source of the fourth field effect transistor are grounded.
[0018] The utility model has the following beneficial effects: the utility model cooperates between a switch circuit unit, a self-locking circuit unit and an indication circuit unit, wherein the switch circuit is electrically connected to the self-locking circuit unit and the indication circuit unit to turn on the indication circuit unit; the self-locking circuit unit is electrically connected to the CPU and the indication circuit unit to keep the indication circuit unit from sending an indication signal for a preset time. When burning is required, the CPU turns on the switch circuit after delaying the triggering of the power-on signal, so that the indication circuit unit sends an indication signal, and the indication signal is kept for a preset time through the self-locking circuit. After the burning is completed and the computer automatically restarts, the self-locking circuit unit is powered off, so that the indication signal is automatically extinguished. The circuit has the advantages of simple structure and low cost. BRIEF DESCRIPTION OF THE DRAWINGS
[0019] Figure 1 This is a partial circuit diagram of a circuit for automatically triggering CPU to burn BIOS in the utility model.
[0020] Figure 2 The utility model is a circuit diagram of a delay circuit unit for automatically triggering CPU to burn BIOS.
[0021] Figure 3The utility model is a circuit diagram of a startup circuit unit for automatically triggering CPU to burn BIOS. DETAILED DESCRIPTION
[0022] The present invention is described in detail below in conjunction with the accompanying drawings and embodiments. It should be noted that, if there is no conflict, the embodiments of the present invention and the various features in the embodiments can be combined with each other, all within the protection scope of the present invention.
[0023] See also Figure 1 The utility model provides a circuit for automatically triggering CPU to burn BIOS, comprising a switch circuit unit 1, a self-locking circuit unit 2 and an indication circuit unit 3, wherein the switch circuit unit 1 is electrically connected to the self-locking circuit unit 2 and the indication circuit unit 3, and is used to turn on the indication circuit unit 3. The self-locking circuit unit 2 is electrically connected to the CPU and the indication circuit unit 3, and is used to keep the indication circuit unit 3 sending an indication signal for a preset time.
[0024] The switch circuit unit 1 includes a first resistor R1, a second resistor R2 and a first field effect transistor Q1, wherein the first end of the first resistor R1 is electrically connected to the source of the first field effect transistor Q1, and the second end of the first resistor R1 is electrically connected to the self-locking circuit unit 2. The first end of the second resistor R2 is electrically connected to the gate of the first field effect transistor Q1, and the second end of the second resistor R2 is electrically connected to the second end of the first resistor R1. The source of the first field effect transistor Q1 is used to be electrically connected to a power supply, and the drain of the first field effect transistor Q1 is electrically connected to the indication circuit unit 3. The first field effect transistor Q1 is a P-channel enhancement type field effect transistor.
[0025] The switch circuit unit 1 further includes a first capacitor C1, a first end of the first capacitor C1 is electrically connected to the source of the first field effect transistor Q1, and a second end of the first capacitor C1 is electrically connected to the gate of the first field effect transistor Q1. The first capacitor C1 is used to protect the first field effect transistor Q1 to prevent the first field effect transistor Q1 from being burned out when the power supply voltage suddenly changes.
[0026] The self-locking circuit unit 2 includes a third resistor R3 and a second field effect transistor Q2, wherein a first end of the third resistor R3 is electrically connected to the CPU, and a second end of the third resistor R3 is electrically connected to a gate of the second field effect transistor Q2. A source of the second field effect transistor Q2 is grounded, and a drain of the second field effect transistor Q2 is electrically connected to a second end of the first resistor R1. The second field effect transistor Q2 is an N-channel enhancement type field effect transistor.
[0027] The self-locking circuit unit 2 further includes a second capacitor C2, a first end of which is electrically connected to the gate of the second field effect transistor Q2, and a second end of which is grounded. The second field effect transistor Q2 is protected by the second capacitor C2 to prevent the second field effect transistor Q2 from being burned out when the power supply voltage suddenly changes.
[0028] The self-locking circuit unit 2 further includes a first diode D1 and a second diode D2, wherein the anode of the first diode D1 is electrically connected to the CPU, and the cathode of the first diode D1 is electrically connected to the first end of the third resistor R3. The third resistor R3 is electrically connected to the CPU via the first diode D1. The anode of the second diode D2 is electrically connected to the drain of the first field effect transistor Q1, and the cathode of the second diode D2 is electrically connected to the gate of the second field effect transistor Q2.
[0029] The indication circuit unit 3 comprises a third diode D3, the anode of the third diode D3 is electrically connected to the drain of the first field effect transistor Q1, and the cathode of the third diode D3 is grounded. The third diode D3 is a light emitting diode for sending indication signals.
[0030] The indicating circuit unit 3 further includes a fourth resistor R4, a first end of the fourth resistor R4 is electrically connected to the cathodes of the three diodes, a second end of the fourth resistor R4 is grounded, and the cathode of the third diode D3 is grounded through the fourth resistor R4. The fourth resistor R4 is used to limit the current, thereby protecting the third diode D3.
[0031] See also Figure 2 The circuit for automatically triggering the CPU to burn BIOS also includes a delay circuit unit, which includes a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, a third capacitor C3, a fourth capacitor C4, a third field effect transistor Q3 and a fourth field effect transistor Q4, a first end of the fifth resistor R5 is used to be electrically connected to a power supply, and a second end of the fifth resistor R5 is electrically connected to the gate of the third field effect transistor Q3.
[0032] The first end of the sixth resistor R6 is used to be electrically connected to the CPU, and the second end of the sixth resistor R6 is electrically connected to the drain of the third field effect transistor Q3 and the gate of the fourth field effect transistor Q4. The first end of the seventh resistor R7 is electrically connected to the drain of the fourth field effect transistor Q4, and the second end of the seventh resistor R7 is used to be electrically connected to the power switch, and is used to trigger the power switch. The first end of the third capacitor C3 is electrically connected to the second end of the fifth resistor R5, and the second end of the third capacitor C3 is grounded. The first end of the fourth capacitor C4 is electrically connected to the second end of the sixth resistor R6, and the second end of the fourth capacitor C4 is grounded; the source of the third field effect transistor Q3 and the source of the fourth field effect transistor Q4 are grounded. During burning, the CPU triggers the power switch after delaying the preset time through the delay circuit unit, forming a power-on signal to turn on the power.
[0033] See also Figure 3 The circuit for automatically triggering the CPU to burn BIOS also includes a startup circuit unit, which includes an eighth resistor R8, a ninth resistor R9, a tenth resistor R10, a fifth capacitor C5 and a button switch K. The first end of the eighth resistor R8 is electrically connected to the first pin of the button switch K, and the second end of the eighth resistor R8 is used to be electrically connected to a power supply. The first end of the ninth resistor R9 is electrically connected to the second pin of the button switch K, and the second end of the ninth resistor R9 is grounded. The first end of the tenth resistor R10 is electrically connected to the second pin of the button switch K, and the second end of the tenth resistor R10 is used to be electrically connected to the CPU. The fifth capacitor C5 is connected in parallel with the ninth resistor R9. By pressing the button switch K, the CPU can be triggered.
[0034] In summary, the utility model cooperates between the switch circuit unit 1, the self-locking circuit unit 2 and the indication circuit unit 3, and the switch circuit unit 1 is electrically connected with the self-locking circuit unit 2 and the indication circuit unit 3 to turn on the indication circuit unit 3. The self-locking circuit unit 2 is electrically connected with the CPU and the indication circuit unit 3 to keep the indication circuit unit 3 from sending out an indication signal for a preset time. When burning is required, the CPU turns on the switch circuit unit 1 after delaying the triggering of the power-on signal, so that the indication circuit unit 3 sends out an indication signal, and the indication signal is kept for a preset time through the self-locking circuit unit 2. After the burning is completed and the computer automatically restarts, the self-locking circuit unit 2 is powered off, so that the indication signal is automatically extinguished. The circuit does not require an additional MCU for control, and thus has the advantages of simple structure and low cost.
[0035] The above is a detailed introduction to the circuit for automatically triggering CPU burning BIOS provided by the utility model. This article uses specific examples to illustrate the principle and implementation method of the utility model. The description of the above embodiments is only used to help understand the method and its core idea of the utility model. At the same time, for those of ordinary skill in the art, according to the idea of the utility model, there will be changes in the specific implementation method and application scope. In summary, the content of this specification is only an implementation method of the utility model, and it does not limit the patent scope of the utility model. All equivalent structures or equivalent process changes made by using the contents of the utility model specification and drawings, or directly or indirectly used in other related technical fields, are similarly included in the patent protection scope of the utility model and should not be understood as a limitation on the utility model.
Claims
1. A circuit that automatically triggers the CPU to burn BIOS. It is characterized in that It includes a switching circuit unit, a self-locking circuit unit and an indicating circuit unit. The switching circuit unit is electrically connected to the self-locking circuit unit and the indicating circuit unit to turn on the indicating circuit unit; the self-locking circuit unit is electrically connected to the CPU and the indicating circuit unit to keep the indicating circuit unit sending an indication signal for a preset time.
2. The circuit for automatically triggering CPU to burn BIOS as claimed in claim 1, It is characterized in that The switching circuit unit includes a first resistor, a second resistor and a first field effect transistor, wherein the first end of the first resistor is electrically connected to the source of the first field effect transistor, and the second end of the first resistor is electrically connected to the self-locking circuit unit; the first end of the second resistor is electrically connected to the gate of the first field effect transistor, and the second end of the second resistor is electrically connected to the second end of the first resistor; the source of the first field effect transistor is used to be electrically connected to a power supply, and the drain of the first field effect transistor is electrically connected to the indication circuit unit.
3. The circuit for automatically triggering CPU to burn BIOS as claimed in claim 2, It is characterized in that The switch circuit unit further includes a first capacitor, a first end of the first capacitor is electrically connected to the source of the first field effect transistor, and a second end of the first capacitor is electrically connected to the gate of the first field effect transistor.
4. The circuit for automatically triggering CPU to burn BIOS as claimed in claim 2, It is characterized in that The self-locking circuit unit includes a third resistor and a second field effect transistor, the first end of the third resistor is electrically connected to the CPU, and the second end of the third resistor is electrically connected to the gate of the second field effect transistor; the source of the second field effect transistor is grounded, and the drain of the second field effect transistor is electrically connected to the second end of the first resistor.
5. The circuit for automatically triggering CPU to burn BIOS as claimed in claim 4, It is characterized in that The self-locking circuit unit further includes a second capacitor, a first end of the second capacitor is electrically connected to the gate of the second field effect transistor, and a second end of the second capacitor is grounded.
6. The circuit for automatically triggering CPU to burn BIOS as claimed in claim 4, It is characterized in that The self-locking circuit unit further includes a first diode, an anode of the first diode is electrically connected to the CPU, and a cathode of the first diode is electrically connected to a first end of the third resistor; the third resistor is electrically connected to the CPU via the first diode.
7. The circuit for automatically triggering CPU to burn BIOS as claimed in claim 4, It is characterized in that The self-locking circuit unit further includes a second diode, an anode of the second diode is electrically connected to the drain of the first field effect transistor, and a cathode of the second diode is electrically connected to the gate of the second field effect transistor.
8. The circuit for automatically triggering CPU to burn BIOS as claimed in claim 7, It is characterized in that The indicating circuit unit comprises a third diode, an anode of the third diode is electrically connected to the drain of the first field effect transistor, and a cathode of the third diode is grounded.
9. The circuit for automatically triggering CPU to burn BIOS as claimed in claim 8, It is characterized in that The indicating circuit unit further includes a fourth resistor, a first end of the fourth resistor is electrically connected to the cathodes of the three diodes, a second end of the fourth resistor is grounded, and the cathode of the third diode is grounded through the fourth resistor.
10. The circuit for automatically triggering CPU to burn BIOS as claimed in claim 1, It is characterized in that The circuit for automatically triggering the CPU to burn BIOS also includes a delay circuit unit, which includes a fifth resistor, a sixth resistor, a seventh resistor, a third capacitor, a fourth capacitor, a third field effect transistor and a fourth field effect transistor, wherein a first end of the fifth resistor is used to be electrically connected to a power supply, and a second end of the fifth resistor is electrically connected to a gate of the third field effect transistor; The first end of the sixth resistor is used to be electrically connected to the CPU, and the second end of the sixth resistor is electrically connected to the drain of the third field effect transistor and the gate of the fourth field effect transistor; the first end of the seventh resistor is electrically connected to the drain of the fourth field effect transistor, and the second end of the seventh resistor is used to be electrically connected to the power switch; the first end of the third capacitor is electrically connected to the second end of the fifth resistor, and the second end of the third capacitor is grounded; the first end of the fourth capacitor is electrically connected to the second end of the sixth resistor, and the second end of the fourth capacitor is grounded; the source of the third field effect transistor and the source of the fourth field effect transistor are grounded.