Packaging structure and terminal device
By using the coordination of positioning columns and grooves in the chip packaging structure for alignment and positioning, the problem of dislocation during chip packaging is solved, the packaging reliability is improved, and the rapid heat dissipation function is realized.
Patent Information
- Application Number
- CN202323572872.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2023-12-26
- Publication Date
- 2024-12-13
- Estimated Expiration
- 2033-12-26
AI Technical Summary
During the chip packaging process, due to the smaller diameter of the hot ball, the ball planting becomes complicated, and dislocation is prone to occur, resulting in insufficient resoldering.
Adopt a packaging structure including chip, carrier plate, positioning column and bottom filler. By opening grooves on the chip and setting positioning columns on the carrier plate to connect to the line layer, the alignment positioning is performed using the coordination between the positioning columns and grooves. , improve the corresponding settings of the electrodes, improve packaging reliability, and connect the chip and carrier plate through the bottom filler.
It effectively improves the alignment problem between the chip and the carrier plate, improves the reliability of the packaging, and achieves rapid heat dissipation function through the thermal conductivity of the positioning column.
Smart Images
Figure CN222168378U_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of chip packaging, and in particular to a packaging structure and a terminal device. Background Art
[0002] During chip packaging, the chip and the substrate are usually connected by solder ball implantation and then reflow soldering. As chips are becoming smaller and more sophisticated, the diameter of solder balls is smaller, and implantation is more complicated and difficult. It is easy to misalign and misalign, resulting in solder bridges during reflow soldering, which in turn leads to insufficient reliability. Utility Model Content
[0003] In view of this, it is necessary to provide a packaging structure with good alignment to solve the above problems.
[0004] A packaging structure includes a chip, a carrier, a positioning column and a bottom filler. The chip includes a first body, which is provided with a groove; the carrier includes a second body, which includes a circuit layer; the positioning column is located on the surface of the second body and connected to the circuit layer, and one end of the positioning column away from the second body is located in the groove; the bottom filler is located between the first body and the second body and connects the first body and the second body.
[0005] In some embodiments of the present application, the chip further includes a first electrode, the first electrode is located in the groove, and the positioning post is connected to the first electrode.
[0006] In some embodiments of the present application, the bottom fill is also located in the groove and encapsulates the first electrode.
[0007] In some embodiments of the present application, the chip further includes a second electrode, and the second electrode is located on the surface of the first body; there are multiple first electrodes, and the multiple first electrodes are arranged around the second electrode.
[0008] In some embodiments of the present application, the carrier further includes a third electrode, and the packaging structure further includes a first solder, and the first solder connects the second electrode and the third electrode.
[0009] In some embodiments of the present application, the packaging structure further includes a second solder, and the second solder connects the positioning column and the first solder.
[0010] In some embodiments of the present application, the depth of the groove is 200 μm-800 μm, and the diameter of the groove is 20 μm-50 μm.
[0011] In some embodiments of the present application, the positioning post is cylindrical.
[0012] In some embodiments of the present application, the positioning posts and the circuit layer are made of the same material.
[0013] The present application also provides a terminal device, which includes a packaging structure.
[0014] A groove is provided on the first body of the chip, and a positioning column corresponding to the position of the groove is provided on the second body of the carrier; during the alignment process of the chip and the carrier, the positioning column and the groove cooperate with each other to play a positioning role, so that each second electrode and the third electrode can be arranged correspondingly, thereby improving the problem of misalignment between the second electrode and the third electrode, and thus improving the packaging reliability of the chip and the carrier; the positioning column connects the circuit layer and the chip, and also has the function of rapid heat dissipation. BRIEF DESCRIPTION OF THE DRAWINGS
[0015] Figure 1 A schematic cross-sectional view of a packaging structure provided in an embodiment of the present application.
[0016] Figure 2 A schematic cross-sectional view of a chip provided in an embodiment of the present application.
[0017] Figure 3 for Figure 2 A bottom view of the chip is shown.
[0018] Figure 4 A schematic cross-sectional view of a carrier provided in an embodiment of the present application.
[0019] Figure 5 For Figure 4 The cross-sectional view of the carrier after the positioning posts are formed is shown.
[0020] Figure 6 for Figure 5 A schematic top view of a carrier board after positioning posts are formed on the carrier board.
[0021] Figure 7 For Figure 2 The chip shown and Figure 5 The schematic cross-sectional view of the circuit board and the positioning column after the first solder and the second solder are arranged on the circuit board and the positioning column is shown.
[0022] Figure 8 For the general Figure 7 The structure shown is a schematic cross-sectional view of the chip being connected to the carrier board after the reflow process.
[0023] Fig. 9 A schematic diagram of the structure of a terminal device provided in an embodiment of the present application.
[0024] Main component symbols
[0025] Package structure 100 chip 10 first ontology 11 Grooves 112 First electrode 13 Second electrode 15 Carrier Board 20 Second body 21 Dielectric layer 212 Circuit layer 214 The third electrode 23 Positioning column 30 First Solder 40 Second solder 45 Underfill 50 Terminal device 200 DETAILED DESCRIPTION
[0026] In order to more clearly understand the above-mentioned purposes, features and advantages of the present application, the present application is described in detail below in conjunction with the accompanying drawings and specific embodiments. It should be noted that, in the absence of conflict, the embodiments of the present application and the features in the embodiments can be combined with each other. In the following description, many specific details are set forth to facilitate a full understanding of the present application, and the described embodiments are only a part of the embodiments of the present application, rather than all of the embodiments.
[0027] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used in the specification of this article are only for the purpose of describing specific embodiments and are not intended to limit this application. The term "and / or" used herein includes all and any combination of one or more related listed items.
[0028] In the embodiments of the present application, for the convenience of description and not to limit the present application, the term "connection" used in the patent application specification and claims of the present application is not limited to physical or mechanical connection, whether direct or indirect. "Up", "down", "above", "below", "left", "right", etc. are only used to indicate relative position relationship. When the absolute position of the described object changes, the relative position relationship also changes accordingly.
[0029] See also Figure 1 An embodiment of the present application provides a packaging structure 100, which may include a chip 10, a carrier 20, a positioning column 30 and a bottom filling 50. Part of the positioning column 30 is located in the chip 10, and the bottom filling 50 connects the chip 10 and the carrier 20 to connect the chip 10 and the carrier 20 into a whole.
[0030] The chip 10 may include a first body 11 , a first electrode 13 and a second electrode 15 . The first electrode 13 and the second electrode 15 are both connected to the first body 11 . The first electrode 13 and the second electrode 15 may be used to be electrically connected to the carrier 20 .
[0031] In this embodiment, there are multiple second electrodes 15, and the multiple second electrodes 15 are arranged on the surface of the first body 11 in a matrix (see Figure 3 ). A groove 112 is provided on the first body 11, and the groove 112 is provided on the surface of the first body 11 on which the second electrode 15 is provided. There are multiple grooves 112, and two adjacent grooves 112 are arranged at intervals, and multiple grooves 112 are arranged around multiple second electrodes 15. The number of first electrodes 13 is the same as the number of grooves 112, and a first electrode 13 is provided in each groove 112. In other embodiments, the arrangement and number of grooves 112 are not limited. In other embodiments, the first electrode 13 can also be omitted.
[0032] In this embodiment, the carrier 20 includes a second body 21 and a third electrode 23. The third electrode 23 is disposed on the surface of the second body 21. The position of the third electrode 23 corresponds to the position of the second electrode 15. That is, in this embodiment, the third electrode 23 is also arranged in a matrix (see Figure 6 The second body 21 may include a dielectric layer 212 and a circuit layer 214 stacked in layers. The number of dielectric layers 212 and circuit layers 214 is not limited. The carrier 20 may be a soft board or a hard board. Each third electrode 23 is connected to the circuit layer 214.
[0033] The package structure 100 further includes a first solder 40 and a second solder 45 . The first solder 40 is located between the second electrode 15 and the third electrode 23 and connects the second electrode 15 and the third electrode 23 to achieve electrical connection between the chip 10 and the carrier 20 .
[0034] The second solder 45 is located in the groove 112, one end of the positioning post 30 is connected to the second body 21, and the end of the positioning post 30 away from the second body 21 is located in the groove 112. The second solder 45 is located between the first electrode 13 and the positioning post 30 and connects the first electrode 13 and the positioning post 30. In this embodiment, the material of the positioning post 30 is a conductive material, and the material of the positioning post 30 can be the same as the material of the circuit layer 214. The positioning post 30 can be connected to the circuit layer 214, and the chip 10 and the carrier 20 can be further electrically connected through the positioning post 30, the second solder 45 and the first electrode 13; due to the thermal conductivity of the material of the positioning post 30, the positioning post 30 also has the function of rapid heat dissipation. In other embodiments, the positioning post 30 and the first electrode 13 may not need to be electrically connected.
[0035] In some embodiments, the depth of the groove 112 may be 200 μm-800 μm, and the diameter of the groove 112 may be 20 μm-50 μm. The positioning post 30 may be cylindrical, and the diameter of the positioning post 30 may be adjusted according to the diameter of the groove 112 so that the positioning post 30 can be inserted into the groove 112 .
[0036] The bottom filling 50 is located between the first body 11 and the second body 21 , and the second electrode 15 , the first solder 40 and the third electrode 23 are all buried in the bottom filling 50 .
[0037] The bottom filling glue 50 may also be filled in the groove 112 , and the first electrode 13 , the second solder 45 and the positioning pillar 30 are all buried in the bottom filling glue 50 .
[0038] See also Figures 1 to 8 The packaging structure 100 can be manufactured by the following steps.
[0039] Step S1: Please refer to Figure 2 and Figure 3 , a chip 10 is provided. The chip 10 includes a first body 11 , a first electrode 13 and a second electrode 15 .
[0040] The first body 11 is provided with a groove 112, which can be formed by dry etching or wet etching using a through silicon via (TSV) technique. The first electrode 13 is located in the groove 112. There can be multiple grooves 112, and one first electrode 13 is disposed in each groove 112.
[0041] The second electrodes 15 are located on the surface of the first body 11 where the grooves 112 are formed. The second electrodes 15 are arranged in a matrix. A plurality of grooves 112 are arranged around the second electrodes 15 .
[0042] Step S2: Please refer to Figure 4 , providing a carrier 20 , the carrier 20 includes a second body 21 and a third electrode 23 , and the third electrode 23 is disposed on a surface of the second body 21 .
[0043] The second body 21 may include a dielectric layer 212 and a circuit layer 214 which are stacked, and the third electrode 23 is connected to the circuit layer 214 .
[0044] Step S3: Please refer to Figure 5 and Figure 6 A positioning column 30 is provided on the second body 21 .
[0045] The material of the positioning post 30 may be a conductive material, the positioning post 30 may be connected to the circuit layer 214, and in the packaging structure 100 formed subsequently, the positioning post 30 may also be electrically connected to the chip 10. When the positioning post 30 does not need to be electrically connected to the chip 10, the positioning post 30 may be an insulating material, or the positioning post 30 may be connected to the dielectric layer 212. In this embodiment, the positioning post 30 is a conductive material, the positioning post 30 is formed by electroplating, and the positioning post 30 is connected to the circuit layer 214.
[0046] The positioning post 30 is formed on the third electrode 23 by electroplating, so that the positioning post 30 and the third electrode 23 are an integrated structure.
[0047] Step S4: Please refer to Figure 7 and Figure 8 , the carrier 20 after assembling the chip 10 and setting the positioning pillars 30.
[0048] A first solder 40 is disposed on the surface of the second electrode 15 and / or the third electrode 23, and a second solder 45 is disposed on the surface of the first electrode 13 and / or the positioning post 30 (see Figure 7), the positions of the positioning posts 30 and the grooves 112 are arranged one by one so that the positioning posts 30 and the grooves 112 cooperate with each other to play a positioning role. At this time, each second electrode 15 and the third electrode 23 can be arranged correspondingly, thereby improving the problem of misalignment between the second electrode 15 and the third electrode 23. The first solder 40 and the second solder 45 are subjected to reflow treatment and then solidified. The first solder 40 connects the second electrode 15 and the third electrode 23, and the first solder 40 connects the first electrode 13 and the positioning posts 30.
[0049] Step S5: Please refer again Figure 1 The carrier board 20 and the chip 10 are packaged using bottom filler 50 .
[0050] The bottom fill 50 is located between the first body 11 and the second body 21 , and the second electrode 15 , the first solder 40 and the third electrode 23 are buried in the bottom fill 50 . In some embodiments, the bottom fill 50 may further fill the groove 112 .
[0051] The packaging structure 100 is manufactured by the above-mentioned manufacturing method. Before the chip 10 is connected to the carrier 20, a groove 112 is opened on the first body 11 of the chip 10, and a positioning column 30 corresponding to the position of the groove 112 is set on the second body 21 of the carrier 20; during the alignment process of the chip 10 and the carrier 20, the positioning column 30 and the groove 112 cooperate with each other to play a positioning role, so that each second electrode 15 and the third electrode 23 can be set correspondingly, thereby improving the problem of misalignment between the second electrode 15 and the third electrode 23, thereby improving the packaging reliability of the chip 10 and the carrier 20; the positioning column 30 connects the circuit layer 214 and the chip 10, and also has the function of rapid heat dissipation.
[0052] See also Fig. 9 The embodiment of the present application also provides a terminal device 200, which includes a packaging structure 100. The terminal device 200 can be a mobile phone, a computer, a drone, a car, a camera, a smart watch, and other products.
[0053] The above implementation modes are only used to illustrate the technical solutions of the present application and are not intended to limit the present application. Although the present application has been described in detail with reference to the above preferred implementation modes, a person skilled in the art should understand that the technical solutions of the present application may be modified or replaced by equivalents without departing from the spirit and scope of the technical solutions of the present application.
Claims
1. A packaging structure, characterized in that: include: The chip comprises a first body, wherein the first body is provided with a groove; A carrier board, comprising a second body, wherein the second body comprises a circuit layer; A positioning post, located on a surface of the second body and connected to the circuit layer, wherein an end of the positioning post facing away from the second body is located in the groove; as well as The bottom filling glue is located between the first body and the second body and connects the first body and the second body.
2. The packaging structure according to claim 1, characterized in that: The chip further includes a first electrode, the first electrode is located in the groove, and the positioning post is connected to the first electrode.
3. The packaging structure according to claim 2, characterized in that: The bottom filling glue is also located in the groove and encapsulates the first electrode.
4. The packaging structure according to claim 2 or 3, characterized in that: The chip further includes a second electrode, which is located on the surface of the first body; there are multiple first electrodes, and the multiple first electrodes are arranged around the second electrode.
5. The packaging structure according to claim 4, characterized in that: The carrier board further includes a third electrode, and the packaging structure further includes a first solder, wherein the first solder connects the second electrode and the third electrode.
6. The packaging structure according to claim 5, characterized in that: The packaging structure further includes a second solder, wherein the second solder connects the positioning pillar and the first solder.
7. The packaging structure according to claim 1, characterized in that: The depth of the groove is 200 μm-800 μm, and the diameter of the groove is 20 μm-50 μm.
8. The packaging structure according to claim 1, characterized in that: The positioning column is cylindrical.
9. The packaging structure according to claim 1, characterized in that: The positioning column and the circuit layer are made of the same material.
10. A terminal device, characterized in that: The terminal device comprises the packaging structure according to any one of claims 1-9.