High-density memory chip packaging structure

Abstract

The utility model discloses a high-density memory chip packaging structure which comprises a substrate, a chip body is installed in the middle of the upper surface of the substrate, a plurality of bonding wires are connected between the chip body and the substrate, a heat conduction mechanism is installed on the lower surface of the substrate, and the heat conduction mechanism can conduct out heat generated in the operation process of the substrate. And a packaging mechanism is sleeved outside the substrate and the chip body and is used for carrying out external covering protection on the substrate and the chip body. By means of the heat conduction mechanism, heat generated during operation of the substrate and the chip body can be conducted out to achieve heat dissipation and cooling, the good operation state of the substrate and the chip body is guaranteed, under the assistance of the packaging mechanism, external covering packaging protection can be carried out on the substrate and the chip body, and the service life of the substrate and the chip body is prolonged. And the packaging mechanism is convenient to mount and dismount, so that subsequent workers can conveniently dismount and maintain the chip body, the subsequent maintenance difficulty is reduced, and the maintenance cost is reduced.

Description

Technical Field

[0001] The utility model relates to the technical field related to chip packaging, in particular to a high-density storage chip packaging structure. Background Art

[0002] The shell used to install semiconductor integrated circuit chips plays the role of placing, fixing, sealing, protecting the chip and enhancing the electrical and thermal performance. It also serves as a bridge between the internal world of the chip and the external circuit. The contacts on the chip are connected to the pins of the package shell with wires, and these pins are connected to other devices through wires on the printed circuit board. Therefore, packaging plays an important role for CPUs and other LSI integrated circuits.

[0003] However, the current packaging structure has an unsatisfactory thermal conductivity, which makes it impossible for the heat of the substrate and the chip to be conducted and dissipated during operation, shortening the service life of the chip. In addition, the current packaging structure is time-consuming and labor-intensive to disassemble and assemble, increasing the difficulty of subsequent maintenance. Utility Model Content

[0004] The purpose of the utility model is to provide a high-density memory chip packaging structure to solve the problems raised in the above background technology.

[0005] To achieve the above-mentioned purpose, the utility model provides the following technical solutions: a high-density memory chip packaging structure, comprising a substrate, a chip body is installed in the middle position of the upper surface of the substrate, and a plurality of bonding wires are connected between the chip body and the substrate, a heat-conducting mechanism is installed on the lower surface of the substrate, the heat-conducting mechanism can conduct heat generated during the operation of the substrate to the outside, and a packaging mechanism is arranged on the outside of the substrate and the chip body, and the packaging mechanism covers and protects the substrate and the chip body from the outside.

[0006] As a further preferred embodiment of the present technical solution, a plurality of pins are evenly distributed on both side walls of the substrate, and the pins extend out of the packaging mechanism correspondingly.

[0007] As a further preferred embodiment of the present technical solution, the heat-conducting mechanism includes an insulating adhesive layer adhered and installed on the lower surface of the substrate, a No. 1 heat-conducting layer is arranged on the lower surface of the insulating adhesive layer, a No. 2 heat-conducting layer is arranged on the lower surface of the No. 1 heat-conducting layer, and a No. 3 heat-conducting layer is arranged on the lower surface of the No. 2 heat-conducting layer.

[0008] As a further preferred embodiment of the present technical solution, the first heat-conducting layer is made of a thermally conductive silicone grease material, the second heat-conducting layer is made of a thermally conductive paste material, and the third heat-conducting layer is made of a graphene plate.

[0009] As a further preferred embodiment of the present technical solution, the packaging mechanism includes a packaging base, an open area is opened through the packaging base, the open area is fixedly connected to the substrate and the heat conduction mechanism, a packaging component is installed on the upper surface of the packaging base, the packaging component covers the top of the substrate and the chip body, a rectangular frame strip is installed at the edge of the upper surface of the packaging base, a rectangular frame groove is recessed inwardly on the lower surface of the packaging component, and the rectangular frame strip can be correspondingly engaged in the rectangular frame groove.

[0010] As a further preferred embodiment of the present technical solution, connecting bolts are provided on the top and bottom of both side walls of the package, and threaded grooves matching with the connecting bolts are provided on the rectangular frame groove and the rectangular frame bar of the package, and the package and the package base are reinforced by the connecting bolts.

[0011] As a further preferred embodiment of the present technical solution, a plurality of limiting grooves are evenly formed on both side walls of the packaging base, and the limiting grooves can limit and fix the pins.

[0012] The utility model provides a high-density memory chip packaging structure, which has the following beneficial effects:

[0013] (1) The utility model is provided with a heat-conducting mechanism, and the substrate is isolated and insulated by an insulating adhesive layer to prevent interference in the operation of the substrate and the chip body. Then, with the assistance of the first heat-conducting layer, the second heat-conducting layer and the third heat-conducting layer, the heat generated during the operation of the substrate can be dissipated in multiple ways, so that the heat on the substrate and the chip body can be quickly released, ensuring the good condition of the chip.

[0014] (2) The utility model is provided with a packaging mechanism, and the pins are installed in the limiting grooves reserved on the packaging base for limiting and fixing. Then the packaging part is covered on the upper surface of the packaging base, and the packaging part and the packaging base are fixed by the corresponding engagement of the rectangular frame strip and the rectangular frame groove. Finally, the connecting bolts are screwed into the threaded grooves to connect and fix the packaging part and the packaging base, so that the overall packaging work is time-saving and labor-saving, and the subsequent disassembly and assembly can be achieved by only removing the connecting bolts, which is convenient for subsequent maintenance. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 It is a schematic diagram of the overall structure of the utility model;

[0016] Figure 2 This is a schematic diagram of the separation of the package and the package base of the utility model;

[0017] Figure 3 This is a schematic diagram of the distribution of the pins of the utility model on the package base;

[0018] Figure 4It is a schematic diagram of the chip body of the utility model being arranged in a package;

[0019] Figure 5 This is a schematic diagram of the separation of the packaging base and the substrate of the utility model;

[0020] Figure 6 It is a schematic diagram of the heat conduction mechanism of the utility model.

[0021] In the figure: 1. substrate; 2. chip body; 3. bonding wire; 4. pin; 5. insulating adhesive layer; 6. thermal conductive layer No. 1; 7. thermal conductive layer No. 2; 8. thermal conductive layer No. 3; 9. package base; 10. open area; 11. package; 12. rectangular frame bar; 13. rectangular frame groove; 14. connecting bolt; 15. limiting groove. DETAILED DESCRIPTION

[0022] The technical solutions in the embodiments of the present invention will be described clearly and completely below in conjunction with the accompanying drawings in the embodiments of the present invention.

[0023] The utility model provides a technical solution: Figure 1 and Figure 2 As shown, in this embodiment, a high-density storage chip packaging structure includes a substrate 1, a chip body 2 is installed in the middle position of the upper surface of the substrate 1, and a plurality of bonding wires 3 are connected between the chip body 2 and the substrate 1, a heat-conducting mechanism is installed on the lower surface of the substrate 1, and the heat-conducting mechanism can conduct outward the heat generated during the operation of the substrate 1, and a packaging mechanism is sleeved on the outside of the substrate 1 and the chip body 2, and the packaging mechanism covers and protects the substrate 1 and the chip body 2 externally, and a plurality of pins 4 are evenly distributed on both side walls of the substrate 1, and the pins 4 extend out of the packaging mechanism correspondingly.

[0024] like Figure 3 , Figure 4 and Figure 5 As shown, the packaging mechanism includes a packaging base 9, an open area 10 is formed on the packaging base 9, and the open area 10 is fixedly connected to the substrate 1 and the heat conduction mechanism. A packaging member 11 is installed on the upper surface of the packaging base 9, and the packaging member 11 covers the substrate 1 and the chip body 2. A rectangular frame bar 12 is installed at the edge of the upper surface of the packaging base 9, and a rectangular frame groove 13 is concavely formed inwardly on the lower surface of the packaging member 11, and the rectangular frame bar 12 can be correspondingly engaged in the rectangular frame groove 13;

[0025] When packaging is performed: by providing a packaging mechanism, the substrate 1, the heat conduction mechanism and the chip body 2 are first packaged in the open area 10 of the packaging base 9, and then the pins 4 are installed in the reserved limiting grooves 15 on the packaging base 9 for limiting and fixing, and then the packaging member 11 is covered on the upper surface of the packaging base 9, and the packaging member 11 and the packaging base 9 are fixed by the corresponding engagement of the rectangular frame strip 12 and the rectangular frame groove 13, and finally the connecting bolts 14 are screwed into the threaded groove to connect and fix the packaging member 11 and the packaging base 9, so that the overall packaging work is time-saving and labor-saving, and the subsequent disassembly and assembly can be realized by only removing the connecting bolts 14, which is convenient for subsequent maintenance;

[0026] In some disclosures, connecting bolts 14 are provided on the top and bottom of both side walls of the package 11, and threaded grooves matching the connecting bolts 14 are provided on the rectangular frame groove 13 and the rectangular frame bar 12 of the package 11. The package 11 and the package base 9 are reinforced by the connecting bolts 14, and a plurality of limiting grooves 15 are evenly opened on both side walls of the package base 9, which can limit and fix the pins 4.

[0027] like Figure 6 As shown, the heat conduction mechanism includes an insulating adhesive layer 5 mounted on the lower surface of the substrate 1, a first heat conduction layer 6 is arranged on the lower surface of the insulating adhesive layer 5, a second heat conduction layer 7 is arranged on the lower surface of the first heat conduction layer 6, a third heat conduction layer 8 is arranged on the lower surface of the second heat conduction layer 7, the first heat conduction layer 6 is specifically made of thermal grease material, the second heat conduction layer 7 is made of thermal paste material, and the third heat conduction layer 8 is made of graphene plate;

[0028] When heat conduction is performed: a heat conduction mechanism is provided, and the substrate 1 is isolated and insulated by an insulating adhesive layer 5 to prevent interference during operation of the substrate 1 and the chip body 2. Then, with the assistance of the first heat conduction layer 6, the second heat conduction layer 7 and the third heat conduction layer 8, the heat generated during the operation of the substrate 1 can be multiplexed to dissipate heat, so that the heat on the substrate 1 and the chip body 2 can be quickly released, ensuring the good condition of the chip.

[0029] The utility model provides a high-density memory chip packaging structure, and the specific working principle is as follows: a heat-conducting mechanism is installed on the lower surface of a substrate 1, and the heat generated during the operation of the substrate 1 and the chip body 2 can be conducted away by means of the heat-conducting mechanism to achieve heat dissipation and cooling, thereby ensuring a good operating state of the substrate 1 and the chip body 2, and with the assistance of the packaging mechanism, the substrate 1 and the chip body 2 can be externally covered and packaged for protection, and the packaging mechanism is easy to install and disassemble, which is convenient for subsequent staff to disassemble and maintain the chip body 2, thereby reducing the difficulty of subsequent maintenance and reducing maintenance costs.

[0030] Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present invention, and that the scope of the present invention is defined by the appended claims and their equivalents.

Claims

1. A high-density memory chip packaging structure, comprising a substrate (1), a chip body (2) being mounted in the middle of the upper surface of the substrate (1), and a plurality of bonding wires (3) being connected between the chip body (2) and the substrate (1), characterized in that: A heat-conducting mechanism is installed on the lower surface of the substrate (1), and the heat-conducting mechanism can conduct heat generated by the substrate (1) during operation to the outside. A packaging mechanism is provided on the outside of the substrate (1) and the chip body (2), and the packaging mechanism provides external covering and protection for the substrate (1) and the chip body (2).

2. The high-density memory chip packaging structure according to claim 1, characterized in that: A plurality of pins (4) are evenly distributed on both side walls of the substrate (1), and the pins (4) are arranged corresponding to the protruding packaging mechanism.

3. The high-density memory chip packaging structure according to claim 1, characterized in that: The heat-conducting mechanism comprises an insulating adhesive layer (5) mounted on the lower surface of the substrate (1); a first heat-conducting layer (6) is arranged on the lower surface of the insulating adhesive layer (5); a second heat-conducting layer (7) is arranged on the lower surface of the first heat-conducting layer (6); and a third heat-conducting layer (8) is arranged on the lower surface of the second heat-conducting layer (7).

4. The high-density memory chip packaging structure according to claim 3, characterized in that: The first heat-conducting layer (6) is specifically made of a heat-conducting silicone grease material, the second heat-conducting layer (7) is made of a heat-conducting paste material, and the third heat-conducting layer (8) is made of a graphene plate.

5. A high-density memory chip packaging structure according to any one of claims 1 to 4, characterized in that: The packaging mechanism comprises a packaging base (9), an open area (10) is provided through the packaging base (9), the open area (10) is fixedly connected to the substrate (1) and the heat conduction mechanism, a packaging component (11) is installed on the upper surface of the packaging base (9), the packaging component (11) covers the top of the substrate (1) and the chip body (2), a rectangular frame strip (12) is installed at the edge of the upper surface of the packaging base (9), a rectangular frame groove (13) is provided inwardly on the lower surface of the packaging component (11), and the rectangular frame strip (12) can be correspondingly engaged in the rectangular frame groove (13).

6. The high-density memory chip packaging structure according to claim 5, characterized in that: The top and bottom of both side walls of the packaging component (11) are provided with connecting bolts (14), and the rectangular frame groove (13) and the rectangular frame strip (12) of the packaging component (11) are provided with threaded grooves that cooperate with the connecting bolts (14), and the packaging component (11) and the packaging base (9) are reinforced by the connecting bolts (14).

7. The high-density memory chip packaging structure according to claim 5, characterized in that: A plurality of limiting grooves (15) are evenly formed on both side walls of the packaging base (9), and the limiting grooves (15) can limit and fix the pins (4).

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