Microcontroller circuit and motor control system

Abstract

The utility model provides a microcontroller circuit and a motor control system, the microcontroller circuit comprises a timer module and a channel control module, the channel control module comprises a first channel unit and a second channel unit; the timer module provides a count value, a first comparison value, a second comparison value, a predetermined enable signal, a first selection signal and a second selection signal; the first channel unit is connected with the timer module, generates a first channel signal according to a comparison result of the count value and the first comparison value, and controls whether the first channel signal is output or not according to a predetermined enable signal and a first selection signal when a predetermined signal arrives; the second channel unit is connected with the timer module, generates a second channel signal according to a comparison result of the count value and the second comparison value, and controls whether the second channel signal is output or not according to a predetermined enable signal and a second selection signal when the predetermined signal arrives. According to the utility model, the problem that the cost of a system circuit is increased because one more timer is used in the prior art is solved.

Description

Technical Field

[0001] The utility model relates to the technical field of power electronics, in particular to a microcontroller circuit and a motor control system. Background Art

[0002] In the field of motor applications, analog-to-digital converters (ADCs) are usually used to sample motor-related signals, and ADCs usually require motor timers to trigger sampling; but when the brake signal arrives, all channels of the motor timer are braked, and ADC sampling can no longer be triggered. The existing conventional practice is to set an auxiliary timer to synchronize the operation and output at the same frequency with the motor timer to trigger ADC sampling through the auxiliary timer; but this approach requires the use of an additional timer, which increases the system circuit cost.

[0003] It should be noted that the above introduction to the technical background is only for the convenience of providing a clear and complete description of the technical solutions of the present application and for the convenience of understanding by those skilled in the art. It cannot be considered that the above technical solutions are well known to those skilled in the art simply because they are described in the background technology section of the present application. Utility Model Content

[0004] In view of the above-mentioned shortcomings of the prior art, the purpose of the present invention is to provide a microcontroller circuit and a motor control system, which solves the problem of the prior art solution that the cost of the system circuit is increased due to the use of an additional timer.

[0005] In order to achieve the above-mentioned object and other related objects, the utility model provides a microcontroller circuit, the microcontroller circuit comprising:

[0006] A timer module and a channel control module, wherein the channel control module includes a first channel unit and a second channel unit;

[0007] The timer module is used to provide a count value, a first comparison value, a second comparison value, a predetermined enable signal, a first selection signal and a second selection signal;

[0008] The first channel unit is connected to the timer module, and is used to generate a first channel signal according to a comparison result between the count value and the first comparison value, and when a predetermined signal arrives, control whether the first channel signal is output according to the predetermined enable signal and the first selection signal;

[0009] The second channel unit is connected to the timer module, and is used to generate a second channel signal according to the comparison result of the count value and the second comparison value, and when the predetermined signal arrives, control whether the second channel signal is output according to the predetermined enable signal and the second selection signal.

[0010] Optionally, the timer module is also used to provide a period value, and the first channel unit and the second channel unit are also used to set the period of the first channel signal and the second channel signal according to the period value; wherein the timer module includes a period register, a count register, a first comparison register, a second comparison register, an enable register and a selection register, the period register is used to provide the period value, the count register is used to provide the count value, the first comparison register is used to provide the first comparison value, the second comparison register is used to provide the second comparison value, the enable register is used to provide the predetermined enable signal, and the selection register is used to provide the first selection signal and the second selection signal.

[0011] Optionally, the first channel unit stops outputting the first channel signal when the predetermined signal arrives, and the second channel unit continues outputting the second channel signal when the predetermined signal arrives.

[0012] Optionally, the first channel unit includes:

[0013] a first pulse generator, a dead zone generator, and a first output selector;

[0014] The first pulse generator is connected to the timer module and is used to generate a first pulse signal according to a comparison result between the count value and the first comparison value;

[0015] The dead zone generator is connected to the first pulse generator, and is used to generate a set of complementary signals according to the first pulse signal and insert dead zone time therein to obtain a set of complementary PWM signals as the first channel signal;

[0016] The first output selector is connected to the timer module and the dead zone generator, and performs logic operation on the predetermined signal, the predetermined enable signal and the first selection signal to stop outputting the first channel signal when the predetermined signal arrives.

[0017] Optionally, the first channel unit further includes a first polarity selector connected between the dead zone generator and the first output selector, and configured to set the polarity of the first channel signal.

[0018] Optionally, the second channel unit includes:

[0019] a second pulse generator and a second output selector;

[0020] The second pulse generator is connected to the timer module and is used to generate a second pulse signal as the second channel signal according to a comparison result between the count value and the second comparison value;

[0021] The second output selector is connected to the timer module and the second pulse generator, and performs logic operations on the predetermined signal, the predetermined enable signal and the second selection signal to continue outputting the second channel signal when the predetermined signal arrives.

[0022] Optionally, the second channel unit further includes a second polarity selector connected between the second pulse generator and the second output selector, and configured to set the polarity of the second channel signal.

[0023] Optionally, the microcontroller circuit also includes a third-party functional module, which is connected to the second channel unit and triggered to work by the second channel signal; wherein the number of the first channel units is three, the number of the second channel units is equal to the number of the third-party functional modules and the number of the third-party functional modules is greater than or equal to one, and the timer module provides three first comparison values, three first selection signals, greater than or equal to one second comparison value and the second selection signal.

[0024] Optionally, the third-party functional module includes an analog-to-digital converter or a comparator.

[0025] The utility model also provides a motor control system, the motor control system comprising:

[0026] The microcontroller circuit, gate drive circuit and three-phase half-bridge circuit as described above;

[0027] The microcontroller circuit is used to provide three sets of complementary PWM signals;

[0028] The gate drive circuit is connected to the microcontroller circuit and is used to generate three groups of half-bridge control signals according to three groups of complementary PWM signals to control the three half-bridges in the three-phase half-bridge circuit to control the operation of the motor;

[0029] Wherein, the third-party functional module in the microcontroller circuit collects motor-related signals during operation to perform feedback control on the motor.

[0030] As described above, a microcontroller circuit and a motor control system of the utility model propose a new timer output control scheme through the design of a timer module and a channel control module, so that the timer output has selectivity and the flexibility of output control is improved; when applied in the field of motor control, it can be selected whether the output is affected by the brake signal, so that continuous trigger sampling of other functional devices such as analog-to-digital converters can be completed by only one timer; compared with the prior art solution of using two timers, the utility model uses one timer with lower cost and stronger market competitiveness. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] Figure 1 Shown is a schematic diagram of the structure of the microcontroller circuit in Example 1.

[0032] Figure 2 It is a schematic diagram of the structure of the timer module and the channel control module in the first embodiment.

[0033] Figure 3 Shown is an exemplary structural diagram of the microcontroller circuit in Example 1.

[0034] Figure 4 It shows a schematic diagram of the structure of the motor control system in the second embodiment.

[0035] Component number description

[0036] 10 Motor Control System

[0037] 100 Microcontroller Circuit

[0038] 110 Timer module

[0039] 111 Period Register

[0040] 112 Count register

[0041] 113 First compare register

[0042] 114 Second compare register

[0043] 115 Enable register

[0044] 116 Select register

[0045] 120 channel control module

[0046] 121 First channel unit

[0047] 121a First pulse generator

[0048] 121b Dead Zone Generator

[0049] 121c First output selector

[0050] 121d First polarity selector

[0051] 122 Second channel unit

[0052] 122a Second pulse generator

[0053] 122b Second output selector

[0054] 122c Second polarity selector

[0055] 123 Predetermined signal detector

[0056] 130 Third-party function modules

[0057] 200 Gate drive circuit

[0058] 300 Three-phase half-bridge circuit

[0059] 400 Motor DETAILED DESCRIPTION

[0060] The following is an explanation of the implementation of the present invention through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific implementations, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention.

[0061] See also Figures 1 to 4 It should be noted that the structures, proportions, sizes, etc. illustrated in the drawings in this specification are only used to match the contents disclosed in the specification for people familiar with this technology to understand and read, and are not used to limit the limiting conditions for the implementation of the utility model, so they have no substantial technical significance. Any modification of the structure, change in the proportion relationship, or adjustment of the size should still fall within the scope of the technical content disclosed by the utility model without affecting the effects and purposes that can be achieved by the utility model. At the same time, the terms such as "upper", "lower", "left", "right", "middle" and "one" quoted in this specification are only for the convenience of description, and are not used to limit the scope of the implementation of the utility model. The change or adjustment of their relative relationship should also be regarded as the scope of the implementation of the utility model without substantially changing the technical content.

[0062] Embodiment 1

[0063] like Figure 1 As shown, this embodiment provides a microcontroller circuit 100 , including a timer module 110 and a channel control module 120 , and further includes a third-party function module 130 .

[0064] The timer module 110 is used to provide a count value CNT, a first comparison value CCR1, a second comparison value CCR2, a predetermined enable signal BICE, a first selection signal BICS_CH1 and a second selection signal BICS_CH2; in practical applications, the timer module 110 is also used to provide a period value ARR.

[0065] As an example, Figure 2As shown, the timer module 110 includes a period register 111, a count register 112, a first comparison register 113, a second comparison register 114, an enable register 115 and a selection register 116; the period register 111 is used to provide a period value ARR, the count register 112 is used to provide a count value CNT, the first comparison register 113 is used to provide a first comparison value CCR1, the second comparison register 114 is used to provide a second comparison value CCR2, the enable register 115 is used to provide a predetermined enable signal BICE, and the selection register 116 is used to provide a first selection signal BICS_CH1 and a second selection signal BICS_CH2. It should be noted that the above values ​​and signals are pre-set according to actual needs, and can be obtained by writing corresponding data in the corresponding registers.

[0066] Among them, the period value ARR, the count value CNT, the first comparison value CCR1 and the second comparison value CCR2 are determined by actual needs, and this embodiment does not limit this. The predetermined enable signal BICE indicates whether the predetermined signal BRAK affects the output of each channel unit in the channel control module 120. BICE=0 indicates that the predetermined signal BRAK affects the output of each channel unit. BICE=1 indicates that the predetermined signal BRAK can selectively affect the output of each channel unit, that is, the predetermined signal BRAK affects the output of the unselected channel unit, but does not affect the output of the selected channel unit. The first selection signal BICS_CH1 indicates whether the first channel unit 121 is selected. BICS_CH1=0 indicates that the first channel unit 121 is not selected. BICS_CH1=1 indicates that the first channel unit 121 is selected; the second selection signal BICS_CH2 indicates whether the second channel unit 122 is selected. BICS_CH2=0 indicates that the second channel unit 122 is not selected. BICS_CH2=1 indicates that the second channel unit 122 is selected.

[0067] When the output of each channel unit is controlled based on BICE, BICS_CH1 and BICS_CH2: if BICE=0, the predetermined signal BRAK affects the output of each channel unit, and BICS_CH1 and BICS_CH2 are invalid. If BICE=1, the predetermined signal BRAK affects the output of the unselected channel unit but does not affect the output of the selected channel unit. At this time: if BICS_CH1=0, BICS_CH2=0, the first channel unit 121 and the second channel unit 122 are not selected, so they are both affected by the predetermined signal BRAK. This function is the same as BICE=0; if BICS_CH1=0, BICS_CH2=1, the first channel unit 121 is not selected, so it is affected by the predetermined signal BRAK, and the second channel unit 122 is selected, so it is not affected by the predetermined signal BRAK; if BICS_CH1=1, BICS_CH2=0, the first channel unit 121 is selected, so it is not affected by the predetermined signal BRAK, and the second channel unit 122 is not selected, so it is affected by the predetermined signal BRAK; if BICS_CH1=1, BICS_CH2=1, the first channel unit 121 and the second channel unit 122 are both selected, so they are not affected by the predetermined signal BRAK.

[0068] The channel control module 120 includes a first channel unit 121 and a second channel unit 122, and further includes a predetermined signal detector 123 (such as Figure 2 shown).

[0069] The first channel unit 121 is connected to the timer module 110, and is used to generate a first channel signal according to the comparison result of the count value CNT and the first comparison value CCR1, and when the predetermined signal BRAK arrives, controls whether the first channel signal is output according to the predetermined enable signal BICE and the first selection signal BICS_CH1, so as to control the state of the subsequent load through the first channel signal; in actual applications, the first channel unit 121 is also used to set the period of the first channel signal according to the period value ARR.

[0070] For different application scenarios, the first channel unit 121 can be selected to continue to output the first channel signal or stop outputting the first channel signal when the predetermined signal BRAK arrives; for example, in a motor application, when the predetermined signal BRAK is a brake signal, the first channel unit 121 stops outputting the first channel signal when the predetermined signal BRAK arrives, wherein the first channel signal is a set of complementary PWM signals (including OC1 and OC1N) to respectively control the upper bridge tube and the lower bridge tube in the corresponding half bridge.

[0071] As an example, Figure 2As shown, the first channel unit 121 includes a first pulse generator 121a, a dead zone generator 121b and a first output selector 121c, and further includes a first polarity selector 121d.

[0072] The first pulse generator 121a is connected to the timer module 110, and is used to generate a first pulse signal according to the comparison result of the count value CNT and the first comparison value CCR1; in actual application, the first pulse generator 121a is also used to set the period of the first channel signal according to the period value ARR. The first pulse generator 121a can be implemented in an existing known manner, and this embodiment does not limit this.

[0073] The dead zone generator 121b is connected to the first pulse generator 121a, and is used to generate a set of complementary signals according to the first pulse signal and insert the dead zone time therein to obtain a set of complementary PWM signals as the first channel signals (including OC1 and OC1N).

[0074] In one embodiment, the dead zone generator 121b includes an inversion part and a dead zone insertion part. The inversion part obtains a set of complementary signals by inverting the first pulse signal twice in a row, and the dead zone insertion part obtains a set of complementary PWM signals by inserting dead zone time into a set of complementary signals. The inversion part and the dead zone insertion part can be implemented in an existing known manner, and this embodiment does not limit this.

[0075] The first output selector 121c is connected to the timer module 110 and the dead zone generator 121b, and performs logic operations on the predetermined signal BRAK, the predetermined enable signal BICE and the first selection signal BICS_CH1 to stop outputting the first channel signal (including OC1 and OC1N) when the predetermined signal BRAK arrives.

[0076] In one embodiment, the first output selector 121c includes an enabling part and a control part. The enabling part performs logical operations on a predetermined signal BRAK, a predetermined enable signal BICE and a first selection signal BICS_CH1 to generate a control signal. The control part controls whether the first channel signal is output according to the control signal. The enabling part and the control part are both implemented using digital logic circuits to facilitate rapid control.

[0077] The first polarity selector 121d is connected between the dead zone generator 121b and the first output selector 121c, and is used to set the polarity of the first channel signal (i.e., the complementary PWM signal). In practical applications, the first polarity selector 121d can invert the complementary PWM signal to change the polarity, or it can not change the polarity of the complementary PWM signal, which is determined by actual needs; and the addition of the first polarity selector 121c is conducive to improving the universality of the microcontroller circuit 100, so that it can be applied to different application scenarios.

[0078] The second channel unit 122 is connected to the timer module 110, and is used to generate a second channel signal OC2 according to the comparison result of the count value CNT and the second comparison value CCR2, and when the predetermined signal BRAK arrives, controls whether the second channel signal OC2 is output according to the predetermined enable signal BICE and the second selection signal BICS_CH2, so as to control whether the third-party function module 130 is triggered through the second channel signal OC2; in actual applications, the second channel unit 122 is also used to set the period of the second channel signal OC2 according to the period value ARR.

[0079] For different application scenarios, the second channel unit 122 can be selected to continue outputting the second channel signal OC2 or stop outputting the second channel signal OC2 when the predetermined signal BRAK arrives; for example, in motor applications, when the predetermined signal BRAK is a brake signal, the second channel unit 122 continues to output the second channel signal OC2 when the predetermined signal BRAK arrives.

[0080] As an example, Figure 2 As shown, the second channel unit 122 includes a second pulse generator 122a and a second output selector 122b, and further includes a second polarity selector 122c.

[0081] The second pulse generator 122a is connected to the timer module 110, and is used to generate a second pulse signal as the second channel signal OC2 according to the comparison result of the count value CNT and the second comparison value CCR2; in actual application, the second pulse generator 122a is also used to set the period of the second channel signal OC2 according to the period value ARR, and the period of the second channel signal is the same as the period of the first channel signal. The second pulse generator 122a can be implemented in an existing known manner, and this embodiment does not limit this.

[0082] The second output selector 122b is connected to the timer module 110 and the second pulse generator 122a, and performs logic operation on the predetermined signal BRAK, the predetermined enable signal BICE and the second selection signal BICS_CH2 to continue to output the second channel signal OC2 when the predetermined signal BRAK arrives. The second output selector 122b is the same as the first output selector 121c, and both include an enable part and a control part. The relevant contents can be found in the above text, and will not be repeated here.

[0083] The second polarity selector 122c is connected between the second pulse generator 122a and the second output selector 122b, and is used to set the polarity of the second channel signal OC2. In practical applications, the second polarity selector 122c can invert the second channel signal OC2 to change the polarity, or it can not change the polarity of the second channel signal OC2, which is determined by actual needs; and the addition of the second polarity selector 122c is conducive to improving the universality of the microcontroller circuit 100, so that it can be applied to different application scenarios.

[0084] The predetermined signal detector 123 determines whether the predetermined signal BRAK arrives by detecting the input signal DETI, so as to provide the predetermined signal BRAK to each channel unit so that each channel unit performs corresponding output control.

[0085] The third-party functional module 130 is connected to the second channel unit 122 and is triggered to work by the second channel signal OC2. In one embodiment, the third-party functional module 130 includes an analog-to-digital converter; in another embodiment, the third-party functional module 130 includes a comparator; of course, in other embodiments, the third-party functional module 130 may also include other functional modules, which has no substantial impact on this embodiment.

[0086] In actual applications, the channel control module 120 may include a larger number of channel units, and the channel units of the same structure that perform the same output control are classified into one category and expressed using the same name. In this way, the channel control module 120 may include two or more first channel units 121, and may also include two or more second channel units 122; and when the channel control module 120 includes two or more second channel units 122, the corresponding third-party functional modules 130 may be the same functional devices or different functional devices. Of course, the channel control module 120 may also include other channel units that are different from the first channel unit 121 or the second channel unit 122 in at least one of the structure and output control. For example, the channel control module 120 also includes a third channel unit that has the same structure as the second channel unit 122 but has a different output control. In this case, the microcontroller circuit 100 also includes another corresponding functional module.

[0087] When the channel control module 120 includes more channel units, the same number of comparison values ​​and selection signals need to be set, wherein one channel unit corresponds to one comparison value and one selection signal. When the channel control module 120 includes two or more first channel units 121, the timer module 110 provides two or more first comparison values ​​and two or more first selection signals, and when the channel control module 120 includes two or more second channel units 122, the timer module 110 provides two or more second comparison values ​​and two or more second selection signals; wherein each first comparison value may be the same or different, and similarly, each second comparison value may be the same or different. Of course, when the channel control module 120 includes other channel units, the timer module 110 also provides other comparison values ​​and other selection signals, such as, when the channel control module 120 includes a third channel unit, the timer module 110 also provides a third comparison value and a third selection signal. It should be noted that each comparison value is provided through a different comparison register, and each selection signal is provided through the same selection register.

[0088] Taking motor application as an example, the number of first channel units 121 is three, the number of second channel units 122 is equal to the number of third-party functional modules 130 and the number of third-party functional modules 130 is greater than or equal to one, and the timer module 110 provides three first comparison values, three first selection signals, a second comparison value greater than or equal to one, and a second selection signal; wherein, the third-party functional module 130 selects at least one of an analog-to-digital converter and a comparator.

[0089] Assuming that the predetermined signal detector 123 detects a brake signal, the number of the third-party functional module 130 is one and is an analog-to-digital converter, such as Figure 3As shown. In the timer module 110, a period value ARR is provided through a period register 111, a count value CNT is provided through a count register 112, three first comparison values ​​CCR11, CCR12, and CCR13 are provided through three first comparison registers 113, a second comparison value CCR2 is provided through a second comparison register 114, a predetermined enable signal BICE is provided through an enable register 115, and three first selection signals BICS_CH11, BICS_CH12, and BICS_CH13 and a second selection signal BICS_CH2 are provided through a selection register 116; in the channel control module 120, the number of first channel units 121 is three, and the number of second channel units 122 is one; wherein BICE=1 is pre-written in the enable register 115, and BICS_CH11=0, BICS_CH12=0, BICS_CH13=0, and BICS_CH2=1 are pre-written in the selection register 116. In this way, when the brake signal arrives, the three first channel units 121 stop outputting complementary PWM signals to control the motor to stop running, and the second channel unit 122 continues to output the second channel signal OC2 to continuously trigger the analog-to-digital converter to work, so that the operation of the analog-to-digital converter is not affected by the brake signal. In this embodiment, the timer module 110 and the channel control module 120 constitute a timer. This embodiment can achieve different controls of the motor and the analog-to-digital converter by only one timer when the brake signal arrives.

[0090] Embodiment 2

[0091] like Figure 4 As shown, this embodiment provides a motor control system 10 , including a microcontroller circuit 100 , a gate driving circuit 200 and a three-phase half-bridge circuit 300 .

[0092] The microcontroller circuit 100 is used to provide three sets of complementary PWM signals; wherein the microcontroller circuit 100 is implemented using the structure described in the first embodiment.

[0093] In one embodiment, the third-party functional module 130 in the microcontroller circuit 100 is an analog-to-digital converter, which, when triggered to work, collects motor-related signals, such as the three-phase currents of the three-phase half-bridge circuit 300, to perform feedback control on the motor 400.

[0094] In order to perform feedback control on the motor 400, the microcontroller circuit 100 should also include a feedback control module (not shown in the figure), which is connected between the third-party functional module 130 and the channel control module 120. Of course, the feedback control module can also have other connection methods as long as it can complete the feedback control of the motor.

[0095] The gate drive circuit 200 is connected to the microcontroller circuit 100, and is used to generate three sets of half-bridge control signals according to the three sets of complementary PWM signals to control the three half-bridges in the three-phase half-bridge circuit 300 to control the operation of the motor 400. The gate drive circuit 200 can be implemented using an existing known circuit structure, and this embodiment does not limit this.

[0096] In summary, a microcontroller circuit and a motor control system of the utility model propose a new timer output control scheme through the design of a timer module and a channel control module, so that the timer output has selectivity and the flexibility of output control is improved; when applied in the field of motor control, it can be selected whether the output is affected by the brake signal, so that continuous trigger sampling of other functional devices such as analog-to-digital converters can be completed by only one timer; compared with the prior art solution of using two timers, the utility model uses one timer with lower cost and stronger market competitiveness.

[0097] The above embodiments are merely illustrative of the principles and effects of the present invention, and are not intended to limit the present invention. Anyone familiar with the technology may modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by a person of ordinary skill in the art without departing from the spirit and technical concept disclosed in the present invention shall still be covered by the claims of the present invention.

Claims

1. A microcontroller circuit, characterized in that: The microcontroller circuit comprises: A timer module and a channel control module, wherein the channel control module includes a first channel unit and a second channel unit; The timer module is used to provide a count value, a first comparison value, a second comparison value, a predetermined enable signal, a first selection signal and a second selection signal; The first channel unit is connected to the timer module, and is used to generate a first channel signal according to a comparison result between the count value and the first comparison value, and when a predetermined signal arrives, control whether the first channel signal is output according to the predetermined enable signal and the first selection signal; The second channel unit is connected to the timer module, and is used to generate a second channel signal according to the comparison result of the count value and the second comparison value, and when the predetermined signal arrives, control whether the second channel signal is output according to the predetermined enable signal and the second selection signal.

2. The microcontroller circuit according to claim 1, characterized in that The timer module is also used to provide a period value, and the first channel unit and the second channel unit are also used to set the period of the first channel signal and the second channel signal according to the period value; wherein the timer module includes a period register, a count register, a first comparison register, a second comparison register, an enable register and a selection register, the period register is used to provide the period value, the count register is used to provide the count value, the first comparison register is used to provide the first comparison value, the second comparison register is used to provide the second comparison value, the enable register is used to provide the predetermined enable signal, and the selection register is used to provide the first selection signal and the second selection signal.

3. The microcontroller circuit according to claim 1, characterized in that The first channel unit stops outputting the first channel signal when the predetermined signal arrives, and the second channel unit continues outputting the second channel signal when the predetermined signal arrives.

4. The microcontroller circuit according to claim 3, characterized in that: The first channel unit comprises: a first pulse generator, a dead zone generator, and a first output selector; The first pulse generator is connected to the timer module and is used to generate a first pulse signal according to a comparison result between the count value and the first comparison value; The dead zone generator is connected to the first pulse generator, and is used to generate a set of complementary signals according to the first pulse signal and insert dead zone time therein to obtain a set of complementary PWM signals as the first channel signal; The first output selector is connected to the timer module and the dead zone generator, and performs logic operation on the predetermined signal, the predetermined enable signal and the first selection signal to stop outputting the first channel signal when the predetermined signal arrives.

5. The microcontroller circuit according to claim 4, characterized in that The first channel unit further includes a first polarity selector connected between the dead zone generator and the first output selector, and configured to set the polarity of the first channel signal.

6. The microcontroller circuit according to claim 3, characterized in that: The second channel unit comprises: a second pulse generator and a second output selector; The second pulse generator is connected to the timer module and is used to generate a second pulse signal as the second channel signal according to a comparison result between the count value and the second comparison value; The second output selector is connected to the timer module and the second pulse generator, and performs logic operations on the predetermined signal, the predetermined enable signal and the second selection signal to continue outputting the second channel signal when the predetermined signal arrives.

7. The microcontroller circuit according to claim 6, characterized in that The second channel unit further includes a second polarity selector connected between the second pulse generator and the second output selector, and configured to set the polarity of the second channel signal.

8. The microcontroller circuit according to any one of claims 1 to 7, characterized in that: The microcontroller circuit also includes a third-party functional module, which is connected to the second channel unit and is triggered to work by the second channel signal; wherein the number of the first channel units is three, the number of the second channel units is equal to the number of the third-party functional modules and the number of the third-party functional modules is greater than or equal to one, and the timer module provides three first comparison values, three first selection signals, greater than or equal to one second comparison value and the second selection signal.

9. The microcontroller circuit according to claim 8, characterized in that The third-party functional module includes an analog-to-digital converter or a comparator.

10. A motor control system, characterized in that: The motor control system comprises: The microcontroller circuit, gate drive circuit and three-phase half-bridge circuit as claimed in claim 8 or 9; The microcontroller circuit is used to provide three sets of complementary PWM signals; The gate drive circuit is connected to the microcontroller circuit and is used to generate three groups of half-bridge control signals according to three groups of complementary PWM signals to control the three half-bridges in the three-phase half-bridge circuit to control the operation of the motor; Wherein, the third-party functional module in the microcontroller circuit collects motor-related signals during operation to perform feedback control on the motor.

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