Test circuit and test device for three-phase six-arm full-bridge driver
The test circuit and device for three-phase six-arm full-bridge drivers efficiently groups densely packed pins into sparsely arranged test ports, reducing human error and improving impedance testing efficiency and accuracy.
Patent Information
- Application Number
- CN202420004294.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-01-02
- Publication Date
- 2024-12-20
- Estimated Expiration
- 2034-01-02
AI Technical Summary
The existing impedance testing methods for three-phase six-arm full-bridge drivers are inefficient and prone to human error due to densely arranged pins, leading to potential damage during testing.
A test circuit and device that groups densely arranged pins into sparsely arranged test ports, using switches and discharge resistors to control transistor conduction and cutoff, allowing for efficient resistance measurements through test ports.
Improves test efficiency and reduces the risk of product damage by spacing test ports, enhancing stability and accuracy in impedance testing.
Smart Images
Figure CN222212861U_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to the field of microelectronic testing technology, and in particular, to a test circuit and a test device for a three-phase six-arm full-bridge driver. Background Art
[0002] A full-bridge driver is a circuit commonly used for driving DC motors. It can realize the functions of forward rotation, reverse rotation, and braking of the motor, and is therefore widely used in various DC motor control systems. After the full-bridge driver is packaged and before it is shipped out of the factory, it is usually necessary to conduct air tightness testing and appearance testing. Practice has shown that during the above-mentioned factory inspection process, if the operation is improper, it is very likely to cause electrostatic damage to the product. Therefore, before shipping, it is often necessary to conduct relevant tests on the product, among which impedance testing is the most commonly used test item to verify whether the product has been damaged or even failed by electrostatics.
[0003] At present, the impedance test of the three-phase six-arm full-bridge driver is mostly carried out with a multimeter or an ohmmeter. First, the pins of the three-phase six-arm full-bridge driver are touched to turn on (and off) the transistors therein, and then the on-resistance (and off-resistance) values are obtained by touching the pins. The above resistance values are then used to determine whether the product is abnormal.
[0004] like Figure 1 As shown, taking a three-phase six-arm full-bridge driver using six N-type field effect transistors as switches as an example, the full-bridge driver usually has 17 pins. Among them, S1, S2, ... S6, G1, G2, ... G6 are the lead pins of the S pole (source) and G pole (gate) of the six field effect transistors V1, V2, ... V6 respectively; L+ is the common lead pin of the D pole (drain) of the field effect transistors V1, V3, and V5; L- is the common lead pin of the S pole of the field effect transistors V2, V4, and V6; L1 is the common lead pin of the S pole of the field effect transistor V1 and the D pole (drain) of the field effect transistor V2; L2 is the common lead pin of the S pole of the field effect transistor V3 and the D pole of the field effect transistor V4; L3 is the common lead pin of the S pole of the field effect transistor V5 and the D pole of the field effect transistor V6.
[0005] Testing the above three-phase six-arm full-bridge driver includes the following steps:
[0006] Use the red test lead of the ohmmeter to touch the pins G1, G2, ... G6 of the product under test, and correspondingly, use the black test lead to touch the pins S1, S2, ... S6, at this time, the field effect transistors V1 to V6 in the three-phase six-arm full-bridge driver should all be in the on state; then, first use the red test lead to touch the pin L+, and use the black test lead to touch the pins L3, L2 and L1 respectively; then use the black test lead to touch the pin L-, and use the red test lead to touch the pins L3, L2 and L1 respectively. According to the above process, six groups of resistance values are measured.
[0007] Use the black test lead of the ohmmeter to touch the pins G1, G2, ... G6 of the product under test, and correspondingly, use the red test lead to touch the pins S1, S2, ... S6, at this time, the field effect transistors V1 to V6 in the three-phase six-arm full-bridge driver should all be in the cut-off state; then, first use the red test lead to touch the pin L+, and use the black test lead to touch the pins L3, L2 and L1 respectively; then use the black test lead to touch the pin L-, and the red test lead to touch the pins L3, L2, L1 respectively. According to the above process, another six groups of resistance values are measured.
[0008] In the above test process, since the pins of the three-phase six-arm full-bridge driver are densely arranged, it is difficult and time-consuming to align the resistance test lead with the pins that you want to touch and connect. At the same time, the power supply of the resistance meter is used to contact the pins through the test lead to turn on or off the field effect transistors in the three-phase six-arm full-bridge driver, resulting in low test efficiency and the risk of damage to the product under test due to operational errors.
[0009] Therefore, how to perform efficient impedance testing on a three-phase six-arm full-bridge driver is a problem that needs to be solved at present. Utility Model Content
[0010] In order to solve the above problems existing in the prior art, the present disclosure provides a test circuit for a three-phase six-arm full-bridge driver in a first aspect, the test circuit comprising a control unit and a test unit; wherein,
[0011] The control unit includes a plurality of control branches, each of which includes a switch and a discharge resistor. The plurality of control branches correspond to a plurality of field effect transistors in the tested product, i.e., a three-phase six-arm full-bridge driver, and are used to connect the gate of the corresponding field effect transistor to the positive electrode of the power supply via the corresponding switch, and to connect the source to the negative electrode of the power supply. The switch is connected in series between the gate of the corresponding field effect transistor and the positive electrode of the power supply, and the discharge resistor is connected in parallel between the gate and the source of the corresponding field effect transistor.
[0012] The test unit includes a plurality of test ports, which are connected to pins of the product under test and further connected to the same or different electrodes of a plurality of field effect transistors in the product under test.
[0013] In the embodiment of the present disclosure, the test circuit can realize the conduction and cutoff of each field effect transistor inside the three-phase six-arm full-bridge driver by closing and opening the switch; by using the test port, the on-resistance and off-resistance of each field effect transistor can be obtained accordingly, so that it can be judged whether the full-bridge driver to be tested is normal based on the measured multiple groups of resistance values.
[0014] According to the above embodiment, due to the introduction of the switch and by bringing out the electrodes of each transistor to be tested as a test port, compared with the prior art, not only is the stability good, but the test ports are also arranged sparsely, so the product testing speed is no longer limited by factors such as pin density, thereby reducing the probability of test errors and even product damage, and greatly improving the test efficiency.
[0015] Optionally, the aforementioned control unit also includes a current limiting resistor, which is connected in series between the positive pole of the power supply and multiple control branches to limit the current of the circuit and prevent the control branch current from being too large and causing damage to the product under test.
[0016] Optionally, the product under test, i.e., a three-phase six-arm full-bridge driver, has first to sixth field effect transistors and a plurality of pins, wherein the plurality of pins include a pin L+, a pin L-, and pins L1 to L3;
[0017] The multiple test ports include: a first test port, which can be connected to the drains of the first, third and fifth field effect transistors through pin L+; a second test port, which can be connected to the sources of the second, fourth and sixth field effect transistors through pin L-; a third test port, which can be connected to the source of the first field effect transistor and the drain of the second field effect transistor through pin L1; a fourth test port, which can be connected to the source of the third field effect transistor and the drain of the fourth field effect transistor through pin L2; and a fifth test port, which can be connected to the source of the fifth field effect transistor and the drain of the sixth field effect transistor through pin L3.
[0018] A second aspect of the present disclosure further provides a testing device, the testing device comprising:
[0019] The test circuit provided by the first aspect of the present disclosure;
[0020] The circuit board is used to carry the socket, and the control unit and the test unit in the test circuit.
[0021] The power jack includes a positive jack and a negative jack, which are used to plug in the positive pole and the negative pole of the power supply respectively to supply power to the test circuit.
[0022] Optionally, the testing device can be used to measure the resistance value between any two of the plurality of test ports by using a resistance measuring instrument.
[0023] Further, the resistance measuring instrument can measure the resistance values between the first test port and the third, fourth, and fifth test ports respectively, or can measure the resistance values between the second test port and the third, fourth, and fifth test ports respectively.
[0024] Optionally, the control unit, the socket and the test unit are respectively arranged on the circuit board along the first direction.
[0025] Optionally, a plurality of switches in the control unit are arranged along a second direction, a plurality of discharge resistors in the control unit are arranged along the second direction and are disposed between the plurality of switches and the sockets, and the second direction is perpendicular to the first direction.
[0026] Optionally, the current limiting resistor and the power socket in the control unit are arranged on one side of the switch along the second direction.
[0027] Optionally, the socket is configured to have the second direction as its length direction.
[0028] The above technical solution can at least achieve the following beneficial effects:
[0029] The present disclosure provides a test circuit and a test device for a three-phase six-arm full-bridge driver, which can group the densely arranged multiple pins of the three-phase six-arm full-bridge driver into several test ports, control the conduction and cutoff of the field effect transistor through a switch, and obtain the on-resistance value and the off-resistance value of each field effect transistor through the test port, and finally judge whether the product to be shipped has electrostatic damage or even failure. Therefore, the use of the test circuit and the test device can greatly improve the test efficiency.
[0030] At the same time, since the test ports can be spaced and sparsely arranged according to actual test requirements, it is not easy to accidentally touch adjacent ports when using a resistance test lead to contact the test port, thereby reducing the possibility of human damage to the three-phase six-arm full-bridge driver. BRIEF DESCRIPTION OF THE DRAWINGS
[0031] The accompanying drawings are used to provide a further understanding of the present disclosure and constitute a part of this specification. The accompanying drawings illustrate embodiments of the present disclosure and together with the following description are used to explain the principles of the present disclosure.
[0032] Figure 1 The pin distribution diagram of the existing three-phase six-arm full-bridge driver is shown;
[0033] Figure 2 A test circuit diagram for a three-phase six-arm full-bridge driver provided by an embodiment of the present disclosure is shown;
[0034] Figure 3 An embodiment of the present disclosure provides a test board layout diagram for testing a three-phase six-arm full-bridge driver.
[0035] The reference numerals in the figure represent respectively:
[0036] 1 control unit;
[0037] K1 is the first switch, K2 is the second switch, K3 is the third switch, K4 is the fourth switch, K5 is the fifth switch, and K6 is the sixth switch;
[0038] R0 current limiting resistor;
[0039] R1 is a first discharge resistor, R2 is a second discharge resistor, R3 is a third discharge resistor, R4 is a fourth discharge resistor, R5 is a fifth discharge resistor, and R6 is a sixth discharge resistor;
[0040] 2 sockets;
[0041] V1 is a first field effect transistor, V2 is a second field effect transistor, V3 is a third field effect transistor, V4 is a fourth field effect transistor, V5 is a fifth field effect transistor, and V6 is a sixth field effect transistor;
[0042] 3 test unit;
[0043] P1 is the first test port, P2 is the second test port, P3 is the third test port, P4 is the fourth test port, and P5 is the fifth test port;
[0044] 4 power sockets, 401 positive socket, 402 negative socket;
[0045] 5 circuit boards. DETAILED DESCRIPTION
[0046] In this specification, it will also be understood that when describing the relationship of a component relative to other components or ports, such as "connected to", it means that the one component can be directly connected to or directly coupled to the one component or port, or there may also be a third component in between; in addition, in the embodiments of the present disclosure, "connection" specifically mainly refers to electrical connection.
[0047] The present disclosure will now be described more fully below with reference to the accompanying drawings, however, the present disclosure can be implemented in many different ways and should not be construed as being limited to the embodiments set forth herein. On the contrary, providing these embodiments herein will make the present disclosure more detailed and complete, and fully convey the scope of the present disclosure to those skilled in the art. The same reference numerals throughout the text represent the same objects.
[0048] In view of the defects in the prior art, the present disclosure provides a test circuit and a test device for a three-phase six-arm full-bridge driver. Hereinafter, exemplary embodiments according to the present disclosure will be described with reference to the accompanying drawings.
[0049] The first aspect of the present disclosure provides a test circuit for a three-phase six-arm full-bridge driver (hereinafter referred to as: test circuit), such as Figure 2 As shown, an external DC power supply is used to power the test circuit, wherein the test circuit includes: a control unit 1 and a test unit 3; wherein,
[0050] The three-phase six-arm full-bridge driver as the product under test can be plugged into the socket 2 , and the control unit 1 and the test unit 3 can be connected to the product under test through the socket 2 .
[0051] The control unit 1 includes multiple control branches corresponding to multiple field effect transistors in the product under test, each control branch includes a switch and a discharge resistor; the control branch is used to connect the gate of the corresponding field effect transistor to the positive pole of the power supply via the corresponding switch, and connect the source to the negative pole of the power supply, and the multiple discharge resistors can be connected in parallel with the gate and source of the corresponding field effect transistor.
[0052] The test unit 3 includes a plurality of test ports, which can be connected to pins of the product under test, for example, through the socket 2, and further connected to the same or different electrodes of a plurality of field effect transistors in the product under test.
[0053] According to the above embodiment, the control unit 1 may further include a current limiting resistor R0, which is connected in series between the positive pole of the power supply and multiple control branches to limit the current of each control branch and prevent damage to the product under test due to excessive current.
[0054] According to the above embodiment, the product under test may include a plurality of field effect transistors and a plurality of pins connected to the same or different electrodes of the plurality of field effect transistors. Figure 1 and Figure 2 As shown, the three-phase six-arm full-bridge driver includes 6 field effect transistors, namely the first field effect transistor to the sixth field effect transistor, namely V1 to V6, and 17 pins connected to the same or different electrodes as the field effect transistors V1 to V6, of which 5 pins are L+, L-, L1 to L3, and the other 12 pins are G1, S1, G2, S2, G3, S3, G4, S4, G5, S5, G6, and S6.
[0055] The test unit 3 includes 5 test ports, namely the first test port to the fifth test port, namely P1 to P5, corresponding to the above 5 pins respectively. Among them, the first test port P1 can be connected to the drain of the first, third and fifth field effect transistors through the pin L+; the second test port P2 can be connected to the source of the second, fourth and sixth field effect transistors through the pin L-; the third test port P3 can be connected to the source of the first field effect transistor and the drain of the second field effect transistor through the pin L1; the fourth test port P4 can be connected to the source of the third field effect transistor and the drain of the fourth field effect transistor through the pin L2; the fifth test port P5 can be connected to the source of the fifth field effect transistor and the drain of the sixth field effect transistor through the pin L3.
[0056] The above test circuit can convert the densely arranged multiple pins of the three-phase six-arm full-bridge driver into test ports arranged at intervals. With the introduction of the branch switch, the power supply part replaces the role of the resistance meter. Compared with the existing technology, the number of ports that need to be contacted and connected to the resistance meter is reduced and the interval distance is increased, and the stability is significantly improved. When using the resistance meter pen for testing, it is only necessary to measure the resistance value between a small number of test ports, which can reduce the risk of human damage caused by accidental touch during operation and greatly improve the test efficiency.
[0057] A second aspect of the present disclosure provides a test device for a three-phase six-arm full-bridge driver, such as Figure 3 As shown, the test device includes:
[0058] A test circuit for a three-phase six-arm full-bridge driver as provided in the first aspect of the present disclosure;
[0059] Circuit board 5, used for welding the socket 2, control unit 1 and test unit 3 in the test circuit;
[0060] The power socket 4 includes a positive socket 401 and a negative socket 402, which are used to plug in the positive pole and the negative pole of the power supply respectively to supply power to the test circuit.
[0061] According to the above embodiment, the circuit board 5 may be, for example, a printed circuit board (PCB); the control unit 1, the socket 2 and the test unit 3 are sequentially arranged in accordance with Figure 3 The vertical direction of the arrangement is arranged on the circuit board 5.
[0062] According to the above embodiment, the power socket 4, the multiple switches in the control unit 1, the multiple discharge resistors and the current limiting resistor R0 are all arranged on the same side of the socket 2, and the test unit 3 is arranged on the other side of the socket 2. In a specific embodiment, Figure 3As shown, the current limiting resistor R0 is preferably arranged on the left side of the power socket 4, multiple switches K1~K6 are preferably arranged on the left side of the current limiting resistor R0, multiple discharge resistors R1~R6 are arranged between the socket 2 and the multiple switches, and the multiple switches, multiple discharge resistors and multiple test ports are arranged in sequence along the length direction of the socket 2.
[0063] According to the above embodiment, the test device can also be used to test the resistance value between any two of the multiple test ports by a resistance measuring instrument. In a preferred embodiment, the resistance measuring instrument can be a device capable of measuring resistance values, such as an ohmmeter or a multimeter. The resistance measuring instrument can measure the resistance value between any two of the multiple test ports, and in particular, the resistance measuring instrument can measure the resistance value between the first test port P1 and the third, fourth, and fifth test ports, or can measure the resistance value between the second test port P2 and the third, fourth, and fifth test ports.
[0064] According to the above embodiment, when the switches in multiple control branches are closed respectively, the above resistance measuring instrument can obtain the on-resistance values of the corresponding field effect transistors in the multiple control circuits through the test unit; when the switches in multiple control branches are opened respectively, the above resistance measuring instrument can obtain the off-resistance values of the field effect transistors in the multiple control circuits through the test unit.
[0065] According to the above embodiment, the on-resistance value of the field effect transistor in normal operation and on state is theoretically 0Ω, and the off-resistance value of the field effect transistor in normal operation and off state is theoretically infinite. However, in practice, factors such as measurement error and manufacturing process need to be considered. Therefore, in the embodiment of the present disclosure, the on-resistance value of the field effect transistor in the on state is preferably judged by whether it is less than 1.5Ω, and the off-resistance value of the field effect transistor in the off state is preferably judged by whether it is greater than 20kΩ.
[0066] In a specific embodiment of the present disclosure, when it is necessary to measure the on-resistance of the first field effect transistor V1, the switch K1 is closed, and the resistance value between the first test port P1 and the third test port P3 is measured to obtain the first on-resistance value. For the on-resistance of the third field effect transistor V3 and the fifth field effect transistor V5, the measurement method is the same as that of the first field effect transistor V1, and no further description is given here, so as to obtain the third on-resistance value and the fifth on-resistance value.
[0067] Similarly, when it is necessary to measure the on-resistance of the second field effect transistor V2, the switch K2 is closed, and the resistance value between the second test port P2 and the third test port P3 is measured to obtain the second on-resistance value. For the on-resistance of the fourth field effect transistor V4 and the sixth field effect transistor V6, the measurement method is the same as that of the second field effect transistor V2, which is not described here, so as to obtain the fourth on-resistance value and the sixth on-resistance value.
[0068] For the cut-off resistance of the field effect transistors V1 to V6 , the switches K1 to K6 need to be opened respectively, and the resistance between the test ports is measured in the above manner, which will not be described in detail here, so as to obtain the first to sixth cut-off resistance values.
[0069] In a specific embodiment, if Figure 2 As shown, the test circuit includes a control unit 1, a socket 2 and a test unit 3. Among them, the three-phase six-arm full-bridge driver includes 6 field effect transistors V1-V6; the control unit 1 includes 6 control branches corresponding to the 6 field effect transistors V1-V6, and the control branch can connect the gate of the corresponding field effect transistor V1-V6 to the positive pole of the power supply through the corresponding switch K1-K6, and connect the source to the negative pole of the power supply; and the control branch also includes discharge resistors R1-R6, and the discharge resistors R1-R6 can be connected in parallel with the gate and source of the corresponding field effect transistors V1-V6.
[0070] According to the above embodiment, the discharge resistors R1 to R6 are connected in parallel with the three-phase six-arm full-bridge driver. Figure 1 The discharge resistors R1 to R6 are connected in parallel at the gate and source of the field effect transistors V1 to V6, and are used to discharge the gates of the field effect transistors V1 to V6 to the negative electrode of the power supply when the switch is turned off.
[0071] The test unit 3 includes 5 test ports P1~P5, which can be connected to the pins of the product under test through the socket 2, and then connect the same or different electrodes of the field effect transistors V1~V6 in the product under test. The three-phase six-arm full-bridge driver includes 5 pins, namely L+, L-, L1, L2 and L3. Among them, L+ is connected to the drain ends of the first, third and fifth field effect transistors V1, V3 and V5 respectively; L- is connected to the drain ends of the second, fourth and sixth field effect transistors V2, V4 and V6 respectively; L1 is connected to the source of the first field effect transistor V1 and the drain of the second field effect transistor V2 respectively; similarly, L2 is connected to the source of the third field effect transistor V3 and the drain of the fourth field effect transistor V4 respectively; L3 is connected to the source of the fifth field effect transistor V5 and the drain of the sixth field effect transistor V6 respectively.
[0072] According to the above embodiment, the positive electrode of the external DC power supply is electrically connected to one end of the current limiting resistor R0, and the other end of the resistor R0 is respectively connected to one end of each branch switch K1 to K6. The other ends of the six switches K1 to K6 are respectively connected to the gates of the field effect transistors V1 to V6, that is, G1 to G6; the gates of the field effect transistors V1 to V6 are connected to the negative electrode of the external DC power supply through the discharge resistors R1 to R6 and form a loop respectively.
[0073] According to the above circuit connection scheme, the three-phase six-arm full-bridge driver is tested using the test circuit provided in this example, and the process is as follows:
[0074] First, turn on the power supply, close the switch K1, and the first field effect transistor V1 inside the three-phase six-arm full-bridge driver is in the on state. At this time, use an ohmmeter to measure the resistance between the first test port P1 and the third test port P3 to obtain the first on-resistance value, the ideal value of which is 0Ω. Since factors such as measurement error and manufacturing process need to be considered in practice, in this example, when the measured value is preferably less than 1.5Ω, the field effect transistor V1 can be considered to be in a normal state.
[0075] According to the above example, after obtaining the first on-resistance value, the switch K1 is turned off, and the gate (G pole) of the first field effect transistor V1 is discharged to the negative pole of the external DC power supply through the discharge resistor R1, so that the first field effect transistor V1 is in the off state. At this time, the resistance between the first test port P1 and the third test port P3 is measured again using an ohmmeter to obtain the first off-resistance value, and its ideal value is infinite. Since factors such as measurement error and manufacturing process need to be considered in practice, in this example, when the measured value is preferably greater than 20kΩ, the field effect transistor V1 can be considered to be in a normal state.
[0076] According to the above embodiment, when the switches K3 and K5 are closed in sequence, the resistance between the first test port P1 and the fourth test port P4 and the resistance between the first test port P1 and the fifth test port P5 are measured respectively using an ohmmeter, and the third on-resistance value and the fifth on-resistance value can be obtained through the above test process. When each measured value is preferably less than 1.5Ω, the field effect transistors V3 and V5 are both in normal state.
[0077] According to the above example, after obtaining the third on-resistance value and the fifth on-resistance value, the switches K3 and K5 are disconnected respectively, and the gates of the field effect transistors V3 and V5 are discharged to the negative electrode of the external DC power supply through the discharge resistors R3 and R5, so that the field effect transistors V3 and V5 are in the off state. At this time, the resistance between the first test port P1 and the fourth test port P4 and the resistance between the first test port P1 and the fifth test port P5 are measured again using an ohmmeter to obtain the third off-resistance value and the fifth off-resistance value, and the ideal value thereof is infinite. Since factors such as measurement error and manufacturing process need to be considered in practice, in this example, when the measured value is preferably greater than 20kΩ, the field effect transistors V3 and V5 can be considered to be in a normal state.
[0078] Similarly, after the power is turned on, the switch K2 is closed, and the field effect transistor V2 inside the three-phase six-arm full-bridge driver is in the on state. At this time, the resistance between the second test port P2 and the third test port P3 is measured using an ohmmeter to obtain the second on-resistance value. Considering factors such as measurement error and manufacturing process, when the measured value is less than 1.5Ω, it can be considered that the field effect transistor V2 is in a normal state.
[0079] After obtaining the second on-resistance value, the switch K2 is turned off, and the gate of the field effect transistor V2 is discharged to the negative electrode of the external DC power supply through the discharge resistor R2, so that the field effect transistor V2 is in the off state. At this time, the resistance between the second test port P2 and the third test port P3 is measured again using an ohmmeter to obtain the second off-resistance value. Considering factors such as measurement error and manufacturing process, when the measured value is greater than 20kΩ, the field effect transistor V2 can be considered to be in a normal state.
[0080] Similarly, when the switches K4 and K6 are closed respectively, the resistance between the second test port P2 and the fourth test port P4 and the resistance between the second test port P2 and the fifth test port P5 are measured respectively using an ohmmeter, and the fourth on-resistance value and the sixth on-resistance value can be obtained through the above test process. When each measured value is less than 1.5Ω, it can be considered that the field effect transistors V4 and V6 are both in normal state.
[0081] The switches K4 and K6 are disconnected respectively, and the gates of the field effect transistors V4 and V6 are discharged to the negative electrode of the external DC power supply through the discharge resistors R4 and R6, so that the field effect transistors V4 and V6 are in the cut-off state. At this time, the resistance between the second test port P2 and the fourth test port P4 and the resistance between the second test port P2 and the fifth test port P5 are measured again using an ohmmeter to obtain the fourth cut-off resistance value and the sixth cut-off resistance value. Considering factors such as measurement error and manufacturing process, when the measured value is greater than 20kΩ, the field effect transistors V4 and V6 can be considered to be in a normal state.
[0082] This example also provides a test device for testing a three-phase six-arm full-bridge driver. Figure 3 As shown, the test device includes a test circuit for a three-phase six-arm full-bridge driver provided in the first aspect of the above-mentioned example; a circuit board 5, used for welding a socket 2 carrying a three-phase six-arm full-bridge driver and a control unit 1 and a test unit 3 in the test circuit; a power jack 4, the power jack 4 includes a positive jack 401 and a negative jack 402, which are respectively used to plug in the positive pole and the negative pole of the power supply to power the test circuit.
[0083] According to the above example, the control unit 1 , the socket 2 and the test unit 3 are arranged in sequence on the circuit board 5 in a vertical direction.
[0084] According to the above example, the power socket 4, the multiple switches in the control unit 1, the multiple discharge resistors and the current limiting resistor R0 are all arranged on the same side of the socket 2, and the test unit 3 is arranged on the other side of the socket 2. In a specific embodiment, Figure 3 As shown, the current limiting resistor R0 is preferably set at Figure 3 On the left side of the power socket 4, multiple switches are preferably arranged Figure 3 On the left side of the middle current limiting resistor R0 , a plurality of discharge resistors are arranged between the socket 2 and the plurality of switches. The plurality of switches, the plurality of discharge resistors and the plurality of test ports are arranged in sequence along the length direction of the socket 2 .
[0085] According to the above example, the test device can be used to test the resistance value between any two of the five test ports P1~P5 through a resistance measuring instrument, that is, the resistance measuring instrument can measure the resistance value between the first test port and the third, fourth, and fifth test ports, or can measure the resistance value between the second test port and the third, fourth, and fifth test ports.
[0086] In summary, the present invention provides a test circuit and a test device for a three-phase six-arm full-bridge driver, which can group the densely packed pins of the full-bridge driver into several spaced and sparsely arranged test ports, and perform a failure test on the full-bridge driver to be tested through the test ports. Since the test ports are sparsely arranged, it is not easy to accidentally touch them when using a resistance test lead, thereby avoiding damage caused by human factors during the impedance test and greatly improving the efficiency of product factory testing.
[0087] The above is only a specific implementation of the embodiment of the present disclosure, but the protection scope of the embodiment of the present disclosure is not limited thereto. Any technician familiar with the technical field can easily think of changes or replacements within the technical scope disclosed in the embodiment of the present disclosure, which should be included in the protection scope of the embodiment of the present disclosure. Therefore, the protection scope of the embodiment of the present disclosure should be based on the protection scope of the claims.
Claims
1. A test circuit for a three-phase six-arm full-bridge driver, characterized in that: It comprises a control unit (1) and a test unit (3); wherein: The control unit (1) comprises a plurality of control branches, each control branch comprises a switch and a discharge resistor, the plurality of control branches correspond to a plurality of field effect transistors in the tested product, and are used to connect the gate of the corresponding field effect transistor to the positive electrode of the power supply via the corresponding switch, and to connect the source to the negative electrode of the power supply, the switch is connected in series between the gate of the corresponding field effect transistor and the positive electrode of the power supply, and the discharge resistor is connected in parallel between the gate and the source of the corresponding field effect transistor; The test unit (3) comprises a plurality of test ports, which are connected to pins of the product under test and further connected to the same or different electrodes of a plurality of field effect transistors in the product under test.
2. The test circuit according to claim 1, characterized in that: The control unit (1) further comprises a current limiting resistor, which is connected in series between the positive electrode of the power supply and the multiple control branches.
3. The test circuit according to claim 1 or 2, characterized in that: The product under test has first to sixth field effect transistors and a plurality of pins, wherein the plurality of pins include a pin L+, a pin L-, and pins L1 to L3; The plurality of test ports include: A first test port, capable of being connected to the drains of the first, third and fifth field effect transistors through a pin L+; A second test port, capable of being connected to the sources of the second, fourth and sixth field effect transistors through a pin L-; A third test port, which can be connected to the source of the first field effect transistor and to the drain of the second field effect transistor through the pin L1; a fourth test port, capable of being connected to the source of the third field effect transistor and to the drain of the fourth field effect transistor through the pin L2; The fifth test port can be connected to the source of the fifth field effect transistor and the drain of the sixth field effect transistor through the pin L3.
4. A testing device, characterized in that: include: The test circuit as claimed in any one of claims 1 to 3; A circuit board (5) for carrying the socket (2), and the control unit (1) and the test unit (3) in the test circuit; The power socket (4) comprises a positive socket (401) and a negative socket (402), which are respectively used to connect the positive electrode and the negative electrode of the power supply to supply power to the test circuit.
5. The testing device according to claim 4, characterized in that: The testing device can be used to measure the resistance value between any two of the multiple test ports by using a resistance measuring instrument.
6. The testing device according to claim 4, characterized in that: The control unit (1), the socket (2) and the test unit (3) are respectively arranged on the circuit board (5) along a first direction.
7. The testing device according to claim 6, characterized in that: The multiple switches in the control unit (1) are arranged along a second direction, the multiple discharge resistors in the control unit (1) are arranged along the second direction and are arranged between the multiple switches and the socket (2), and the second direction is perpendicular to the first direction.
8. The testing device according to claim 7, characterized in that: The current limiting resistor in the control unit (1) and the power socket (4) are arranged on one side of the switch along the second direction.
9. The testing device according to claim 8, characterized in that: The socket (2) is configured such that the second direction is the length direction.