Packaging structure with hollow substrate
By setting a multi-chip structure with a compensatory wiring layer on the top surface of the substrate, the problem that functional chips of different thicknesses cannot be electrically connected is solved, and the performance improvement and functional expansion of multi-chip packaging are achieved.
Patent Information
- Application Number
- CN202420943622.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-04-30
- Publication Date
- 2024-12-27
- Estimated Expiration
- 2034-04-30
AI Technical Summary
Functional chips of different thicknesses in existing multi-chip packaging structures cannot be effectively electrically connected, which limits the performance and functional expansion of the packaging structure.
By providing a first chip structure including a first functional chip and a second chip structure of a second functional chip on the top surface of the substrate, and a first re-wiring layer is provided on the first functional chip for thickness compensation, the first chip structure and The total heights of the second chip structure along a certain direction are equal, thereby realizing the electrical connection between the functional chips of different thicknesses and the bridge chips.
The electrical connection between functional chips of different thicknesses and bridge chips is achieved, breaking the limitations of thickness on multi-chip packaging, improving the performance of the packaging structure and expanding functions, improving integration and design flexibility.
Smart Images
Figure CN222261057U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the technical field of integrated circuit manufacturing, in particular to a packaging structure with a hollow substrate. Background Art
[0002] As various technical industries have higher and higher requirements for the integration and electrical performance of semiconductor devices, packaging technology also needs to be adaptively developed and innovated. A multi-chip stacked packaging structure is a packaging structure in which multiple functional chips are arranged on a packaging substrate. In order to reduce the size of the packaging structure, it is usually necessary to set a through hole on the packaging substrate at the bottom of the packaging structure so that at least part of the bridge chip used to electrically connect the functional chip to the packaging substrate can be located in the through hole. Moreover, setting a through hole in the packaging substrate can also enhance the heat dissipation effect of the packaging structure and ensure that the packaging structure can operate continuously and stably. However, in a multi-chip packaging structure, it is necessary to ensure that the thickness of the multiple functional chips is consistent in order to electrically connect the multiple functional chips to the bridge chip. This limits the applicability of the packaging of functional chips of different thicknesses, which is not conducive to the improvement of the performance of the packaging structure and the expansion of functions.
[0003] Therefore, how to avoid breaking the limitations of functional chips of different thicknesses on multi-chip packaging, thereby improving the performance of the packaging structure and expanding the functions of the packaging structure, is a technical problem that needs to be solved urgently. Summary of the invention
[0004] The utility model provides a packaging structure with a hollow substrate to solve the problem that functional chips of different thicknesses cannot be electrically connected to a bridge chip, thereby improving the performance of the packaging structure and expanding the function of the packaging structure.
[0005] According to some embodiments, the utility model provides a packaging structure with a hollow substrate, including:
[0006] A substrate, wherein the substrate has a through hole penetrating the substrate along a first direction, wherein the first direction is perpendicular to a top surface of the substrate;
[0007] a bridge chip, at least partially located in the through hole;
[0008] A first chip structure is located on the top surface of the substrate, the first chip structure includes a first function chip and a first redistribution layer located on a surface of the first function chip facing the substrate, the first redistribution layer electrically connecting the first function chip and the bridge chip;
[0009] The second chip structure is located on the top surface of the substrate, and the first chip structure and the second chip structure are
[0010] The chip structure is arranged along a second direction, the second chip structure includes a second functional chip, and the height of the second chip structure along the first direction is equal to the height of the first chip structure along the first direction, the second functional chip is electrically connected to the bridge chip, and the second direction is parallel to the top surface of the substrate.
[0011] In some embodiments, the first chip structure further includes a first conductive connection column, the first conductive connection column is located on a surface of the first redistribution layer facing the substrate and is electrically connected to the first redistribution layer and the bridge chip;
[0012] The second chip structure also includes a second conductive connecting column, which is located on the side of the second functional chip facing the substrate, and the second conductive connecting column electrically connects the bridge chip and the second functional chip, and the sum of the heights of the first functional chip, the first redistribution layer and the first conductive connecting column along the first direction is equal to the sum of the heights of the second functional chip and the second conductive connecting column along the first direction.
[0013] In some embodiments, it also includes:
[0014] A plastic encapsulation layer is used to encapsulate the first chip structure, the second chip structure and the bridge chip, and a surface of the plastic encapsulation layer facing away from the substrate is flush with a surface of the first functional chip facing away from the substrate and a surface of the second functional chip facing away from the substrate.
[0015] In some embodiments, it also includes:
[0016] a first heat dissipation cover, continuously covering a surface of the first functional chip away from the substrate, a surface of the second functional chip away from the substrate, and a surface of the plastic sealing layer away from the substrate;
[0017] The second heat dissipation cover covers the surface of the bridge chip away from the plastic packaging layer.
[0018] In some embodiments, a side surface of the second heat dissipation cover contacts a side wall of the through hole, and a size of the second heat dissipation cover is larger than a size of the bridge chip.
[0019] In some embodiments, a plurality of the first conductive connection pillars are arranged at intervals at least along the second direction, and a portion of the first conductive connection pillars are electrically connected to the substrate; a plurality of the second conductive connection pillars are arranged at intervals at least along the second direction, and a portion of the second conductive connection pillars are electrically connected to the substrate; the packaging structure with a hollow substrate further includes:
[0020] The third conductive connecting column is located on the surface of the bridge chip facing the first chip structure and is electrically connected to the bridge chip, another portion of the first conductive connecting columns are electrically connected to a portion of the third conductive connecting columns, and another portion of the second conductive connecting columns are electrically connected to another portion of the third conductive connecting columns.
[0021] In some embodiments, the second chip structure also includes a second redistribution layer located between the second functional chip and the second conductive connecting column, the second redistribution layer electrically connects the bridge chip and the second functional chip, and the sum of the heights of the first functional chip, the first redistribution layer and the first conductive connecting column along the first direction is equal to the sum of the heights of the second functional chip, the second redistribution layer and the second conductive connecting column along the first direction.
[0022] In some embodiments, the first redistribution layer includes a first wiring area and a second wiring area distributed along the second direction, the wiring density of the first wiring area is greater than the wiring density of the second wiring area, and the first wiring area is electrically connected to the bridge chip.
[0023] In some embodiments, the second redistribution layer includes a third wiring area and a fourth wiring area distributed along the second direction, the wiring density of the third wiring area is greater than the wiring density of the fourth wiring area, and the third wiring area is electrically connected to the bridge chip.
[0024] In some embodiments, it also includes:
[0025] The third redistribution layer is located on a partial area of the surface of the bridge chip facing the first chip structure, and the third redistribution layer is electrically connected to the first redistribution layer.
[0026] In some embodiments, it also includes:
[0027] a dielectric layer, located on a surface of the bridge chip facing the second chip structure, and the third redistribution layer and the dielectric layer are arranged in the same layer along the second direction;
[0028] A third conductive connection column penetrates the dielectric layer along the first direction, and one end of the third conductive connection column is electrically connected to the second chip structure, and the other end of the third conductive connection column is electrically connected to the bridge chip.
[0029] The packaging structure with a hollow substrate provided by the utility model realizes multi-chip packaging by arranging a first chip structure including a first functional chip and a second chip structure including a second functional chip on the top surface of the substrate, thereby improving the integration of the packaging structure. At the same time, by arranging a first redistribution layer on the side of the first functional chip facing the substrate, the first redistribution layer is used to compensate the thickness of the first functional chip, so that the total height of the first chip structure along the first direction is equal to the total height of the second chip structure along the first direction, so that the first functional chip and the second functional chip after height compensation can be electrically connected to the bridge chip at the same time, realizing the electrical connection between functional chips of different thicknesses and the bridge chip, breaking the limitation of the thickness of the functional chip on the multi-chip packaging, thereby improving the performance of the packaging structure and expanding the function of the packaging structure. BRIEF DESCRIPTION OF THE DRAWINGS
[0030] Attached Figure 1 It is a first cross-sectional schematic diagram of a packaging structure with a hollow substrate in a specific embodiment of the utility model;
[0031] Attached Figure 2 It is a schematic diagram of a first structure of a specific embodiment of the utility model after forming a first chip structure and a second chip structure;
[0032] Attached Figure 3 This is a schematic diagram of the first structure after the bridge chip is formed in the specific implementation mode of the utility model;
[0033] Attached Figure 4 The specific implementation of the utility model is a schematic diagram of the first structure after connecting the bridge chip with the first chip structure and the second chip structure;
[0034] Attached Figure 5 This is a schematic diagram of the first structure of a specific embodiment of the utility model after the plastic sealing layer is formed;
[0035] Attached Figure 6 It is a second cross-sectional schematic diagram of a packaging structure with a hollow substrate in a specific embodiment of the utility model;
[0036] Attached Figure 7 It is a schematic diagram of a second structure of a specific embodiment of the utility model after the first chip structure and the second chip structure are formed;
[0037] Attached Figure 8 This is a second structural schematic diagram after the bridge chip is formed in a specific embodiment of the utility model;
[0038] Attached Fig. 9 The specific implementation of the utility model is a second structural schematic diagram after connecting the bridge chip with the first chip structure and the second chip structure;
[0039] Attached Fig.10 This is a schematic diagram of the second structure of the specific implementation method of the utility model after the plastic sealing layer is formed;
[0040] Attached Fig.11 It is a third cross-sectional schematic diagram of a packaging structure with a hollow substrate in a specific embodiment of the utility model;
[0041] Attached Fig.12 It is a schematic diagram of a third structure of a specific embodiment of the utility model after the first chip structure and the second chip structure are formed;
[0042] Attached Fig.13 It is a third structural schematic diagram after the bridge chip is formed in the specific implementation mode of the utility model;
[0043] Attached Fig.14 The specific implementation mode of the utility model is a third structural schematic diagram after connecting the bridge chip with the first chip structure and the second chip structure;
[0044] Attached Fig.15 It is a third structural schematic diagram of the specific implementation mode of the utility model after the plastic sealing layer is formed. DETAILED DESCRIPTION
[0045] The specific implementation of the packaging structure with a hollow substrate provided by the utility model is described in detail below with reference to the accompanying drawings.
[0046] This specific embodiment provides a packaging structure with a hollow substrate, Figure 1 1 is a schematic cross-sectional view of a first embodiment of a packaging structure with a hollow substrate in the present utility model. Figure 1 As shown, the packaging structure with a hollow substrate includes:
[0047] A substrate 10, wherein the substrate 10 has a through hole 18 penetrating the substrate 10 along a first direction D1, wherein the first direction D1 is perpendicular to a top surface of the substrate 10;
[0048] The bridge chip 11 is at least partially located in the through hole 18;
[0049] A first chip structure, located on the top surface of the substrate 10, the first chip structure comprising a first function chip 12 and a first redistribution layer 14 located on a surface of the first function chip 12 facing the substrate 10, the first redistribution layer 14 electrically connecting the first function chip 12 and the bridge chip 11;
[0050] The second chip structure is located on the top surface of the substrate 10, the first chip structure and the second chip structure are arranged along the second direction D2, the second chip structure includes a second functional chip 13, and the height of the second chip structure along the first direction D1 is equal to the height of the first chip structure along the first direction D1, the second functional chip 13 is electrically connected to the bridge chip 11, and the second direction D2 is parallel to the top surface of the substrate 10.
[0051] Specifically, the substrate 10 may be a printed circuit board. The substrate 10 includes a top surface and a bottom surface relatively distributed along the first direction D1, and a circuit layer located in the substrate 10. The first chip structure and the second chip structure are both located on the top surface of the substrate 10 along the first direction D1, and a lead solder ball 22 is provided on the bottom surface of the substrate 10. The lead solder ball 22 is electrically connected to the circuit layer in the substrate 10, and is used to lead out the signals in the first chip structure and the second chip structure through the circuit layer or transmit control signals to the first chip structure and the second chip structure through the circuit layer. In an example, the first function chip 12 in the first chip structure and the second function chip 13 in the second chip structure are both flip-chip mounted on the top surface of the substrate 10. The thickness of the first function chip 12 along the first direction D1 is less than the thickness of the second function chip 13 along the first direction D1. In an example, the difference between the thickness of the first function chip 12 along the first direction D1 and the thickness of the second function chip 13 along the first direction D1 is greater than or equal to 30 microns. The first redistribution layer 14 is disposed on the surface of the first functional chip 12 facing the substrate 10 along the first direction D1, and the first redistribution layer 14 is not only used to electrically connect the first functional chip 12, but also used to perform height compensation for the first functional chip 12, so that the thickness of the first chip structure including the first functional chip 12 and the first redistribution layer 14 along the first direction D1 is equal to the thickness of the second chip structure including the second functional chip 13 along the first direction D1. The substrate 10 has the through hole 18 penetrating the substrate 10 along the first direction D1, thereby forming a hollow substrate structure. In one example, the bridge chip 11 is entirely located in the through hole 18 to further reduce the size of the package structure with the hollow substrate. In another example, a portion of the bridge chip 11 is located in the through hole 18, and another portion protrudes from the top surface of the substrate 10 along the first direction D1, thereby simplifying the connection operation of the bridge chip 11 with the first functional chip 12 and the second functional chip 13.
[0052] In this specific embodiment, the first redistribution layer 14 is arranged on the side of the first functional chip 12 facing the substrate 10, thereby performing height compensation on the first functional chip 12, so that the thickness of the first chip structure including the first functional chip 12 and the first redistribution layer 14 along the first direction D1 is equal to the thickness of the second chip structure including the second functional chip 13 along the first direction D1. For example, the surface of the first redistribution layer 14 facing the substrate 10 is flush with the surface of the second functional chip 13 facing the substrate 10, and the surface of the first functional chip 12 away from the first redistribution layer 14 is flush with the surface of the second functional chip 13 away from the substrate 10, so that the first functional chip 12 and the second functional chip 13 after height compensation can be electrically connected to the bridge chip 11 at the same time, thereby realizing the electrical connection between functional chips of different thicknesses and the bridge chip, breaking the limitation of the thickness of the functional chip on the multi-chip package, thereby improving the performance of the packaging structure and expanding the function of the packaging structure. At the same time, by adjusting the wiring density on the surface of the first functional chip through the first redistribution layer, the design flexibility of the functional chip and the compatibility with the wiring density on the substrate surface can be improved, and the difficulty of substrate design and manufacturing can be reduced.
[0053] In some embodiments, the first chip structure further includes a first conductive connection column 23, which is located on a surface of the first redistribution layer 14 facing the substrate 10 and is electrically connected to the first redistribution layer 14 and the bridge chip 11;
[0054] The second chip structure also includes a second conductive connecting column 17, which is located on the side of the second functional chip 13 facing the substrate 10, and the second conductive connecting column 17 electrically connects the bridge chip 11 and the second functional chip 13. The sum of the heights of the first functional chip 12, the first redistribution layer 14 and the first conductive connecting column 23 along the first direction D1 is equal to the sum of the heights of the second functional chip 13 and the second conductive connecting column 17 along the first direction D1.
[0055] Specifically, since the wiring density of the surface of the first redistribution layer 14 facing the substrate 10 is different from the wiring density of the surface of the second functional chip 13 facing the substrate 10, the height of the first conductive connection column 23 along the first direction D1 is different from the height of the second conductive connection column 17 along the first direction D1. For example, if the wiring density of the surface of the first redistribution layer 14 facing the substrate 10 is greater than the wiring density of the surface of the second functional chip 13 facing the substrate 10, the height of the first conductive connection column 23 along the first direction D1 is less than the height of the second conductive connection column 17 along the first direction D1. In this specific embodiment, the height of the first redistribution layer 14 along the first direction D1 can be adjusted so that the sum of the heights of the first redistribution layer 14, the first functional chip 12 and the first conductive connection column 23 along the first direction D1 (i.e., the total height of the first chip structure along the first direction D1) is equal to the sum of the heights of the second functional chip 13 and the second conductive connection column 17 along the first direction D1 (i.e., the total height of the second chip structure along the first direction D1). This allows functional chips of different heights to be electrically connected to the bridge chip at the same time, and allows the conductive connection column to match the wiring density (for example, the first conductive connection column 23 matches the wiring density of the first redistribution layer 14 and the second conductive connection column 17 matches the wiring density of the second functional chip 13), thereby helping to simplify the manufacturing process of the packaging structure having the hollow substrate.
[0056] In some embodiments, the packaging structure with a hollow substrate further includes:
[0057] The plastic encapsulation layer 15 encapsulates the first chip structure, the second chip structure and the bridge chip 11. The surface of the plastic encapsulation layer 15 facing away from the substrate 10 is flush with the surface of the first function chip 12 facing away from the substrate 10 and the surface of the second function chip 13 facing away from the substrate 10.
[0058] For example, if Figure 1As shown, the first function chip 12 in the first chip structure is electrically connected to the bridge chip 11 and the circuit layer in the substrate 10 through the first redistribution layer 14, and the second function chip 13 in the second chip structure is electrically connected to the bridge chip 11 and the circuit layer in the substrate 10 directly through the second conductive connection column 17 located on the second function chip 13. The plastic encapsulation layer 15 continuously encapsulates the first function chip 12, the first redistribution layer 14, the second function chip 13 and the bridge chip 11. In one example, the material of the plastic encapsulation layer 15 is epoxy resin molding compound. By encapsulating the first function chip 12, the second function chip 13, the first redistribution layer 14 and the bridge chip 11 through the plastic encapsulation layer 15, the first redistribution layer 14 can be protected and supported, thereby further improving the stability of the packaging structure with a hollow substrate.
[0059] In some embodiments, the packaging structure with a hollow substrate further includes:
[0060] A first heat dissipation cover 16 continuously covers a surface of the first function chip 12 away from the substrate 10 , a surface of the second function chip 13 away from the substrate 10 , and a surface of the plastic sealing layer 15 away from the substrate 10 ;
[0061] The second heat dissipation cover 20 covers the surface of the bridge chip 11 facing away from the plastic packaging layer 15 .
[0062] Specifically, if Figure 1 As shown, the first heat dissipation cover 16 can enhance the heat dissipation effect of the first function chip 12 and the second function chip 13, and the second heat dissipation cover 20 can enhance the heat dissipation effect of the bridge chip 11. In an example, the material of the first heat dissipation cover 16 is the same as that of the second heat dissipation cover 20, for example, both are metal materials.
[0063] In some embodiments, a side surface of the second heat dissipation cover 20 contacts a side wall of the through hole 18 , and a size of the second heat dissipation cover 20 is larger than a size of the bridge chip 11 .
[0064] Specifically, if Figure 1As shown, the side wall of the second heat dissipation cover 20 is in contact with the side wall of the through hole 18, that is, the second heat dissipation cover 20 is embedded in the through hole 18 and closes the through hole 18, so that the second heat dissipation cover 20 not only has a heat dissipation effect, but also can protect the side of the bridge chip 11. The size of the second heat dissipation cover 20 (for example, the width of the second heat dissipation cover 20 along the second direction D2) is the same as the size of the through hole 18 (for example, the width of the through hole 18 along the second direction D2), and the size of the bridge chip 11 (for example, the width of the bridge chip 11 along the second direction D2) is smaller than the size of the through hole 18 (for example, the width of the through hole 18 along the second direction D2), so that the operation of installing the bridge chip 11 to the through hole 18 can be simplified, and the side of the bridge chip 11 can be better protected. Moreover, the size of the second heat dissipation cover 20 is the same as that of the through hole 18 , and the size of the bridge chip 11 is smaller than that of the through hole 18 , so as to facilitate installation of the bridge chip 11 in the through hole 18 and plastic packaging of the bridge chip 11 .
[0065] In some embodiments, a plurality of the first conductive connection pillars 23 are arranged at intervals at least along the second direction D2, and a portion of the first conductive connection pillars 23 are electrically connected to the substrate 10; a plurality of the second conductive connection pillars 17 are arranged at intervals at least along the second direction D2, and a portion of the second conductive connection pillars 17 are electrically connected to the substrate 10; the packaging structure with a hollow substrate further includes:
[0066] The third conductive connecting column 21 is located on the surface of the bridge chip 11 facing the first chip structure and is electrically connected to the bridge chip 11, another portion of the first conductive connecting columns 23 are electrically connected to a portion of the third conductive connecting columns 21, and another portion of the second conductive connecting columns 17 are electrically connected to another portion of the third conductive connecting columns 21.
[0067] For example, if Figure 1As shown, the plurality of first conductive connection pillars 23 located on the surface of the first redistribution layer 14 facing the substrate 10 are arranged at intervals along the second direction D2, the plurality of second conductive connection pillars 17 located on the surface of the second functional chip 13 facing the substrate 10 are arranged at intervals along the second direction D2, and the plurality of third conductive connection pillars 21 located on the surface of the bridge chip 11 facing the first chip structure and the second chip structure are arranged at intervals along the second direction D2. A portion of the first conductive connection pillars 23 are electrically connected to the substrate 10, another portion of the first conductive connection pillars 23 are electrically connected to a portion of the third conductive connection pillars 21, a portion of the second conductive connection pillars 17 are electrically connected to the substrate 10, and another portion of the second conductive connection pillars 17 are electrically connected to another portion of the third conductive connection pillars 21.
[0068] For example, if Figure 1 The package structure with a hollow substrate shown in the figure can be formed by the following steps: first, the first function chip 12 and the second function chip 13 are mounted on the first carrier 30 through the first release film, and the first redistribution layer 14 is formed on the first function chip 12, so that the surface of the first redistribution layer 14 facing away from the first carrier 30 is flush with the surface of the second function chip 13 facing away from the first carrier 30. Then, the first conductive connection column 23 is formed on the first redistribution layer 14, and the second conductive connection column 17 is formed on the second function chip 13, as shown in FIG. Figure 2 Next, the third conductive connecting column 21 is formed on the bridge chip 11, as shown in FIG. Figure 3 As shown. Afterwards, the bridge chip 11 is electrically connected to the first redistribution layer 14 and the second functional chip 13, that is, a part of the first conductive connection columns 23 are electrically connected to a part of the third conductive connection columns 21, and a part of the second conductive connection columns 17 are electrically connected to another part of the third conductive connection columns 21. Next, the bridge chip is placed in the through hole 18 in the substrate 10, and the first functional chip 12 and the second functional chip 13 provided with the first redistribution layer 14 are mounted on the substrate 10, so that another part of the first conductive connection columns 23 are electrically connected to the substrate 10, and another part of the second conductive connection columns 17 are electrically connected to the substrate 10, and the second heat dissipation cover plate 20 is mounted on the surface of the bridge chip 11 away from the first functional chip 12 and the second functional chip 13, as shown. Figure 4 After removing the first carrier board 30 and the first release film, the plastic sealing layer 15 is formed to plastic seal the first functional chip 12, the second functional chip 13 and the bridge chip 11, and Figure 5 Next, the first heat dissipation cover plate 16 is mounted on the surface of the first function chip 12 and the second function chip 13 facing away from the substrate 10, and the Figure 1 The structure shown.
[0069] Attached Figure 6 is a second cross-sectional schematic diagram of a packaging structure with a hollow substrate in a specific embodiment of the utility model. Figure 6 As shown, the second chip structure also includes a second redistribution layer 60 located between the second functional chip 13 and the second conductive connecting column 17, the second redistribution layer 60 electrically connects the bridge chip 11 and the second functional chip 13, and the sum of the heights of the first functional chip 12, the first redistribution layer 14 and the first conductive connecting column 23 along the first direction D1 is equal to the sum of the heights of the second functional chip 13, the second redistribution layer 60 and the second conductive connecting column 17 along the first direction D1.
[0070] For example, the sum of the heights of the first function chip 12, the first redistribution layer 14 and the first conductive connection column 23 along the first direction D1 (i.e., the total height of the first chip structure along the first direction D1) is equal to the sum of the heights of the second function chip 13, the second redistribution layer 60 and the second conductive connection column 17 along the first direction D1 (i.e., the total height of the second chip structure along the first direction D1), so that the surface of the first conductive connection column 23 away from the first function chip 12 is flush with the surface of the second conductive connection column 17 away from the second function chip 13. Since the bridge chip 11 is a high-density chip, by arranging the high-density first redistribution layer 14 on the surface of the first function chip 12 and the high-density second redistribution layer 60 on the surface of the second function chip 13, not only can the first function chip 12 and the second function chip 13 be height compensated respectively, but also can be adapted to the high-density bridge chip 11, thereby improving the stability of the electrical connection between the first function chip 12 and the second function chip 13 and the bridge chip 11.
[0071] In some embodiments, the first redistribution layer 14 includes a first wiring area P1 and a second wiring area P2 distributed along the second direction D2 , the wiring density of the first wiring area P1 is greater than the wiring density of the second wiring area P2 , and the first wiring area P1 is electrically connected to the bridge chip 11 .
[0072] For example, the first redistribution layer 14 includes the first high-density wiring area P1 and the second low-density wiring area P2, and the wiring density of the first wiring area P1 is adapted to the wiring density of the bridge chip 11, so that the first wiring area P1 can be stably electrically connected to the bridge chip 11. The wiring density of the second wiring area P2 is adapted to the wiring density of the circuit layer in the substrate 10, so that the second wiring area P2 can be stably electrically connected to the substrate 10. In one example, the second redistribution layer 60 also includes a third wiring area and a fourth wiring area distributed along the second direction D2, the wiring density of the third wiring area is greater than the wiring density of the fourth wiring area, and the third wiring area is electrically connected to the bridge chip 11.
[0073] For example, if Figure 6 The packaging structure with a hollow substrate shown in the figure can be formed by the following steps: first, the first functional chip 12 and the second functional chip 13 are mounted on the second carrier 70 through the second release film, and the first redistribution layer 14 is formed on the first functional chip 12, and the second redistribution layer 60 is formed on the second functional chip 13. The first redistribution layer 14 includes a first wiring area P1 and a second wiring area P2 distributed along the second direction D2, and the wiring density of the first wiring area P1 is greater than the wiring density of the second wiring area P2. The second redistribution layer 60 also includes a third wiring area P3 and a fourth wiring area P4 distributed along the second direction D2, and the wiring density of the third wiring area P3 is greater than the wiring density of the fourth wiring area P4. Next, the first conductive connection column 23 is formed on the first redistribution layer 14, and the second conductive connection column 17 is formed on the second redistribution layer 60, as shown in FIG. Figure 7 At this time, in order to simplify the process, the heights of all the first conductive connection pillars 23 along the first direction D1 can be set to be the same, and the heights of all the second conductive connection pillars 17 along the first direction D1 can be set to be the same, but the heights of the first conductive connection pillars 23 along the first direction D1 are the same as or different from the heights of the second conductive connection pillars 17 along the first direction D1. Next, the third conductive connection pillars 21 are formed on the bridge chip 11, as shown in FIG. Figure 8As shown. Afterwards, the bridge chip 11 is electrically connected to the first redistribution layer 14 and the second redistribution layer 60, that is, the first wiring area P1 shown in the first redistribution layer 14 is electrically connected to the bridge chip 11, and the third wiring area P3 in the second redistribution layer 60 is electrically connected to the bridge chip 11. Next, the bridge chip 11 is placed in the through hole 18 in the substrate 10, and the first function chip 12 provided with the first redistribution layer 14 and the second function chip 13 provided with the second redistribution layer 60 are mounted on the substrate 10, and the second wiring area P2 shown in the first redistribution layer 14 is electrically connected to the substrate 10, and the fourth wiring area P4 in the second redistribution layer 60 is electrically connected to the substrate, and the second heat dissipation cover plate 20 is mounted on the surface of the bridge chip 11 away from the first function chip 12 and the second function chip 13, as shown. Fig. 9 After removing the second carrier board 70 and the second release film, the plastic sealing layer 15 for sealing the first chip structure, the second chip structure and the bridge chip 11 is formed, as shown in FIG. Fig.10 Next, the first heat dissipation cover plate 16 is mounted on the surface of the first function chip 12 and the second function chip 13 facing away from the substrate 10, and the Figure 6 The structure shown.
[0074] Attached Fig.11 is a third cross-sectional schematic diagram of a packaging structure with a hollow substrate in a specific embodiment of the utility model. In some other embodiments, such as Fig.11 As shown, the packaging structure with a hollow substrate further includes:
[0075] The third redistribution layer 110 is located on a portion of the surface of the bridge chip 11 facing the first chip structure, and the third redistribution layer 110 is electrically connected to the first redistribution layer 14 .
[0076] In some embodiments, the packaging structure with a hollow substrate further includes:
[0077] The dielectric layer 111 is located on the surface of the bridge chip 11 facing the second chip structure, and the third redistribution layer 110 and the dielectric layer 111 are arranged in the same layer along the second direction D2;
[0078] The third conductive connection pillar 21 penetrates the dielectric layer 111 along the first direction D1 , and one end of the third conductive connection pillar 21 is electrically connected to the second chip structure, and the other end of the third conductive connection pillar 21 is electrically connected to the bridge chip 11 .
[0079] Specifically, the third redistribution layer 110 and the dielectric layer 111 are arranged along the second direction D2 on the surface of the bridge chip 11, so that the high-density third redistribution layer 110 can be electrically connected to the high-density first redistribution layer 14, and the low-density second functional chip 13 is electrically connected to the low-density bridge chip 11 through the third conductive connecting column 21 that penetrates the dielectric layer 111, so that the bridge chip 11 can be electrically connected to the first redistribution layer 14 and the second functional chip 13 with different wiring densities at the same time, so as to further expand the function of the packaging structure with a hollow substrate.
[0080] For example, if Fig.11 The package structure with a hollow substrate shown in the figure can be formed by the following steps: first, the first function chip 12 and the second function chip 13 are mounted on the third carrier 120 through the third release film, and the first redistribution layer 14 is formed on the first function chip 12. Then, the first conductive connection column 23 is formed on the first redistribution layer 14, and the second conductive connection column 17 is formed on the second function chip 13, so that the surface of the first conductive connection column 23 away from the first redistribution layer 14 is flush with the surface of the second conductive connection column 17 away from the second function chip 13, as shown in FIG. Fig.12 Next, the third redistribution layer 110, the dielectric layer 111 and the third conductive connection column 21 penetrating the dielectric layer 111 are formed on the bridge chip 11, as shown in FIG. Fig.13 As shown. Afterwards, the bridge chip 11 is electrically connected to the first redistribution layer 14 and the second functional chip 13, that is, a part of the first conductive connection pillars 23 are electrically connected to the third redistribution layer 110, and a part of the second conductive connection pillars 17 are electrically connected to the third conductive connection pillars 21. Next, the bridge chip 11 is placed in the through hole 18 in the substrate 10, and the first functional chip 12 and the second functional chip 13 provided with the first redistribution layer 14 are mounted on the substrate 10, so that another part of the first conductive connection pillars 23 are electrically connected to the substrate 10, and another part of the second conductive connection pillars 17 are electrically connected to the substrate 10, and the second heat dissipation cover plate 20 is mounted on the surface of the bridge chip 11 away from the first functional chip 12 and the second functional chip 13, as shown. Fig.14 After removing the third carrier board 120 and the third release film, the plastic sealing layer 15 for sealing the first chip structure, the second chip structure and the bridge chip 11 is formed, as shown in FIG. Fig.15 Next, the first heat dissipation cover plate 16 is mounted on the surface of the first function chip 12 and the second function chip 13 facing away from the substrate 10, and the Fig.11 The structure shown.
[0081] The packaging structure with a hollow substrate provided in this specific embodiment realizes multi-chip packaging by arranging a first chip structure including a first functional chip and a second chip structure including a second functional chip on the top surface of the substrate, thereby improving the integration of the packaging structure. At the same time, by arranging a first redistribution layer on the side of the first functional chip facing the substrate, the thickness of the first functional chip is compensated by the first redistribution layer, so that the total height of the first chip structure along the first direction is equal to the total height of the second chip structure along the first direction, so that the first functional chip and the second functional chip after height compensation can be electrically connected to the bridge chip at the same time, realizing the electrical connection between functional chips of different thicknesses and the bridge chip, breaking the limitation of the thickness of the functional chip on the multi-chip packaging, thereby improving the performance of the packaging structure and expanding the function of the packaging structure.
[0082] The above is only a preferred embodiment of the present invention. It should be pointed out that ordinary technicians in this technical field can make several improvements and modifications without departing from the principle of the present invention. These improvements and modifications should also be regarded as the protection scope of the present invention.
Claims
1. A packaging structure with a hollow substrate, characterized in that: include: A substrate, wherein the substrate has a through hole penetrating the substrate along a first direction, wherein the first direction is perpendicular to a top surface of the substrate; a bridge chip, at least partially located in the through hole; A first chip structure is located on the top surface of the substrate, the first chip structure includes a first function chip and a first redistribution layer located on a surface of the first function chip facing the substrate, the first redistribution layer electrically connecting the first function chip and the bridge chip; A second chip structure is located on the top surface of the substrate, the first chip structure and the second chip structure are arranged along a second direction, the second chip structure includes a second functional chip, and the height of the second chip structure along the first direction is equal to the height of the first chip structure along the first direction, the second functional chip is electrically connected to the bridge chip, and the second direction is parallel to the top surface of the substrate.
2. The packaging structure with a hollow substrate according to claim 1, characterized in that: The first chip structure further includes a first conductive connection column, which is located on a surface of the first redistribution layer facing the substrate and is electrically connected to the first redistribution layer and the bridge chip; The second chip structure also includes a second conductive connecting column, which is located on the side of the second functional chip facing the substrate, and the second conductive connecting column electrically connects the bridge chip and the second functional chip, and the sum of the heights of the first functional chip, the first redistribution layer and the first conductive connecting column along the first direction is equal to the sum of the heights of the second functional chip and the second conductive connecting column along the first direction.
3. The packaging structure with a hollow substrate according to claim 1, characterized in that: Also includes: A plastic encapsulation layer is used to encapsulate the first chip structure, the second chip structure and the bridge chip, and a surface of the plastic encapsulation layer facing away from the substrate is flush with a surface of the first functional chip facing away from the substrate and a surface of the second functional chip facing away from the substrate.
4. The packaging structure with a hollow substrate according to claim 3, characterized in that: Also includes: a first heat dissipation cover, continuously covering a surface of the first functional chip away from the substrate, a surface of the second functional chip away from the substrate, and a surface of the plastic sealing layer away from the substrate; The second heat dissipation cover covers the surface of the bridge chip away from the plastic packaging layer.
5. The packaging structure with a hollow substrate according to claim 4, characterized in that: The side surface of the second heat dissipation cover contacts the side wall of the through hole, and the size of the second heat dissipation cover is larger than the size of the bridge chip.
6. The packaging structure with a hollow substrate according to claim 2, characterized in that: A plurality of the first conductive connection pillars are arranged at intervals at least along the second direction, and a portion of the first conductive connection pillars are electrically connected to the substrate; a plurality of the second conductive connection pillars are arranged at intervals at least along the second direction, and a portion of the second conductive connection pillars are electrically connected to the substrate; The packaging structure with a hollow substrate further includes: The third conductive connecting column is located on the surface of the bridge chip facing the first chip structure and is electrically connected to the bridge chip, another portion of the first conductive connecting columns are electrically connected to a portion of the third conductive connecting columns, and another portion of the second conductive connecting columns are electrically connected to another portion of the third conductive connecting columns.
7. The packaging structure with a hollow substrate according to claim 2, characterized in that: The second chip structure also includes a second redistribution layer located between the second functional chip and the second conductive connecting column, the second redistribution layer electrically connects the bridge chip and the second functional chip, and the sum of the heights of the first functional chip, the first redistribution layer and the first conductive connecting column along the first direction is equal to the sum of the heights of the second functional chip, the second redistribution layer and the second conductive connecting column along the first direction.
8. The packaging structure with a hollow substrate according to claim 1, characterized in that: The first redistribution layer includes a first wiring area and a second wiring area distributed along the second direction. The wiring density of the first wiring area is greater than the wiring density of the second wiring area, and the first wiring area is electrically connected to the bridge chip.
9. The packaging structure with a hollow substrate according to claim 7, characterized in that: The second redistribution layer includes a third wiring area and a fourth wiring area distributed along the second direction, the wiring density of the third wiring area is greater than the wiring density of the fourth wiring area, and the third wiring area is electrically connected to the bridge chip.
10. The packaging structure with a hollow substrate according to claim 1, characterized in that: Also includes: The third redistribution layer is located on a partial area of the surface of the bridge chip facing the first chip structure, and the third redistribution layer is electrically connected to the first redistribution layer.
11. The packaging structure with a hollow substrate according to claim 10, characterized in that: Also includes: a dielectric layer, located on a surface of the bridge chip facing the second chip structure, and the third redistribution layer and the dielectric layer are arranged in the same layer along the second direction; A third conductive connection column penetrates the dielectric layer along the first direction, and one end of the third conductive connection column is electrically connected to the second chip structure, and the other end of the third conductive connection column is electrically connected to the bridge chip.